Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element

Abstract

Provided is a semiconductor light-emitting element having improved luminous output. The semiconductor light-emitting element of the present invention includes a light-emitting layer having a stacked structure in which a first Group III-V compound semiconductor layer and a second Group III-V compound semiconductor layer having different composition ratios are repeatedly stacked, wherein the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are each composed of three or more elements selected from Al, Ga, and In, and As, Sb, and P, the difference in composition wavelength between the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer is 50 nm or less, and the ratio of the lattice constant difference between the lattice constant of the first Group III-V compound semiconductor layer and the lattice constant of the second Group III-V compound semiconductor layer is 0.05% or more and 0.60% or less.

Description

Technical Field

[0001] The present invention relates to a semiconductor light emitting element and a method for manufacturing the semiconductor light emitting element. Background Art

[0002] As the semiconductor material for the semiconductor layer in semiconductor light-emitting devices, III-V compound semiconductors such as InGaAsP are used. By adjusting the composition ratio of the light-emitting layer formed of the III-V compound semiconductor material, the emission wavelength of the semiconductor light-emitting device can be adjusted widely between green and infrared. For example, infrared semiconductor light-emitting devices that emit in the infrared region of 750nm or longer are widely used in sensors, gas analyzers, surveillance cameras, and other applications.

[0003] Various attempts have been made to improve the characteristics of semiconductor light-emitting devices. For example, Patent Document 1 focuses on the difference in lattice constant between layers in a light-emitting layer obtained using a stacked structure of multiple Group III-V compound semiconductor layers.

[0004] Patent Document 1 utilizes a light-emitting layer having a quantum well structure composed of quaternary compound semiconductor layers of InGaAsP. In Patent Document 1, the composition ratio of each well layer is varied to adjust the lattice constant difference, thereby straining the quantum wells and attempting to achieve, for example, increased output associated with this strain. It should be noted that the composition ratio of each well layer in Patent Document 1 is adjusted to achieve an equal emission transition wavelength.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 7-147454 Summary of the Invention

[0008] Problems to be solved by the invention

[0009] In recent years, the applications of semiconductor light-emitting devices have been expanding, and there is a demand for technologies to further improve the light output of semiconductor light-emitting devices using Group III-V compound semiconductors as light-emitting layer materials.

[0010] Therefore, an object of the present invention is to provide a semiconductor light emitting element having improved light emitting output. Furthermore, an object of the present invention is to provide a method for manufacturing the semiconductor light emitting element.

[0011] Solutions for solving problems

[0012] To address the above-mentioned issues, the present inventors conducted extensive research and focused on the compositional wavelength differences and lattice constant differences between the layers in a light-emitting layer having a stacked structure comprising a first III-V compound semiconductor layer and a second III-V compound semiconductor layer. They discovered that by providing a stacked structure that minimizes the compositional wavelength differences and maintains a lattice constant difference within an appropriate range, the light output of a semiconductor light-emitting device can be improved. The present invention was completed based on this finding, and its main structure is as follows.

[0013] (1) A semiconductor light-emitting element comprising a light-emitting layer having a stacked structure in which a first Group III-V compound semiconductor layer and a second Group III-V compound semiconductor layer having different composition ratios are repeatedly stacked.

[0014] The Group III element in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer is one or more selected from the group consisting of Al, Ga, and In, and the Group V element in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer is one or more selected from the group consisting of As, Sb, and P.

[0015] The first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are both composed of three or more elements selected from the Group III elements and the Group V elements.

[0016] The difference in composition wavelength between the composition wavelength of the first III-V compound semiconductor layer and the composition wavelength of the second III-V compound semiconductor layer is less than 50 nm, and the ratio of the lattice constant difference between the lattice constant of the first III-V compound semiconductor layer and the lattice constant of the second III-V compound semiconductor layer is greater than 0.05% and less than 0.60%.

[0017] (2) The semiconductor light emitting element according to (1) above, wherein the ratio of the lattice constant difference is 0.3% or more.

[0018] (3) The semiconductor light emitting element according to (1) or (2) above, wherein the difference in composition wavelength between the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer is 30 nm or less.

[0019] (4) A semiconductor light-emitting element according to any one of (1) to (3) above, wherein the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are both composed of four or more elements selected from the Group III elements and the Group V elements.

[0020] (5) The semiconductor light emitting element according to (4) above, wherein among the elements constituting the four or more elements, the Group III elements are Ga and In, and the Group V elements are two or more selected from the group consisting of As, Sb, and P.

[0021] (6) The semiconductor light emitting element according to any one of (1) to (3) above, wherein the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are both quaternary compound semiconductors of InGaAsP.

[0022] (7) The semiconductor light-emitting element according to any one of (1) to (6) above, wherein in the stacked structure of the light-emitting layer, a third Group III-V compound semiconductor layer is further provided between the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer.

[0023] The third Group III-V compound semiconductor layer is composed of four or more elements selected from the Group III elements and the Group V elements.

[0024] The composition wavelength difference between the first, second, and third III-V compound semiconductor layers adjacent to each other is 50 nm or less, and

[0025] The ratio of the lattice constant difference between the first, second, and third Group III-V compound semiconductor layers adjacent to each other is 0.05% or more and 0.60% or less.

[0026] (8) The semiconductor light emitting element according to (7) above, wherein the third Group III-V compound semiconductor layer is a quaternary compound semiconductor of InGaAsP.

[0027] (9) A method for manufacturing a semiconductor light emitting element, characterized in that it is a method for manufacturing the semiconductor light emitting element according to any one of (1) to (8) above, comprising the following steps:

[0028] a first step of forming the first III-V compound semiconductor layer;

[0029] a second step of forming the second III-V compound semiconductor layer; and

[0030] A light-emitting layer forming step of forming the light-emitting layer by repeating the first step and the second step.

[0031] Effects of the Invention

[0032] According to the present invention, a semiconductor light-emitting device with improved light emission output can be provided. Further, the present invention can provide a method for manufacturing the semiconductor light-emitting device. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 FIG. is a schematic cross-sectional view showing one mode of a light-emitting layer in a semiconductor light-emitting device according to the present invention.

[0034] Figure 2 FIG. is a schematic cross-sectional view showing another mode of a light-emitting layer in a semiconductor light-emitting device according to the present invention.

[0035] Figure 3 FIG. is a schematic cross-sectional view showing a semiconductor light-emitting device according to an embodiment of the present invention.

[0036] Figure 4 FIG. is a diagram for comparing the light emission outputs of the examples.

[0037] Figure 5 FIG. is a diagram for comparing the forward voltages of the examples. DETAILED DESCRIPTION

[0038] Before describing the embodiments of the present invention, each definition in this specification will be described.

[0039] <III-V COMPOUND SEMICONDUCTOR LAYER>

[0040] First, when simply referred to as "III-V compound semiconductor" in this specification, its composition is represented by the general formula (In a Ga b Al c )(P x As y Sb z ). Here, for the composition ratio of each element, the following relationship holds.

[0041] Regarding the group III elements, c = 1 - a - b, 0 ≤ a ≤ 1, 0 ≤ b ≤ 1, 0 ≤ c ≤ 1

[0042] Regarding the group V elements, z = 1 - x - y, 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1

[0043] Furthermore, as described later, the III-V compound semiconductor layer in the light-emitting layer is composed of three or more elements, including one or more Group III elements selected from the group consisting of Al, Ga, and In, and one or more Group V elements selected from the group consisting of As, Sb, and P. With three elements, combinations that result in a lattice constant difference of 1% or less with the growth substrate are limited, so it is more preferable to use four or more elements. In the general formula above, the composition ratios of one or more of a, b, and c, and one or more of x, y, and z, totaling three or more, are at least greater than 0.

[0044] <Composition wavelength and lattice constant based on composition>

[0045] In this specification, when calculating the composition wavelength and lattice constant based on the composition, the values described in the document (Hiroo Nagai et al., "Photonics Series 6 III-V Semiconductor Mixed Crystals (フォトニクスシリーズ6 III-V Semiconductor Mixed Crystals)", first edition, CORONA Corporation, October 25, 1988) are used (the values of the nonlinear factor of the ternary mixed crystal based on Table 2.1, the lattice constant of the binary crystal based on Table 2.2, the elastic stiffness constant of the binary crystal based on Table 2.3, and the band gap of the binary crystal based on Table 2.7, etc.). Although the following description mainly uses the InGaAsP system, calculations can also be made based on the literature values described in the above-mentioned document for cases containing Al and Sb. Hereinafter, among the composition ratios a, b, c, x, y, and z, the case having two types selected from a, b, and c and two types selected from x, y, and z will be referred to as a pseudo-quaternary mixed crystal, and the case having three types selected from a, b, and c and one type selected from x, y, and z (or one type selected from a, b, and c and three types selected from x, y, and z) will be referred to as a pseudo-ternary mixed crystal.

[0046] The "composition wavelength" of the III-V compound semiconductor layer in this specification refers to the following formula: <1> The wavelength λ is calculated from the energy gap Eg based on the composition of the III-V compound semiconductor layer.

[0047] Eg=1239.8 / λ··· <1>

[0048] When the composition ratios (solid phase ratios) are known, first, the energy gaps E of the four ternary mixed crystals that form the basis of the pseudo-quaternary mixed crystals are calculated using the nonlinear factors of the ternary mixed crystals. a Ga b )(P x As y)) is used as an example, and the energy gap E is calculated for the ternary mixed crystals (Ga, In) P, (Ga, In) As, Ga(P, As), and In(P, As) taking the nonlinear factor into consideration. As the band gap E0 [eV] of each binary system, the values of InP: 1.35, GaP: 2.74, InAs: 0.36, and GaAs: 1.42 from the literature are used, and as the value of the nonlinear factor (bending parameter E0 [eV]), the values of (Ga, In) P: 0.7, (Ga, In) As: 0.51, Ga(P, As): 0.3, and In(P, As): 0.23 from the literature are used and calculated. For example, In a Ga b Energy gap E of P abx E abx =1.35×a+2.74×b-0.7×a×b The same calculation is performed for other ternary mixed crystals.

[0049] After calculating the energy gaps of the four ternary mixed crystals, according to Feger's law, the pseudo-quaternary mixed crystal (In a Ga b )(P x As y ) physical property value Eg abxy (Band gap of pseudo-quaternary mixed crystal) The physical property values E of the four ternary mixed crystals can be used. abx 、E aby 、E axy 、E bxy (The energy gap considering the nonlinear factor obtained above) and based on the following formula <2> Come and seek out.

[0050]

[0051] Here, the above formula <2> In the above equation, since the physical property values of the four ternary mixed crystals take nonlinear factors into account, the physical property values of the calculated pseudo-quaternary mixed crystals must also take nonlinear factors into account.

[0052] Next, the calculation of the lattice constant of the mixed crystal in this specification is explained. When the lattice constant has two directions, vertical (growth direction) and horizontal (in-plane direction) relative to the substrate plane, the value in the vertical direction is used in this specification. First, the simple lattice constant of the mixed crystal is calculated according to Feger's law. If the InGaAsP system (i.e., the general formula (InGaAsP) is used) a Ga b )(P x As y )) is used as an example. When the composition ratio (solid ratio) is known, the physical property constant A abxy (Lattice constant based on Feger's law) Physical constants B based on the four binary mixed crystals that form the basis of the pseudo-quaternary mixed crystalax 、B bx 、B ay 、B by (the lattice constants of the literature values in Table 1 below), and by the following formula <3> To calculate.

[0053] A abxy =a×x×B ax +b×x×B bx +a×y×B ay +b×y×B by ··· <3>

[0054] [Table 1]

[0055]

[0056] Next, the elastic constants C11 and C12 are also expressed in the above formula. <3> The same operation is performed to calculate (In a Ga b )(P x As y ) of the elastic constant C11 abxy 、C12 abxy .

[0057] Furthermore, if the lattice constant of the growth substrate is represented by a s , then considering the lattice deformation based on the elastic properties of the semiconductor crystal, the following formula is applied <4> , the lattice constant a (in the vertical direction) can be calculated taking into account the lattice deformation abxy .

[0058] a abxy =A abxy -2×(a s -A abxy )×C12 abxy / C11 abxy ··· <4>

[0059] Here, in this embodiment, since InP is used as the growth substrate, the lattice constant a of the growth substrate is s The lattice constant of InP may be used.

[0060] In the case of pseudo-ternary mixed crystals, if the general formula (In a Ga b Al c )(As)) as an example, the following formula can be used: <5> 、 <6> Calculate the band gap Eg abcy and the lattice constant A based on Feger's law abcy .

[0061]

[0062] A abcy = a × B ay + b × B by + c × B cy ···<6>

[0063] It should be noted that in the case where the III-V compound semiconductor is a ternary system, a quinary system or a hexary system, the formula can be transformed to obtain the compositional wavelength and lattice constant according to the same idea as described above. In addition, for a binary system, the values described in the above-mentioned literature can be used.

[0064] <p-type, n-type, i-type and doping concentration>

[0065] In this specification, a layer that functions electrically in the p-type form is called a p-type layer, and a layer that functions electrically in the n-type form is called an n-type layer. On the other hand, when specific impurities such as Si, Zn, S, Sn, Mg, etc. are not actively added and the layer does not function electrically in the p-type or n-type form, it is called "i-type" or "undoped". Impurities that are inevitable in the manufacturing process may be mixed in the undoped III-V compound semiconductor layer. Specifically, when the doping concentration is low (for example, less than 7.6×10 15 atoms / cm 3 ), it is regarded as "undoped" in this specification. The values of the impurity concentrations of Si, Zn, S, Sn, Mg, etc. are based on SIMS analysis. Similarly, the values of the impurity concentrations ("doping concentrations") of the n-type dopants (for example, Si, S, Te, Sn, Ge, O, etc.) in the active layer are also based on SIMS analysis. It should be noted that near the boundary of each semiconductor layer, the value of the doping concentration changes significantly. Therefore, the value of the doping concentration at the center in the thickness direction of the active layer is used as the doping concentration value.

[0066] <Film thickness and composition of each layer>

[0067] In addition, the overall thickness of each formed layer can be measured using an optical interference film thickness measuring instrument. Furthermore, the thickness of each layer can be calculated by observing the cross-section of the grown layer using an optical interference film thickness measuring instrument and a transmission electron microscope, respectively. In addition, when the thickness of each layer is about several nm and is as small as a degree similar to a superlattice structure, TEM-EDS can be used to measure the thickness. For the composition ratio (solid phase ratio) of each layer of the light-emitting layer in this specification, the value obtained by exposing the light-emitting layer and then performing SIMS analysis is used. It should be noted that in the cross-sectional view of each layer, when a specified layer has an inclined surface, the thickness of this layer is the maximum height from this layer to the flat surface of the layer directly below.

[0068] The following describes embodiments of the present invention in detail with reference to the accompanying drawings. It should be noted that identical components are generally labeled with the same reference numerals, and duplicate descriptions are omitted. In the figures, the aspect ratios of the substrate and each layer are exaggerated compared to the actual ratios for ease of explanation.

[0069] (Semiconductor light-emitting element)

[0070] Referring to the embodiment of the present invention Figure 1 . The semiconductor light-emitting element based on the present invention includes a light-emitting layer 50, and the light-emitting layer 50 has a stacked structure obtained by repeatedly stacking a first III-V compound semiconductor layer 51 and a second III-V compound semiconductor layer 52 having different composition ratios. Hereinafter, the first III-V compound semiconductor layer 51 and the second III-V compound semiconductor layer 52 are abbreviated as the first layer 51 and the second layer 52, respectively. Moreover, in the semiconductor light-emitting element based on the present invention, the III group elements in the first layer 51 and the second layer 52 are one or more selected from the group consisting of Al, Ga, and In, and the V group elements in the first layer 51 and the second layer 52 are one or more selected from the group consisting of As, Sb, and P.

[0071] Hereinafter, the composition of the III-V compound semiconductor of the first layer 51 is expressed as (In a1 Ga b1 Al c1 )(P x1 As y1 Sb z1 ); c1 = 1 - a1 - b1, z1 = 1 - x1 - y1, 0 ≤ a1 ≤ 1, 0 ≤ b1 ≤ 1, 0 ≤ c1 ≤ 1, 0 ≤ x1 ≤ 1, 0 ≤ y1 ≤ 1, 0 ≤ z1 ≤ 1. Similarly, the composition of the III-V compound semiconductor of the second layer 52 is expressed as (In a2 Ga b2 Al c2 )(P x2 As y2 Sb z2 ); c2=1-a2-b2, z2=1-x2-y2, 0≤a2≤1, 0≤b2≤1, 0≤c2≤1, 0≤x2≤1, 0≤y2≤1, 0≤z2≤1. The first layer 51 and the second layer 52 according to the present invention are each composed of a total of three or more elements, including one or more elements selected from Group III elements and one or more elements selected from Group V elements.

[0072] Furthermore, in the present invention, the difference in composition wavelength between the composition wavelength of the first layer 51 and the composition wavelength of the second layer 52 is set to 50 nm or less, and the ratio of the lattice constant difference between the lattice constant of the first layer 51 and the lattice constant of the second layer 52 is set to 0.05% or more and 0.60% or less. It should be noted that the composition wavelength difference and lattice constant difference are absolute values. The lattice constant difference ratio is the value obtained by dividing the absolute value of the lattice constant difference between the first layer 51 and the second layer 52 by the average value of the lattice constants of the first layer 51 and the second layer 52. When the third layer 53, described later, is provided, calculations are performed for each adjacent layer to determine the absolute value of the lattice constant difference between the first layer 51 and the third layer 53 divided by the average value of the lattice constants of the first layer 51 and the third layer 53, and the absolute value of the lattice constant difference between the third layer 53 and the second layer 52 divided by the average value of the lattice constants of the third layer 53 and the second layer 52, with each value set to 0.05% or more and 0.60% or less. The present inventors have experimentally confirmed that when the composition wavelength difference and the lattice constant difference based on the composition ratio of the first layer 51 and the second layer 52 satisfy this relationship, the light output of the semiconductor light-emitting device can be significantly improved compared to conventional methods.

[0073] The reason why the luminous output of the semiconductor light-emitting element is improved due to the difference in composition wavelength and the difference in lattice constant meeting the above conditions has not yet been determined. In addition, although the present invention is not bound by theory, the present inventors have the following considerations regarding the reasons for obtaining the effects of the present invention. If the difference in composition wavelength is less than 50 nm, a structure similar to a double heterojunction is obtained in which only a barrier (potential barrier) that holes can easily cross at the junction temperature when energized (when emitting light) exists, and the band structure when energized (when emitting light) has no difference in composition wavelength. In addition, if the difference in composition wavelength is less than 30 nm (more preferably less than 25 nm), it is closer to a double heterojunction in which only a low barrier (potential barrier) that is easily crossed even by room temperature thermal energy when not energized exists, resulting in a band structure with no difference in composition wavelength, and becomes a structure essentially the same as a double heterojunction. It can be considered that by approaching a double heterojunction, the barrier height is reduced, and the strain caused by the lattice constant difference causes the splitting of the valence electron band, thereby obtaining an electron confinement effect similar to a quantum well structure, thereby improving the luminous output.

[0074] Here, in order to more reliably obtain the effects of the present invention, the ratio of the lattice constant difference between the first layer 51 and the second layer 52 is preferably greater than 0.05%, more preferably greater than 0.3%. In particular, the difference in the respective component wavelengths of the first layer 51 and the second layer 52 can be less than 20 nm. In addition, it can also be less than 1 nm, and the component wavelengths can also be the same (that is, the component wavelength difference is 0 nm).

[0075] Furthermore, it is more preferred that the III-V group elements are Ga and In, and the V-group elements are two or more selected from the group consisting of As, Sb, and P. Furthermore, it is more preferred that the quaternary compound semiconductor of InGaAsP (hereinafter referred to as InGaAsP-based semiconductor) is used. If the III-V group compound semiconductor materials of the first layer 51 and the second layer 52 are both quaternary compound semiconductors of InGaAsP, the effects of the present invention can be reliably obtained. In this case, the composition ratio c1 of Al and the composition ratio z1 of Sb in the first layer 51 are both 0, forming a composition formula (InGaAsP) = 0. a1 Ga b1 )(P x1 As y1 ); b1=1-a1、y3=1-x1、0≤a1≤1、0≤b1≤1、0≤x1≤1、0≤y1≤1, and the Al composition ratio c2 and the Sb composition ratio z2 in the second layer 52 are both 0, forming the composition formula (In a2 Ga b2 )(P x2 As y2 ); b2=1-a2, y2=1-x2, 0≤a2≤1, 0≤b2≤1, 0≤x2≤1, 0≤y2≤1.

[0076] The stacked structure of the light emitting layer 50 in the semiconductor light emitting element according to the present invention may be composed of only the first layer 51 and the second layer 52, or may further include a group III-V compound semiconductor layer. Figure 2 As shown in FIG, in the stacked structure of the light emitting layer 50, a third III-V compound semiconductor layer 53 (hereinafter referred to as the third layer 53) may be further provided between the first layer 51 and the second layer 52. Preferred embodiments of the third layer 53 will be described.

[0077] According to the first layer 51 and the second layer 52, the composition of the III-V compound semiconductor of the third layer 53 is expressed as (In a3 Ga b3 Al c3 )(P x3 As y3 Sb z3); c3 = 1 - a3 - b3, z3 = 1 - x3 - y3, 0 ≤ a3 ≤ 1, 0 ≤ b3 ≤ 1, 0 ≤ c3 ≤ 1, 0 ≤ x3 ≤ 1, 0 ≤ y3 ≤ 1, 0 ≤ z3 ≤ 1. When the light-emitting layer 50 includes a third layer 53, the third layer 53 is preferably composed of three or more elements selected from the aforementioned Group III elements and one or more elements selected from Group V elements, similarly to the first layer 51 and the second layer 52. Furthermore, in this case, it is preferred that the composition wavelength difference between the adjacent first layer 51 and the third layer 53, the third layer 53 and the second layer 52, and the second layer 52 and the first layer 51 is 50 nm or less, and the ratio of the lattice constant difference between the adjacent layers is 0.05% or more and 0.60% or less.

[0078] Furthermore, from the perspective of more reliably achieving the effects of the present invention, when a third layer 53 is provided, the III-V compound semiconductor material of the third layer 53 is preferably a quaternary compound semiconductor containing Ga and In as the Group III element and two or more selected from the group consisting of As, Sb, and P as the Group V element, more preferably InGaAsP (hereinafter referred to as an InGaAsP-based semiconductor). In this case, the Al composition ratio c3 and the Sb composition ratio z3 in the third layer 53 are both 0.

[0079] -Film thickness-

[0080] Although the overall film thickness of the light-emitting layer 50 is not limited, it can be set to, for example, 1 μm to 8 μm. In addition, the film thickness of each layer of the first layer 51, the second layer 52 and the third layer 53 in the stacked structure of the light-emitting layer 50 is also not limited, but can be set to, for example, about 1 to 15 nm. The film thickness of each layer can be the same or different. In addition, the film thickness of each first layer 51 can be the same or different within the stacked structure. The film thickness of each second layer 52 and the film thickness of each third layer 53 are also the same. Among them, making the film thickness of each first layer 51 and the film thickness of each second layer 52 (and the film thickness of each third layer when the third layer 53 is provided) the same and making the light-emitting layer 50 into a superlattice structure is one of the preferred embodiments of the present invention.

[0081] -Number of stacked groups-

[0082] Reference Figure 1 The number of sets of the first layer 51 and the second layer 52 is not limited, but can be, for example, 3 to 50 sets. One end of the stacked structure can be the first layer 51, and the other end can be the second layer 52. In this case, the number of sets of the first layer 51 and the second layer 52 is expressed as n sets (n is a natural number).

[0083] Alternatively, one end of the stacked structure may be the first layer 51, and a repeated structure of the second layer 52 and the first layer 51 may be provided, with the other end being the first layer 51. Alternatively, the opposite may be true, with both ends being the second layer 52. In this case, the number of sets of the first layer 51 and the second layer 52 is expressed as n (n is a natural number), and is referred to as n.5 sets. Figure 1 In the figure, both ends of the stacked structure are shown as the first layer 51.

[0084] It should be noted that if Figure 2 In this way, the number of groups when the third layer 53 is provided in the stacked structure is not limited and can be the same as that in the reference Figure 1 The method is similarly set to 3 to 50 groups. Figure 2 Although the number of stacked groups is n, the present invention is not necessarily limited to this embodiment.

[0085] -Composition ratio-

[0086] The composition ratios a, b, c, x, y, and z of the Group III-V compound semiconductors in each of the first layer 51, the second layer 52, and the third layer 53 are not limited, as long as the conditions for the composition wavelength difference and the lattice constant difference are met. However, in order to suppress the deterioration of the crystallinity of the light-emitting layer, the composition ratios are preferably selected such that the lattice constant difference ratio between the growth substrate and the light-emitting layer (the first layer and the second layer) is set to 1% or less. Specifically, the absolute value of the lattice constant difference between the growth substrate and the first layer divided by the average value of the growth substrate and the first layer, and the absolute value of the lattice constant difference between the growth substrate and the second layer divided by the average value of the growth substrate and the second layer, are both preferably set to 1% or less. For example, when the emission center wavelength is set to 1000-1900nm, if the growth substrate is an InP substrate, the composition ratio a of In in each layer can be set to 0.0-1.0, the composition ratio b of Ga can be set to 0.0-1.0, the composition ratio c of Al can be set to 0.0-0.35, the composition ratio x of P can be set to 0.0-0.95, the composition ratio y of As can be set to 0.15-1.0, and the composition ratio z of Sb can be set to 0.0-0.7. It can be appropriately set within these ranges in a manner that satisfies the conditions of the ratio of the composition wavelength difference and the lattice constant difference. The above-mentioned emission center wavelength is just an example. For example, in the case of a quaternary compound semiconductor of InGaAsP (hereinafter referred to as an InGaAsP-based semiconductor), the emission center wavelength can be set to a range of 1000nm to 2200nm. In the case of containing Sb, it can be set to infrared light with a longer wavelength (below 11μm).

[0087] - Adulterants-

[0088] The dopant of each layer in the light emitting layer 50 is not limited, but in order to reliably obtain the effect of the present invention, it is preferable that the first layer 51, the second layer 52, and the third layer 53 are all i-type. However, each layer may be doped with an n-type dopant or a p-type dopant.

[0089] The following does not limit the specific structure of the semiconductor light emitting device of the present invention, but describes specific aspects that the semiconductor light emitting device of the present invention may further include. Figure 3 , a semiconductor light emitting element 100 according to one embodiment of the present invention is described.

[0090] A semiconductor light-emitting device 100 according to one embodiment of the present invention preferably includes at least a light-emitting layer 50 having the aforementioned stacked structure, and further includes, in order, a desired structure selected from a support substrate 10, an intercalation layer 20, a first conductivity-type Group III-V compound semiconductor layer 30, a first spacer layer 41, a light-emitting layer 50, a second spacer layer 42, and a second conductivity-type Group III-V compound semiconductor layer 70. Furthermore, the semiconductor light-emitting device 100 may further include a second electrode 80 on the second conductivity-type Group III-V compound semiconductor layer 70, and a first electrode 90 on the back surface of the support substrate 10. It should be noted that if the first conductivity type is n-type, the second conductivity type becomes p-type, and conversely, if the first conductivity type is p-type, the second conductivity type becomes n-type. The following describes an embodiment in which the first conductivity type is n-type and the second conductivity type is p-type. For ease of description, the present embodiment will be described below using the first conductivity-type III-V compound semiconductor layer 30 as an n-type semiconductor layer 30 and the second conductivity-type III-V compound semiconductor layer 70 as a p-type semiconductor layer 70. By sandwiching the light-emitting layer 50 between the n-type semiconductor layer 30 and the p-type semiconductor layer 70, a structure similar to a double heterojunction can be achieved. By applying electricity to the light-emitting layer 50, electrons and holes combine within the light-emitting layer 50, generating light.

[0091] <Growth Substrate>

[0092] The growth substrate can be appropriately selected from compound semiconductor substrates such as InP substrates, InAs substrates, GaAs substrates, GaSb substrates, and InSb substrates, depending on the composition of the light-emitting layer 50. The conductivity type of each substrate is preferably selected to correspond to the conductivity type of the semiconductor layer on the growth substrate. Examples of compound semiconductor substrates applicable to this embodiment include n-type InP substrates and n-type GaAs substrates.

[0093] <Support substrate>

[0094] As the support substrate 10, a growth substrate capable of growing the light-emitting layer 50 on the support substrate 10 can be used. When using the bonding method described later, various substrates different in type from the growth substrate can be used as the support substrate 10.

[0095] <Inclusion layer>

[0096] An inclusion layer 20 can be provided on the support substrate 10. The inclusion layer 20 can be formed as a III-V compound semiconductor layer. It can be used as an initial growth layer for epitaxially growing a semiconductor layer on the support substrate 10 as a growth substrate. In addition, for example, it can also be used as a buffer layer for buffering the lattice strain between the support substrate 10 as a growth substrate and the n-type semiconductor layer 30. Further, by making the growth substrate and the inclusion layer 20 lattice-matched and changing the semiconductor composition, it can also be used as an etch stop layer. For example, when the support substrate is an n-type InP substrate, it is preferable to set the inclusion layer 20 as an n-type InGaAs layer. At this time, in order to make the inclusion layer 20 lattice-matched with the InP growth substrate, it is preferable to set the In composition ratio in group III elements to 0.3 to 0.7, and more preferably to 0.5 to 0.6. In addition, if the composition ratio is set to be close to the lattice constant of the InP substrate in the same degree as the above InGaAs, it can be set to AlInAs, AlInGaAs, InGaAsP. The inclusion layer 20 can be a single layer, or can be a composite layer (such as a superlattice layer) with other layers.

[0097] <n-type semiconductor layer>

[0098] An n-type semiconductor layer 30 can be provided on the support substrate 10 and the inclusion layer 20 as needed, and the n-type semiconductor layer 30 can be used as an n-type cladding layer. The composition of the III-V compound semiconductor of the n-type semiconductor layer 30 can be appropriately determined according to the composition of the III-V compound semiconductor of the light-emitting layer 50. When the light-emitting layer 50 is made of an InGaAsP-based semiconductor, for example, an n-type InP layer can be used. The n-type semiconductor layer 30 can have a single-layer structure or can be a composite layer obtained by laminating multiple layers. As the thickness of the n-type cladding layer, 1 μm to 5 μm can be exemplified.

[0099] <Spacer layer>

[0100] It is also preferable to provide a first spacer layer 41 and a second spacer layer 42 between the n-type semiconductor layer 30 and the p-type semiconductor layer 70 and the light-emitting layer 50, respectively. The first spacer layer 41 can be an undoped or n-type III-V compound semiconductor layer. For example, an i-type InP spacer layer is preferably used. On the other hand, the second spacer layer 42 on the p-side is preferably an undoped III-V compound semiconductor layer. For example, an i-type InP spacer layer can be used. By providing the undoped spacer layer 42, the diffusion of useless dopants between the light-emitting layer 50 and the p-type layer can be prevented. The thicknesses of the respective spacer layers 41 and 42 are not limited, and for example, they can be set to 5 to 500 nm.

[0101] <p-type semiconductor layer>

[0102] A p-type semiconductor layer 70 can be provided on the light-emitting layer 50 and the second spacer layer 42 as required. The p-type semiconductor layer 70 can sequentially include a p-type cladding layer 71 and a p-type contact layer 73 from the light-emitting layer 50 side. It is also preferable to provide an intermediate layer 72 between the p-type cladding layer 71 and the p-type contact layer 73. By providing the intermediate layer 72, the lattice mismatch between the p-type cladding layer 71 and the p-type contact layer 73 can be alleviated. The composition of the III-V compound semiconductor of the p-type semiconductor layer 70 can be appropriately determined according to the composition of the III-V compound semiconductor of the light-emitting layer 50. When the light-emitting layer 50 is made of an InGaAsP-based semiconductor, as the p-type cladding layer, p-type InP can be exemplified, as the intermediate layer, p-type InGaAsP can be exemplified, and as the p-type contact layer 73, p-type InGaAs without P can be exemplified. The film thicknesses of the respective layers of the p-type semiconductor layer 70 are not particularly limited. As the film thickness of the p-type cladding layer 71, 1 μm to 5 μm can be exemplified, as the film thickness of the intermediate layer 72, 50 to 200 nm can be exemplified, and as the film thickness of the p-type contact layer 73, 50 nm to 200 nm can be exemplified.

[0103] <electrode>

[0104] A second electrode 80 and a first electrode 90 can be provided on the p-type semiconductor layer 70 and the back surface of the support substrate 10, respectively. Metals such as Ti, Pt, Au, etc.; general metal materials such as metals (such as Sn) that form a eutectic alloy with gold can be used as the metal materials for forming the respective electrodes. Furthermore, the electrode patterns of the respective electrodes are arbitrary and not limited in any way.

[0105] Thus far, an embodiment has been described in which a compound semiconductor substrate is used as a growth substrate and is directly used as the support substrate 10, but the present invention is not limited thereto. As a support substrate for the semiconductor light-emitting element of the present invention, after forming each semiconductor layer on the growth substrate, the growth substrate can be removed by a bonding method, and a semiconductor substrate such as a Si substrate, a metal substrate such as Mo, W, or Kovar, or various bracket substrates using AlN or the like can be attached and used as the support substrate (hereinafter referred to as the "bonding method," see Japanese Patent Application Publication No. 2018-006495).

[0106] When using the bonding method, the semiconductor light-emitting element 100 can be provided with layers other than the III-V compound semiconductor in addition to the electrodes. For example, when using the bonding method, an intercalation layer 20 comprising a metal material can be formed on a support substrate 10 comprising a Si substrate, and a p-type semiconductor layer 70, a light-emitting layer 50, and an n-type semiconductor layer 30 can be formed thereon in sequence. It should be noted that the intercalation layer 20 can be used as a metal reflective layer on the support substrate 10. Furthermore, in addition to the III-V compound semiconductor layer, the semiconductor light-emitting element 100 can also be provided with a dielectric layer comprising an ohmic electrode portion as needed. The dielectric material is SiO2, SiN, ITO, etc.

[0107] It should be noted that, as described above, in one embodiment, the first conductive semiconductor layer is n-type and the second conductive semiconductor layer is p-type as an example, but it can be understood that the conductivity type of each layer can be opposite to the above embodiment.

[0108] (Method for manufacturing semiconductor light-emitting element)

[0109] The method for manufacturing the semiconductor light-emitting element according to the present invention includes at least a first step of forming the first layer 51, a second step of forming the second layer 52, and a light-emitting layer forming step of repeatedly performing these first and second steps to form the light-emitting layer 50. The method may further include a third step of forming the third layer 53. In this case, the light-emitting layer forming step may repeatedly perform the first step of forming the first layer 51, the third step of forming the third layer 53, and the second step of forming the second layer 52.

[0110] In addition, as needed, references can be included Figure 3 The process of forming each layer of the semiconductor light emitting element 100 is described. The III-V compound semiconductor materials that can be used as the first layer 51 and the second layer 52, the conditions for the difference in their composition wavelengths and lattice constants, and further the film thicknesses, the number of stacked layers, etc. are as described above, and repeated description is omitted.

[0111] Each layer of the III-V compound semiconductor layer can be formed by a well-known thin film growth method such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), sputtering, etc. In the case of an InGaAsP-based semiconductor, for example, trimethylindium (TMIn) as an In source, trimethylgallium (TMGa) as a Ga source, arsine (AsH3) as an As source, and phosphine (PH3) as a P source can be used in a predetermined mixing ratio, and these raw material gases can be vapor-phase grown while using a carrier gas. Thus, the InGaAsP-based semiconductor layer can be epitaxially grown to a desired thickness according to the growth time. In addition, when Al is used as the III-group element, as the Al source, for example, trimethylaluminum (TMA) can be used, and when Sb is used as the V-group element, as the Sb source, for example, TMSb (trimethylantimony) can be used. Furthermore, when doping each semiconductor layer to a p-type or n-type, a dopant source gas containing Si, Zn, or the like as a constituent element may be used as desired.

[0112] Furthermore, the metal layers such as the first electrode and the second electrode can be formed using known methods, such as sputtering, electron beam evaporation, or resistance heating. When a bonding method is used, any known film forming method such as plasma CVD or sputtering can be used to form the dielectric layer, and a known etching method can be used to form the concavity and convexity as needed.

[0113] When using the bonding method (see the aforementioned Japanese Patent Application Publication No. 2018-006495), a semiconductor light-emitting element can be produced, for example, as follows.

[0114] First, a III-V compound semiconductor layer, including an etch stop layer, an n-type semiconductor layer 30, a light-emitting layer 50, a p-type cladding layer 71, an intermediate layer 72, and a p-type contact layer 73, is sequentially formed on a growth substrate. Next, a p-type ohmic electrode portion is formed on the p-type contact layer 73, dispersed in an island shape. Subsequently, a resist mask is formed over and around the p-type ohmic electrode portion, and the p-type contact layer 73, excluding the portion where the ohmic electrode portion is formed, is removed by wet etching or the like, exposing the intermediate layer 72. Furthermore, a dielectric layer is formed on the intermediate layer 72. Furthermore, the p-type ohmic electrode portion and the dielectric layer around it are removed by etching, exposing the intermediate layer 72, and a metal reflective layer is formed on the intermediate layer 72.

[0115] Meanwhile, a conductive Si substrate or the like is used as a support substrate, and a metal bonding layer is formed on the support substrate. The metal reflective layer and the metal bonding layer are positioned opposite each other and bonded together by heating and compression. Furthermore, while etching and removing the growth substrate, the etch stop layer is also etched to expose the n-type semiconductor layer 30. By forming a top surface electrode on the n-type semiconductor layer 30, a junction-type semiconductor light-emitting element can be obtained. As described above, the conductivity type of each layer can also be reversed from the above example, i.e., n-type / p-type.

[0116] Hereinafter, the present invention will be described in more detail using examples, but the present invention is not limited to the following examples at all.

[0117] Example

[0118] (Experimental Example 1)

[0119] The target emission center wavelength was set to 1300 nm, and the semiconductor light emitting elements described in the following Example 1 and Comparative Examples 1 to 3 were produced by a bonding method.

[0120] <Example 1>

[0121] For the configurations of the III-V compound semiconductor layer of the semiconductor light emitting element 100 described in Example 1, refer to Figure 3 The symbol of . An S-doped n-type InP substrate was used as a growth substrate. 18 atoms / cm 3 ) on the (100) surface, an n-type InP layer with a thickness of 100 nm and an n-type In layer with a thickness of 20 nm were sequentially formed by MOCVD. 0.57 Ga 0.43 As layer (initial growth layer and etching stop layer respectively), n-type InP layer with a thickness of 2000nm (n-type semiconductor layer 30 as n-type cladding layer), i-type InP layer with a thickness of 100nm (first spacer layer 41), light emitting layer 50 described later, i-type InP layer with a thickness of 320nm (second spacer layer 42), p-type InP layer with a thickness of 4800nm (p-type cladding layer 71), p-type InP layer with a thickness of 50nm, and p-type InP layer with a thickness of 50nm. 0.8 Ga 0.2 As 0.5 P 0.5 layer (intermediate layer 72), p-type In with a thickness of 100 nm 0.57 Ga 0.43 As layer (p-type contact layer 73). The n-type InP layer and n-type InGaAs layer (initial growth layer and etching stop layer, respectively), and the n-type InP layer (n-type semiconductor layer 30 as n-type cladding layer) are doped with Si, and the doping concentration is set to 7×10 17atoms / cm 3 The p-type InP layer (p-type cladding layer 71) is doped with Zn, and the doping concentration is set to 1×10 18 atoms / cm 3 The p-type InGaAsP layer (intermediate layer 72) and the p-type InGaAs layer (p-type contact layer 73) are doped with Zn, and the doping concentration is set to 1×10 19 atoms / cm 3 .

[0122] When forming the light emitting layer 50, first, an i-type In a1 Ga b1 As x1 P y1 layer (first layer 51), then, i-type In a2 Ga b2 As x2 P y2 layer (second layer 52) and i-type In a1 Ga b1 As x1 P y1 The layers (first layer 51) are alternately stacked in 10 layers each, forming a stacked structure of 10.5 layers. That is, both ends of the light emitting layer 50 are i-type In a1 Ga b1 As x1 P y1 Layer (first layer 51). i-type In a1 Ga b1 As x1 P y1 The first layer 51 is an 8 nm thick In 0.675 Ga 0.325 As 0.689 P 0.311 That is, the In composition ratio (a1) is 0.675, the Ga composition ratio (b1) is 0.325, the As composition ratio (x1) is 0.689, and the P composition ratio (y1) is 0.311. a2 Ga b2 As x2 P y2 The second layer 52 is a 5 nm thick In 0.633 Ga 0.367 As 0.716 P 0.284. That is, the In composition ratio (a2) is 0.633, the Ga composition ratio (b2) is 0.367, the As composition ratio (x2) is 0.716, and the P composition ratio (y2) is 0.284. In addition, the total film thickness of the light-emitting layer is 138 nm. It should be noted that the composition of each layer in the above-mentioned Example 1 is a value measured by SIMS analysis. In addition, for each layer of the light-emitting layer, after exposing the light-emitting layer, SIMS analysis was performed to confirm the solid phase ratio of each layer.

[0123] P-type ohmic electrodes (Au / AuZn / Au, total thickness: 530 nm) were formed in island-like patterns on the p-type contact layer. The island pattern was formed by forming a resist pattern, then vapor-depositing the ohmic electrode, and then stripping the resist pattern. The contact area ratio with the p-type contact layer was 4.5%, and the chip size was 380 μm square.

[0124] Next, a resist mask is formed over the p-type ohmic electrode and its surroundings. A tartaric acid-hydrogen peroxide-based wet etch is used to remove the p-type contact layer, excluding the area where the ohmic electrode is formed, to expose the intermediate layer. Subsequently, a dielectric layer (700 nm thick) composed of SiO2 is formed entirely over the intermediate layer 72 using plasma CVD. Furthermore, a window pattern with a width of 3 μm in both the width and length directions is formed in the resist above the p-type ohmic electrode. The p-type ohmic electrode and its surrounding dielectric layer are then removed using BHF wet etching to expose the intermediate layer 72.

[0125] Next, a metal reflective layer (Al / Au / Pt / Au) was formed by vapor deposition on the entire surface of the intermediate layer 72. The thicknesses of the metal layers of the metal reflective layer were 10 nm, 650 nm, 100 nm, and 900 nm, respectively.

[0126] On the other hand, a metal bonding layer (Ti / Pt / Au) was formed on a conductive Si substrate (thickness: 300 μm) serving as a support substrate. The thicknesses of the metal layers in the metal bonding layer were 650 nm, 10 nm, and 900 nm, respectively.

[0127] These metal reflective layers and metal bonding layers were placed facing each other and heat-compression bonded at 300°C. The n-type InP substrate was then wet-etched with a diluted hydrochloric acid solution to remove it. Furthermore, the etch stop layer was wet-etched with a sulfuric acid-hydrogen peroxide system to remove it, exposing the n-type cladding layer.

[0128] On the n-type cladding layer, an n-type electrode (Au (thickness: 10 nm) / Ge (thickness: 33 nm) / Au (thickness: 57 nm) / Ni (thickness: 34 nm) / Au (thickness: 800 nm) / Ti (thickness: 100 nm) / Au (thickness: 1000 nm)) was formed by forming a resist pattern, vapor-depositing an n-type electrode, and then stripping the resist pattern to form the wiring portion of the top surface electrode. Furthermore, a pad portion (Ti (thickness: 150 nm) / Pt (thickness: 100 nm) / Au (thickness: 2500 nm)) was formed on the n-type electrode to form the pattern of the top surface electrode.

[0129] Finally, the semiconductor layer between each element (60 μm wide) was removed by mesa etching to form dicing lines. Furthermore, a back electrode (Ti (thickness: 10 nm) / Pt (thickness: 50 nm) / Au (thickness: 200 nm)) was formed on the back side of the Si substrate. The chips were then singulated by dicing to produce the semiconductor light-emitting elements described in Example 1.

[0130] <Comparative Examples 1 to 3>

[0131] A semiconductor light-emitting element was formed using the bonding method in the same manner as in Example 1, except that the composition ratio of the first layer 51 and the second layer 52 in Example 1 was changed as described in Table 2. Table 2 shows the composition ratios of the first layer 51 and the second layer 52, including Example 1, as well as the calculated composition wavelengths and lattice constants. Furthermore, Table 2 shows the ratios of the composition wavelength differences and lattice constant differences as absolute values. It should be noted that the second layer 52 in Comparative Example 1 was an i-type InP layer, and the other layers constituting the light-emitting layer were i-type InGaAsP layers.

[0132] (Experimental Example 2)

[0133] The target emission center wavelength was set to 1460 nm, and semiconductor light emitting elements described in the following Example 2 and Comparative Examples 4 to 8 were produced by a bonding method.

[0134] <Example 2, Comparative Examples 4 to 8>

[0135] The semiconductor light-emitting elements described in Example 2 and Comparative Examples 4 to 8 were formed using the bonding method in the same manner as in Example 1, except that the composition ratio of the first layer 51 and the second layer 52 in Example 1 was changed as described in Table 3. Note that the second layer 52 in Comparative Example 4 was an i-type InP layer. Table 3 also shows the ratios of the composition wavelength differences and lattice constant differences, similar to Table 2.

[0136] [Table 2]

[0137]

[0138] [Table 3]

[0139]

[0140] <Evaluation 1: Luminous Output Evaluation>

[0141] The forward voltage Vf, luminous output Po using an integrating sphere, and luminous center wavelength λp of each semiconductor light emitting element of Examples 1 to 2 and Comparative Examples 1 to 8 were measured using a constant current and voltage power supply when a current of 20 mA was passed through them. The average of the measurement results for each of the three samples was calculated. The results are shown in Table 4. In addition, a graph showing the relationship between the composition wavelength difference and the luminous output Po is shown in Table 4. Figure 4 Furthermore, a diagram showing the relationship between the component wavelength difference and the forward voltage Vf is shown in FIG. Figure 5 .

[0142] <Evaluation 2: Luminous Output Maintenance Rate>

[0143] Immediately after fabrication, the initial luminous output of the semiconductor light-emitting element was measured using an integrating sphere (average of three samples). Subsequently, after continuously applying power at 20 mA to the semiconductor light-emitting element for 1000 hours at room temperature, the luminous output was measured using an integrating sphere (average of three samples). The results are shown in Table 4.

[0144] [Table 4]

[0145]

[0146] From Table 4 and Figure 4 It was confirmed that when the composition wavelength difference and lattice constant difference based on the conditions of the present invention are satisfied, the luminous output is improved. Figure 5 It was confirmed that the forward voltage of Examples 1 and 2 was as good as or better than the comparative examples in each experimental example. In addition, it was confirmed that the luminous output maintenance rate of Examples 1 and 2 was also as good as or better than the comparative examples in each experimental example.

[0147] Description of Reference Numerals

[0148] 10 Support base plate

[0149] 20 inclusion layer

[0150] 30 first conductive semiconductor layer (n-type semiconductor layer)

[0151] 41 first spacer layer

[0152] 42 second spacer layer

[0153] 50 luminous layers

[0154] 51 First III-V compound semiconductor layer (first layer)

[0155] 52 Second III-V compound semiconductor layer (second layer)

[0156] 53 Third III-V compound semiconductor layer (third layer)

[0157] 70 Second conductive type semiconductor layer (p-type semiconductor layer)

[0158] 80 Second electrode

[0159] 90 first electrode

[0160] 100 semiconductor light-emitting elements

Claims

1. A semiconductor light emitting element, characterized in that: The light-emitting layer has a stacked structure in which a first III-V compound semiconductor layer and a second III-V compound semiconductor layer having different composition ratios are repeatedly stacked. The Group III elements in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are one or more selected from the group consisting of Al, Ga, and In, and the Group V elements in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are one or more selected from the group consisting of As, Sb, and P. The first III-V compound semiconductor layer and the second III-V compound semiconductor layer are both composed of three or more elements selected from the group III elements and the group V elements. The difference in composition wavelength between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer is less than 50 nm, and the ratio of the lattice constant difference between the lattice constant of the first III-V compound semiconductor layer and the lattice constant of the second III-V compound semiconductor layer is greater than 0.05% and less than 0.60%.

2. The semiconductor light emitting element according to claim 1, wherein The ratio of the lattice constant difference is 0.3% or more.

3. The semiconductor light emitting element according to claim 1 or 2, wherein A difference in composition wavelength between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer is 30 nm or less.

4. The semiconductor light emitting element according to claim 1 or 2, wherein The first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are both composed of four or more elements selected from the Group III elements and the Group V elements. The semiconductor light emitting element according to claim 4 , wherein: Among the elements constituting the four or more elements, the Group III elements are Ga and In, and the Group V elements are two or more elements selected from the group consisting of As, Sb, and P. The semiconductor light emitting element according to claim 1 or 2, wherein: The first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are both quaternary compound semiconductors of InGaAsP.

7. The semiconductor light emitting element according to claim 1 or 2, wherein: In the stacked structure of the light emitting layer, a third group III-V compound semiconductor layer is further provided between the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer. The Group III element in the third Group III-V compound semiconductor layer is one or more selected from the group consisting of Al, Ga, and In, and the Group V element in the third Group III-V compound semiconductor layer is one or more selected from the group consisting of As, Sb, and P. The third III-V compound semiconductor layer is composed of four or more elements selected from the group III elements and the group V elements. The composition wavelength difference between the first, second and third Group III-V compound semiconductor layers adjacent to each other is 50 nm or less, and A ratio of a lattice constant difference between the first, second, and third Group III-V compound semiconductor layers adjacent to each other is 0.05% or more and 0.60% or less.

8. The semiconductor light emitting element according to claim 7, wherein The third III-V compound semiconductor layer is a quaternary compound semiconductor of InGaAsP.

9. A method for manufacturing a semiconductor light emitting element, characterized in that: The method for manufacturing the semiconductor light emitting element according to any one of claims 1 to 8 comprises the following steps: a first step of forming the first III-V compound semiconductor layer; a second step of forming the second III-V compound semiconductor layer; and A light-emitting layer forming step of forming the light-emitting layer by repeating the first step and the second step.

Images