Alarm drive circuit and power failure monitoring device

Abstract

The present invention discloses an alarm drive circuit, which is powered by a power supply interface and is used to generate an alarm signal according to an abnormal signal. The alarm drive circuit includes a switch circuit, a logic circuit and an automatically resettable operation switch. The switch circuit operates according to the abnormal signal and outputs a corresponding first switch signal. The operation switch can output a second switch signal. The two input ends of the logic circuit are respectively connected to the first switch signal and the second switch signal, and an output end outputs an alarm signal. The logic circuit outputs an alarm signal when the power supply interface starts to be powered on, releases the alarm signal when the second switch signal is received, and outputs an alarm signal when the first switch signal is received. Compared with the prior art, the present invention can detect whether the power supply is normally connected after power is turned on, and can also detect whether the alarm drive circuit works normally. The present invention also discloses a power-off monitoring device having the alarm drive circuit.

Description

Technical Field

[0001] The invention relates to an abnormal alarm driving circuit, and in particular to an alarm driving circuit and a power-off monitoring device. Background Art

[0002] There are various circuits for power failure detection on the market. Each power failure detection requires a stable power supply. During the detection, the power supply is plugged into the detection board. In order to prevent the power supply of the detection board from losing power, a power indicator light is generally set on the detection board for power indication. Then, when the power plug is connected to the detection board, if it is not plugged in firmly, the detection board is not connected to the power supply and cannot be detected in time. If a special indicator light is set on the detection board to indicate that the detection board is powered on, it is not only easy to interfere with the light alarm of the detection board, but also other circuit faults of the detection board itself cannot be detected in time, such as alarm damage and other problems.

[0003] Therefore, there is an urgent need for a power failure monitoring device that can solve the above problems. Summary of the invention

[0004] The purpose of the present invention is to provide an alarm driving circuit which automatically performs line detection when the power supply is connected before detection to detect whether the monitoring line itself has any fault, which is safe and reliable.

[0005] Another object of the present invention is to provide a power failure monitoring device which can automatically perform line detection when the power supply is connected before detection to detect whether the power failure monitoring device itself has any fault, which is safe and reliable.

[0006] In order to achieve the above-mentioned purpose, the present invention discloses an alarm driving circuit, which is used to generate an alarm signal according to an abnormal signal. A power supply interface supplies power to the alarm driving circuit, including a switching circuit, a logic circuit and an automatically reset operating switch. The switching circuit operates according to the abnormal signal and outputs a first switching signal. The operating switch can output a second switching signal. Two input ends of the logic circuit are respectively connected to the first switching signal and the second switching signal, and an output end outputs the alarm signal. The logic circuit outputs the alarm signal when the power supply interface starts to be powered on, releases the alarm signal when the second switching signal is received, and outputs the alarm signal when the first switching signal is received.

[0007] Compared with the prior art, when the power supply interface of the present invention is connected to power, the logic circuit directly controls the generation of an alarm signal for indication, which can not only indicate whether the power is connected normally, but also detect whether the logic circuit can work normally. Operating the operating switch can cancel the alarm, so that the logic circuit can work normally and issue an abnormal alarm. The operation is convenient and does not affect the normal abnormal alarm.

[0008] Preferably, the switch circuit is an isolation switch circuit, which effectively isolates abnormal signals and ensures safe and stable circuit operation.

[0009] Preferably, the switching circuit includes a photoelectric isolation switch and a drive switch, the input side of the photoelectric isolation switch is connected to the abnormal signal, the output side is connected to the control end of the drive switch and controls the drive switch to turn on when receiving a power-off signal, and the drive switch then outputs a first switching signal to the logic circuit.

[0010] Specifically, the driving switch includes a first switching tube and a protective resistor, the output side of the photoelectric isolation switch is connected to the control end of the first switching tube, the first switching tube and the protective resistor are connected in series between the VDD port and the ground port of the power supply interface, and the node between the first switching tube and the protective resistor is connected to an input end of the logic circuit, and the photoelectric isolation switch controls the first switching tube to operate when receiving the abnormal signal to output the first switching signal to the logic circuit.

[0011] Preferably, the logic circuit includes two logic gates of the same type, the first input ends of the two logic gates are respectively connected to the output end of the other logic gate, the second input ends of the two logic gates are respectively connected to the output end of the switch circuit and the output end of the operating switch, the logic gate connected to the operating switch is an output logic gate, and the output end of the output logic gate outputs the alarm signal. The structure is simple, the cost is low, and it is easy to implement.

[0012] Specifically, the logic gate is a NAND gate, the first switch signal and the second switch signal are both low-level signals, and the output end of the output logic gate outputs a low-level alarm signal.

[0013] Specifically, the logic gate is a NOR gate, the first switch signal and the second switch signal are both high-level signals, and the output end of the output logic gate outputs a high-level alarm signal.

[0014] Preferably, the operation switch comprises a push switch and a protection resistor connected in series between a VDD port and a ground port of the power supply interface.

[0015] The present invention also discloses a power-off monitoring device, comprising a power-off detection circuit, an alarm drive circuit and an alarm, and a power supply interface for supplying power to the alarm drive circuit and the alarm. The power-off detection circuit transmits a power-off signal to the alarm drive circuit when the power supply under test fails, and the alarm drive circuit transmits an alarm signal to the alarm according to the power-off signal. The alarm sounds an alarm according to the alarm signal. The alarm drive circuit comprises a switch circuit, a logic circuit and an automatically reset operation switch. The switch circuit operates according to the power-off signal and outputs a corresponding first switch signal. The operation switch can output a second switch signal when the operation switch is operated. Two input ends of the logic circuit are respectively connected to the first switch signal and the second switch signal, and one output end is connected to the input end of the alarm. The logic circuit outputs an alarm signal when the power supply interface starts to be powered on, releases the alarm signal when the second switch signal is received, and outputs the alarm signal when the first switch signal is received.

[0016] Compared with the prior art, when the power supply interface of the power-off monitoring device of the present invention is connected to power, the logic circuit directly controls the alarm to turn on, which can not only detect whether the power is normally connected, but also detect whether the logic circuit and the alarm can work normally. Operating the operating switch can cancel the alarm, so that the logic circuit can work normally to issue a power-off alarm. The operation is convenient and does not affect the normal power-off alarm.

[0017] The power failure of the present invention includes complete power failure and power failure below a specified value.

[0018] Preferably, the switch circuit is an isolation switch circuit, and the side of the isolation switch circuit adjacent to the logic circuit is powered by the power supply interface. This solution enables the present invention to be used for power failure detection of the switching power supply during lightning strike testing, which is different from the existing detection using an oscilloscope to monitor the output voltage. The present invention has low cost and small size.

[0019] Preferably, the switching circuit includes a photoelectric isolation switch and a driving switch, the input side of the photoelectric isolation switch is connected to the output signal of the power-off detection circuit, the output side is connected to the control end of the driving switch and controls the driving switch to turn on when receiving the power-off signal, and the driving switch then outputs a first switching signal to the logic circuit.

[0020] Specifically, the driving switch includes a first switch tube and a protective resistor, the output side of the photoelectric isolation switch is connected to the control end of the first switch tube, the first switch tube and the protective resistor are connected in series between the VDD port and the ground port of the power supply interface, and the node between the first switch tube and the protective resistor is connected to an input end of the logic circuit, and the photoelectric isolation switch controls the first switch tube to output the first switch signal to the logic circuit when receiving the power-off signal. The present invention can be used for power-off detection of the switching power supply during lightning strike testing, which is different from the existing detection using an oscilloscope to monitor the output voltage. The present invention has low cost and small size.

[0021] Preferably, the logic circuit includes two logic gates of the same type, the first input ends of the two logic gates are respectively connected to the output end of the other logic gate, the second input ends of the two logic gates are respectively connected to the output end of the switch circuit and the output end of the operating switch, the logic gate connected to the operating switch is the output logic gate, and the alarm is connected in series between a port of the power supply interface and the output end of the output logic gate. The structure is simple, the cost is low, and it is easy to implement.

[0022] Specifically, the logic gate is a NAND gate, the first switch signal and the second switch signal are both low-level signals, and the alarm is connected in series between the VDD port of the power supply interface and the output end of the output logic gate.

[0023] Specifically, the logic gate is a NOR gate, the first switch signal and the second switch signal are both high-level signals, and the alarm is connected in series between the ground port of the power supply interface and the output end of the output logic gate.

[0024] Preferably, the power-off detection circuit includes a voltage divider circuit, a charging capacitor, a second switch tube, a second variable resistor and a power supply interface to be tested, the power supply interface to be tested is used to connect the power supply to be tested and includes a Vout pin and a ground pin, the voltage divider circuit includes a first resistor and a first variable resistor which are sequentially connected in series between the Vout pin and the ground pin, the charging capacitor is connected between the output end of the voltage divider circuit and the ground pin, the second switch tube is a PNP transistor, the base of the second switch tube is connected to the Vout pin through a second resistor, the emitter is connected to the positive electrode of the charging capacitor, the collector is connected to the input end of the switch circuit through a second variable resistor, and the other input end of the switch circuit is grounded. Different from the prior art, the present invention uses the first variable resistor in combination with the second variable resistor to effectively adjust the voltage threshold of the transistor action, thereby adjusting the power-off voltage judgment reference value of the power-off detection, and can be applied to different switch power supply detections and different needs.

[0025] Preferably, the output end of the voltage divider circuit is connected to the positive electrode of the charging capacitor via a rectifier diode.

[0026] Preferably, the operation switch comprises a push switch and a protection resistor connected in series between a VDD port and a ground port of the power supply interface.

[0027] Preferably, the alarm includes a light emitting diode and a protective resistor connected in series.

[0028] Preferably, the power-off monitoring device also includes a power supply board, and the power-off detection circuit, alarm drive circuit and alarm are installed on a detection board. A power supply circuit is installed on the power supply board and generates a power supply. The power supply interface can be connected to the power supply to power the alarm drive circuit and the alarm. The power supply board and the detection board have a preset distance, which can effectively protect the detection board and avoid accidentally triggering the alarm.

[0029] Preferably, the power-off detection circuit is used to detect whether a switching power supply is powered off. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a structural block diagram of the power failure monitoring device of the present invention.

[0031] Figure 2 4 is a circuit diagram of a power failure monitoring device in a first embodiment of the present invention.

[0032] Figure 3 It is a circuit diagram of an alarm driving circuit and an alarm in a power failure monitoring device in a second embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to explain the technical content, structural features, achieved objectives and effects of the present invention in detail, the following is a detailed description in conjunction with the implementation methods and the accompanying drawings.

[0034] refer to Figure 1 The present invention discloses a power failure monitoring device 100, including a power failure detection circuit 10, an alarm drive circuit 20 and an alarm 30, and a power supply interface 40 for supplying power to the alarm drive circuit 20 and the alarm 30. When the power supply Uo under test fails, the power failure detection circuit 10 transmits a power failure signal S1 to the alarm drive circuit 20, and the alarm drive circuit 20 transmits an alarm signal S4 to the alarm 30 according to the power failure signal S1, and the alarm 30 issues an alarm according to the alarm signal S4.

[0035] refer to Figure 1The alarm driving circuit 20 includes a switch circuit 21, a logic circuit 22 and an automatically reset operation switch 23. The switch circuit 21 operates according to the power-off signal S1 and outputs the corresponding first switch signal S2. The operation switch 23 can output the second switch signal S3. The two input ends of the logic circuit 22 are respectively connected to the first switch signal S2 and the second switch signal S3, and one output end is connected to the input end of the alarm 30. The logic circuit 22 outputs the alarm signal S4 when the power supply interface 40 starts to power on, releases the alarm signal S4 when the second switch signal S3 is received, and outputs the alarm signal S4 when the first switch signal S2 is received.

[0036] In this embodiment, the power-off detection circuit 10 is used to detect whether a switching power supply is powered off.

[0037] refer to Figure 1 The power-off detection circuit 10 has a power supply interface under test, which is used to input the power supply under test Uo. The power supply interface under test includes a Vout pin and a ground pin. The Vout pin inputs the Vout of the power supply under test Uo, and the ground pin is connected to the GND1 of the power supply under test Uo.

[0038] Continue to refer Figure 1 The power failure monitoring device 100 further includes a power supply board 102. The power failure detection circuit 10, the alarm driving circuit 20 and the alarm 30 are installed on a detection board 101. A power supply circuit 41 is installed on the power supply board 102 and generates a power supply Ud. The power supply interface 40 can be connected to the power supply Ud to supply power to the alarm driving circuit 20 and the alarm 30. The power supply board 102 and the detection board 101 have a preset distance, which can effectively protect the detection board 101 and avoid false triggering of the alarm 30. In this embodiment, a distance of 7 mm is maintained between the detection board 101 and the power supply board 102.

[0039] refer to Figure 2 In this embodiment, the power supply interface 40 is used to input the power supply Ud. The power supply interface 40 has a VDD port and a ground port. The VDD port is connected to the VDD of the power supply Ud, and the ground port is connected to the GND2 of the power supply Ud.

[0040] refer to Figure 2The power-off detection circuit 10 includes a voltage divider circuit 11, a charging capacitor C, a second switch tube Q2, and a second variable resistor RS2. The voltage divider circuit 11 includes a first resistor R1 and a first variable resistor RS1 which are sequentially connected in series between the Vout pin (Vout) and the ground pin (GND1) of the power supply Ud under test. The charging capacitor C is connected between the output end of the voltage divider circuit 10 and the ground pin (GND1). The second switch tube Q2 is a PNP triode. The base of the second switch tube Q2 is connected to the Vout pin (Vout) through a second resistor, the emitter is connected to the positive electrode of the charging capacitor, and the collector is connected to the input end of the switch circuit 21 through a second variable resistor RS2. The other input end of the switch circuit 21 is connected to the ground pin (GND1). The power-off detection circuit 10 outputs a high-level power-off signal S1 when the voltage of the power supply Uo under test is lower than a preset value. Of course, the first variable resistor RS1 and the second variable resistor RS2 may also be replaced by resistors with determined resistance values. In this case, the comparison reference for the power failure detection circuit 10 to detect power failure is determined.

[0041] The output end of the voltage divider circuit 10 is connected to the positive electrode of the charging capacitor C through a rectifier diode D1.

[0042] When the voltage Vout (taking Vout=12V as an example) of the measured power supply is stably output during operation, Vout=12V passes through the fuse F1, passes through the first resistor R1 and the first variable resistor RS1 to the power ground GND1, and after being divided by the voltage divider circuit 11, the output divided voltage UR2=11.52V is output. The divided voltage charges the capacitor C through the diode D. After C is fully charged, the voltage across both ends Uc=UR2-Vd (diode D voltage drop)=11.52V-0.7V=10.82V, that is, the emitter voltage Ue=10.82V of the second switch tube Q2; the other path Vout passes through the resistor R2 to the base of the second switch tube Q2, and the base voltage Ub=Vout=12V. The second switch tube Q2 is a PNP type triode. When Ue<Ub, the second switch tube Q2 is in the cut-off state and does not output the power-off signal S1.

[0043] When the output voltage Vout loses power, for example, Vout drops from 12V to 10.12V, at this time Ub=10.12V, Ue=10.82V, Ue-Ub=0.7V, the second switch tube Q2 is turned on, and the path capacitor C positive electrode-Ueb of the second switch tube Q2-resistor R2-first resistor R1-first variable resistor RS1-GND1. At this time, the emitter and collector of the second switch tube Q2 are opened, and the path: C1 positive electrode-Uec of the second switch tube Q2-second variable resistor RS2, that is, the power-off signal S1 is output to the switch circuit 21.

[0044] refer to Figure 2The switch circuit 21 is an isolating switch circuit, and the output side of the isolating switch circuit is powered by the power supply Ud. The input side of the isolating switch circuit is powered by the power supply Uo under test.

[0045] refer to Figure 2 The switch circuit 21 includes a photoelectric isolation switch U1 and a first switch tube Q1. The input side of the photoelectric isolation switch U1 is connected to the power-off signal S1 output by the power-off detection circuit 10, and the output side is connected in series to the control end of the first switch tube Q1. When the photoelectric isolation switch U1 receives the power-off signal S1, it controls the first switch tube Q1 to operate, so that the first switch tube Q1 outputs a first switch signal S2 to the logic circuit 22.

[0046] In this embodiment, the first switch tube Q1 is an NPN transistor, one end of the output side of the photoelectric isolation switch U1 is connected to the base of the first switch tube Q1, and the other end is connected to the ground port (GND2), the collector of the first switch tube Q1 is connected to the VDD port (VDD) through the resistor R4, and the emitter is connected to the ground port (GND2). When the photoelectric isolation switch U1 does not receive the power-off signal, it is not turned on, and the first switch tube Q1 is in the cut-off state. When the photoelectric isolation switch U1 receives the power-off signal S1, it is turned on, so that the base of the first switch tube Q1 is grounded through the resistor R3, the first switch tube Q1 is turned on, and the output end of the first switch tube Q1 is grounded to pull down the output signal, thereby outputting a low-level first switch signal S2. Of course, the structure of the switch circuit 21 is not limited to the above embodiment.

[0047] refer to Figure 2 In this embodiment, the operation switch 23 includes a push switch SW1 and a protection resistor R6 connected in series between a VDD port (VDD) and a ground port (GND2) of the power supply interface 40. The operation switch 23 may also be a resettable switch circuit of other structures.

[0048] refer to Figure 2 In this embodiment, the logic circuit 22 includes two NAND gates U2 and U3 of the same type, the first input terminal of the NAND gate U2 is connected to the output terminal of the NAND gate U3, the first input terminal of the NAND gate U3 is connected to the output terminal of the NAND gate U2, the second input terminal of the NAND gate U2 is connected to the output terminal of the switch circuit 21, the second input terminal of the NAND gate U3 is connected to the output terminal of the operation switch 23, the first switch signal S2 and the second switch signal S3 are both low-level signals, and the alarm 30 is connected in series between the VDD port (VDD) of the power supply interface 40 and the output terminal of the NAND gate U3.

[0049] In this embodiment, the alarm 30 includes a resistor R5 and a light emitting diode LED connected in series.

[0050] Before the test, when the power supply Uo under test is stable or not connected, the power supply Ud is turned on, the first switch tube Q1 is turned off, the switch circuit 21 outputs a high level signal, the push switch SW1 of the operating switch 23 is turned off, and the operating switch 23 outputs a high level signal. The output end of the NAND gate U3 outputs a low level signal, and the light emitting diode LED of the alarm 30 is turned on to emit light, and the alarm drive circuit 20 and the alarm 30 are working normally.

[0051] When the test starts, the operation switch 23 is operated. After the push switch SW1 is turned on, the level of the first input terminal of the NAND gate U3 is pulled down, the output terminal of the NAND gate U3 outputs a high level, and the output terminal of the NAND gate U2 outputs a low level. After the push switch SW1 is released, the operation switch 23 is reset, the first input terminal of the NAND gate U3 inputs a high level, and due to the delay in the action of the NAND gate element, the output terminal of the NAND gate U3 keeps outputting a high level, and the light-emitting diode LED of the alarm 30 does not emit light.

[0052] When performing a power-off test:

[0053] If the output voltage Vout is stably output, the input side of the photoelectric isolation switch U1 in the switch circuit 21 is not conducting, the output side of the photoelectric isolation switch U1 is not conducting, the first switch tube Q1 is turned off, the output end of the NAND gate U3 maintains an output high level, and the light-emitting diode LED of the alarm 30 does not emit light.

[0054] If the output voltage Vout experiences a power failure, the input side of the photoelectric isolation switch U1 in the switch circuit 21 is turned on, the output side of the photoelectric isolation switch U1 is turned on, the first switch tube Q1 is turned on, the output end of the switch circuit 21 is pulled down to ground to output a low level, the switch circuit 21 outputs a first switch signal S1, the output end of the NAND gate U2 outputs a high level, the second input end of the NAND gate U3 is connected to the high level signal, and the output end of the NAND gate U3 outputs a low level signal accordingly, and the light emitting diode LED of the alarm 30 is turned on to emit light, and an alarm is issued to indicate a power failure.

[0055] refer to Figure 3 , which is the second embodiment of the present invention. In this embodiment, the logic circuit 22' includes two NOR gates U2' and U3' of the same type. The first input terminal of the NOR gate U2' is connected to the output terminal of the NOR gate U3', the first input terminal of the NOR gate U3' is connected to the output terminal of the NOR gate U2', the second input terminal of the NOR gate U2' is connected to the output terminal of the switch circuit 21, and the second input terminal of the NOR gate U3' is connected to the output terminal of the operating switch 23. The first switch signal S2 and the second switch signal S3 are both high-level signals. The alarm 30 is connected in series between the ground port (GND2) of the power supply interface 40 and the output terminal of the NOR gate U3'.

[0056] Different from the first embodiment, the operation switch 23' includes a push switch SW1 and a protection resistor R6 which are connected in series between the VDD port (VDD) and the ground port (GND2). The first switch tube Q1 and the resistor R4 in the switch circuit 21' are connected in series between the VDD port (VDD) and the ground port (GND2). The positive electrode of the alarm 30 is connected to the output end of the logic circuit 22.

[0057] Of course, the structure of the logic circuit is not limited to the above embodiment, and may also be other circuit structures.

[0058] Of course, the alarm driving circuit of the present invention can also be used for alarm driving of other abnormal signals, not limited to power-off signals. The structure of the alarm is not limited to the above embodiment, and can also be a sound alarm, a display screen alarm, etc.

[0059] The above disclosure is only the preferred embodiment of the present invention, which certainly cannot be used to limit the scope of rights of the present invention. Therefore, equivalent changes made according to the scope of the patent application of the present invention are still within the scope covered by the present invention.

Claims

1. An alarm driving circuit, used for generating an alarm signal according to an abnormal signal, a power supply interface supplies power to the alarm driving circuit, characterized in that: The invention comprises a switch circuit, a logic circuit and an automatically resettable operation switch, wherein the switch circuit operates according to the abnormal signal and outputs a first switch signal, the switch circuit comprises a photoelectric isolation switch, a first switch tube and a protection resistor, the input side of the photoelectric isolation switch is connected to the abnormal signal, and the output side is connected to the control end of the first switch tube, the first switch tube and the protection resistor are connected in series between the VDD port and the ground port of the power supply interface, and the node between the first switch tube and the protection resistor is connected to an input end of the logic circuit, the photoelectric isolation switch controls the first switch tube to operate to output the first switch signal to the logic circuit when receiving the abnormal signal; the operation switch is operated to output a second switch signal, the two input ends of the logic circuit are respectively connected to the first switch signal and the second switch signal, and an output end outputs the alarm signal, the logic circuit outputs the alarm signal when the power supply interface starts to be powered on, releases the alarm signal when the second switch signal is received, and outputs the alarm signal when the first switch signal is received.

2. The alarm driving circuit according to claim 1, characterized in that: The logic circuit includes two logic gates of the same type, the first input ends of the two logic gates are respectively connected to the output end of the other logic gate, the second input ends of the two logic gates are respectively connected to the output end of the switch circuit and the output end of the operating switch, the logic gate connected to the operating switch is the output logic gate, and the output end of the output logic gate outputs the alarm signal.

3. The alarm driving circuit according to claim 2, characterized in that: The logic gate is a NAND gate, the first switch signal and the second switch signal are both low-level signals, and the output end of the output logic gate outputs a low-level alarm signal.

4. The alarm driving circuit according to claim 3, characterized in that: The logic gate is a NOR gate, the first switch signal and the second switch signal are both high-level signals, and the output end of the output logic gate outputs a high-level alarm signal.

5. The alarm driving circuit according to claim 1, characterized in that: The operation switch includes a push switch and a protection resistor which are connected in series between a VDD port and a ground port of the power supply interface.

6. A power failure monitoring device, comprising a power failure detection circuit, an alarm drive circuit and an alarm as described in any one of claims 1 to 5, wherein the power failure detection circuit transmits a power failure signal to the alarm drive circuit when the power supply under test fails, the alarm drive circuit transmits an alarm signal to the alarm according to the power failure signal, and the alarm issues an alarm according to the alarm signal, characterized in that: The abnormal signal is a power-off signal.

7. The power failure monitoring device according to claim 6, characterized in that: The power-off detection circuit includes a voltage divider circuit, a charging capacitor, a second switch tube, a second variable resistor and a power supply interface under test. The power supply interface under test is used to connect the power supply under test and includes a Vout pin and a ground pin. The voltage divider circuit includes a first resistor and a first variable resistor which are sequentially connected in series between the Vout pin and the ground pin. The output end of the voltage divider circuit is connected to the positive electrode of the charging capacitor through a rectifier diode, and the negative electrode of the charging capacitor is connected to the ground pin. The second switch tube is a PNP transistor, and the base of the second switch tube is connected to the Vout pin through a second resistor, the emitter is connected to the positive electrode of the charging capacitor, the collector is connected to the input end of the switch circuit through a second variable resistor, and the other input end of the switch circuit is connected to the ground pin.

8. The power failure monitoring device according to claim 6, characterized in that: It also includes a power supply board, the power-off detection circuit, the alarm drive circuit and the alarm are installed on a detection board, a power supply circuit is installed on the power supply board and generates a power supply, the power supply interface is connected to the power supply to power the alarm drive circuit and the alarm, and the power supply board and the detection board have a preset distance.

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