Chip dynamic junction temperature monitoring system and monitoring method within a single switching cycle

Abstract

The present invention discloses a chip dynamic junction temperature monitoring system and monitoring method within a single switching cycle, and the operation steps are as follows: (1) predicting the initial junction temperature at the turn-off time within the PWM cycle based on the switch characteristic parameters, so as to obtain the initial junction temperature T of the power device at the turn-off time within a switching cycle. j_off (2) Estimate the junction temperature variation range during the shutdown period within the PWM cycle based on the electrothermal model to obtain the junction temperature variation range ΔT of the power device during the shutdown process within a switching cycle j (3) Estimate the maximum junction temperature of the power device during the shutdown period based on thermal equivalent effect, which is used to obtain the maximum junction temperature T of the power device during the shutdown process within a switching cycle. MAX The present invention focuses on the shutdown process of the power switch device, provides more accurate dynamic junction temperature parameters for failure analysis and electrical-thermal management of the power switch device, takes into account both safety and economic benefits, and is a new idea in the field of chip junction temperature detection.

Description

Technical Field

[0001] The present invention relates to the technical field of health management of power electronic equipment, and in particular to a method for estimating the dynamic junction temperature of a chip within a switching cycle. Background Art

[0002] According to the reliability survey report of power electronic systems, power semiconductor devices have the highest failure rate in the converter system, accounting for about 34%. Among various failure factors, power electronic system failures induced by temperature factors account for as high as 55%. According to a large amount of experimental statistical data and failure mechanism analysis, factors such as the junction temperature swing amplitude, maximum junction temperature, average junction temperature, minimum shell temperature, and on-time of the power device jointly determine the maximum number of temperature cycles it can experience before failure. Therefore, the accurate extraction and detection of the junction temperature of IGBTs in large-capacity power electronic converters is the basis for their service life estimation, health status management, and reliability status assessment.

[0003] Existing junction temperature detection technologies can be roughly divided into the following four methods: physical contact test method, optical non-contact test method, thermal impedance model prediction method and thermal sensitive electrical parameter method. Among them, the thermal sensitive electrical parameter method has the advantages of non-contact, fast response, non-destructive, high accuracy and low cost, and is a hot topic in current research. However, existing research methods mainly study a single thermal sensitive electrical parameter and ignore the change of the dynamic junction temperature of the chip during the switching process. There are problems such as weak robustness and low junction temperature prediction accuracy, and it has not reached practical application. Summary of the invention

[0004] The main purpose of the present invention is to overcome the shortcomings of the prior art, provide a chip dynamic junction temperature monitoring system and monitoring method within a single switching cycle, and a chip dynamic junction temperature estimation method considering the switch characteristic parameters, so as to achieve a more robust and accurate prediction of the chip maximum junction temperature, so as to obtain a multi-objective control that takes into account economic benefits and equipment reliability, and further provide a reference for the development direction of health management technology for power electronic devices. The present invention focuses on the shutdown process of power switching devices, provides more accurate dynamic junction temperature parameters for failure analysis and electro-thermal management of power switching devices, takes into account safety and economic benefits, and is a new idea in the field of chip junction temperature detection.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] A chip dynamic junction temperature monitoring system within a single switching cycle, comprising an insulated gate bipolar transistor unit, a main circuit unit, a current sampling unit, a voltage sampling unit, a temperature control unit and a junction temperature monitoring unit, wherein the insulated gate bipolar transistor unit comprises a first insulated gate bipolar transistor and a second insulated gate bipolar transistor connected in series;

[0007] The main circuit unit is connected to the first insulated gate bipolar transistor and the second insulated gate bipolar transistor respectively,

[0008] The current sampling unit is connected to the power device loop, and the sensing point of the current sampling unit is placed at the emitter of the second insulated gate bipolar transistor; it is used to detect the on-current of the insulated gate bipolar transistor, that is, the collector current i c ;

[0009] The voltage sampling unit is connected in parallel to the collector and emitter of the second insulated gate bipolar transistor; it is used to detect the tube voltage drop of the second insulated gate bipolar transistor, that is, the collector-emitter voltage v ce ;

[0010] The temperature control unit is connected to the second insulated gate bipolar transistor and is used to adjust the temperature of the insulated gate bipolar transistor device;

[0011] The junction temperature monitoring unit is connected to the current sampling unit, the voltage sampling unit, the temperature control unit and the driving unit respectively; and is used to receive the collector current i of the insulated gate bipolar transistor collected by the current sampling unit. c , receiving the collector-emitter voltage v of the insulated gate bipolar transistor collected by the voltage sampling unit ce , receiving the operating shell temperature of the insulated gate bipolar transistor collected by the temperature control unit; using the switch control signal as a trigger signal for the turn-off loss integration of the insulated gate bipolar transistor device within a single PWM cycle, and according to the collector current i of the insulated gate bipolar transistor detected by the current sampling unit c The turn-off loss calculated by the junction temperature monitoring unit and the three-dimensional mapping relationship table of turn-off loss-current-junction temperature obtained through previous experiments are used to obtain the initial junction temperature of the insulated gate bipolar transistor device at the turn-off moment in real time, and estimate the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle.

[0012] Preferably, the main circuit unit includes a DC voltage source, a capacitor and an inductor; the positive electrode of the DC voltage source is connected to one end of the capacitor and the collector of the first insulated gate bipolar transistor, the negative electrode of the DC voltage source is connected to the other end of the capacitor and the emitter of the second insulated gate bipolar transistor, one end of the inductor is connected to the emitter of the first insulated gate bipolar transistor and the collector of the second insulated gate bipolar transistor, and the other end of the inductor is connected to the collector of the first insulated gate bipolar transistor.

[0013] Preferably, the junction temperature monitoring unit is built with FPGA / DSP / single-chip microcomputer, and the calculation process of the junction temperature monitoring system is realized by FPGA / DSP / single-chip microcomputer.

[0014] Preferably, the current sampling unit and the voltage sampling unit both adopt an analog circuit structure; according to the switch control signal of the driving unit, the junction temperature monitoring unit determines the working state of the insulated gate bipolar transistor (IGBT) of the insulated gate bipolar transistor unit, including the on state, the off state, the turn-on process, and the turn-off process. During the turn-off process of the insulated gate bipolar transistor (IGBT), the analog-to-digital conversion bit number of the ADC with a built-in FPGA / DSP / microcontroller in the junction temperature monitoring unit is increased to improve the sampling accuracy, and the power curve and turn-off loss of the insulated gate bipolar transistor (IGBT) during the turn-off period are obtained.

[0015] Preferably, the initial junction temperature T at the shutdown time obtained by the junction temperature monitoring unit j_off , is the temperature set for the temperature calibration test, ignoring the influence of the double pulse on the junction temperature in the double pulse experiment. The initial junction temperature at the shutdown moment is lower than the actual junction temperature of the chip; the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle obtained by the junction temperature monitoring unit is firstly based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP obtains the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX .

[0016] A method for estimating the dynamic junction temperature of a chip within a single switching cycle is operated by using the dynamic junction temperature monitoring system of a chip within a single switching cycle of the present invention, and includes the following steps:

[0017] (1) Temperature calibration link:

[0018] (1.1) Set the operating conditions without exceeding the maximum operating voltage, maximum operating current and maximum operating temperature of the insulated gate bipolar transistor device;

[0019] (1.2) The operating temperature of the insulated gate bipolar transistor device is controlled by a temperature control unit. It is assumed that the junction temperature and the shell temperature of the power device are consistent after a certain period of time. The first insulated gate bipolar transistor (S1) is controlled to be in an off state by a driving unit, and the second insulated gate bipolar transistor (S2) is controlled to switch from an on state to an off state by a driving unit. The current sampling unit detects the collector current i of the second insulated gate bipolar transistor (S2) during the off period. c The voltage sampling unit detects the collector-emitter voltage v of the second insulated gate bipolar transistor (S2) during the off period. ce ;

[0020] (1.3) When triggered by a shutdown signal from the driving unit, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, obtains the heating power of the second insulated gate bipolar transistor (S2) in real time, and calculates the shutdown loss;

[0021] (1.4) By changing the operating current and operating temperature of the insulated gate bipolar transistor once, a three-dimensional mapping relationship table of turn-off loss-current-junction temperature is established, data is filled, and a three-dimensional mapping diagram of turn-off loss-current-junction temperature is drawn, where the junction temperature is the initial junction temperature T at the turn-off time obtained by the monitoring unit. j_off ;

[0022] (2) Online monitoring:

[0023] (2.1) In step (1.3) of the temperature calibration link in step (1), under the triggering of the shutdown signal of the driving unit, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, obtains the heating power of the second insulated gate bipolar transistor (S2) in real time, and calculates the shutdown loss;

[0024] (2.2) According to the turn-off loss obtained in step (2.1), the corresponding junction temperature in the turn-off loss-current-junction temperature three-dimensional mapping diagram in step (1.4) is obtained, that is, the initial junction temperature T at the turn-off time j_off ;

[0025] (2.3) According to the shell temperature T of the insulated gate bipolar transistor device fed back by the temperature control unit at this time c , based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP, calculate the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX =T j_off +ΔT j .

[0026] Preferably, the present invention adopts a method for predicting the initial junction temperature at the turn-off time within a PWM cycle based on the switch characteristic parameters. In the step (1.3), a method for predicting the initial junction temperature of a power device at the turn-off time within a single switch cycle based on the switch characteristic parameters is adopted, and the turn-off loss is calculated by the following formula:

[0027]

[0028] Where, the collector-emitter voltage v ce, the collector current is obtained through the sensor, E off is the turn-off loss of the power device, t is the start time of the turn-off process, t off is the turn-off time, i.e., from the collector-emitter voltage v ce That is, it rises to 10% of the cut-off voltage v ce_off Start to collector current i c Drop to 10% turn-on current i c_on The corresponding time period at the end of the turn-off delay time is the gate-emitter voltage v ge Down to 90%v ge_n , starting from the collector-emitter voltage v ce Rise to 10%v ce_off The corresponding time period at the end, where v ge_n is the rated gate-emitter voltage; v ce is the collector-emitter voltage during the power device shutdown process; i c It is the collector current of the power device during the shutdown process.

[0029] Preferably, in the step (2.3), the electrothermal model is used to estimate the junction temperature variation range during the off period within the PWM cycle, and the power loss variation range ΔP is obtained by the following steps:

[0030] Step 1: Measure and obtain the collector-emitter voltage v of the power device at each moment ce , collector current i c information;

[0031] Step 2: Set the collector-emitter voltage v in step 1 to ce , collector current i c Multiply to get the power P at time i i ;

[0032] Step 3: The power P at the i-th moment in step 2 is i and the power P at the i-1th moment i-1 Subtract to get ΔP i ;

[0033] Step 4: Determine ΔP i Is it greater than 0?

[0034] If ΔP i >0, continue to repeat step 1;

[0035] If ΔP i <0, then the power P at time i-1 i-1 That is the maximum power P MAX ;

[0036] Step 5: Maximum power P MAX and the initial power P at the time of shutdownoff The power difference is the power loss variation range ΔP.

[0037] Preferably, in step (1), a method for predicting the initial junction temperature at the turn-off time within a PWM cycle based on switch characteristic parameters is adopted, and the collector current i c It is obtained by detecting the magnetic flux corresponding to the current.

[0038] Preferably, the prediction of the initial junction temperature at the turn-off time within the PWM cycle based on the switch characteristic parameters can also be obtained by the following method, including the following steps:

[0039] (1-1) According to the temperature calibration platform, a mapping relationship table 1 of turn-off loss-current-junction temperature and a mapping relationship table 2 of turn-off delay time-current-junction temperature are established in advance;

[0040] (1-2) According to the measured turn-off loss of the power device and the established turn-off loss-current-junction temperature mapping table 1, a first estimated junction temperature T is obtained. j1 ;

[0041] (1-3) According to the measured turn-off delay time of the power device and the established turn-off delay time-current-junction temperature mapping table 2, a second estimated junction temperature T is obtained. j2 ;

[0042] (1-4), the first estimated junction temperature T obtained in step (1-2) j1 The second estimated junction temperature T obtained in step (1-3) j2 Perform weighted summation to obtain the estimated initial junction temperature T at shutdown time after data fusion. j_off .

[0043] Preferably, in step (1-4) of the method for predicting the initial junction temperature at the turn-off time within a PWM cycle based on the switch characteristic parameters, the first estimated junction temperature T j1 The second estimated junction temperature T j2 A weighted sum is performed, where the first estimated junction temperature T j1 The second estimated junction temperature T j2 The weight of can be determined and adjusted according to the actual operation and calibration conditions. Or the first estimated junction temperature T j1 The second estimated junction temperature T j2 One of the weights is reset to zero, and a junction temperature estimation scheme based on turn-off loss or a junction temperature estimation scheme based on turn-off delay time is adopted.

[0044] Preferably, in the method for monitoring chip dynamic junction temperature in a single switching cycle, in step (2), the maximum junction temperature during the off period in the PWM cycle includes the following two methods:

[0045] (1) Method 1

[0046] (1-1) The initial junction temperature T of the power device at the turn-off time in a switching cycle is obtained by using a method based on the switch characteristic parameters to predict the initial junction temperature at the turn-off time in a PWM cycle. j_off ;

[0047] (1-2) A method based on an electrothermal model is used to estimate the junction temperature variation range during the shutdown period within a PWM cycle to obtain the junction temperature variation range ΔT of the power device during the shutdown process within a switching cycle. j ;

[0048] (1-3) The initial junction temperature T at the shutdown time obtained in step (3-1) j_off The junction temperature variation range ΔT obtained in step (3-2) j Add together to obtain the maximum junction temperature T of the power device during the shutdown process in a switching cycle. MAX .

[0049] (2) Method 2

[0050] (2-1'), sampling calculation to obtain the maximum power P during the off period of the chip PWM cycle MAX ;

[0051] (2-2'), based on the electrothermal model Z th =(T j -T c ) / P calculates the maximum junction temperature T during the off period within the PWM cycle MAX =Z th ·P MAX +T.

[0052] Compared with the prior art, the present invention has the following obvious outstanding substantial features and significant advantages:

[0053] 1. The chip shutdown initial junction temperature monitoring system and estimation method based on the shutdown loss-current-junction temperature three-dimensional mapping table proposed in the present invention, compared with the shutdown voltage change rate, shutdown current change rate, and turn-on loss, uses the shutdown loss as a dynamic thermal-sensitive electrical parameter, and has relatively good linearity and sensitivity, good generalization, and relatively high accuracy in the application of power devices under non-soft switching conditions;

[0054] 2. The method proposed in the present invention for predicting the initial junction temperature at the turn-off time within the PWM cycle based on the switch characteristic parameters is to obtain the initial junction temperature T at the turn-off time by the turn-off loss and the turn-off delay time. j1 With T j2 , perform weighted summation to obtain the initial junction temperature T of the power device at the turn-off time in a switching cycle j_offCompared with the traditional junction temperature estimation method of a single thermal electrical parameter, this scheme has higher robustness;

[0055] 3. The method proposed in the present invention for estimating the junction temperature variation range during the shutdown period within a PWM cycle based on an electrothermal model is used to obtain the junction temperature variation range ΔT of a power device during the shutdown process within a switching cycle. j , which shows that within a single PWM cycle, the highest junction temperature of the chip occurs during the shutdown period; the method of estimating the highest junction temperature during the shutdown period within the PWM cycle based on thermal equivalent effect is used to obtain the highest junction temperature T of the power device during the shutdown process within a switching cycle. MAX ; It realizes the maximum junction temperature detection that is closer to the actual operating state of the chip, provides more accurate junction temperature parameters for the chip's electrical and thermal management, and improves the safety and economic benefits of power electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 This is a flow chart of chip dynamic junction temperature estimation within a switching cycle of the present invention.

[0057] Figure 2 It is a schematic diagram of a chip dynamic junction temperature monitoring system within a single switching cycle of the present invention.

[0058] Figure 3 The waveforms are the chip power-time and junction temperature-time in the switching cycle of the present invention.

[0059] Figure 4 This is a diagram of the shutdown process parameters of the power device of the present invention.

[0060] Figure 5 Table 1 is the mapping relationship between the turn-off loss, current and junction temperature of the present invention: E off -I C - T graph.

[0061] Figure 6 Table 2 is the mapping relationship between the turn-off delay time, current and junction temperature of the present invention: t doff -I c -T j picture.

[0062] Figure 7 A flow chart for obtaining the power loss variation range ΔP of the present invention.

[0063] Figure 8 This is a flow chart of chip dynamic junction temperature estimation within a switching cycle of the present invention. DETAILED DESCRIPTION

[0064] In order to better illustrate the present invention and facilitate understanding of the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and preferred embodiments. It should be understood that the following embodiments are only used to illustrate the present invention and do not represent or limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the claims.

[0065] Embodiment 1:

[0066] See also Figure 2 , a chip dynamic junction temperature monitoring system within a single switching cycle, comprising an insulated gate bipolar transistor unit, a main circuit unit, a current sampling unit, a voltage sampling unit, a temperature control unit and a junction temperature monitoring unit, wherein the insulated gate bipolar transistor unit comprises a first insulated gate bipolar transistor (S1) and a second insulated gate bipolar transistor (S2) connected in series with each other;

[0067] The main circuit unit is connected to a first insulated gate bipolar transistor (S1) and a second insulated gate bipolar transistor (S2),

[0068] The current sampling unit is connected to the power device loop, and the sensing point of the current sampling unit is placed at the emitter of the second insulated gate bipolar transistor (S2); it is used to detect the on-current of the insulated gate bipolar transistor, that is, the collector current i c ;

[0069] The voltage sampling unit is connected in parallel to the collector and emitter of the second insulated gate bipolar transistor (S2); and is used to detect the tube voltage drop of the second insulated gate bipolar transistor (S2), that is, the collector-emitter voltage v ce ;

[0070] The temperature control unit is connected to the second insulated gate bipolar transistor (S2) and is used to adjust the temperature of the insulated gate bipolar transistor device;

[0071] The junction temperature monitoring unit is connected to the current sampling unit, the voltage sampling unit, the temperature control unit and the driving unit respectively; and is used to receive the collector current i of the insulated gate bipolar transistor collected by the current sampling unit. c , receiving the collector-emitter voltage v of the insulated gate bipolar transistor collected by the voltage sampling unit ce , receiving the operating shell temperature of the insulated gate bipolar transistor collected by the temperature control unit; using the switch control signal as a trigger signal for the turn-off loss integration of the insulated gate bipolar transistor device within a single PWM cycle, and according to the collector current i of the insulated gate bipolar transistor detected by the current sampling unit c The turn-off loss calculated by the junction temperature monitoring unit and the three-dimensional mapping relationship table of turn-off loss-current-junction temperature obtained through previous experiments are used to obtain the initial junction temperature of the insulated gate bipolar transistor device at the turn-off moment in real time, and estimate the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle.

[0072] In this embodiment, the main circuit unit includes a DC voltage source (V), a capacitor (C) and an inductor (L); the positive electrode of the DC voltage source (V) is connected to one end of the capacitor (C) and the collector of the first insulated gate bipolar transistor (S1), the negative electrode of the DC voltage source (V) is connected to the other end of the capacitor (C) and the emitter of the second insulated gate bipolar transistor (S2), one end of the inductor (L) is connected to the emitter of the first insulated gate bipolar transistor (S1) and the collector of the second insulated gate bipolar transistor (S2), and the other end of the inductor (L) is connected to the collector of the first insulated gate bipolar transistor (S1).

[0073] In this embodiment, the junction temperature monitoring unit is built with FPGA / DSP / single-chip microcomputer, and the calculation process of the junction temperature monitoring system is implemented through the FPGA / DSP / single-chip microcomputer.

[0074] In this embodiment, the current sampling unit and the voltage sampling unit both adopt an analog circuit structure; according to the switch control signal of the driving unit, the junction temperature monitoring unit determines the working state of the insulated gate bipolar transistor (IGBT) of the insulated gate bipolar transistor unit, including the on state, the off state, the turn-on process, and the turn-off process. During the turn-off process of the insulated gate bipolar transistor (IGBT), the analog-to-digital conversion bit number of the ADC with a built-in FPGA / DSP / microcontroller in the junction temperature monitoring unit is increased to improve the sampling accuracy, and the power curve and turn-off loss of the insulated gate bipolar transistor (IGBT) during the turn-off period are obtained.

[0075] In this embodiment, the initial junction temperature T at the shutdown time obtained by the junction temperature monitoring unit j_off , is the temperature set for the temperature calibration test, ignoring the influence of the double pulse on the junction temperature in the double pulse experiment. The initial junction temperature at the shutdown moment is lower than the actual junction temperature of the chip; the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle obtained by the junction temperature monitoring unit is firstly based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP obtains the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX The chip power-time and junction temperature-time waveforms during the switching cycle are as follows: Figure 3 shown.

[0076] In this embodiment, the chip dynamic junction temperature monitoring system operates in a single switching cycle, characterized by including the following operating steps:

[0077] (1) Temperature calibration link:

[0078] (1.1) Set the operating conditions without exceeding the maximum operating voltage, maximum operating current and maximum operating temperature of the insulated gate bipolar transistor device;

[0079] (1.2) The operating temperature of the insulated gate bipolar transistor device is controlled by a temperature control unit. It is assumed that the junction temperature and the shell temperature of the power device are consistent after a certain period of time. The first insulated gate bipolar transistor (S1) is controlled to be in an off state by a driving unit, and the second insulated gate bipolar transistor (S2) is controlled to switch from an on state to an off state by a driving unit. The current sampling unit detects the collector current i of the second insulated gate bipolar transistor (S2) during the off period. c The voltage sampling unit detects the collector-emitter voltage v of the second insulated gate bipolar transistor (S2) during the off period. ce ;

[0080] (1.3) When the drive unit turns off the signal, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, and obtains the collector current i of the second insulated gate bipolar transistor (S2) in real time. c and collector-emitter voltage v ce ,according to Figure 4 , calculate the heating power and obtain the turn-off loss;

[0081] (1.4) By changing the operating current and operating temperature of the insulated gate bipolar transistor at one time, a three-dimensional mapping relationship table of turn-off loss-current-junction temperature is established, and data is filled to draw a three-dimensional mapping diagram of turn-off loss-current-junction temperature, such as Figure 5 As shown. The junction temperature is the initial junction temperature T at the shutdown time obtained by the monitoring unit. j_off ;

[0082] (2) Online monitoring:

[0083] (2.1) In step (1.3) of the temperature calibration link in step (1), under the triggering of the shutdown signal of the driving unit, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, obtains the heating power of the second insulated gate bipolar transistor (S2) in real time, and calculates the shutdown loss;

[0084] (2.2) According to the turn-off loss obtained in step (2.1), the corresponding junction temperature in the turn-off loss-current-junction temperature three-dimensional mapping diagram in step (1.4) is obtained, that is, the initial junction temperature T at the turn-off time j_off ;

[0085] (2.3) According to the shell temperature T of the insulated gate bipolar transistor device fed back by the temperature control unit at this timec , based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP, calculate the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX =T j_off +ΔT j .

[0086] In this embodiment, in the step (1.3), a method for predicting the initial junction temperature of the power device at the turn-off time in a single switching cycle based on the switch characteristic parameters is adopted, and the turn-off loss is calculated by the following formula:

[0087]

[0088] Where, the collector-emitter voltage v ce , the collector current is obtained through the sensor, E off is the turn-off loss of the power device, t is the start time of the turn-off process, t off is the turn-off time, i.e., from the collector-emitter voltage v ce That is, it rises to 10% of the cut-off voltage v ce_off Start to collector current i c Drop to 10% turn-on current i c_on The corresponding time period at the end of the turn-off delay time is the gate-emitter voltage v ge Down to 90%v ge_n , starting from the collector-emitter voltage v ce Rise to 10%v ce_off The corresponding time period at the end, where v ge_n is the rated gate-emitter voltage; v ce is the collector-emitter voltage during the power device shutdown process; i c It is the collector current of the power device during the shutdown process.

[0089] In this embodiment, in step (2.3), the electrothermal model is used to estimate the junction temperature variation range during the off period within the PWM cycle, such as Figure 7 As shown, the power loss variation range ΔP is obtained by the following steps:

[0090] Step 1: Measure and obtain the collector-emitter voltage v of the power device at each moment ce , collector current i c information;

[0091] Step 2: Set the collector-emitter voltage v in step 1 to ce , collector current i c Multiply to get the power P at time i i ;

[0092] Step 3: The power P at the i-th moment in step 2 is i and the power P at the i-1th moment i-1 Subtract to get ΔP i ;

[0093] Step 4: Determine ΔP i Is it greater than 0?

[0094] If ΔP i >0, continue to repeat step 1;

[0095] If ΔP i <0, then the power P at time i-1 i-1 That is the maximum power P MAX ;

[0096] Step 5: Maximum power P MAX and the initial power P at the time of shutdown off The power difference is the power loss variation range ΔP.

[0097] This embodiment is based on the chip shutdown moment initial junction temperature monitoring system of the shutdown loss-current-junction temperature three-dimensional mapping table. Compared with the shutdown voltage change rate, shutdown current change rate, and turn-on loss, the shutdown loss is used as a dynamic thermal electrical parameter. In the application scenarios of power devices under non-soft switching conditions, it has relatively good linearity and sensitivity, excellent generalization and relatively high accuracy.

[0098] The method proposed in this embodiment for estimating the junction temperature variation range of a power device during shutdown based on an electrothermal model is used to obtain the junction temperature variation range ΔT of the power device during shutdown in a single switching cycle. j , which shows that within a single PWM cycle, the highest junction temperature of the chip occurs during the shutdown period; the method of estimating the highest junction temperature during the shutdown period within the PWM cycle based on thermal equivalent effect is used to obtain the highest junction temperature T of the power device during the shutdown process within a switching cycle. MAX ; It realizes the maximum junction temperature detection that is closer to the actual operating state of the chip, provides more accurate junction temperature parameters for the chip's electrical and thermal management, and improves the safety and economic benefits of power electronic devices.

[0099] Embodiment 2:

[0100] This embodiment is basically the same as the above embodiment, with the following special features:

[0101] The initial junction temperature at the turn-off time within the PWM cycle is predicted based on the switch characteristic parameters, and is obtained by the following method, including the following steps:

[0102] (1-1), according to the temperature calibration platform, a mapping relationship table 1 of turn-off loss-current-junction temperature and a mapping relationship table 2 of turn-off delay time-current-junction temperature are established in advance; Figure 4 , Figure 5 shown.

[0103] (1-2) According to the measured turn-off loss of the power device and the established turn-off loss-current-junction temperature mapping table 1, a first estimated junction temperature T is obtained. j1 ;

[0104] (1-3) According to the measured turn-off delay time of the power device and the established turn-off delay time-current-junction temperature mapping table 2, a second estimated junction temperature T is obtained. j2 ;

[0105] (1-4), the first estimated junction temperature T obtained in step (1-2) j1 The second estimated junction temperature T obtained in step (1-3) j2 Perform weighted summation to obtain the estimated initial junction temperature T at shutdown time after data fusion. j_off .

[0106] The method proposed in this embodiment predicts the initial junction temperature at the turn-off time within the PWM cycle based on the switch characteristic parameters. The initial junction temperature T at the turn-off time is obtained by the turn-off loss and the turn-off delay time. j1 With T j2 , perform weighted summation to obtain the initial junction temperature T of the power device at the turn-off time in a switching cycle j_off This scheme is more robust than the traditional single thermal electrical parameter junction temperature estimation method.

[0107] In summary, the method for monitoring chip dynamic junction temperature in a single switching cycle in the above embodiment predicts the initial junction temperature at the turn-off time in a single switching cycle based on the switch characteristic parameters, and is used to obtain the initial junction temperature T of the power device at the turn-off time in a switching cycle. j_off ; Then, the junction temperature variation range of the power device during the shutdown period is estimated based on the electrothermal model to obtain the junction temperature variation range ΔT of the power device during the shutdown process in a single switching cycle j ; Based on the thermal equivalent effect, the maximum junction temperature during the shutdown period within the PWM cycle is estimated to obtain the maximum junction temperature T of the power device during the shutdown process within a switching cycle. MAXThe above embodiment focuses on the shutdown process of the power switch device, provides more accurate dynamic junction temperature parameters for failure analysis and electrical-thermal management of the power switch device, takes into account both safety and economic benefits, and is a new idea in the field of chip junction temperature detection.

[0108] The above contents are further detailed descriptions of the present invention in combination with specific / preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, they can also make several substitutions or modifications to these described embodiments without departing from the concept of the present invention, and these substitutions or modifications should be regarded as belonging to the protection scope of the present invention.

Claims

1. A chip dynamic junction temperature monitoring system within a single switching cycle, characterized in that: It comprises an insulated gate bipolar transistor unit, a main circuit unit, a current sampling unit, a voltage sampling unit, a temperature control unit and a junction temperature monitoring unit, wherein the insulated gate bipolar transistor unit comprises a first insulated gate bipolar transistor (S1) and a second insulated gate bipolar transistor (S2) connected in series with each other; The main circuit unit is connected to a first insulated gate bipolar transistor (S1) and a second insulated gate bipolar transistor (S2), The current sampling unit is connected to the power device loop, and the sensing point of the current sampling unit is placed at the emitter of the second insulated gate bipolar transistor (S2); it is used to detect the on-current of the insulated gate bipolar transistor, that is, the collector current i c ; The voltage sampling unit is connected in parallel to the collector and emitter of the second insulated gate bipolar transistor (S2); it is used to detect the tube voltage drop of the insulated gate bipolar transistor (IGBT) S2, that is, the collector-emitter voltage v ce ; The temperature control unit is connected to the second insulated gate bipolar transistor (S2) and is used to adjust the temperature of the insulated gate bipolar transistor device; The junction temperature monitoring unit is connected to the current sampling unit, the voltage sampling unit, the temperature control unit and the driving unit respectively; and is used to receive the collector current i of the insulated gate bipolar transistor collected by the current sampling unit. c , receiving the collector-emitter voltage v of the insulated gate bipolar transistor collected by the voltage sampling unit ce , receiving the operating shell temperature of the insulated gate bipolar transistor collected by the temperature control unit; using the switch control signal as a trigger signal for the turn-off loss integration of the insulated gate bipolar transistor device within a single PWM cycle, and according to the collector current i of the insulated gate bipolar transistor detected by the current sampling unit c The turn-off loss calculated by the junction temperature monitoring unit and the three-dimensional mapping relationship table of turn-off loss-current-junction temperature obtained through previous experiments are used to obtain the initial junction temperature of the insulated gate bipolar transistor device at the turn-off moment in real time, and estimate the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle.

2. The chip dynamic junction temperature monitoring system within a single switching cycle according to claim 1, characterized in that: The main circuit unit comprises a DC voltage source (V), a capacitor (C) and an inductor (L); the positive electrode of the DC voltage source (V) is connected to one end of the capacitor (C) and the collector of a first insulated gate bipolar transistor (S1), the negative electrode of the DC voltage source (V) is connected to the other end of the capacitor (C) and the emitter of a second insulated gate bipolar transistor (S2), one end of the inductor (L) is connected to the emitter of the first insulated gate bipolar transistor (S1) and the collector of the second insulated gate bipolar transistor (S2), and the other end of the inductor (L) is connected to the collector of the first insulated gate bipolar transistor (S1).

3. The chip dynamic junction temperature monitoring system within a single switching cycle according to claim 1, characterized in that: The junction temperature monitoring unit is built with FPGA / DSP / single-chip microcomputer, and the calculation process of the junction temperature monitoring system is realized through FPGA / DSP / single-chip microcomputer.

4. The chip dynamic junction temperature monitoring system within a single switching cycle according to claim 1, characterized in that: The current sampling unit and the voltage sampling unit both adopt an analog circuit structure; according to the switch control signal of the driving unit, the junction temperature monitoring unit determines the working state of the insulated gate bipolar transistor (IGBT) of the insulated gate bipolar transistor unit, including the on state, the off state, the turn-on process, and the turn-off process. During the turn-off process of the insulated gate bipolar transistor (IGBT), the analog-to-digital conversion bit number of the ADC with a built-in FPGA / DSP / single-chip microcomputer in the junction temperature monitoring unit is increased to improve the sampling accuracy, and the power curve and turn-off loss of the insulated gate bipolar transistor (IGBT) during the turn-off period are obtained.

5. The chip dynamic junction temperature monitoring system within a single switching cycle according to claim 1, characterized in that: The junction temperature monitoring unit obtains the initial junction temperature T at the shutdown time. j_off , is the temperature set for the temperature calibration test, ignoring the influence of the double pulse on the junction temperature in the double pulse experiment. The initial junction temperature at the shutdown moment is lower than the actual junction temperature of the chip; the maximum junction temperature of the insulated gate bipolar transistor device in a single switching cycle obtained by the junction temperature monitoring unit is firstly based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP obtains the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX .

6. A method for monitoring chip dynamic junction temperature in a single switching cycle, which is operated by the chip dynamic junction temperature monitoring system in a single switching cycle according to claim 1, characterized in that: The steps include: (1) Temperature calibration link: (1.1) Set the operating conditions without exceeding the maximum operating voltage, maximum operating current and maximum operating temperature of the insulated gate bipolar transistor device; (1.2) The operating temperature of the insulated gate bipolar transistor device is controlled by a temperature control unit. It is assumed that the junction temperature and the shell temperature of the power device are consistent after a certain period of time. The first insulated gate bipolar transistor (S1) is controlled to be in an off state by a driving unit, and the second insulated gate bipolar transistor (S2) is controlled to switch from an on state to an off state by a driving unit. The current sampling unit detects the collector current i of the second insulated gate bipolar transistor (S2) during the off period. c The voltage sampling unit detects the collector-emitter voltage v of the second insulated gate bipolar transistor (S2) during the off period. ce ; (1.3) When triggered by a shutdown signal from the driving unit, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, obtains the heating power of the second insulated gate bipolar transistor (S2) in real time, and calculates the shutdown loss; (1.4) By changing the operating current and operating temperature of the insulated gate bipolar transistor once, a three-dimensional mapping relationship table of turn-off loss-current-junction temperature is established, data is filled, and a three-dimensional mapping diagram of turn-off loss-current-junction temperature is drawn, where the junction temperature is the initial junction temperature T at the turn-off time obtained by the monitoring unit. j_off ; (2) Online monitoring: (2.1) In step (1.3) of the temperature calibration link in step (1), under the triggering of the shutdown signal of the driving unit, the temperature control unit increases the analog-to-digital conversion rate of the current sampling unit and the voltage sampling unit, obtains the heating power of the second insulated gate bipolar transistor (S2) in real time, and calculates the shutdown loss; (2.2) According to the turn-off loss obtained in step (2.1), the corresponding junction temperature in the turn-off loss-current-junction temperature three-dimensional mapping diagram in step (1.4) is obtained, that is, the initial junction temperature T at the turn-off time j_off ; (2.3) According to the shell temperature T of the insulated gate bipolar transistor device fed back by the temperature control unit at this time c , based on the electrothermal model Z th =(T j -T c ) / P=ΔT j / ΔP, calculate the junction temperature variation range ΔT of the power device during shutdown j , where ΔP is the power loss range, P is the IGBT power loss, Z th is the thermal resistance during the switching cycle; the final maximum junction temperature T MAX =T j_off +ΔT j .

7. The method for monitoring chip dynamic junction temperature in a single switching cycle according to claim 6, characterized in that: In the step (1.3), a method for predicting the initial junction temperature of the power device at the turn-off time in a single switching cycle based on the switch characteristic parameters is adopted, and the turn-off loss is calculated by the following formula: Where, the collector-emitter voltage v ce , the collector current is obtained through the sensor, E off is the turn-off loss of the power device, t is the start time of the turn-off process, t off is the turn-off time, i.e., from the collector-emitter voltage v ce That is, it rises to 10% of the cut-off voltage v ce_off Start to collector current i c Drop to 10% turn-on current i c_on The corresponding time period at the end of the turn-off delay time is the gate-emitter voltage v ge Down to 90%v ge_n , starting from the collector-emitter voltage v ce Rise to 10%v ce_off The corresponding time period at the end, where v ge_n is the rated gate-emitter voltage; v ce is the collector-emitter voltage during the power device shutdown process; i c It is the collector current of the power device during the shutdown process.

8. The method for monitoring chip dynamic junction temperature in a single switching cycle according to claim 6, characterized in that: In the step (2.3), the electrothermal model is used to estimate the junction temperature variation range during the off period within the PWM cycle, and the power loss variation range ΔP is obtained by the following steps: Step 1: Measure and obtain the collector-emitter voltage v of the power device at each moment ce , collector current i c information; Step 2: Set the collector-emitter voltage v in step 1 to ce , collector current i c Multiply to get the power P at time i i ; Step 3: The power P at the i-th moment in step 2 is i and the power P at the i-1th moment i-1 Subtract to get ΔP i ; Step 4: Determine ΔP i Is it greater than 0? If ΔP i >0, continue to repeat step 1; If ΔP i <0, then the power P at time i-1 i-1 That is the maximum power P MAX ; Step 5: Maximum power P MAX and the initial power P at the time of shutdown off The power difference is the power loss variation range ΔP.

9. The method for monitoring chip dynamic junction temperature in a single switching cycle according to claim 6, characterized in that: In the step (1), a method for predicting the initial junction temperature at the turn-off time within a PWM cycle based on switch characteristic parameters is adopted, and the collector current i c It is obtained by detecting the magnetic flux corresponding to the current.

10. The method for monitoring chip dynamic junction temperature in a single switching cycle according to claim 6, characterized in that: Predicting the initial junction temperature at the turn-off time within the PWM cycle based on the switch characteristic parameters can also be obtained by the following method, including the following steps: (1-1) According to the temperature calibration platform, a mapping relationship table 1 of turn-off loss-current-junction temperature and a mapping relationship table 2 of turn-off delay time-current-junction temperature are established in advance; (1-2) According to the measured turn-off loss of the power device and the established turn-off loss-current-junction temperature mapping table 1, a first estimated junction temperature T is obtained. j1 ; (1-3) According to the measured turn-off delay time of the power device and the established turn-off delay time-current-junction temperature mapping table 2, a second estimated junction temperature T is obtained. j2 ; (1-4), the first estimated junction temperature T obtained in step (1-2) j1 The second estimated junction temperature T obtained in step (1-3) j2 Perform weighted summation to obtain the estimated initial junction temperature T at shutdown time after data fusion. j_off .

11. The method for monitoring chip dynamic junction temperature in a single switching cycle according to claim 10, characterized in that: In the step (1-4), the first estimated junction temperature T j1 The second estimated junction temperature T j2 Perform a weighted summation, where the first estimated junction temperature T j1 The second estimated junction temperature T j2 The weight of the first estimated junction temperature T can be determined and adjusted according to the actual operation and calibration conditions; or according to the specific operating environment and experimental conditions, the first estimated junction temperature T j1 The second estimated junction temperature T j2 One of the weights is reset to zero, and a junction temperature estimation scheme based on turn-off loss or a junction temperature estimation scheme based on turn-off delay time is adopted.

12. The method for monitoring chip dynamic junction temperature in a single switching cycle according to any one of claims 6 to 11, characterized in that: In step (2), the maximum junction temperature during the off period within the PWM cycle includes the following two methods: (1) Method 1 (1-1) The initial junction temperature T of the power device at the turn-off time in a switching cycle is obtained by using a method based on the switch characteristic parameters to predict the initial junction temperature at the turn-off time in a PWM cycle. j_off ; (1-2) A method based on an electrothermal model is used to estimate the junction temperature variation range during the shutdown period within a PWM cycle to obtain the junction temperature variation range ΔT of the power device during the shutdown process within a switching cycle. j ; (1-3) The initial junction temperature T at the shutdown time obtained in step (3-1) j_off The junction temperature variation range ΔT obtained in step (3-2) j Add together to obtain the maximum junction temperature T of the power device during the shutdown process in a switching cycle. MAX； (2) Method 2 (2-1'), sampling calculation to obtain the maximum power P during the off period of the chip PWM cycle MAX ; (2-2'), based on the electrothermal model Z th =(T j -T c ) / P calculates the maximum junction temperature T during the off period within the PWM cycle MAX =Z th ·P MAX +T.

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