An IGBT gate driver based on floating ground current slope suppression

Abstract

The present invention provides an IGBT gate driver based on floating ground current slope suppression, which includes a driving circuit: used to receive a PWM signal and convert it into a driving signal for output to the IGBT to control the turn-on and turn-off of the IGBT; a current change rate suppression circuit: used to collect the PWM signal state and the IGBT state and compare them. When the PWM signal is in the off command state, if the IGBT main circuit current change rate exceeds the set value, the driver will force the IGBT to turn on to reduce the voltage across the IGBT and prevent the IGBT from experiencing a breakdown fault. The driver of the present invention has the characteristics of simple structure, high integration, strong anti-interference ability, fast response speed and low energy consumption, and can meet the requirements of high-frequency and high-speed IGBT control; by controlling the output waveform through a push-pull circuit, it has the characteristics of fast action speed and continuously adjustable waveform.

Description

Technical Field

[0001] The present invention belongs to the technical field of control of power electronics and power automation equipment, and particularly relates to an IGBT gate driver based on floating ground current slope suppression. Background Art

[0002] At present, the application of IGBT driver technology at home and abroad in the field of medium and low power is relatively mature, mainly using digital control methods to achieve driving, and the functions are relatively single; IGBT combines the advantages of MOSFET and GTR, has high input impedance, fast switching speed, good thermal stability, low on-state voltage drop, high breakdown voltage, large current-carrying capacity, etc. In recent years, it has been widely used in various fields. Adopting a set of good performance drive circuits can shorten the switching time, reduce the switching loss, make the IGBT work in an ideal switching state, and at the same time is of great significance to the operation efficiency, reliability and safety of the product. IGBT is a voltage-controlled device. When a DC voltage of more than ten volts is applied between its gate and emitter, only a microampere-level current flows through. The IGBT driver is an interface circuit between the IGBT and the controller DSP chip. Its function is to convert the control signal from the digital signal processor into a driving signal with sufficient power to achieve the safe turn-on and turn-off of the IGBT, and provide electrical isolation between the processor and the IGBT. In order to correctly and effectively protect the IGBT when a fault occurs in the system, the IGBT driver also needs to provide corresponding fault protection functions such as overcurrent, overvoltage, and short circuit.

[0003] However, in the existing technology, most of them detect the potential difference between the C-E pins of the IGBT to judge whether the IGBT is normally turned on and off. In the actual application process of this detection method, there is a problem of delayed action of the protection circuit, and the IGBT is broken down because the protection circuit fails to act in time. Summary of the Invention

[0004] Aiming at the deficiencies of the above-mentioned existing technology, the purpose of the present invention is to provide an IGBT gate driver based on floating ground current slope suppression.

[0005] The purpose of the present invention is achieved through the following technical solutions:

[0006] An IGBT gate driver based on floating ground current slope suppression, comprising,

[0007] A drive circuit: used to receive a PWM signal and convert it into a drive signal to be output to the IGBT to control the turn-on and turn-off of the IGBT; the drive circuit includes a PWM signal receiving circuit, a Darlington circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, and an output circuit connected in parallel;

[0008] Current change rate suppression circuit: It is used to collect the status of the PWM signal and the IGBT status, and make a comparison. When the PWM signal is in the off command state, if the current change rate of the IGBT main circuit exceeds the set value, the driver will force the IGBT to turn on to reduce the voltage across the IGBT and prevent the IGBT from breaking down.

[0009] Preferably, the PWM signal receiving circuit is composed of resistor R2, resistor R3, resistor R6, and triode Q4. The PWM signal receiving circuit inverts the received PWM signal through triode Q4 to drive the corresponding triode in the Darlington circuit. The 2-pin of resistor R2 is connected to the power supply, the 1-pin of resistor R2 is connected to the PWM drive signal and is also connected to the 2-pin of resistor R6. The 1-pin of resistor R6 is connected to the B pin of triode Q4, the E pin of triode Q4 is connected to the 1-pin of resistor R3, and the 2-pin of resistor R3 is connected to the power supply. The power supply is a +5V power supply.

[0010] Preferably, the Darlington circuit includes triode Q1 and triode Q3. The C pin of triode Q1 is connected to the +15V power supply, the E pin of triode Q1 is connected to the B pin of triode Q3, and the C pin of triode Q3 is connected to the +15V power supply. The E pin of triode Q3 is connected to the first-stage amplification circuit.

[0011] Preferably, the Darlington circuit further includes resistor R23, resistor R1, triode Q9, and zener diode D4. The 2-pin of resistor R23 is connected to the C pin of triode Q4, the 1-pin of resistor R23 is connected to the -15V power supply, and the 2-pin of resistor R23 is also connected to the B pin of triode Q9. The E pin of triode Q9 is connected to the -15V power supply, the C pin of triode Q9 is connected to the A pin of zener diode D4 and is also connected to the first-stage amplification circuit. The K pin of zener diode D4 is connected to the 1-pin of resistor R1 and is also connected to the B pin of triode Q1, and the 2-pin of resistor R1 is connected to the +15V power supply.

[0012] Preferably, the first-stage amplification circuit includes a difficult-to-drive structure composed of field effect transistor Q2 and field effect transistor Q8, which is used to amplify the power of the PWM signal and convert the drive level from 0 - 5V to ±15V drive level. The D pin of field effect transistor Q2 is connected to the D pin of field effect transistor Q8, the S pin of field effect transistor Q2 is connected to the +15V power supply, and the S pin of field effect transistor Q8 is connected to the -15V power supply.

[0013] Preferably, the first-stage amplifier circuit further includes a resistor R18, a resistor R17, a resistor R8, a resistor R14, a resistor R22, a triode Q13, and a zener diode D5; the pin 1 of the resistor R18 is connected to the C pin of the triode Q9, the pin 2 of the resistor R18 is connected to the B pin of the triode Q13, the C pin of the triode Q13 is connected to the -15V power supply, and the E pin of the triode Q13 is connected to the pin 1 of the resistor R17; the pin 2 of the resistor R17 is connected to the A pin of the zener diode D5, the K pin of the zener diode D5 is connected to the E pin of the triode Q3, the G pin of the field effect transistor Q2 is connected to the K pin of the zener diode D5, the S pin of the field effect transistor Q2 is connected to the +15V power supply, the D pin of the field effect transistor Q2 is connected to the pin 2 of the resistor R8, the pin 1 of the resistor R8 is connected to the pin 2 of the resistor R14, the pin 1 of the resistor R14 is connected to the D pin of the field effect transistor Q8, the S pin of the field effect transistor Q8 is connected to the -15V power supply, the G pin of the field effect transistor Q8 is connected to the pin 1 of the resistor R22, the pin 1 of the resistor R22 is connected to the E pin of the triode Q13, and the pin 2 of the resistor R22 is connected to the -15V power supply.

[0014] Preferably, the second-stage amplifier circuit includes a push-pull structure composed of triodes Q5, Q6, Q7, Q10, Q11, and Q12 to achieve the second-stage power amplification function of the PWM signal. Among them, the triodes Q5, Q6, and Q7 are connected in parallel to form the upper bridge arm, the triodes Q10, Q11, and Q12 are connected in parallel to form the lower bridge arm, the pin 3 of the triodes in the upper bridge arm is connected to the +15V power supply, the pin 3 of the triodes in the lower bridge arm is connected to the -15V power supply, the pin 2 of the triode Q5 is connected to the pin 2 of the triode Q10, the pin 2 of the triode Q6 is connected to the pin 2 of the triode Q11, and the pin 2 of the triode Q7 is connected to the pin 2 of the triode Q12.

[0015] Preferably, the second-stage amplifier circuit further includes a resistor R19, a resistor R10, a resistor R15, a resistor R12, and a resistor R11. The pin 1 of the resistor R19 is connected to the -15V power supply, the pin 2 of the resistor R19 is connected to the pin 2 of the resistor R14, the pin 1 of the resistor R10 is connected to the pin 2 of the resistor R19, the pin 2 of the resistor R10 is connected to the pin 1 of the six triodes, the pin 2 of the resistor R15 is connected to the pin 2 of the triode Q5, the pin 2 of the resistor R11 is connected to the pin 2 of the triode Q6, the pin 2 of the resistor R12 is connected to the pin 2 of the triode Q7, and the pin 1 of the resistors R15, R11, and R12 are all connected to the output circuit.

[0016] Preferably, the output circuit includes a resistor R4 connected to the second pin of a resistor R12 in the second-stage amplification circuit through its second pin, the first pin of the resistor R4 is connected to the A pin of a diode D1, the K pin of the diode D1 is connected to the second pin of a resistor R5, the first pin of the resistor R12 is connected to the A pin of a diode D2, the K pin of the diode D2 is connected to the K pin of a diode D3, the A pin of the diode D3 is connected to the first pin of the resistor R5, the second pins of a resistor R7, a resistor R9, a resistor R13 and the first pins of a resistor R16, a resistor R20, a resistor R21, a resistor R24 are connected together and connected to the first pin of the resistor R5, the first pins of the resistor R7, the resistor R9, the resistor R13 are connected together and connected to the A pin of a diode D6, the K pin of the diode D6 is connected to the first pin of the resistor R12, the second pins of the resistor R16, the resistor R20, the resistor R21, the resistor R24 are connected together and connected to the first pin of the resistor R12, the K pin of a bidirectional voltage-regulator diode D8 is connected to the first pin of the resistor R16 and is simultaneously connected to the first pin of an output connector J1, the A pin of the bidirectional voltage-regulator diode D8 is connected to the power supply GND and is simultaneously connected to the second pin of the output connector J1.

[0017] Preferably, the current change rate suppression circuit includes a voltage-regulator diode D9 connected to the third pin of an output connector J1 through its K pin, the A pin of the voltage-regulator diode D9 is connected to the A pin of a voltage-regulator diode D10, the K pin of the voltage-regulator diode D10 is connected to the second pin of a resistor R25, the first pin of the resistor R25 is connected to the power supply GND, the second pin of the resistor R25 is connected to the G pin of a field-effect transistor Q14, the S pin of the field-effect transistor Q14 is connected to the K pin of the voltage-regulator diode D9, the D pin of the field-effect transistor Q14 is connected to the second pin of a resistor R26, the first pin of the resistor R26 is connected to the A pin of a diode D12, the K pin of the diode D12 is connected to the A pin of a diode D11, the K pin of the diode D11 is connected to the second pin of a resistor R19.

[0018] The beneficial effects of the present invention are as follows: The driver has the characteristics of simple structure, high integration, strong anti-interference ability, fast response speed and low energy consumption, and can meet the requirements of high-frequency and high-speed IGBT control; in addition, the driver also has overvoltage, overcurrent and abnormal protection functions; it adopts a floating ground technology and monitors the current change rate of the IGBT through an analog circuit, which can effectively improve the response speed of the protection circuit and enhance the protection effect; it controls the output waveform through a push-pull circuit, which has the characteristics of fast action speed and continuously adjustable waveform. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the working principle diagram of the driver of the present invention.

[0020] Figure 2This is the structural schematic diagram of the driver of the present invention.

[0021] Figure 3 This is the circuit schematic diagram of the driver of the present invention. Detailed implementation manners

[0022] For the convenience of those skilled in the art to understand, the present invention will be further described below in conjunction with embodiments and the accompanying drawings. The content mentioned in the implementation manners is not a limitation to the present invention.

[0023] The present invention discloses an IGBT gate driver based on floating ground current slope suppression. As shown in Figure 1 - Figure 2 , it includes a drive circuit and a current change rate suppression circuit. The drive circuit conditions the received PWM signal to prevent interference signals from causing misoperation of the driver. And the current change rate suppression circuit collects the PWM signal state and the IGBT state and makes a comparison. When the PWM signal is in the off command state, if the current change rate of the IGBT main circuit exceeds the set value, the driver will force the IGBT to turn on to reduce the voltage across the IGBT and prevent the IGBT from suffering from breakdown failure. The driver of the present invention realizes the inversion of the PWM signal through two triodes, namely triode Q4 and triode Q9. And controls a primary power amplification circuit through the Darlington structure Q1, Q3, which can further improve the response rate of the driver.

[0024] Specifically, as shown in Figure 3 , the drive circuit includes a PWM signal receiving circuit, a Darlington circuit, a primary amplification circuit, a secondary amplification circuit and an output circuit connected in parallel.

[0025] The PWM signal receiving circuit consists of resistor R2, resistor R3, resistor R6 and triode Q4. The PWM signal receiving circuit inverts the received PWM signal through triode Q4, thereby driving the corresponding triode in the Darlington circuit. The 2-pin of resistor R2 is connected to the power supply, the 1-pin of resistor R2 is connected to the PWM drive signal and is also connected to the 2-pin of resistor R6. The 1-pin of resistor R6 is connected to the B pin of triode Q4, the E pin of triode Q4 is connected to the 1-pin of resistor R3, and the 2-pin of resistor R3 is connected to the power supply. The power supply is a +5V power supply.

[0026] The Darlington circuit includes triode Q1 and triode Q3. The C pin of triode Q1 is connected to the +15V power supply, the E pin of triode Q1 is connected to the B pin of triode Q3, and the C pin of triode Q3 is connected to the +15V power supply. The E pin of triode Q3 is connected to the primary amplification circuit.

[0027] The Darlington circuit further includes a resistor R23, a resistor R1, a triode Q9, and a zener diode D4. The pin 2 of the resistor R23 is connected to the C pin of the triode Q4. The pin 1 of the resistor R23 is connected to the -15V power supply. The pin 2 of the resistor R23 is simultaneously connected to the B pin of the triode Q9. The E pin of the triode Q9 is connected to the -15V power supply. The C pin of the triode Q9 is connected to the A pin of the zener diode D4 and is simultaneously connected to a first-stage amplifier circuit. The K pin of the zener diode D4 is connected to the pin 1 of the resistor R1 and is connected to the B pin of the triode Q1. The pin 2 of the resistor R1 is connected to the +15V power supply.

[0028] The first-stage amplifier circuit includes a difficult-to-drive structure composed of a field-effect transistor Q2 and a field-effect transistor Q8, which is used to amplify the power of the PWM signal and simultaneously convert the driving level from 0 - 5V to ±15V driving level. The D pin of the field-effect transistor Q2 is connected to the D pin of the field-effect transistor Q8. The S pin of the field-effect transistor Q2 is connected to the +15V power supply. The S pin of the field-effect transistor Q8 is connected to the -15V power supply.

[0029] The first-stage amplifier circuit further includes a resistor R18, a resistor R17, a resistor R8, a resistor R14, a resistor R22, a triode Q13, and a zener diode D5. The pin 1 of the resistor R18 is connected to the C pin of the triode Q9. The pin 2 of the resistor R18 is connected to the B pin of the triode Q13. The C pin of the triode Q13 is connected to the -15V power supply. The E pin of the triode Q13 is connected to the pin 1 of the resistor R17. The pin 2 of the resistor R17 is connected to the A pin of the zener diode D5. The K pin of the zener diode D5 is connected to the E pin of the triode Q3. The G pin of the field-effect transistor Q2 is connected to the K pin of the zener diode D5. The S pin of the field-effect transistor Q2 is connected to the +15V power supply. The D pin of the field-effect transistor Q2 is connected to the pin 2 of the resistor R8. The pin 1 of the resistor R8 is connected to the pin 2 of the resistor R14. The pin 1 of the resistor R14 is connected to the D pin of the field-effect transistor Q8. The S pin of the field-effect transistor Q8 is connected to the -15V power supply. The G pin of the field-effect transistor Q8 is connected to the pin 1 of the resistor R22. The pin 1 of the resistor R22 is connected to the E pin of the triode Q13. The pin 2 of the resistor R22 is connected to the -15V power supply.

[0030] The secondary amplification circuit is used to achieve the secondary power amplification function of the PWM signal. It includes a push-pull structure composed of transistor Q5, transistor Q6, transistor Q7, transistor Q10, transistor Q11, and transistor Q12 to achieve the secondary power amplification function of the PWM signal. Among them, transistors Q5, Q6, and Q7 are connected in parallel to form the upper bridge arm, and transistors Q10, Q11, and Q12 are connected in parallel to form the lower bridge arm. The 3rd pin of the transistors in the upper bridge arm is connected to the +15V power supply, and the 3rd pin of the transistors in the lower bridge arm is connected to the -15V power supply. The 2nd pin of transistor Q5 is connected to the 2nd pin of transistor Q10, the 2nd pin of transistor Q6 is connected to the 2nd pin of transistor Q11, and the 2nd pin of transistor Q7 is connected to the 2nd pin of transistor Q12.

[0031] The secondary amplification circuit also includes resistor R19, resistor R10, resistor R15, resistor R12, and resistor R11. The 1st pin of resistor R19 is connected to the -15V power supply, the 2nd pin of resistor R19 is connected to the 2nd pin of resistor R14, the 1st pin of resistor R10 is connected to the 2nd pin of resistor R19, the 2nd pin of resistor R10 is connected to the 1st pin of the six transistors, the 2nd pin of resistor R15 is connected to the 2nd pin of transistor Q5, the 2nd pin of resistor R11 is connected to the 2nd pin of transistor Q6, the 2nd pin of resistor R12 is connected to the 2nd pin of transistor Q7, and the 1st pins of resistor R15, resistor R11, and resistor R12 are all connected to the output circuit.

[0032] The output circuit is used to achieve the function of adjusting the output waveform. It includes resistor R4 whose 2nd pin is connected to the 2nd pin of resistor R12 in the secondary amplification circuit. The 1st pin of resistor R4 is connected to the A pin of diode D1, the K pin of diode D1 is connected to the 2nd pin of resistor R5, the 1st pin of resistor R12 is connected to the A pin of diode D2, the K pin of diode D2 is connected to the K pin of diode D3, the A pin of diode D3 is connected to the 1st pin of resistor R5. The 2nd pins of resistor R7, resistor R9, and resistor R13 and the 1st pins of resistor R16, resistor R20, resistor R21, and resistor R24 are connected together and connected to the 1st pin of resistor R5. The 1st pins of resistor R7, resistor R9, and resistor R13 are connected together and connected to the A pin of diode D6. The K pin of diode D6 is connected to the 1st pin of resistor R12. The 2nd pins of resistor R16, resistor R20, resistor R21, and resistor R24 are connected together and connected to the 1st pin of resistor R12. The K pin of bidirectional voltage regulator diode D8 is connected to the 1st pin of resistor R16 and is also connected to the 1st pin of output connector J1. The A pin of bidirectional voltage regulator diode D8 is connected to the power GND and is also connected to the 2nd pin of output connector J1.

[0033] The current change rate has a detection and protection function for the suppression circuit to implement the detection of the current change rate. It includes a voltage stabilizing diode D9 connected to the 3rd pin of the output connector J1 through the K pin. The A pin of the voltage stabilizing diode D9 is connected to the A pin of the voltage stabilizing diode D10. The K pin of the voltage stabilizing diode D10 is connected to the 2nd pin of the resistor R25. The 1st pin of the resistor R25 is connected to the power supply GND. The 2nd pin of the resistor R25 is connected to the G pin of the field effect transistor Q14. The S pin of the field effect transistor Q14 is connected to the K pin of the voltage stabilizing diode D9. The D pin of the field effect transistor Q14 is connected to the 2nd pin of the resistor R26. The 1st pin of the resistor R26 is connected to the A pin of the diode D12. The K pin of the diode D12 is connected to the A pin of the diode D11. The K pin of the diode D11 is connected to the 2nd pin of the resistor R19.

[0034] The driver of the present invention detects the parameter of the IGBT C-E current change rate instead of the potential difference parameter between the C-E pins. By limiting the C-E current change rate, the counter electromotive force of the inductive load is restricted, thereby preventing overvoltage from occurring between the IGBT C-E. Furthermore, it effectively solves the problem that the IGBT is broken down because the protection circuit fails to act in time. At the same time, it ensures that the output waveform is continuous and smooth, and can flexibly adjust the output waveform curve according to specific control requirements to meet different application cases, having a wide range of applications.

[0035] The driver of the present invention has the characteristics of simple structure, high integration, strong anti-interference ability, fast response speed and low energy consumption, and can meet the requirements of high-frequency and high-speed IGBT control; in addition, by monitoring the current change rate of the IGBT through an analog circuit, the response speed of the protection circuit can be effectively improved and the protection effect can be enhanced; by controlling the output waveform through a push-pull circuit, it has the characteristics of fast action speed and continuously adjustable waveform.

[0036] There are many specific application ways of the present invention. The above description is only the preferred embodiment of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements can be made, and these improvements should also be regarded as the protection scope of the present invention.

Claims

1. An IGBT gate driver based on floating ground current slope suppression, characterized in that including Drive circuit: used to receive PWM signals, convert them into drive signals and output them to the IGBT to control the turn-on and turn-off of the IGBT; The drive circuit includes a PWM signal receiving circuit, a Darlington circuit, a first-stage amplification circuit, a second-stage amplification circuit and an output circuit connected in parallel; Current change rate suppression circuit: used to collect the PWM signal state and the IGBT state, and make a comparison. When the PWM signal is in the off command state, if the current change rate of the IGBT main circuit exceeds the set value, the driver will force the IGBT to turn on to reduce the voltage across the IGBT and prevent the IGBT from suffering from breakdown failure; the current change rate suppression circuit includes a zener diode D9 connected to the 3rd pin of the output connector J1 through the K pin, the A pin of the zener diode D9 is connected to the A pin of the zener diode D10, the K pin of the zener diode D10 is connected to the 2nd pin of the resistor R25, the 1st pin of the resistor R25 is connected to the power supply GND, the 2nd pin of the resistor R25 is connected to the G pin of the field effect transistor Q14, the S pin of the field effect transistor Q14 is connected to the K pin of the zener diode D9, the D pin of the field effect transistor Q14 is connected to the 2nd pin of the resistor R26, the 1st pin of the resistor R26 is connected to the A pin of the diode D12, the K pin of the diode D12 is connected to the A pin of the diode D11, the K pin of the diode D11 is connected to the 2nd pin of the resistor R19, the 1st pin of the output connector J1 is connected to the G pole of the IGBT, the 2nd pin of the output connector J1 is connected to the E pole of the IGBT, and the 3rd pin of the output connector J1 is connected to the C pole of the IGBT.

2. The IGBT gate driver based on floating ground current slope suppression according to claim 1, characterized in that, The PWM signal receiving circuit consists of a resistor R2, a resistor R3, a resistor R6 and a triode Q4. The PWM signal receiving circuit inverts the received PWM signal through the triode Q4 to drive the corresponding triode in the Darlington circuit; the 2nd pin of the resistor R2 is connected to the power supply, the 1st pin of the resistor R2 is connected to the PWM drive signal and is also connected to the 2nd pin of the resistor R6; the 1st pin of the resistor R6 is connected to the B pin of the triode Q4, the E pin of the triode Q4 is connected to the 1st pin of the resistor R3, and the 2nd pin of the resistor R3 is connected to the power supply; the power supply is a +5V power supply.

3. The IGBT gate driver based on floating ground current slope suppression according to claim 2, wherein The Darlington circuit includes a triode Q1 and a triode Q3. The C pin of the triode Q1 is connected to the +15V power supply, the E pin of the triode Q1 is connected to the B pin of the triode Q3, and the C pin of the triode Q3 is connected to the +15V power supply; the E pin of the triode Q3 is connected to the first-stage amplification circuit.

4. The IGBT gate driver based on floating ground current slope suppression according to claim 3, wherein The Darlington circuit further includes a resistor R23, a resistor R1, a triode Q9, and a zener diode D4. The pin 2 of the resistor R23 is connected to the C pin of the triode Q4. The pin 1 of the resistor R23 is connected to the -15V power supply. The pin 2 of the resistor R23 is also connected to the B pin of the triode Q9. The E pin of the triode Q9 is connected to the -15V power supply. The C pin of the triode Q9 is connected to the A pin of the zener diode D4 and is also connected to a first-stage amplifier circuit. The K pin of the zener diode D4 is connected to the pin 1 of the resistor R1 and is also connected to the B pin of the triode Q1. The pin 2 of the resistor R1 is connected to the +15V power supply.

5. The IGBT gate driver based on floating ground current slope suppression according to claim 2, wherein, The first-stage amplifier circuit includes a push-pull structure composed of a field-effect transistor Q2 and a field-effect transistor Q8, which is used to amplify the power of the PWM signal and convert the driving level from 0 - 5V to a ±15V driving level. The D pin of the field-effect transistor Q2 is connected to the D pin of the field-effect transistor Q8. The S pin of the field-effect transistor Q2 is connected to the +15V power supply. The S pin of the field-effect transistor Q8 is connected to the -15V power supply.

6. The IGBT gate driver based on floating ground current slope suppression according to claim 5, characterized in that, The first-stage amplifier circuit further includes a resistor R18, a resistor R17, a resistor R8, a resistor R14, a resistor R22, a triode Q13, and a zener diode D5. The pin 1 of the resistor R18 is connected to the C pin of the triode Q9. The pin 2 of the resistor R18 is connected to the B pin of the triode Q13. The C pin of the triode Q13 is connected to the -15V power supply. The E pin of the triode Q13 is connected to the pin 1 of the resistor R17. The pin 2 of the resistor R17 is connected to the A pin of the zener diode D5. The K pin of the zener diode D5 is connected to the E pin of the triode Q3. The G pin of the field-effect transistor Q2 is connected to the K pin of the zener diode D5. The S pin of the field-effect transistor Q2 is connected to the +15V power supply. The D pin of the field-effect transistor Q2 is connected to the pin 2 of the resistor R8. The pin 1 of the resistor R8 is connected to the pin 2 of the resistor R14. The pin 1 of the resistor R14 is connected to the D pin of the field-effect transistor Q8. The S pin of the field-effect transistor Q8 is connected to the -15V power supply. The G pin of the field-effect transistor Q8 is connected to the pin 1 of the resistor R22. The pin 1 of the resistor R22 is connected to the E pin of the triode Q13. The pin 2 of the resistor R22 is connected to the -15V power supply.

7. The IGBT gate driver based on floating - ground current slope suppression according to claim 2, wherein, The second-stage amplification circuit includes a push-pull structure composed of transistor Q5, transistor Q6, transistor Q7, transistor Q10, transistor Q11, and transistor Q12 to achieve the second-stage power amplification function of the PWM signal. Among them, transistors Q5, Q6, and Q7 are connected in parallel to form the upper bridge arm, and transistors Q10, Q11, and Q12 are connected in parallel to form the lower bridge arm. The 3rd pin of the transistors in the upper bridge arm is connected to the +15V power supply, and the 3rd pin of the transistors in the lower bridge arm is connected to the -15V power supply. The 2nd pin of transistor Q5 is connected to the 2nd pin of transistor Q10, the 2nd pin of transistor Q6 is connected to the 2nd pin of transistor Q11, and the 2nd pin of transistor Q7 is connected to the 2nd pin of transistor Q12.

8. The IGBT gate driver based on floating ground current slope suppression according to claim 7, characterized in that, The second-stage amplification circuit further includes resistor R19, resistor R10, resistor R15, resistor R12, and resistor R11. The 1st pin of resistor R19 is connected to the -15V power supply, the 2nd pin of resistor R19 is connected to the 2nd pin of resistor R14, the 1st pin of resistor R10 is connected to the 2nd pin of resistor R19, the 2nd pin of resistor R10 is connected to the 1st pin of the six transistors, the 2nd pin of resistor R15 is connected to the 2nd pin of transistor Q5, the 2nd pin of resistor R11 is connected to the 2nd pin of transistor Q6, the 2nd pin of resistor R12 is connected to the 2nd pin of transistor Q7, and the 1st pins of resistor R15, resistor R11, and resistor R12 are all connected to the output circuit.

9. The IGBT gate driver based on floating ground current slope suppression according to claim 2, wherein The output circuit includes resistor R4 whose 2nd pin is connected to the 2nd pin of resistor R12 in the second-stage amplification circuit. The 1st pin of resistor R4 is connected to the A pin of diode D1. The K pin of diode D1 is connected to the 2nd pin of resistor R5. The 1st pin of resistor R12 is connected to the A pin of diode D2. The K pin of diode D2 is connected to the K pin of diode D3. The A pin of diode D3 is connected to the 1st pin of resistor R5. The 2nd pins of resistor R7, resistor R9, and resistor R13 and the 1st pins of resistor R16, resistor R20, resistor R21, and resistor R24 are connected together and connected to the 1st pin of resistor R5. The 1st pins of resistor R7, resistor R9, and resistor R13 are connected together and connected to the A pin of diode D6. The K pin of diode D6 is connected to the 1st pin of resistor R12. The 2nd pins of resistor R16, resistor R20, resistor R21, and resistor R24 are connected together and connected to the 1st pin of resistor R12. The K pin of bidirectional voltage regulator diode D8 is connected to the 1st pin of resistor R16 and is simultaneously connected to the 1st pin of output connector J1. The A pin of bidirectional voltage regulator diode D8 is connected to power supply GND and is simultaneously connected to the 2nd pin of output connector J1.

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