A bismuth selenide oxide in-situ thermal oxide top-gate field effect transistor and preparation method thereof
The bismuth selenide in-situ thermal oxide top-gate field effect transistor addresses the challenges of costly and defective high-κ dielectric manufacturing by directly oxidizing Bi2O2Se to form Bi2SeO5, achieving high mobility and low leakage current for advanced semiconductor devices.
Patent Information
- Application Number
- CN202010516637.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-09
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2040-06-09
AI Technical Summary
Current methods for manufacturing high-κ dielectrics for field effect transistors, such as HfO2 and ZrO2, involve costly exogenous processes like ALD and CVD, and the resulting interfaces often have defects leading to poor device performance, while in-situ oxidation products lack stoichiometric control and high leakage currents.
A bismuth selenide in-situ thermal oxide top-gate field effect transistor is fabricated by directly oxidizing a two-dimensional Bi2O2Se crystal to form a Bi2SeO5 dielectric layer, using a simple thermal oxidation process that avoids costly ALD and CVD, and includes electron beam etching to create electrodes, achieving a low leakage current and high mobility.
The method produces a high-performance field effect transistor with low leakage current and excellent mobility, suitable for large-scale integrated circuits, leveraging the unique properties of Bi2O2Se and Bi2SeO5 for improved device performance and cost-effectiveness.
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Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductor microelectronic devices and relates to a bismuth oxide selenium in-situ thermal oxide top-gate field effect transistor and a preparation method thereof. Background Art
[0002] Two-dimensional layered materials are two-dimensional materials with weak van der Waals forces between layers and covalent bonds within the layers. They have attracted widespread attention in recent years due to their unique two-dimensional structure and excellent optical and electrical properties. Bismuth oxide selenium (Bi2O2Se) is an emerging high-mobility two-dimensional semiconductor material that belongs to the tetragonal system ( a = b = 3.88 Å, c = 12.16Å), by (Bi2O2) n Layer and Se n The band gap of Bi2O2Se is about 0.85 eV, and the field-effect electron mobility at room temperature is as high as 2200 cm 2 V -1 s -1 , and has excellent air stability, and can be used in high-performance logic circuits, flexible devices, optoelectronics and other fields. Its high-temperature oxidation product, bismuth selenite (Bi2SeO5), has a bandgap of more than 3.5 eV, a relative dielectric constant κ of more than 21, and has good insulation properties. It can be used as a gate dielectric for field effect transistors, and its performance is comparable to commercial high-κ dielectrics such as HfO2 and ZrO2.
[0003] At present, in the process flow of semiconductor field effect transistors, high-κ dielectrics such as HfO2 need to be manufactured by exogenous methods such as atomic layer deposition (ALD) and chemical vapor deposition (CVD), which require the introduction of many additional steps and are costly. In addition, the interface between the obtained high-κ dielectric and the semiconductor is very prone to various defects, which reduces the performance of the device. In recent years, some studies have attempted to directly oxidize the surface of semiconductor materials such as HfSe2 and ZrSe2 to obtain high-κ gate dielectrics such as HfO2 and ZrO2. However, these in-situ oxidation products usually do not have a definite stoichiometric ratio, making it difficult to solve interface problems, and the leakage current is large, so they cannot be used as gate dielectrics of field effect transistors. So far, there has been no report on the direct use of high-κ dielectrics produced by in-situ oxidation as gate dielectrics to drive semiconductor field effect transistors. Summary of the invention
[0004] The purpose of the present invention is to provide a bismuth oxide selenide in-situ thermal oxide top-gate field effect transistor and a preparation method thereof. The present invention directly obtains a gate dielectric by an in-situ thermal oxidation method and manufactures a high-performance Bi2O2Se field effect transistor. The method has the advantages of low cost, good controllability, and outstanding device performance, and can therefore be used as an ideal method for building high-performance large-scale integrated circuits.
[0005] The bismuth selenium oxide in-situ thermal oxide top-gate field effect transistor provided by the present invention comprises a substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and a substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and a source-drain electrode directly in contact with the channel material;
[0006] The channel material is a two-dimensional Bi2O2Se crystal;
[0007] The material constituting the dielectric layer is Bi2SeO5;
[0008] The source and drain electrodes are respectively located at two ends of the dielectric layer.
[0009] In the above-mentioned bismuth oxide selenide in-situ thermal oxide top-gate field effect transistor, the optical band gap of the dielectric layer is larger than that of Bi2O2Se, and when the external field strength is 1 MV / cm, the leakage current of the Bi2SeO5 film is less than 10 -7 A / cm 2 , corresponding to a resistivity of ~10 11 Ω·m;
[0010] The thickness of the dielectric layer is 5-30 nm; specifically 5 nm, 10 nm, 15 nm, 20 nm or 25 nm;
[0011] The material constituting the substrate is fluorphlogopite or strontium titanate; the chemical formula of the fluorphlogopite substrate is KMg3(AlSi3O 10 )F2, the chemical formula of strontium titanate substrate is SrTiO3;
[0012] The gate electrode is made of metal; the metal is specifically gold;
[0013] The thickness of the gate electrode is 50-70 nm; specifically 50 nm, 60 nm or 70 nm;
[0014] The thickness of the source and drain electrodes is 5-50 nm; specifically, the thickness of the electrodes made of gold may be 30-50 nm; more specifically, 30 nm, 40 nm or 50 nm; the thickness of the iron contact layer may be 5 nm;
[0015] The material constituting the source-drain electrode is selected from at least one of iron and gold; specifically, it can be composed of iron and gold; the iron serves as a contact layer.
[0016] The method for preparing the bismuth oxide selenium in-situ thermal oxide top-gate field effect transistor provided by the present invention comprises:
[0017] 1) In-situ thermal oxidation reaction is carried out on the two-dimensional Bi2O2Se crystal to obtain Bi2SeO5 as a dielectric layer on its surface;
[0018] 2) Electron beam etching is performed on the dielectric layer obtained in step 1) to prepare source-drain electrodes and a gate electrode, and annealing is performed in argon at 90-120° C. for 30-60 minutes to obtain the bismuth selenide in-situ thermal oxide top-gate field effect transistor.
[0019] In the in-situ thermal oxidation reaction step of step 1) of the above method, the reaction atmosphere is pure oxygen, a mixed gas composed of oxygen and argon, or air; in the reaction atmosphere, the volume percentage of oxygen and argon in the mixed gas composed of oxygen and argon (referred to as synthetic air) is 20:80;
[0020] The in-situ thermal oxidation reaction temperature is 370-420°C; specifically 370°C, 400°C or 420°C;
[0021] The in-situ thermal oxidation reaction time is 2 to 100 minutes; specifically 3 minutes, 5 minutes, 7 minutes, 10 minutes, 20 minutes, 30 minutes or 90 minutes;
[0022] The method also includes: when the reaction atmosphere is pure oxygen or a mixed gas composed of oxygen and argon, before the in-situ oxidation reaction step, the reaction system is purged; the purging step includes: each time the system pressure is evacuated to below 0.5 Torr, and then the gas is introduced to fill the system pressure to more than half the atmosphere, and this is repeated three times, and the last time the system pressure is filled to one atmosphere.
[0023] In the step 2) of electron beam etching, the etching mask used is at least one of PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue; specifically, the PMMA 4.5% solution is firstly spin-coated twice at a speed of 4000 rpm, and then the PMMA-6200 dry etching glue is spin-coated once at a speed of 4000 rpm;
[0024] The electron beam etching is standard electron beam etching to expose the source and drain contact regions on the mask;
[0025] The etchant used in the electron beam etching step is hydrofluoric acid with a mass percentage concentration of 0.01%-2%; specifically, hydrofluoric acid with a mass percentage concentration of 0.01%, 0.05%, 0.1%, 0.2%, 1% or 2%;
[0026] The electron beam etching time is 5 seconds to 2 minutes; specifically 5 seconds, 20 seconds, 30 seconds or 1 minute;
[0027] The gate electrode and the source-drain electrode are prepared by various common methods, such as thermal evaporation, electron beam evaporation or magnetron sputtering deposition;
[0028] In the step of treating at 90-120° C. for 30-60 minutes in argon, the temperature is 90° C. or 100° C., and the time is 30 minutes.
[0029] In the step 1), the two-dimensional Bi2O2Se crystal is prepared by chemical vapor deposition or molecular beam epitaxy;
[0030] Specifically, the chemical vapor deposition method includes: placing Bi2Se3 powder and Bi2O3 block at the center of the tube furnace, placing a substrate downstream of the center of the tube furnace, introducing a carrier gas for chemical vapor deposition, and naturally cooling to room temperature after deposition, so as to obtain the two-dimensional Bi2O2Se crystal on the substrate;
[0031] More specifically, the molar ratio of the Bi2O3 powder to the Bi2Se3 block is 1 to 3:1, specifically 1:1, 2:1, 3:1;
[0032] The substrate is a fluorphlogopite or strontium titanate substrate; the chemical formula of the fluorphlogopite is KMg3(AlSi3O 10 )F2; the chemical formula of the strontium titanate is SrTiO3;
[0033] In the chemical vapor deposition step, the carrier gas is a mixed gas consisting of argon gas and argon-oxygen mixed gas; the volume percentage of oxygen in the argon-oxygen mixed gas is 1 / 1000;
[0034] The flow rate of the argon gas is 100-200 standard milliliters per minute, specifically 100, 150, 200 standard milliliters per minute;
[0035] The flow rate of the argon-oxygen mixed gas is 10-30 standard ml / min, specifically 10 standard ml / min, 20 standard ml / min, 30 standard ml / min;
[0036] The system pressure is 100-400 Torr, specifically 100 Torr, 200 Torr or 400 Torr;
[0037] The deposition temperature is 580-620°C, specifically 580°C, 600°C or 620°C;
[0038] The deposition time is 5-30 minutes, specifically 5 minutes, 20 minutes or 30 minutes.
[0039] The method further comprises: after the chemical vapor deposition step, naturally cooling the system to room temperature.
[0040] More specifically, the raw material bismuth oxide is located at the center of the tube furnace, and the bismuth selenide is located 3 to 6 cm upstream of the bismuth oxide, specifically 3, 5 or 6 cm.
[0041] The substrate is placed downstream of the center of the tube furnace, specifically at a position 8-12 cm downstream from the center.
[0042] In addition, a wrap-around gate field effect transistor or a fin field effect transistor containing the bismuth selenium oxide in-situ thermal oxide top gate field effect transistor provided by the present invention, and the use of the bismuth selenium oxide in-situ thermal oxide top gate field effect transistor in the preparation of a wrap-around gate field effect transistor or a fin field effect transistor, and a logic circuit, a sensor or an integrated circuit containing the bismuth selenium oxide in-situ thermal oxide top gate field effect transistor, and the use of the bismuth selenium oxide in-situ thermal oxide top gate field effect transistor in the preparation of at least one of a logic circuit, a sensor and an integrated circuit, also fall within the scope of protection of the present invention. The logic circuit is specifically an inverter logic circuit.
[0043] Specifically, the method for preparing the logic circuit includes: using wet etching to pre-divide the two-dimensional Bi2O2Se crystal into multiple regions, then performing in-situ thermal oxidation and selective etching on the above regions according to the same steps, and finally preparing source and drain electrodes.
[0044] Specifically, in the wet etching step, the etching solution used is a mixture of concentrated sulfuric acid, hydrogen peroxide and water; the volume ratio of the concentrated sulfuric acid, hydrogen peroxide and water is specifically 1:2:4; the volume percentage concentration of the hydrogen peroxide is specifically 40%;
[0045] The conditions of the in-situ thermal oxidation are the same as those described above;
[0046] Specifically, the reaction atmosphere is pure oxygen, a mixed gas composed of oxygen and argon, or air; in the reaction atmosphere, the volume percentage of oxygen to argon in the mixed gas composed of oxygen and argon is 20:80;
[0047] The oxidation reaction temperature is 370-420°C; specifically 370°C, 400°C or 420°C;
[0048] The oxidation reaction time is 5 to 30 minutes; specifically 10 minutes, 20 minutes or 30 minutes;
[0049] The method also includes: when the reaction atmosphere is pure oxygen or a mixed gas composed of oxygen and argon, before the in-situ oxidation reaction step, the reaction system is purged; the purging step includes: each time the system pressure is evacuated to below 0.5 Torr, and then the gas is introduced to fill the system pressure to more than half the atmosphere, and this is repeated three times, and the last time the system pressure is filled to one atmosphere.
[0050] In the selective etching step, the mask used is electron beam photoresist or ultraviolet photoresist;
[0051] The etching is a standard electron beam etching or photolithography method to expose the source and drain contact areas on the mask;
[0052] The source-drain electrode is prepared by thermal evaporation, electron beam evaporation or magnetron sputtering deposition;
[0053] The thickness of the source-drain electrode is 5-50 nm;
[0054] The material constituting the source-drain electrode is selected from at least one of iron and gold. Specifically, the thickness of the electrode composed of gold can be 30-50 nm, more specifically 30 nm, 40 nm or 50 nm; the thickness of the iron contact layer can be 5 nm.
[0055] More specifically, the source-drain electrodes may be a first layer metal electrode composed of 5 nm iron + 50 nm gold and a second layer electrode of pure gold with a thickness of 70 nm.
[0056] The present invention uses Bi2Se3 powder and Bi2O3 block as raw materials, and utilizes chemical vapor deposition or molecular beam epitaxy to synthesize two-dimensional Bi2O2Se crystals. The obtained Bi2O2Se is heated in pure oxygen, synthetic air or air atmosphere, so that its surface layer is in-situ thermally oxidized and converted into a gate oxide Bi2SeO5 of a certain thickness. Subsequently, hydrofluoric acid is used to selectively etch Bi2SeO5 to expose Bi2O2Se in the source-drain contact area. Subsequently, a metal gate electrode is deposited in the gate oxide area, and then a metal source-drain electrode is deposited to obtain a field effect transistor. The bismuth selenide oxide in-situ oxide top-gate field effect transistor prepared by the method has high mobility and good stability, and the oxidation method is simple and easy to operate, low in cost, suitable for large-scale integrated circuit applications, and has broad prospects.
[0057] The characteristics and beneficial effects of the present invention are:
[0058] 1. The present invention uses Bi2O2Se two-dimensional semiconductor as raw material and uses thermal oxidation method to directly manufacture high-κ gate dielectric on its surface, avoiding expensive and time-consuming methods such as ALD and CVD. Standard micro-nano processing methods are used to manufacture high-performance top-gate field-effect transistors.
[0059] 2. The process of the present invention is simple, easy to operate, low in cost, and the device obtained has excellent performance. The field effect mobility of the bismuth selenide oxide in-situ oxide top-gate field effect transistor at 300 K can reach 300 cm 2 V -1 s -1 , the subthreshold swing can be as low as 70 mV / dec.
[0060] 3. The bismuth oxide selenide in-situ oxide top-gate field effect transistor provided by the present invention is expected to be applied to fields such as large-scale integrated circuits, and lays a foundation for the application of Bi2O2Se semiconductors in logic circuits, sensors and integrated circuits. BRIEF DESCRIPTION OF THE DRAWINGS
[0061] Figure 1 Schematic diagram of the device for preparing layered Bi2O2Se natural oxide Bi2SeO5 according to the present invention;
[0062] Figure 2 The crystal structure diagram of layered Bi2O2Se and its natural oxide Bi2SeO5 introduced in the present invention;
[0063] Figure 3 is the X-ray diffraction spectrum of the Bi2O2Se semiconductor / Bi2SeO5 natural oxide layer heterojunction obtained in Example 1 of the present invention;
[0064] Figure 4 These are optical microscope photos of the Bi2O2Se sample before oxidation, after partial oxidation and after complete oxidation in Example 2 of the present invention;
[0065] Figure 5 These are typical atomic force microscope images and surface roughness Gaussian distribution diagrams of Bi2O2Se before, after and after oxidation in Example 2 of the present invention;
[0066] Figure 6 This is a scanning transmission-high-angle annular dark field image of the Bi2O2Se / Bi2SeO5 heterojunction film obtained in Example 3 of the present invention;
[0067] Figure 7 The insulation performance of the Bi2SeO5 film obtained in Example 3 of the present invention is measured;
[0068] Figure 8 This is the layer-by-layer oxidation process of 4L-Bi2O2Se in Example 4 of the present invention;
[0069] Fig. 9 These are the optical microscope photographs and Raman spectra of the Bi2O2Se / Bi2SeO5 heterojunction obtained in Example 5 of the present invention after oxidation etching.
[0070] Fig.10 It is a flow chart of manufacturing a Bi2O2Se semiconductor in-situ oxide top-gate field effect transistor according to the present invention;
[0071] Fig.11 It is a schematic diagram of the structure and measurement circuit of the Bi2O2Se field effect transistor obtained in Examples 6, 7 and 8 of the present invention;
[0072] Fig.12 The measurement results and optical photographs of the Bi2O2Se field effect transistor obtained in Example 6 of the present invention;
[0073] Fig.13 The measurement results and optical photographs of the Bi2O2Se field effect transistor obtained in Example 7 of the present invention;
[0074] Fig.14 The measurement results and optical photographs of the Bi2O2Se field effect transistor obtained in Example 8 of the present invention;
[0075] Fig.15 It is a flow chart of manufacturing a Bi2O2Se semiconductor in-situ oxide top-gate field effect transistor logic circuit according to the present invention;
[0076] Fig.16 1 and 2 are electron microscope photographs, equivalent circuit diagrams and measurement results of the structure of the inverter logic circuit obtained in Example 9 of the present invention. DETAILED DESCRIPTION
[0077] The present invention is further described below in conjunction with specific examples, but the present invention is not limited to the following examples. The methods described are conventional methods unless otherwise specified. The raw materials described can be obtained from public commercial channels unless otherwise specified.
[0078] Example 1
[0079] Weigh 2.1 g of Bi2O3 powder and 1.0 g of Bi2Se3 block (molar ratio 3:1), place them in the center of the quartz tube of the tube furnace, and place a fluorphlogopite substrate 8-12 cm downstream from the center of the tube furnace. Pass the carrier gas, the argon flow rate is 200 standard ml / min, and the argon oxygen mixed flow rate is 30 standard ml / min. Maintain the system pressure at 100 Torr. Raise the temperature to 620 degrees Celsius and maintain it for 20 minutes for chemical vapor deposition. After the reaction, cool naturally to room temperature. Take out the mica substrate with the Bi2O2Se film deposited on it to obtain layered Bi2O2Se nanosheets.
[0080] In the oxidation step, the Bi2O2Se sample is placed on a magnetic boat, first washed, each time the system pressure is pumped to less than 0.5 Torr, then synthetic air is introduced to fill it to more than half an atmosphere, and this is repeated three times, and the last time the system pressure is filled to one atmosphere. The oxidation temperature is set to 400°C. After the furnace is heated to 400°C, the magnetic boat is attracted by a magnet to push the sample into the center of the furnace for in-situ thermal oxidation. The oxidation time is 90 minutes. After the oxidation is completed, the magnetic boat is dragged out of the furnace with a magnet and naturally cooled to room temperature. Since the thickness of Bi2O2Se on mica varies, the products obtained are Bi2O2Se semiconductor / Bi2SeO5 natural oxide layer heterojunction and Bi2SeO5 nanosheets.
[0081] Figure 2 The crystal structure diagram of the layered Bi2O2Se nanosheets prepared in this example and the Bi2SeO5 obtained by thermal oxidation; As can be seen from the figure, Bi2O2Se is a kind of (Bi2O2) n Layer and Se n A two-dimensional layered material in which the layers alternate in the z-direction; Bi2SeO5 is an orthorhombic layered material in which the interlayer direction is along the a-axis of the unit cell.
[0082] Figure 3 This is the X-ray diffraction pattern of the sample prepared in this example, "*" represents the characteristic peak of the base mica, "□" represents the characteristic peak of Bi2O2Se, and "∆" represents the characteristic peak of Bi2SeO5 obtained by thermal oxidation. As can be seen from the figure, after oxidation, the peak intensity of the characteristic peak of Bi2O2Se is significantly reduced, and Bi2O2Se is partially oxidized to Bi2SeO5.
[0083] Example 2
[0084] The sample growth steps are consistent with those in Example 1.
[0085] In the oxidation step, the Bi2O2Se sample is placed on a magnetic boat, and the gas is first washed, and the system pressure is pumped to less than 0.5 Torr each time, and then synthetic air is introduced to fill it to more than half an atmosphere. This is repeated three times, and the last time the gas is filled until the system pressure reaches one atmosphere. The oxidation temperature is set to 400°C. After the furnace is heated to 400°C, the magnetic boat is attracted by a magnet to push the Bi2O2Se samples on two mica into the center of the furnace for in-situ thermal oxidation. The oxidation time is 3 minutes. After the oxidation is completed, the magnetic boat is dragged out of the furnace with a magnet, and the temperature is naturally cooled to room temperature to obtain a Bi2O2Se semiconductor / Bi2SeO5 natural oxide layer heterojunction. In order to better characterize the properties of the natural oxide layer, one of the samples is subsequently oxidized at 400°C for 10 minutes until some of the nanosheets on the mica are completely oxidized.
[0086] Figure 4This is an optical microscope photo of the Bi2O2Se / Bi2SeO5 heterojunction obtained in this example. As can be seen from the figure, the optical contrast of the Bi2O2Se / Bi2SeO5 heterojunction after oxidation is uniform, proving the uniformity of oxidation. As the degree of oxidation increases, the optical contrast decreases. When Bi2O2Se is completely oxidized to Bi2SeO5, the sample becomes transparent, proving that the optical band gap of the oxidation product Bi2SeO5 obtained by oxidation is larger than that of Bi2O2Se.
[0087] Figure 5 These are typical atomic force microscope images and surface roughness Gaussian distribution diagrams of Bi2O2Se in this embodiment before oxidation, after partial oxidation and after etching; it can be seen from the figure that the surface roughness of the just-synthesized Bi2O2Se two-dimensional crystal is 0.10 nanometers, the surface roughness of the Bi2O2Se / Bi2SeO5 heterojunction after oxidation is 0.13 nanometers, and the surface roughness after selectively etching the surface oxide layer Bi2SeO5 with a 0.2% hydrofluoric acid solution is 0.16 nanometers, which is only slightly increased compared to the initial level and still maintains atomic-level flatness, proving that the obtained Bi2O2Se / Bi2SeO5 heterojunction interface is flat.
[0088] Example 3
[0089] The sample growth steps are consistent with those in Example 1; only the substrate is replaced from the fluorophlogopite substrate to the strontium titanate substrate.
[0090] In the oxidation step, the Bi2O2Se sample is placed on a magnetic boat, and the gas is first washed, and the system pressure is pumped to less than 0.5 Torr each time, and then synthetic air is introduced to fill it to more than half an atmosphere, and this is repeated three times, and the last time the gas is filled until the system pressure reaches one atmosphere. The oxidation temperature is set to 400°C. After the furnace is heated to 400°C, the magnetic boat is attracted by a magnet to push two Bi2O2Se film samples on strontium titanate substrates of different thicknesses into the center of the furnace for in-situ thermal oxidation. The oxidation time is 30 minutes. After the oxidation is completed, the magnetic boat is dragged out of the furnace with a magnet, and the temperature is naturally cooled to room temperature to obtain Bi2O2Se semiconductor / Bi2SeO5 natural oxide layer heterojunction and Bi2SeO5 film respectively.
[0091] Figure 6 is a scanning transmission electron microscope image of the Bi2O2Se / Bi2SeO5 heterojunction film obtained in this embodiment; as can be seen from the figure, the crystallinity of the obtained Bi2O2Se / Bi2SeO5 is very good, wherein the interlayer spacing of 0.61 nm given by the scanning transmission-high-angle annular dark field image of Bi2O2Se is consistent with the theoretical interlayer spacing of Bi2O2Se crystal (0.61 nm); the atomic arrangement of Bi2SeO5 is consistent with the
[102] direction of Bi2SeO5, and the interface between Bi2O2Se / Bi2SeO5 is very clean and clear.
[0092] Figure 7 The figure shows the insulation performance of the Bi2SeO5 film obtained in this embodiment. As can be seen from the figure, when the applied field strength is 1 MV / cm, the leakage current of the Bi2SeO5 film is less than 10 -7 A / cm 2 , corresponding to a resistivity of ~10 11 Ω·m, which proves that the Bi2SeO5 film obtained by thermal oxidation method has low leakage current and good insulation performance.
[0093] Example 4
[0094] The sample growth steps are consistent with those in Example 1.
[0095] In the oxidation step, the Bi2O2Se sample was placed on a magnetic boat, and the gas was first washed, and the system pressure was pumped to below 0.5 Torr each time, and then synthetic air was introduced to fill it to more than half an atmosphere. This was repeated 3 times, and the last time the system pressure was filled to one atmosphere. The oxidation temperature was set to 370°C. After the furnace was heated to 370°C, a magnet was used to attract the magnetic boat to push the Bi2O2Se film sample on the mica substrate into the center of the furnace for in-situ thermal oxidation. The oxidation time was 5 minutes. After the oxidation was completed, the magnetic boat was dragged out of the furnace with a magnet, and the temperature was naturally cooled to room temperature and taken out for characterization. The oxidation was repeated 6 times.
[0096] Figure 8 The optical and atomic force microscope images of the layer-by-layer oxidized sample obtained in this embodiment are shown in FIG. As can be seen from the figure, as the oxidation time increases, the thickness of the oxide layer increases linearly, and the layer-by-layer oxidation of Bi2O2Se can be achieved by precisely controlling the oxidation time and temperature.
[0097] Example 5
[0098] The sample growth steps are consistent with those in Example 1.
[0099] In the oxidation step, the Bi2O2Se sample is placed on a magnetic boat, and the gas is first washed, and the system pressure is pumped to less than 0.5 Torr each time, and then synthetic air is introduced to fill it to more than half an atmosphere, and this is repeated three times, and the last time the gas is filled until the system pressure reaches one atmosphere. The oxidation temperature is set to 370°C. After the furnace is heated to 370°C, the magnetic boat is attracted by a magnet to push the Bi2O2Se film sample on the mica substrate into the center of the furnace for in-situ thermal oxidation. The oxidation time is 20 minutes. After the oxidation is completed, the magnetic boat is dragged out of the furnace with a magnet, and the temperature is naturally cooled to room temperature to obtain a Bi2O2Se semiconductor / Bi2SeO5 natural oxide layer heterojunction.
[0100] Fig. 9Figure 2 is an optical photograph and Raman spectrum of the sample obtained in this example. As can be seen from the figure, Bi2O2Se nanosheets with a thickness of one unit cell can be obtained by oxidation-etching. Raman characterization shows that the Bi2O2Se nanosheets with a thickness of more than one unit cell obtained by etching have a 160 cm -1 The Raman characteristic peak at 400 nm proves that this method does not damage the properties of the underlying Bi2O2Se.
[0101] Example 6
[0102] like Fig.10 As shown, a two-dimensional Bi2O2Se thin sheet with an initial thickness of 20 nm grown on fluorphlogopite was selected, and in-situ thermal oxidation was performed at 400°C for 20 minutes to convert 15 nm of Bi2O2Se on the surface into Bi2SeO5. Using PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue as masks, the source and drain regions were exposed by electron beam exposure, and treated in 0.2wt% hydrofluoric acid for 30 seconds to etch away the oxide layer on the surface of the source and drain regions. Subsequently, a 60 nm thick pure gold gate electrode and a source and drain electrode composed of 5 nm iron + 40 nm gold were deposited by thermal evaporation in sequence, and annealed in argon at 100°C for 30 minutes to obtain the Bi2O2Se in-situ oxide top gate field effect transistor.
[0103] The Bi2O2Se in-situ oxide top-gate field effect transistor obtained in this embodiment includes a fluorphlogopite substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and source and drain electrodes directly contacting the channel material and located at both ends of the dielectric layer respectively;
[0104] The channel material is a two-dimensional Bi2O2Se crystal;
[0105] The material constituting the dielectric layer is Bi2SeO5;
[0106] The thickness of the dielectric layer is 15 nm;
[0107] The gate electrode is made of gold;
[0108] The thickness of the gate electrode is 60 nm;
[0109] The source-drain electrode is a source-drain electrode composed of 5 nm iron (as a contact layer) + 40 nm gold;
[0110] Fig.11 Schematic diagram of the structure and measurement circuit of the Bi2O2Se field effect transistor obtained in this embodiment. Fig.12 The optical photograph and measurement results of the device are shown. Its field effect mobility is 298 cm 2V -1 s -1 , the threshold voltage is -2 V, and the subthreshold swing is 70 mV / dec.
[0111] Example 7
[0112] A two-dimensional Bi2O2Se thin sheet with an initial thickness of 10 nm grown on fluorphlogopite was selected and in-situ thermally oxidized at 400°C for 7 minutes to convert 5 nm of Bi2O2Se on the surface into Bi2SeO5. Using PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue as masks, the source and drain regions were exposed by electron beam exposure, and treated in 0.05% hydrofluoric acid for 20 seconds to etch away the oxide layer on the surface of the source and drain regions. Subsequently, a 50 nm thick pure gold gate electrode and a source and drain electrode composed of 5 nm iron + 30 nm gold were deposited by thermal evaporation in sequence, and annealed in argon at 90°C for 30 minutes to obtain the Bi2O2Se in-situ oxide top-gate field effect transistor.
[0113] The Bi2O2Se in-situ oxide top-gate field effect transistor obtained in this embodiment includes a fluorphlogopite substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and source and drain electrodes directly contacting the channel material and located at both ends of the dielectric layer respectively;
[0114] The channel material is a two-dimensional Bi2O2Se crystal;
[0115] The material constituting the dielectric layer is Bi2SeO5;
[0116] The thickness of the dielectric layer is 5 nm;
[0117] The gate electrode is made of gold;
[0118] The thickness of the gate electrode is 50 nm;
[0119] The source-drain electrode is composed of 5 nm iron (as a contact layer) + 30 nm gold;
[0120] Fig.11 Schematic diagram of the structure and measurement circuit of the Bi2O2Se field effect transistor obtained in this embodiment. Fig.13 The optical photograph and measurement results of the device prepared in this embodiment show that its field effect mobility is 251 cm 2 V -1 s -1 , the threshold voltage is -1 V, and the subthreshold swing is 75 mV / dec.
[0121] Example 8
[0122] A two-dimensional Bi2O2Se thin sheet with an initial thickness of 30 nm grown on fluorphlogopite was selected, and in-situ thermal oxidation was performed at 400°C for 30 minutes to convert 20 nm of Bi2O2Se on the surface into Bi2SeO5. Using PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue as masks, the source and drain regions were exposed by electron beam exposure, and treated in 0.2wt% hydrofluoric acid for 1 minute to etch away the oxide layer on the surface of the source and drain regions. Subsequently, a 70 nm thick pure gold gate electrode and a source and drain electrode composed of a 5 nm iron contact layer + 50 nm gold were deposited by thermal evaporation in sequence, and annealed in argon at 100°C for 30 minutes to obtain the Bi2O2Se in-situ oxide top-gate field effect transistor.
[0123] The Bi2O2Se in-situ oxide top-gate field effect transistor obtained in this embodiment includes a fluorphlogopite substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and source and drain electrodes directly contacting the channel material and located at both ends of the dielectric layer respectively;
[0124] The channel material is a two-dimensional Bi2O2Se crystal;
[0125] The material constituting the dielectric layer is Bi2SeO5;
[0126] The thickness of the dielectric layer is 20 nm;
[0127] The gate electrode is made of gold;
[0128] The thickness of the gate electrode is 70 nm;
[0129] The source-drain electrode is composed of 5 nm iron (as a contact layer) + 50 nm gold;
[0130] Fig.11 Schematic diagram of the structure and measurement circuit of the Bi2O2Se field effect transistor obtained in this embodiment. Fig.14 The optical photograph and measurement results of the device prepared in this embodiment show that its field effect mobility is 314 cm 2 V -1 s -1 , the threshold voltage is -1 V, and the subthreshold swing is 85 mV / dec.
[0131] Example 9
[0132] like Fig.15As shown, a two-dimensional Bi2O2Se thin sheet with an initial thickness of 20 nm grown on fluorphlogopite is selected, PMMA-A4.5 electron beam photoresist is used as a mask and a standard electron beam exposure step is performed, and a single two-dimensional Bi2O2Se thin sheet is etched into two identical rectangular areas by wet etching;
[0133] In the wet etching step, the etching solution used is a mixture of concentrated sulfuric acid, hydrogen peroxide and water; the volume ratio of the concentrated sulfuric acid, hydrogen peroxide and water is 1:2:4; the volume percentage concentration of the hydrogen peroxide is 40%;
[0134] Then, according to the steps of in-situ thermal oxidation in Example 6, in-situ thermal oxidation was performed at 400°C for 20 minutes to convert 15 nm of Bi2O2Se on the surface into Bi2SeO5. Using PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue as masks, the source and drain regions were exposed by electron beam exposure, and treated in 0.2wt% hydrofluoric acid for 1 minute to etch away the oxide layer on the surface of the source and drain regions. Subsequently, a first metal electrode composed of 5 nm iron + 50 nm gold and a second pure gold electrode with a thickness of 70 nm were deposited by thermal evaporation, and treated in argon at 100°C for 30 minutes to obtain an inverter logic circuit based on Bi2O2Se in-situ oxide top-gate field effect transistor.
[0135] Fig.16 The electronic microscope photograph, equivalent circuit diagram and measurement results of the device prepared in this embodiment are shown. The operating voltage is 1V, the maximum voltage gain is 150, and it has a high noise tolerance.
Claims
1. A bismuth selenide in-situ thermal oxide top-gate field effect transistor, comprising a substrate, a channel material located on the substrate, a dielectric layer located on the channel material, a gate electrode located on the dielectric layer, and a source-drain electrode directly in contact with the channel material; The channel material is a two-dimensional Bi2O2Se crystal; The material constituting the dielectric layer is Bi2SeO5; The source and drain electrodes are respectively located at two ends of the dielectric layer; The Bi2SeO5 of the dielectric layer is directly obtained by in-situ thermal oxidation reaction of two-dimensional Bi2O2Se crystals.
2. The bismuth oxyselenide in-situ thermal oxide top-gate field effect transistor according to claim 1, characterized in that: The thickness of the dielectric layer is 5-30 nm; The material constituting the substrate is fluorphlogopite or strontium titanate; The gate electrode is made of metal; the metal is specifically gold; The thickness of the gate electrode is 50-70 nm; The thickness of the source-drain electrode is 5-50 nm; The material constituting the source-drain electrodes is at least one selected from iron and gold.
3. A method for preparing the bismuth oxyselenide in-situ thermal oxide top-gate field effect transistor according to claim 1 or 2, comprising: 1) In-situ thermal oxidation reaction is carried out on the two-dimensional Bi2O2Se crystal to obtain Bi2SeO5 as a dielectric layer on its surface; 2) Electron beam etching is performed on the dielectric layer obtained in step 1) to prepare source-drain electrodes and a gate electrode, and annealing is performed in argon at 90-120° C. for 30-60 minutes to obtain the bismuth selenide in-situ thermal oxide top-gate field effect transistor.
4. The method according to claim 3, characterized in that: In the step 1) of the in-situ thermal oxidation reaction, the reaction atmosphere is pure oxygen, a mixture of oxygen and argon, or air; in the reaction atmosphere, the volume percentage of oxygen to argon in the mixture of oxygen and argon is 20:80; The oxidation reaction temperature is 370~420℃; The oxidation reaction time is 2 to 100 minutes; The method also includes: when the reaction atmosphere is pure oxygen or a mixed gas composed of oxygen and argon, before the in-situ oxidation reaction step, the reaction system is purged; the purging includes: each time the system pressure is evacuated to below 0.5 Torr, and then gas is introduced to fill the system pressure to more than half the atmosphere, and this is repeated three times, and the last time the system pressure is filled to one atmosphere.
5. The method according to claim 3 or 4, characterized in that: In the step 2) of electron beam etching, the etching mask used is at least one of PMMA-A4.5 electron beam photoresist and PMMA-6200 dry etching glue; The etchant used is hydrofluoric acid with a mass percentage concentration of 0.01%-2%; The electron beam etching time is 5 seconds to 2 minutes; The gate electrode and the source-drain electrode are prepared by thermal evaporation, electron beam evaporation or magnetron sputtering deposition.
6. The method according to claim 3 or 4, characterized in that: In the step 1), the two-dimensional Bi2O2Se crystal is prepared by chemical vapor deposition or molecular beam epitaxy; Specifically, the chemical vapor deposition method includes: placing a Bi2Se3 block and a Bi2O3 powder at the center of a tube furnace, placing a substrate downstream of the center of the tube furnace, introducing a carrier gas for chemical vapor deposition, and naturally cooling to room temperature after deposition, so as to obtain the two-dimensional Bi2O2Se crystal on the substrate; More specifically, the molar ratio of the Bi2O3 powder to the Bi2Se3 block is 1 to 3:1; The substrate is a fluorphlogopite or strontium titanate substrate; the chemical formula of the fluorphlogopite is KMg3(AlSi3O 10 )F2; the chemical formula of the strontium titanate is SrTiO3; In the chemical vapor deposition step, the carrier gas is a mixed gas consisting of argon gas and argon-oxygen mixed gas; the volume percentage of oxygen in the argon-oxygen mixed gas is 1 / 1000; The flow rate of the argon gas is 100-200 standard milliliters per minute; The flow rate of the argon-oxygen mixed gas is 10-30 standard milliliters per minute; The system pressure is 100-400 Torr; The deposition temperature is 580-620°C; The deposition time is 5-30 minutes; The method further comprises: after the chemical vapor deposition step, naturally cooling the system to room temperature.
7. Use of the bismuth oxyselenide in-situ thermal oxide top-gate field effect transistor according to any one of claims 1 to 2 in the preparation of a surround-gate field effect transistor or a fin field effect transistor.
8. Use of the bismuth oxyselenide in-situ thermal oxide top-gate field effect transistor according to any one of claims 1 to 2 in the preparation of at least one of a logic circuit, a sensor and an integrated circuit.
9. The use according to claim 8, characterized in that: The method for preparing the logic circuit includes: using wet etching to pre-divide the two-dimensional Bi2O2Se crystal into multiple regions, then performing in-situ thermal oxidation and selective etching on the above regions according to the same steps, and finally preparing source and drain electrodes.
10. The use according to claim 9, characterized in that: In the wet etching step, the etching solution used is a mixture of concentrated sulfuric acid, hydrogen peroxide and water; The conditions of the in-situ thermal oxidation are as follows: the reaction atmosphere is pure oxygen, a mixed gas consisting of oxygen and argon, or air; in the reaction atmosphere, the volume percentage of oxygen to argon in the mixed gas consisting of oxygen and argon is 20:80; The oxidation reaction temperature is 370~420℃; The oxidation reaction time is 2 to 100 minutes; In the selective etching step, the mask used is electron beam photoresist or ultraviolet photoresist; The etching is a standard electron beam etching or photolithography method; The source-drain electrode is prepared by thermal evaporation, electron beam evaporation or magnetron sputtering deposition; The thickness of the source-drain electrode is 5-50 nm; The material constituting the source-drain electrodes is at least one selected from iron and gold.