Adaptive switching speed control of power semiconductors

Abstract

The invention relates to a semiconductor switching device (1), comprising a switchable power semiconductor (T 2 ) and at least one regulating circuit (RS 1 , R.S. 2 ), the regulation circuit includes a current sink (S 1 , S 2 ) and the current amplifier (V 1 , V 2 ). Current sink (S 1 , S 2 ) through the adjustment capacitor (C 1 ) and power semiconductors (T 2 ) is capacitively coupled to the collector / drain of the MOSFET and is designed to derive the current flowing through the regulating capacitor (C 1 ) of the current until the maximum current that can be set. Current amplifier (V 1 , V 2 ) on the input side and the current sink (S 1 , S 2 ) and the regulating capacitor (C 1 ) is connected to the end of the capacitive coupling and is connected to a positive or negative supply voltage and to a power semiconductor (T 2 ) is connected to the control electrode and is designed to amplify the current flowing through the regulating capacitor (C 1 ) of the current not flowing through the current sink (S 1 , S 2 ) and conducts the partial current into the control electrode of the power semiconductor (T2), so that the partial current in the power semiconductor (T2) is offset during the switching process. 2 ) on the collector-emitter-path or on the drain-source-path. In order to improve the semiconductor switching device (1), it is proposed that the semiconductor switching device (1) also has an additional circuit (1.1) for adaptive switching transition, which is connected to the power semiconductor (T 2 ) and the additional circuit is designed to, when the collector-emitter-path or the drain-source-path of the power semiconductor is switched from a blocked state to a conducting state, the power semiconductor (T 2 )’s collector voltage or drain voltage.

Description

Technical Field

[0001] The invention relates to a semiconductor switching device comprising a switchable power semiconductor and an adaptive switching speed control for controlling the switching speed of the power semiconductor. Background Art

[0002] Such semiconductor switching devices are used, for example, in frequency converters which are used in drive technology, wherein the switchable power semiconductor is designed as a bipolar transistor (IGBT) with an insulated gate electrode. However, the present invention relates to all types of switchable power semiconductors, i.e. power semiconductors with a base or gate, a collector and an emitter, and also switchable semiconductors with a gate, a drain and a source terminal.

[0003] The switching speed of power semiconductors is usually selected according to two opposing criteria. On the one hand, in order to minimize switching losses, the power semiconductors should be switched as fast as possible while maintaining safe operation. On the other hand, in order to avoid electromagnetic emissions and to improve electromagnetic compatibility (EMC), the switching speed of power semiconductors should be limited.

[0004] The criteria of minimum switching losses and the criteria of minimum electromagnetic compatibility are conflicting design goals and, moreover, not all operating parameters can be considered to the same extent.

[0005] For example, when a power semiconductor designed as an IGBT is switched on, the switching losses and the voltage slope (the change in the voltage change during the switching process) change in opposite directions as the switch-off current increases.

[0006] In contrast, when turning off such an IGBT, the voltage slope and the switching loss increase in approximately opposite directions as the turn-off current increases.

[0007] For this reason and because other operating parameters need to be taken into account, a compromise must always be found when determining the switching speed of power semiconductors. In order to be able to operate within the boundary range of operating parameters even under extended operating conditions, semiconductor switching devices according to the prior art must accept power losses and / or efficiency losses.

[0008] Document DE 102 11 075 A1 describes a regulated control circuit for an analog-controlled power semiconductor, which includes a digital working logic module with a control input terminal, to which a control signal can be supplied via an A / D converter, with the help of which a digital output signal of the logic module can be influenced. The digital output signal is connected to a module or component, which is used to convert the output signal into an analog or approximately analog control variable of the power semiconductor.

[0009] Document DE 10 2005 012 151 B3 describes a method and a circuit arrangement for switching on and off a power semiconductor switch with an upstream control stage and for optimizing the switching speed during switching on and off, wherein the collector-emitter current of the power semiconductor switch is detected and the switching speed of the subsequent switching process is controlled as a function of the collector-emitter current. The control stage is a sample-and-hold circuit controlled by a drive signal of the power semiconductor switch for storing the collector-emitter voltage of the power semiconductor switch, and a further control stage for switching on and off the power semiconductor switch is respectively provided, which controls the switching speed as a function of the sample-and-hold signal.

[0010] Other methods known from the prior art for improving electromagnetic compatibility (EMC) are EMC filters and shielding devices. In addition, methods for loss dissipation are known, such as improved cooling or higher power semiconductor consumption. Summary of the invention

[0011] The invention is based on the object of specifying an improved semiconductor switching device and an improved frequency converter.

[0012] According to the invention, this object is achieved with respect to an improved semiconductor switching device by a semiconductor switching device having the features of the invention. With respect to an improved frequency converter, this object is achieved with respect to a frequency converter having the features of the invention.

[0013] Advantageous embodiments of the invention are the subject matter of the dependent claims.

[0014] A semiconductor switching device comprises a switchable power semiconductor along its collector-emitter path via a control electrode, also referred to as a gate electrode in the case of an IGBT, the power semiconductor having a collector, an emitter and a gate and at least one regulating circuit, which is connected to the at least one regulating circuit via a regulating capacitor. The invention can also be transferred to other switchable power semiconductors, i.e., for example, MOSFETs (metal oxide semiconductor field effect transistors), which have a drain and a source instead of a collector and an emitter. Therefore, the terms collector and drain as well as emitter and source can be regarded as synonymous. For the sake of intuitive expression, the term gate electrode is also used for the control electrode in the following text. In addition, it is not explicitly stated in every place that collector and emitter always refer to drain and source.

[0015] The regulating circuits each include a current sink and a current amplifier. The current sink is capacitively coupled to the collector of the power semiconductor via a regulating capacitor and is designed to conduct a first partial current of a capacitor current flowing through the regulating capacitor during a switching process up to a settable maximum current to ground. The current sink is connected to a settable voltage source and is designed to enable the maximum current that can be received and conducted to ground to be set by means of the settable voltage source.

[0016] The current amplifier is connected on the input side to the end of the current sink capacitively coupled to the regulating capacitor and is fed with a positive or negative supply voltage. The current amplifier is connected on the output side to the gate electrode of the power semiconductor.

[0017] The current amplifier is designed to receive a second partial current of the capacitor current flowing through the regulating capacitor during the switching process on the input side for the residual current and amplify it with a predetermined amplification factor (this current is not derived from the current sink) and introduce it into the gate electrode of the power semiconductor so that the voltage change on the collector-emitter path of the power semiconductor is offset during the switching process.

[0018] Therefore, by amplifying the small residual current of the capacitor current and conducting it into the gate electrode of the power semiconductor when the voltage of the settable voltage source is high and correspondingly amplifying the high residual current of the capacitor current and conducting it into the gate electrode of the power semiconductor when the voltage of the settable voltage source is low, the slope of the voltage change of the collector-emitter voltage at the power semiconductor during the switching process can be controlled with the help of the settable voltage source.

[0019] Thus, an optimum switching speed can be set in an advantageous manner at each operating point of the power semiconductor with respect to power losses during switching and / or operating parameters and / or electromagnetic compatibility. Thus, critical operating points, such as interruption of freewheeling diodes during disconnection, disconnection of overvoltages during shutdown of power semiconductors or starting of power components at low temperatures, are better controlled than with devices and methods according to the prior art.

[0020] Phenomena that occur in extreme operation, for example at very low or very high collector-emitter currents of the power semiconductor, such as high voltage slopes or high switching losses, are made less critical by the solution according to the invention.

[0021] The performance of the power components is improved, since there is now a greater degree of freedom for the design criteria with regard to the switching speed. As a result, switching losses are reduced and / or electromagnetic compatibility is improved. As a result, costs with regard to EMC, semiconductors and cooling expenditures can be reduced.

[0022] For applications that impose restrictions on the voltage slope at the output of the power module, the switching speed can be limited to a maximum value. In this case, for example, a voltage slope filter can be abandoned. Power modules with the same hardware can be adapted to different applications by settings in the software and can therefore be distributed. This reduces the variety of variants.

[0023] Compared to adaptive switching speed control, which varies the switching speed by means of a gate resistor, a constant current or a voltage ramp, the invention offers the advantage that the switching times are hardly changed during the adaptation. The switching delay time thus remains approximately constant, since the switching behavior is not intervened until the voltage slope occurs, so that only the adapted voltage slope itself has an influence on the completed switching process.

[0024] This solution thus has almost no negative impact on the behavior of the regulator of the superordinate control device, since the voltage to be output is hardly changed by the additional delay time.

[0025] In addition, the locking time (i.e., the dead time between the upper power semiconductor and the lower power semiconductor of the half bridge) can be determined without taking into account the variable delay time, so that the locking time is shortened, and the semiconductor switching device according to the present invention is also suitable for higher switching frequencies because the voltage loss caused by the dead time is reduced.

[0026] Compared with a purely digital solution, the cost, space requirement and complexity of the present invention are significantly reduced. In addition, due to the lower component expenditure, a lower probability of failure can be expected.

[0027] The circuit according to the invention also has a good dynamic response in order to regulate fast switching processes. The simultaneous intervention of at least one regulating circuit according to the invention directly at the gate of the power semiconductor during the control of the switching process by a driver signal independent of the switching process offers the advantage that this intervention is low-impedance in both directions.

[0028] For example, when the control electrode, in particular the gate electrode, of the power semiconductor is turned off via the turn-off resistor, it is pulled in the direction of the negative supply voltage, while at least one control circuit according to the invention is pulled in the direction of the positive supply voltage at the same time. This achieves a high gain and a sufficient dynamic response to adjust the voltage slope.

[0029] The semiconductor switching device comprises an additional circuit for adaptive switching transition, which is connected to the gate electrode of the power semiconductor and is designed to smoothly transition the collector voltage of the power semiconductor when switching the collector-emitter path of the power semiconductor from the blocked state to the conductive state.

[0030] As a result, the voltage gradient of the collector-emitter voltage of the power semiconductor, which can be increased due to the reaction time of at least one control circuit and / or by the gate leakage inductance of the power semiconductor when switched on, can be limited to a desired low value.

[0031] In one embodiment of the present invention, the semiconductor circuit includes a first regulation circuit having a first current amplifier and a second regulation circuit having a second current amplifier, wherein the first current amplifier is connected to a negative supply voltage and is designed to feed a negative current into a gate electrode of the power semiconductor, and the second current amplifier is connected to a positive supply voltage and is designed to feed a positive current into the gate electrode of the power semiconductor.

[0032] The advantage of this embodiment is that the voltage slope can be set independently during the switch-on process and during the switch-off process by means of a separately configurable voltage source.

[0033] In one embodiment, the current sink includes a metal oxide semiconductor field effect transistor (MOSFET) connected in a current negative feedback, a current negative feedback resistor, and a settable voltage source, wherein the drain electrode of the MOSFET is connected to the adjustment capacitor and the source electrode of the MOSFET is connected to the ground via the current negative feedback resistor, and the gate electrode of the MOSFET is fed by an adjustable voltage source with ground as the reference.

[0034] Such a current sink can be produced easily and inexpensively using available components.

[0035] In one embodiment, the current amplifier includes a MOSFET connected as a source follower, a gate resistor, a source resistor, and a diode, wherein the diode is arranged between the regulating capacitor and the gate electrode of the MOSFET in a conduction direction in a manner facing the gate electrode of the MOSFET. The gate resistor is arranged between the gate electrode of the MOSFET and the gate electrode of the power semiconductor. The source resistor is arranged between the source electrode of the MOSFET and the gate electrode of the power semiconductor.

[0036] In order to generally combine the source follower circuit and the emitter follower as a generic term, the generic term is called source / emitter follower.

[0037] Such a current amplifier can be produced easily and inexpensively using available components.

[0038] In one embodiment, the current amplifier has a bipolar transistor connected as an emitter follower instead of being connected as a source follower, wherein, respectively, the gate electrode of the MOSFET is replaced by the base electrode or the gate electrode of the bipolar transistor, the drain electrode of the MOSFET is replaced by the collector electrode of the bipolar transistor and the source electrode of the MOSFET is replaced by the emitter electrode of the bipolar transistor.

[0039] Compared to MOSFETs, bipolar transistors have good turn-on behavior, high cut-off voltage and high robustness.

[0040] In an embodiment of the present invention, the power semiconductor is configured as a bipolar transistor with an insulated gate electrode (IGBT), as a metal oxide semiconductor field effect transistor (MOSFET), as a silicon carbide metal oxide semiconductor field effect transistor (SiC MOSFET) or as a bipolar transistor. Such power semiconductors can be obtained cheaply and easily integrated into semiconductor switching devices.

[0041] In one of the described embodiments, the frequency converter comprises a semiconductor switching device, wherein the power semiconductor is designed as an IGBT. Such a frequency converter is suitable for use in drive technology and has low switching losses and good electromagnetic compatibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The above-mentioned features, characteristics and advantages of the present invention and the manner and method of implementing the present invention will become clearer and more obvious in conjunction with the following description of the embodiment, which is described in detail in conjunction with the accompanying drawings. Herein, it is shown:

[0043] Figure 1 schematically shows the dependence of switching energy and voltage slope on collector current when a power semiconductor is connected.

[0044] FIG2 schematically shows the relationship between the switching energy and the voltage slope when switching off a power semiconductor.

[0045] Figure 3 Schematically shows a circuit for adjusting the voltage slope when switched on,

[0046] Figure 4 Schematic diagram of a circuit for adjusting the voltage slope during shutdown.

[0047] Figure 5 Schematically illustrating an embodiment of a current sink,

[0048] Figure 6 Schematically shows an embodiment of a current amplifier,

[0049] Figure 7Schematically shows the analog circuit and

[0050] Figures 8 to 11 Shown are simulation results for the simulated time profiles of the collector voltage, the collector current and the control voltage / gate voltage of a simulated switching transistor for different maximum voltage gradients predefined by means of a settable voltage source.

[0051] In all the figures, corresponding parts are provided with the same reference symbols as one another. DETAILED DESCRIPTION

[0052] Figure 1 schematically shows the voltage slope when the power semiconductor is turned on. and switch-on energy E ON With collector current I C The power semiconductor can be constructed as a bipolar transistor (IGBT) with an insulated gate electrode. When switched on, for the connected collector current I C , voltage slope and switch-on energy E ON The direction changes in the opposite direction. As the collector current I C The increase in energy E ON increases, while the voltage slope Reduce.

[0053] On the contrary, as shown in Figure 2, during shutdown, the voltage slope and the turn-off energy E OFF Change in the same direction: Both values ​​change with the connected collector current I C increases with the increase of .

[0054] In addition, in addition to the connected collector current I C In addition, the switching energy E ON 、E OFF And the voltage slope It is dependent on other parameters, for example on the temperature and the intermediate circuit voltage. Thus, for example, at low temperatures and high intermediate circuit voltages, the power semiconductors are switched more quickly than at high temperatures and low intermediate circuit voltages.

[0055] Figure 3 Schematically shows that when the switching transistor T2 is turned on, the slope of the collector voltage is adjusted by means of the first current sink S1 and the first current amplifier V1. The first regulating circuit RS1 of the embodiment of the present invention is a switching transistor which is designed as an IGBT. By means of the first and second switches SW1, SW2 via the switching transistor gate resistor R GThe two switches SW1 and SW2 are switched alternately, and thus are at least never closed at the same time.

[0056] According to the invention, the collector of the switching transistor T2 is capacitively coupled to a first current sink S1 via a control capacitor C1. The first current sink S1 is designed to receive current from the control capacitor C1 up to a current threshold value I≤I 目标 The first current sink S1 does not receive the current fed by the regulating capacitor C1 that is higher than the current threshold I 目标 The current max(I C1 -I 目标 , 0). The current difference ΔI not received by the first current sink S1 C1 =max(I C1 -I 目标 , 0) is conducted to the first current amplifier V1 and amplified by the first current amplifier with an amplification factor v. The amplified difference current v·ΔI C1 is fed into the gate of the switching transistor T2.

[0057] In a similar way, Figure 4 It is schematically shown that when the switching transistor T2 is turned off, the voltage slope is adjusted by means of the second regulating circuit RS2. The second regulating circuit is formed by a second current sink S2 and a second current amplifier V2.

[0058] according to Figure 3 and Figure 4 The operating principles of the two circuits are equivalent in principle and are referred to below according to Figure 4 The circuit is explained.

[0059] For this purpose, it is assumed that the switching transistor T2 is switched on at the beginning of the switching process. If the first switch SW1 is switched off and the second switch SW2 is switched on, the gate of the switching transistor T2 is discharged. The switching transistor T2 is switched off and the voltage u at the collector of the switching transistor T2 increases. The regulating capacitor C1 derives the increased collector voltage, wherein the regulating capacitor current flows through the regulating capacitor C1.

[0060] The second current sink S2 receives up to I from this current via the regulating capacitor C1. 目标 Partial current I 阱 The remaining share of the current is introduced into the second current amplifier V2 and amplified by the second current amplifier with an amplification factor v. Therefore, the output current of the second current amplifier V2 is I A =v·ΔI C1 .

[0061] The output current I A is introduced into the gate of the switching transistor T2. As a result, the gate voltage of the switching transistor T2 increases, thereby reducing the collector current I of the switching transistor T2, which is no longer strongly blocked from now on. C This causes the collector voltage slope to The decrease of the regulating capacitor current I through the regulating capacitor C1 causes C1 of reduction.

[0062] As a result, the voltage slope of the collector voltage of the switching transistor T2 decreases.

[0063] Therefore, for the second current amplifier V2 with an amplification factor v→∞ as an ideal working assumption, the following voltage slope is set:

[0064]

[0065] Because according to I 阱 ≤I 目标 Limit the maximum current that can be received by the second current sink S2, so the current threshold I 目标 Acts as voltage slope The moderating variable.

[0066] If the voltage slope during switching exceeds the current threshold I 目标 The preset limit value makes

[0067]

[0068] The voltage slope is adjusted by a closed loop from the collector of the switching transistor T2 via the adjustment capacitor C1 and the second current amplifier V2 to the gate of the switching transistor T2 and back to the collector of the switching transistor via the transfer characteristic of the switching transistor T2.

[0069] If the change in the collector voltage during shutdown does not reach the maximum value predefined by means of the current threshold, so that during the entire shutdown process If applicable, the second regulating circuit RS2 formed by the second current sink S2 and the second current amplifier V2 is inactive.

[0070] Figure 5 Schematically showing the collector voltage slope of the switching transistor T2 when it is turned off. The second current sink S2 of the second regulating circuit RS2 is implemented as follows. The second current sink S2 includes a metal oxide semiconductor field effect transistor (MOSFET) T3, a current negative feedback resistor R1 grounded on the source side of the MOSFET T3, and a voltage source U 适应, which presets the gate voltage of MOSFET T3. 适应 The positive gate voltage can set the current threshold I 目标 , from which current threshold MOSFET T3 switches to linear operation.

[0071] The current I received by the second current sink S2 阱 The voltage source U can be set 适应 The voltage of MOSFETT3 is based on the gate-source-threshold voltage U GS(th)，3 And according to the current negative feedback resistor R1, it is calculated as follows:

[0072] U GS(th)，3 +I 阱 R1=U 适应

[0073]

[0074] Figure 6 The embodiment of the second current amplifier V2 is schematically shown, and the second current amplifier includes MOSFET T1, source resistor R2, gate resistor R3 and diode D1. MOSFET T1, source resistor R2 and gate resistor R3 are connected in the form of source follower V2. The diode D1 connected in series upstream of the input side of the gate presets the current direction, so that the source follower V2 only responds to the differential current ΔI in the positive direction, that is, flowing in the direction of the gate. C1 =I C1 -I 阱 efficient.

[0075] In an exemplary embodiment not shown in detail, the MOSFET T1 can be replaced by a bipolar transistor. The second current amplifier V2 is then operated as an emitter follower.

[0076] With the help of resistors R2 and R3, considering the gate-source-threshold voltage U of MOSFET T1 GS(th)，1 In the case of , the gain v of the second current amplifier V2 can be determined as follows:

[0077]

[0078] For the operation of the switching transistor T2 in the Miller plateau and neglecting the parasitic Miller capacitance between the gate electrode and the collector electrode,

[0079]

[0080] in, is the gate resistance R of the switching transistor G The current flowing from the negative supply voltage U_ (For example, in Figure 6 Assumed to be negative 8 volts) and the Miller platform voltage U from the switching transistor T2 米勒平台，2 The following is obtained:

[0081]

[0082] By using the current-voltage relationship at the switching transistor T2:

[0083]

[0084] And considering Figure 5 Explain the current relationship of the case,

[0085]

[0086] Therefore, the voltage slope of the collector voltage of the switching transistor T2 is determined by the following voltage slope determination formula:

[0087]

[0088] From this we can see that the voltage slope can be directly via a configurable voltage source U 适应 control.

[0089] When using this voltage slope determination formula, it is necessary to consider: For the gate-source-threshold voltage U GS(th)，1 , U GS(th)，3 And for the Miller plateau voltage U 米勒平台，2 Instead of using the data sheet value, for the drain current or collector current I to be set respectively C , these values ​​should be extracted from the diagrams for the corresponding components,

[0090] If the second current amplifier V2 is implemented as an emitter follower by means of a bipolar transistor instead of the MOSFET T1, then instead of the gate-source threshold voltage U GS(th)，1 The base-emitter voltage U of the bipolar transistor must be BE Applied to the voltage slope determination formula.

[0091] In accordance with Figure 3 During the on-state of the voltage gradient, the operation of the first regulating circuit RS1 for regulating the voltage gradient is similar to the description of the second regulating circuit RS2, wherein the voltage gradient is adjusted according to the method of the invention. Figure 3 The components of the circuit are replaced according to Figure 4 components of a circuit.

[0092] Figure 7The circuit diagram of a simulation circuit 1 for the first and second regulating circuits RS1, RS2, which is simulated using the simulation tool LTSpice, is shown. The simulation circuit 1 comprises an additional circuit 1.1 for adaptive switching transitions, which is arranged on the gate side of the switching transistor T2. In addition, the simulation circuit 1 has a first leakage inductance L2 arranged on the cathode side of the freewheeling diode U1 and a second leakage inductance L3 arranged on the gate side of the switching transistor T2, in order to enable application-related simulation of the switching behavior.

[0093] In order to simulate the IGBT rated current of 200 Amperes, the switching transistor T2 is emulated by a parallel circuit of five individual transistors which, according to the manufacturer Infineon, are simulated as a 2-level model of a 40 Ampere IGBT3 Trench-IGBT.

[0094] The analog circuit 1 further comprises voltage-controlled switches as switches SW1, SW2 and is supplied with a positive supply voltage U by means of a bipolar driver supply. + = 15 V and negative supply voltage U _ =-8 volts.

[0095] The additional circuit 1.1 for adaptive switching transition realizes a smooth transition of the collector voltage u from the off state to the on state and prevents or reduces the voltage slope The desired reduction of the delay that would otherwise occur due to the reaction time of the current amplifier V1 and the leakage inductance L3 in suddenly switching on the collector current I C The maximum voltage slope is not required to comply with In the embodiment of , the additional circuit 1.1 can be omitted. For the shutdown process, no analog circuit 1.1 is required, because the voltage slope It rises slowly during shutdown, thus enabling sufficiently rapid control intervention of the current amplifier V2.

[0096] In accordance with Figure 7 In the embodiment of the present invention, the second amplifier V2 has a resistor R7. The gate resistor R G The resistor R7 advantageously provides damping for the resonant circuit formed by the gate capacitance of the switching transistor T2 and the leakage inductance L3 of the gate circuit. In contrast to the good dynamic response of the circuit according to the invention, the operational amplifier circuit known from the prior art loses switching time and can only provide low gate currents. Due to the hysteresis caused by the principle, the drivers known from the prior art with a push-pull output stage also only provide a low dynamic response. The switching output stages known from the prior art with an inductance in the gate circuit also only provide a reduced dynamic response compared to the invention and are complex and costly to implement.

[0097] Figures 8 to 11 The results of simulating the analog circuit 1 using the simulation tool LTSpice are shown, wherein the change of the collector voltage u, the change of the switch current i connected by the switch transistor T2, and the gate voltage u at the gate of the switch transistor T2 are shown. G The variation of as a function of the time t calculated from the switching time points. Figures 8 to 11 Each figure in FIG. 1 is for a voltage source U that can be set 适应 The collector voltage curves u are shown for four different settings. (k) (t), k = 1...4, switching current curve i (k) (t), k = 1...4 and gate voltage curve Therefore, the voltage source has a certain voltage slope during the switching process. The influence of becomes obvious. The index k varies with the voltage source U that can be set 适应 The voltage value increases, and then the voltage slope Increase.

[0098] Figure 8 The simulation curve simulating the turn-on process of the switching transistor T2 with almost no current is shown. Configurable voltage source U 适应 The higher the voltage is chosen, that is: with increasing exponent k, the collector voltage curve u (k) (t), voltage slope for k = 1...4 The higher the gate voltage curve The platform of is different accordingly. With this embodiment, the collector voltage curve u (k) (t), voltage slope for k = 1...4 It is reduced to a quarter of the value that can be achieved without the regulating circuits RS1 , RS2 .

[0099] Fig. 9 The simulation curve of the switching process of the simulation switching transistor T2 is shown at half the rated current intensity, that is, when the current intensity connected is 200 amperes.

[0100] Fig.10 The simulation curve of the switching process of the simulated switching transistor T2 is shown at the rated current intensity, that is, when the current intensity connected is 400 amperes.

[0101] from Fig. 9 and Fig.10 It can be seen that: voltage slope As the current intensity increases, it decreases. At the same time, the voltage source U 适应The voltage effect is reduced, especially when the voltage value is low, so that when the current intensity is high, the collector voltage curve u (k) (t), voltage slope for k = 1...4 The difference is less dramatic than in the case of lower current intensities connected.

[0102] Fig.11 The simulation curve of the turn-off process of the simulated switching transistor T2 is shown at the rated current intensity, that is, when the current intensity connected is 400 amperes. Here, with the voltage source U 适应 The voltage becomes higher, the voltage slope In addition, here, when the collector voltage u rises, the gate voltage curve is also set Platforms of different heights.

[0103] Although the present invention has been illustrated and described in detail by means of preferred embodiments, the present invention is not limited to the disclosed examples and other variants can be derived therefrom by a person skilled in the art without departing from the scope of protection of the present invention.

Claims

1. A semiconductor switching device, comprising: a switchable power semiconductor along a collector-emitter path or a drain-source path via a control electrode, in particular a gate electrode, the power semiconductor having a collector or a drain, an emitter or a source and a control terminal, in particular a gate; and at least one regulating circuit, each comprising a current sink and a current amplifier, wherein the current sink is capacitively coupled to the collector of the power semiconductor via a regulating capacitor and is designed to conduct a partial current of the current flowing through the regulating capacitor during a switching process up to a settable maximum current, the maximum current being settable via a settable voltage source, and wherein the current amplifier is connected on the input side to the end of the current sink capacitively coupled to the regulating capacitor and to a positive or negative supply voltage and on the output side to the control electrode of the power semiconductor, and the current amplifier is designed to amplify the partial current of the current flowing through the regulating capacitor during a switching process that is not conducted by the current sink with a predetermined amplification factor and conduct the partial current into the control electrode of the power semiconductor, so that voltage changes on the collector-emitter path or on the drain-source path of the power semiconductor are compensated during a switching process, It is characterized in that the semiconductor switching device also has an additional circuit for adaptive switching transition, which is connected to the control electrode of the power semiconductor and is designed to make the collector voltage or drain voltage of the power semiconductor transition smoothly when the collector-emitter path or drain-source path of the power semiconductor is switched from the cut-off state to the on-state.

2. The semiconductor switching device according to claim 1, comprising a first regulating circuit having a first current amplifier and a second regulating circuit having a second current amplifier, wherein: The first current amplifier is connected to the negative supply voltage and is designed to feed a negative current into the control electrode of the power semiconductor, and the second current amplifier is connected to the positive supply voltage and is designed to feed a positive current into the control electrode of the power semiconductor.

3. A semiconductor switching device according to any one of the preceding claims, characterized in that The current sink comprises a metal oxide semiconductor field effect transistor connected to the current negative feedback, a current negative feedback resistor and a configurable voltage source, wherein the drain electrode of the metal oxide semiconductor field effect transistor is connected to the adjustment capacitor and the source electrode of the metal oxide semiconductor field effect transistor is connected to the ground via the current negative feedback resistor, and the gate electrode of the metal oxide semiconductor field effect transistor is fed by the configurable voltage source with the ground as the reference.

4. The semiconductor switch device according to claim 1 or 2, characterized in that: The current amplifier includes a follower semiconductor connected as a source / emitter follower, a gate resistor, a source resistor and a diode, wherein the diode is arranged between the adjustment capacitor and the control electrode of the follower semiconductor in a conduction direction facing the control electrode of the follower semiconductor, wherein the gate resistor is arranged between the control electrode of the follower semiconductor and the control electrode of the power semiconductor, and wherein the source resistor is arranged between the source electrode of the follower semiconductor and the control electrode of the power semiconductor.

5. The semiconductor switch device according to claim 4, wherein: The follower semiconductor connected as a source / emitter follower is constructed as a metal oxide semiconductor field effect transistor connected as a source follower.

6. The semiconductor switch device according to claim 4, wherein: The follower semiconductor connected as a source / emitter follower is designed as a bipolar transistor connected as an emitter follower.

7. The semiconductor switch device according to claim 1 or 2, characterized in that: The power semiconductor is designed as a bipolar transistor with an insulated gate electrode, as a metal oxide semiconductor field effect transistor, as a silicon carbide metal oxide semiconductor field effect transistor or as a bipolar transistor.

8. A frequency converter comprising a semiconductor switching device according to any one of the preceding claims, wherein: The power semiconductor is designed as a bipolar transistor with an insulated gate electrode.

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