Semiconductor circuit
By independently setting the PFC circuit in the semiconductor circuit and dividing the line layer into a strong and weak-current zone, the complex layout and susceptibility to interference of the existing PFC circuit is solved, and a smaller size and higher reliability are achieved.
Patent Information
- Application Number
- CN202111097863.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-18
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2041-09-18
AI Technical Summary
Due to the discrete arrangement or integration with other circuits in the IPM module, existing PFC circuits have problems such as complex PCB layout, interference-prone driving circuits, and overcurrent protection.
A semiconductor circuit is designed, in which the circuit layer is divided into a strong electric area and a weak electric area. The PFC driver chip is set in a weak electric area. The rectifier circuit, PFC switch tube and fast recovery diode are set in a strong electric area to independently distinguish to reduce the interference of the strong electric area to the weak electric area, and various protection functions are set in the PFC driver chip.
By independently setting up the PFC circuit and line layer partitioning, the interference of the strong power zone to the weak power zone is reduced, and a smaller footprint and higher working reliability are achieved.
Smart Images

Figure CN113824295B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor circuit, belonging to the technical field of power semiconductor devices. Background Art
[0002] At present, the PFC circuits of the external motor electronic control of variable-frequency air conditioners usually adopt discrete components, and there are multiple problems in its design: the rectifier bridge, IGBT, and FRD of the PFC discrete power components occupy a relatively large position on the heat dissipation sheet; the wiring widths of the electrical connections of the rectifier bridge, IGBT, and FRD are relatively large, and the creepage distances between different networks have relatively high requirements. The PCB layout and wiring of the rectifier bridge, IGBT, and FRD are very complex and difficult to implement; the IGBT drive circuit, current, voltage sampling circuit, and current protection circuit of the PFC circuit are easily interfered, affecting the stability of the PFC circuit. There are also PFC circuits integrated with IPM (Intelligent Power Module) modules. Since the IPM module itself also integrates a high-power inverter circuit and a corresponding drive circuit inside, its operation will affect the overcurrent protection of the PFC circuit. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to solve a series of problems formed by the existing PFC circuits due to discrete setting or integration with other circuits in the IPM module.
[0004] Specifically, the present invention discloses a semiconductor circuit, which includes a heat dissipation substrate, an insulating layer, a circuit layer, and multiple electronic components. The multiple electronic components include a PFC drive chip, a rectifier circuit, a PFC switch tube, a freewheeling diode, and a fast recovery diode. The circuit layer is divided into a strong electricity area and a weak electricity area. The PFC drive chip is arranged in the weak electricity area, and the rectifier circuit, PFC switch tube, and fast recovery diode are arranged in the strong electricity area.
[0005] Optionally, a strong electricity pin group and a weak electricity pin group are further arranged on both sides of the semiconductor circuit. The strong electricity pin group and the weak electricity pin group are respectively close to and electrically connected to the strong electricity area and the weak electricity area.
[0006] Optionally, a ground copper foil area is arranged in the weak electricity area. The drive chip is arranged in the ground copper foil area, and the grounding end of the drive chip is electrically connected to the ground copper foil area.
[0007] Optionally, a rectifier copper foil area and a switch tube copper foil area are sequentially arranged in the strong electricity area. The strong electricity pin group includes a rectifier input / output pin group and a PFC switch pin group. The rectifier input / output pin group is arranged close to and electrically connected to the rectifier copper foil area, and the PFC switch pin group is arranged close to and electrically connected to the switch tube copper foil area.
[0008] Optionally, the switching transistor copper foil area includes a first switching transistor copper foil sub-area and a second switching transistor copper foil sub-area. A blank is provided in the middle of the first switching transistor copper foil sub-area for arranging the second switching transistor copper foil sub-area. The first switching transistor copper foil sub-area is provided with a PFC switching transistor and a fast recovery diode, and the second switching transistor copper foil sub-area is provided with a freewheeling diode.
[0009] Optionally, the rectifier copper foil area is sequentially provided with first to third commutator copper foil areas from left to right. The first commutator copper foil area is provided and connected to the anode of the third diode. The second commutator copper foil area is provided and connected to the cathode of the second diode. The third commutator copper foil area is provided and connected to the anodes of the first diode and the fourth diode. And bonding wires are connected between the first to third commutator copper foil areas to form a full-bridge rectifier circuit.
[0010] Optionally, the distance between the pins of the high-voltage pin group is 4 - 8 mm.
[0011] Optionally, the PFC driving chip is internally provided with a power supply circuit, a power supply undervoltage protection circuit, a PFC overcurrent protection circuit, a temperature detection circuit, an FO delay circuit, an error reporting circuit, an enabling circuit, and an over-temperature protection circuit.
[0012] Optionally, the side of the heat dissipation substrate opposite to the side where the electronic components are installed is provided with textures formed by laser etching or grinding.
[0013] Optionally, the insulating layer is made of a resin material, and the resin material is internally filled with fillers of aluminum oxide and aluminum carbide.
[0014] The semiconductor circuit of the present invention includes a heat dissipation substrate, an insulating layer, a circuit layer, and a plurality of electronic components. The plurality of electronic components include a PFC driving chip, a rectifier circuit, a PFC switching transistor, a freewheeling diode, and a fast recovery diode. Among them, the circuit layer is divided into a high-voltage area and a low-voltage area. The PFC driving chip is arranged in the low-voltage area, and the rectifier circuit, the PFC switching transistor, and the fast recovery diode are arranged in the high-voltage area. By independently arranging the PFC circuit in the module of the semiconductor circuit and dividing the circuit layer into a high-voltage area and a low-voltage area, the two are independently separated, thereby effectively reducing the interference of the high-voltage area on the low-voltage area, and various protection functions for the PFC circuit can be independently set, thereby effectively reducing the occupied volume of the PFC circuit and enhancing its working reliability. Description of the Drawings
[0015] Figure 1 It is a simplified circuit principle diagram of the semiconductor circuit according to the embodiment of the present invention;
[0016] Figure 2 It is a block diagram of the PFC driving chip according to the embodiment of the present invention;
[0017] Figure 3Electrical connection diagram of the circuit wiring layer and electronic components of the semiconductor circuit according to an embodiment of the present invention;
[0018] Figure 4 Schematic diagram of the package size of the semiconductor circuit according to an embodiment of the present invention;
[0019] Figure 5 Front view of the semiconductor circuit according to an embodiment of the present invention;
[0020] Figure 6 is Figure 5 Cross-sectional view in the X-X direction in
[0021] Figure 7 Schematic diagram before pin installation of the semiconductor circuit of the present invention.
[0022] Reference numerals:
[0023] PFC drive chip 001, pin 002, reinforcing rib 0021, bonding wire 003, sealing layer 004, circuit wiring layer 005, ground copper foil area 0051, first commutator copper foil area 0052, second commutator copper foil area 0053, third commutator copper foil area 0054, first switch tube copper foil sub-area 0055, second switch tube copper foil sub-area 0056, heat dissipation substrate 006, electronic component 007, insulating layer 008. Detailed implementation manners
[0024] It should be noted that, without conflict in structure or function, the embodiments in the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to examples.
[0025] The present invention provides a semiconductor circuit. As Figures 1 to 5 shown, the semiconductor circuit includes a heat dissipation substrate 006, an insulating layer 008, a circuit layer and a plurality of electronic components 007. The plurality of electronic components 007 include a PFC drive chip 001, a rectifier circuit, a PFC switch tube, a freewheeling diode and a fast recovery diode. The circuit layer is divided into a strong electricity area and a weak electricity area. The PFC drive chip 001 is arranged in the weak electricity area, and the rectifier circuit, the PFC switch tube and the fast recovery diode are arranged in the strong electricity area. The PFC switch tube, the freewheeling diode and the fast recovery diode form a PFC switch tube circuit. The first diode D1 to the fourth diode D4 form a rectifier circuit. As Figure 1 shown, the PFC switch tube is the first IGBT tube IGBT1, the freewheeling diode is the fifth freewheeling diode D5, the fast recovery diode is the sixth fast recovery diode D6, and the first diode D1 to the fourth diode D4 form a rectifier circuit.
[0026] Different from the PFC circuit composed of discrete components in the prior art or the IPM module integrating the PFC circuit and the inverter circuit, the module of the semiconductor circuit of the present invention only separately sets the PFC-related circuit inside, mainly including three major parts: a rectifier circuit, a PFC drive chip 001, and a PFC switch circuit. Among them, the PFC drive chip 001 operates at low-voltage weak electricity, such as a voltage within 12V, while the rectifier circuit and the PFC switch circuit operate in the strong electricity area, such as AC 220V and DC 300V. Then, large external discrete components of the semiconductor circuit, including a storage inductor, and a large-capacity filter circuit together form a complete PFC circuit. By independently setting the PFC circuit in the module of the semiconductor circuit and dividing the circuit layer into a strong electricity area and a weak electricity area, the two are independently distinguished, thereby effectively reducing the interference of the strong electricity area on the weak electricity area, and various protection functions for the PFC circuit can be independently set, thereby effectively reducing the occupied volume of the PFC circuit and enhancing its working reliability.
[0027] In some embodiments of the present invention, such as Figures 1 to 4As shown, on both sides of the semiconductor circuit, there are also a high-power pin group 0023 and a low-power pin group 0022. The high-power pin group 0023 and the low-power pin group 0022 are respectively close to and electrically connected to the high-power area and the low-power area. Among them, the high-power pin group 0023 is mainly connected to the PFC switch tube circuit and the rectifier circuit, and the low-power pin group 0022 is mainly connected to the PFC drive chip 001. The specific ports set on both sides of the semiconductor circuit include: the cathode of the sixth fast-recovery diode D6 serves as the VCC port for the high-voltage output of the PFC circuit, the common connection port of the cathode of the fifth freewheeling diode D5, the collector of the first IGBT, and the anode of the sixth fast-recovery diode D6 serves as the PFCL port for the high-voltage input of the PFC circuit, the common connection port of the emitter of the first IGBT and the anode of the fifth freewheeling diode D5 serves as the ground port VSS of the PFC circuit, the cathode of the first diode D1 is connected to the anode of the second diode D2 as the ACS port for one AC input of the module, the anode of the third diode D3 is connected to the cathode of the fourth diode D4 as the ACR port for the other AC input of the module, the anode of the first diode D1 is connected to the anode of the fourth diode D4 as the DBN port for the rectifier negative input of the module, the cathode of the second diode D2 is connected to the cathode of the third diode D3 as the DBP port for the rectifier positive output of the module. All the connections to these ports are the high-power pin group 0023. In addition, VDD, GND, PFCIN, RCIN, FLY\EN, PFCTRIP, TH are respectively connected to the PFC drive chip 001, and all the connections to these ports are the low-power pin group 0022. The high-power pin group 0023 and the low-power pin group 0022 are respectively arranged on both sides of the semiconductor circuit, so that when the semiconductor circuit is applied to a specific control circuit, it is convenient for PCB wiring, enabling the high-power area wiring and the low-power area wiring of the corresponding PFC circuit to be respectively located on both sides of the semiconductor circuit, thereby achieving a certain distance of isolation and reducing interference with each other. Specifically, to ensure a safe creepage distance, the distance between the pins 002 in the high-power pin group 0023 is 4 - 8 mm, such as Figure 4 the 6 mm in
[0028] In some embodiments of the present invention, such as Figure 3As shown, a floor copper foil area 0051 is provided in the weak current area. The driving chip is disposed in the floor copper foil area 0051, and the grounding end of the driving chip is electrically connected to the floor copper foil area 0051. The area of the floor copper foil area 0051 is relatively larger than the area of the driving chip, and the area of the floor copper foil area 0051 is at least 30% larger than the area of the driving chip. The bottom surface of the driving chip is provided with a grounding end, so as to be dot-connected to the larger-area floor copper foil area 0051. By setting the larger-area floor copper foil area 0051, the interference of the circuit in the adjacent strong current area can be effectively reduced, and the working reliability can be improved. Further, a plurality of bonding areas are provided on the surface of the driving chip, and are respectively connected to the TH, PFCTRIP, FLY\EN, RCIN, PFCIN, and VDD pins 002 arranged in sequence through bonding wires 003. And the floor copper foil area 0051 is provided with a protrusion between the PFCIN pin and the VDD pin to directly connect the GND pin between the PFCIN pin and the VDD pin.
[0029] In some embodiments of the present invention, as Figure 3 shown, a rectifying copper foil area and a switching transistor copper foil area are sequentially provided in the strong current area. The strong current pin group 0023 includes a rectifying input / output pin group and a PFC switching pin group. The rectifying input / output pin group is disposed close to and electrically connected to the rectifying copper foil area, and the PFC switching pin group is disposed close to and electrically connected to the switching transistor copper foil area.
[0030] Specifically, the rectifying copper foil area includes three rectifying sub-copper foil areas, and the first to third rectifying sub-copper foil areas 0054 are sequentially arranged from left to right. The first rectifying sub-copper foil area 0052 is disposed and connected to the anode of the third diode D3. The second rectifying sub-copper foil area 0053 is disposed and connected to the cathode of the second diode D2. The third rectifying sub-copper foil area 0054 is disposed and connected to the anodes of the first diode D1 and the fourth diode D4. And bonding wires are connected between the first to third rectifying sub-copper foil areas 0054 to form a full-bridge rectifying circuit. The ACR pin, the DBP pin, the ACS pin, and the DBN pin are respectively arranged from left to right. Among them, the ACR pin is connected to the first rectifying sub-copper foil area 0052. The DBP pin is connected to the anode of the second diode D2 through a bonding wire. The ACS pin is connected to the anode of the first diode D1 through a bonding wire. The DBN pin is connected to the third copper foil area, that is, commonly connected to the anodes of the first diode D1 and the fourth diode D4. Through such a setting, the connection of the bonding wires can be minimized, and the circuit arrangement of the rectifying circuit can be made simple.
[0031] Specifically, the switch tube copper foil area includes a first switch tube copper foil sub-area 0055 and a second switch tube copper foil sub-area 0056. A blank is provided in the middle of the first switch tube copper foil sub-area 0055 to set the second switch tube copper foil sub-area 0056. The first switch tube copper foil sub-area 0055 is provided with a PFC switch tube and a sixth fast recovery diode D6, and the second switch tube copper foil sub-area 0056 is provided with a fifth freewheeling diode D5. Among them, a blank is left in the middle area of the first switch tube copper foil sub-area 0055 to accommodate the second switch tube copper foil sub-area 0056. The area of the second switch tube copper foil sub-area 0056 is relatively small, and the fifth freewheeling diode D5 is set on it. Its power is relatively lower than that of the PFC switch tube and the sixth fast recovery diode D6. Therefore, the packaging volume of the fifth freewheeling diode D5 is relatively small, and the corresponding copper foil is also smaller, such as Figure 3 in which the packaging volume of the fifth freewheeling diode D5 is less than half of the packaging volume of the sixth fast recovery diode D6. A protrusion is provided on the side of the middle of the first switch tube copper foil sub-area 0055 close to the semiconductor circuit package. The collector at the bottom of the PFC switch tube, that is, the first IGBT, and the anode at the bottom of the sixth fast recovery diode D6 are connected to the first switch tube copper foil sub-area 0055, and are connected to this protrusion to form the PFCL port of the high-voltage input of the PFC circuit. This port is directly connected to the PFCL pin, and the ground pin VSS provided on the left side of the PFCL pin is connected to the emitter on the surface of the first IGBT through the bonding wire 003. The pin VCC provided on the right side of the PFCL pin is connected to the cathode on the surface of the sixth fast recovery diode D6 through the bonding wire 003. The anode at the bottom of the fifth freewheeling diode D5 is connected to the second switch tube copper foil sub-area 0056, and the cathode on the surface at the bottom of the fifth freewheeling diode D5 is connected to the PFCL pin through the bonding wire 003. The gate on the surface of the first IGBT is connected to a bonding area on the surface of the drive chip, that is, the drive signal output end, through the bonding wire 003, so as to realize the electrical connection with the drive chip.
[0032] By setting the copper foil areas of the weak electricity area and the strong electricity area in the semiconductor circuit through the above embodiments, and setting the corresponding electronic components 007 on the copper foil areas, the circuits of the strong electricity area and the weak electricity area are effectively and independently separated, and the connection between the pins 002 of the strong electricity area and the weak electricity area and the electronic components 007 and the copper foil areas is simple. Moreover, the pins on the strong electricity side and the pins on the weak electricity side are completely separated due to the settings of the strong electricity area and the weak electricity area. Therefore, when the semiconductor circuit is applied to the control circuit board to form a complete PFC circuit, the strong and weak electricity PCB traces on the circuit board can be separated, effectively improving the anti-interference ability of the PFC. Compared with the PFC circuit of discrete components, due to the small packaging size of the semiconductor circuit, such as it can be (20±0.2)*(38±0.2) square millimeters, it can effectively reduce the wiring area of the PFC circuit and meet the demand for miniaturization of the electronic control.
[0033] In some embodiments of the present invention, as Figure 2 shown, the PFC driver chip 001 internally includes modules such as a power supply circuit, a power supply undervoltage protection circuit, a PFC overcurrent protection circuit, a temperature detection circuit, an FO delay circuit, an error reporting circuit, an enable circuit, and an overtemperature protection circuit. The power supply circuit includes a 5V LDO circuit and a 1.2V BANDGAP circuit, which supply 5V voltage to all internal circuits and external circuits of the PFC driver chip 001, and at the same time provide a stable 1.2V voltage reference for the PFC driver chip 001 and external circuits; the power supply circuit is connected to the power supply undervoltage protection circuit to implement the power supply undervoltage protection function; the enable circuit implements the enable function; the overcurrent protection circuit implements the overcurrent protection function; the overvoltage protection circuit implements the overvoltage protection function; the overtemperature protection circuit implements the overtemperature protection function; when there are situations such as undervoltage, overcurrent, overvoltage, and overtemperature inside the error reporting circuit, it outputs an error reporting signal externally.
[0034] In some embodiments of the present invention, as Figures 5 to 7 shown, the semiconductor circuit includes a heat dissipation substrate 006, a circuit wiring layer 005, a plurality of electronic components 007, a plurality of pins 002, and a sealing layer 004. The heat dissipation substrate 006 is made of a metal material, which includes an installation surface on the upper side and a heat dissipation surface on the lower side, and specifically may be a rectangular plate made of aluminum with materials such as 1100 and 5052. The surface of the heat dissipation surface can be formed with textures by means such as laser etching and polishing, so that the heat dissipation substrate 006 is tightly combined with the sealing layer 004. The insulating layer 008 is provided on the installation surface of the heat dissipation substrate 006. The insulating layer 008 can be made of resin materials such as epoxy resin, and fillers such as alumina and aluminum carbide are filled inside the resin material to improve the thermal conductivity. In order to improve the thermal conductivity, the shape of these fillers can be angular. In order to avoid the risk of damaging the contact surface of the electronic components 007 provided on its surface, the fillers can be spherical, angular, or a hybrid of angular and spherical. A copper foil is provided on the insulating layer 008, and the copper foil is etched to form the circuit wiring layer 005. Solder paste is applied at specific positions of the circuit wiring layer 005, such as Figure 3Apply solder paste to the positions where electronic components such as the PFC drive chip 001, PFC switching transistor, freewheeling diode, and fast recovery diode 007 are installed in the [device], as well as to the positions of the mounting pins. Form the copper material into an appropriate shape and perform surface plating treatment to obtain multiple pins 002. To prevent electrostatic damage to the electronic components 007 during subsequent processing steps, specific positions of the pins 002 are connected by reinforcing ribs 0021. The electronic components 007 and the pins 002 are soldered to the circuit wiring layer 005 using solder paste. The sealing layer 004 can be formed of resin and molded using a thermosetting resin by transfer molding, or can be molded using a thermoplastic resin by injection molding. The sealing layer 004 has two encapsulation structures. One is that the sealing layer 004 covers the upper and lower surfaces of the heat dissipation substrate 006, covers the electronic components 007 disposed on the heat dissipation substrate 006, and also covers one end of the pins 002 disposed on the heat dissipation substrate 006, which is a full-coverage method of the sealing layer 004. In another encapsulation method, the sealing layer 004 covers the upper surface of the heat dissipation substrate 006, that is, covers the heat dissipation substrate 006, the electronic components 007, and the pins 002 disposed at one end of the heat dissipation substrate 006, and the lower surface of the heat dissipation substrate 006, i.e., the heat dissipation surface, is exposed from the sealing layer 004, thereby forming a semi-coverage method of the sealing layer 004. Figure 5 The figure shows the full-coverage method of the sealing layer 004. Bonding wires 003 are also connected between the electronic components 007, the circuit layer, and the pins 002. The bonding wires 003 are usually gold wires, copper wires, gold-copper alloy wires, or fine aluminum wires with a diameter of 38 μm or less. At least one bonding pad is provided on the surface of the electronic components 007 such as the first IGBT or the PFC drive chip 001, and the bonding wires 003 are connected to these bonding pads by soldering. Specifically, the bonding wires 003 can connect between electronic components 007, between an electronic component 007 and the circuit layer, between an electronic component 007 and the pins 002, etc., thereby forming the circuit connection of the entire semiconductor circuit.
[0035] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0036] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present invention.
[0037] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.
[0038] In the present invention, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0039] In the present invention, unless otherwise clearly specified and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.
[0040] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as a limitation on the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A semiconductor circuit, characterized in that, the semiconductor circuit includes a heat dissipation substrate, an insulating layer, a circuit layer, and a plurality of electronic components. The plurality of electronic components include a PFC driving chip, a rectifying circuit, a PFC switching transistor, a freewheeling diode, and a fast recovery diode. Wherein the circuit layer is divided into a strong electricity area and a weak electricity area. The PFC driving chip is disposed in the weak electricity area, and the rectifying circuit, the PFC switching transistor, and the fast recovery diode are disposed in the strong electricity area; on both sides of the semiconductor circuit, a strong electricity pin group and a weak electricity pin group are further disposed. The strong electricity pin group and the weak electricity pin group are respectively close to and electrically connected to the strong electricity area and the weak electricity area; a ground copper foil area is disposed in the weak electricity area. The driving chip is disposed in the ground copper foil area, and the grounding end of the driving chip is electrically connected to the ground copper foil area. Wherein the area of the ground copper foil area is relatively larger than the area of the driving chip, and the area of the ground copper foil area is more than 30% larger than the area of the driving chip; a rectifying copper foil area and a switching transistor copper foil area are sequentially disposed in the strong electricity area. The strong electricity pin group includes a rectifying input / output pin group and a PFC switching pin group. The rectifying input / output pin group is disposed close to and electrically connected to the rectifying copper foil area, and the PFC switching pin group is disposed close to and electrically connected to the switching transistor copper foil area; the switching transistor copper foil area includes a first switching transistor copper foil sub-area and a second switching transistor copper foil sub-area. A blank is provided in the middle of the first switching transistor copper foil sub-area to accommodate the second switching transistor copper foil sub-area. The first switching transistor copper foil sub-area is provided with a PFC switching transistor and a fast recovery diode, and the second switching transistor copper foil sub-area is provided with a freewheeling diode. The power of the freewheeling diode is lower than the power of the PFC switching transistor and the fast recovery diode. A protrusion is provided on the side of the middle of the first switching transistor copper foil sub-area close to the semiconductor circuit package. Based on this protrusion, a PFCL port for high-voltage input of the PFC circuit is formed, and the PFCL port is directly connected to a PFCL pin.
2. The semiconductor circuit according to claim 1, characterized in that, the rectifying copper foil area is sequentially provided with first, second, and third rectifying sub-copper foil areas from left to right. The first rectifying sub-copper foil area is provided and connected to the anode of the third diode. The second rectifying sub-copper foil area is provided and connected to the cathode of the second diode. The third rectifying sub-copper foil area is provided and connected to the anodes of the first diode and the fourth diode. And bonding wires are connected between the first, second, and third rectifying sub-copper foil areas to form a full-bridge rectifying circuit.
3. The semiconductor circuit according to claim 1, characterized in that, the distance between the pins of the strong electricity pin group is 4-8 mm.
4. The semiconductor circuit according to claim 1, characterized in that, the PFC driving chip internally is provided with a power supply circuit, a power supply undervoltage protection circuit, a PFC overcurrent protection circuit, a temperature detection circuit, an FO delay circuit, an error reporting circuit, an enabling circuit, and an over-temperature protection circuit.
5. The semiconductor circuit according to claim 1, characterized in that, On one side of the heat dissipation substrate opposite to the mounted electronic component, there are textures formed by laser etching or polishing.
6. The semiconductor circuit according to claim 1, characterized in that the insulating layer is made of a resin material, and the resin material is filled with fillers of aluminum oxide and aluminum carbide.
Citation Information
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Semiconductor circuit and device therefor
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