Array substrate and display panel

Abstract

The present application belongs to the field of display technology, and provides an array substrate and a display panel, wherein the array substrate comprises a first substrate and a first metal layer, wherein the first metal layer is arranged on the first substrate, and the first metal layer comprises a metal pad, which is a solid structure, and a first spacer is arranged on the metal pad, and the orthographic projection area of ​​the first spacer is smaller than the orthographic projection area of ​​the metal pad; the display panel comprises an array substrate and a color filter substrate, and the color filter substrate is laminated and bonded to the array substrate. The array substrate provided by the present application adopts a metal pad with a solid structure to cooperate with the first spacer, and by arranging the first spacer on a metal pad with a larger orthographic projection area, the boundary of the first spacer can be easily and accurately found when measuring the spacer overlay error, thereby solving the technical problem that the traditional spacer overlay error measurement method has a high error rate when applied to POA design, and is conducive to improving the accuracy of the spacer overlay error measurement in POA design.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and more specifically, relates to an array substrate and a display panel. Background Art

[0002] Currently, after the display panel is manufactured, it is necessary to perform overlay measurement on the post spacer (PS) to determine the size and offset of the post spacer by measuring the size and position of the post spacer's orthographic projection.

[0003] The traditional spacer overlay error measurement method is designed based on the spacer being set on the color filter substrate, that is, the columnar spacer is set on the color filter substrate and is located in the middle of the U-shaped frame formed by the black matrix (Black Matrix, BM for short), and then the positive projection images of multiple test marks are obtained. Although the black matrix, the spacer and the gap between the black matrix and the spacer are all dark in the image, due to the different dark grayscales, the boundary of the spacer can be found by adjusting the illumination parameters, so as to measure the size and offset of the spacer. However, most of the display panels currently adopt the POA (PS on Array, the spacer is set on the array substrate) design, that is, the spacer is set on the array substrate and is located in the middle of the U-shaped frame formed by the first metal (M1). The strong reflection of the first metal will cause the spacer and the dark color of the gap between the spacer and the first metal to be indistinguishable. Even if the illumination parameters are adjusted, it is difficult to accurately find the boundary of the spacer, resulting in a high error rate in the spacer overlay error measurement. Summary of the invention

[0004] The purpose of the present application is to provide an array substrate and a display panel, which include but are not limited to solving the technical problem that the traditional spacer overlay error measurement method has a high error rate when applied to POA design.

[0005] The present application is implemented in this way. An array substrate is provided, including a first substrate and a first metal layer. The first metal layer is arranged on the first substrate. The first metal layer includes a metal pad. The metal pad is a solid structure. A first spacer is arranged on the metal pad. The orthographic projection area of ​​the first spacer is smaller than the orthographic projection area of ​​the metal pad.

[0006] The array substrate uses a solid metal pad in conjunction with a first spacer. By setting the first spacer on a metal pad with a larger orthographic projection area, the boundary of the first spacer can be easily and accurately found when measuring the spacer overlay error, thereby effectively solving the technical problem of high error rate in traditional spacer overlay error measurement methods applied to POA design, which is beneficial to improving the accuracy of spacer overlay error measurement in POA design.

[0007] In one embodiment, the array substrate further includes multiple display areas, non-display areas and a second spacer, the non-display area is arranged around the multiple display areas, the second spacer is located in the display area, and the first spacer and the metal pad are located in the non-display area.

[0008] This helps to quickly and accurately find the first spacer boundary on the grayscale distribution map, making the spacer overlay error measurement easier and more accurate.

[0009] In one embodiment, the first metal layer includes a plurality of metal pads, and the plurality of metal pads are arranged at intervals along the edge of the first substrate and surround the periphery of the plurality of display areas.

[0010] This helps to quickly find the metal pad and the first spacer used as detection marks, making the measurement of the spacer overlay error easier and more accurate.

[0011] In one embodiment, the array substrate further includes a display area, a non-display area, a virtual pixel area and a second spacer, the non-display area is arranged around the display area, the virtual pixel area is arranged between the display area and the non-display area, the second spacer is located in the display area, and the first spacer and the metal pad are located in the virtual pixel area.

[0012] This is helpful to quickly find the metal pad and the first spacer used as the detection mark, making the measurement of the spacer overlay error easier and more accurate.

[0013] In one embodiment, the array substrate also includes a first color resist layer, which is located in the display area and the virtual pixel area and is disposed on the first metal layer. A first through hole is opened on the first color resist layer, and the position of the first through hole corresponds to the position of the metal pad, and the opening area of ​​the first through hole is larger than the orthographic projection area of ​​the first spacer.

[0014] Therefore, by avoiding the metal pad through the first through hole, the first color resist layer can be prevented from blocking the metal pad, ensuring that the boundary of the first spacer can be accurately found on the grayscale distribution map.

[0015] In one embodiment, the array substrate also includes an insulating layer, an active layer, a second metal layer and a passivation layer, the insulating layer is arranged on the first substrate and covers the first metal layer, the active layer is arranged on the insulating layer, the second metal layer is arranged on the active layer, the passivation layer is arranged on the insulating layer and covers the active layer and the second metal layer, and the first color resist layer is arranged on the passivation layer; the first through hole passes through the insulating layer and the passivation layer; the position of the metal pad corresponds to the gap of the second metal layer, and the area of ​​the gap of the second metal layer is larger than the orthographic projection area of ​​the first spacer.

[0016] Therefore, by avoiding the metal pad through the first through hole, the first color resist layer can be prevented from blocking the metal pad, ensuring that the boundary of the first spacer can be accurately found on the grayscale distribution map.

[0017] In one embodiment, the array substrate further includes a planar layer, wherein the planar layer is disposed on the first substrate and covers the first metal layer, and the first spacer is disposed on the planar layer.

[0018] Thus, the planarization effect of the array substrate can be achieved, ensuring that the bottom surface of the first spacer is perpendicular to the orthographic projection direction thereof, so that the orthographic projection of the first spacer falls within the area covered by the metal pad.

[0019] The present application also provides a display panel, comprising a color filter substrate and the above-mentioned array substrate, wherein the color filter substrate and the array substrate are laminated and bonded.

[0020] The display panel adopts the above-mentioned array substrate. By setting the first spacer on a metal pad with a larger orthographic projection area, the boundary of the first spacer can be easily and accurately found when measuring the spacer overlay error, thereby effectively solving the technical problem of high error rate in traditional spacer overlay error measurement methods applied to POA design, which is beneficial to improving the accuracy of spacer overlay error measurement in POA design.

[0021] In one embodiment, the color filter substrate includes a second substrate and a black matrix, the black matrix is ​​arranged on the second substrate, the position of the first spacer corresponds to the gap of the black matrix, and the area of ​​the gap of the black matrix is ​​larger than the orthographic projection area of ​​the first spacer.

[0022] Therefore, the first spacer and at least a part of the metal pad can be avoided through the gaps in the black matrix, so that the images of the first spacer and the metal pad can be smoothly collected during the process of measuring the spacer overlay error.

[0023] In one embodiment, a second color resist layer is provided on the second substrate, the second color resist layer fills the gaps in the black matrix, and a second through hole is opened on the second color resist layer, the position of the second through hole corresponds to the position of the metal pad, and the opening area of ​​the second through hole is larger than the orthographic projection area of ​​the first spacer.

[0024] Therefore, by opening the second through hole in the second color resist layer, the first spacer and at least part of the metal pad can be avoided, so that the images of the first spacer and the metal pad can be smoothly collected during the spacer overlay error measurement process. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0026] Figure 1 A partial cross-sectional schematic diagram of a display panel provided in an embodiment of the present application;

[0027] Figure 2 This is a schematic diagram of an orthographic projection of a first spacer and a metal pad provided in an embodiment of the present application;

[0028] Figure 3 A schematic top view of an array substrate provided in one embodiment of the present application;

[0029] Figure 4 A schematic top view of an array substrate provided in another embodiment of the present application;

[0030] Figure 5 A partial cross-sectional schematic diagram of a display panel provided in another embodiment of the present application;

[0031] Figure 6 A partial top view of a first metal layer, a first spacer, and a first color resist layer or a second color resist layer provided in one embodiment of the present application.

[0032] Among them, the reference numerals in the figure are:

[0033] 1—display panel, 11—array substrate, 11-1—large board, 11-2—small board, 12—color film substrate, 110—first through hole, 111—first substrate, 112—first metal layer, 113—first spacer, 114—flat layer, 115—first color resist layer, 116—insulating layer, 117—active layer, 118—second metal layer, 119—passivation layer, 120—second through hole, 121—second substrate, 122—black matrix, 123—second color resist layer, 1121—metal line, 1122—metal pad, 1101—display area, 1102—non-display area, 1103—virtual pixel area. DETAILED DESCRIPTION

[0034] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0035] It should be noted that: when a component is referred to as being "fixed on" or "disposed on" another component, it may be directly on the other component or indirectly on the other component. When a component is referred to as being "connected to" another component, it may be directly or indirectly connected to the other component. The orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it cannot be understood as a limitation of this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances. The term "plurality" means two or more, unless otherwise clearly and specifically defined.

[0036] First embodiment:

[0037] See also Figure 1 and Figure 2 This embodiment provides an array substrate 11, which includes a first substrate 111, a first metal layer 112 and a first spacer 113, wherein the first metal layer 112 is arranged on the first substrate 111, and the first metal layer 112 includes a metal pad 1122, the metal pad 1122 is a solid structure, and a first spacer 113 is arranged on the metal pad 1122, and the orthographic projection area of ​​the first spacer 113 is smaller than the orthographic projection area of ​​the metal pad 1122.

[0038] Specifically, the first substrate 111 may be a glass substrate or a polyimide film, etc. The first metal layer 112 is manufactured on the surface of the first substrate 111 by deposition, photolithography and other processes. The first spacer 113 is arranged on the surface of the metal pad 1122 away from the first substrate 111, and the orthographic projection area of ​​the first spacer 113 is smaller than the orthographic projection area of ​​the metal pad 1122, so that when images of the first spacer 113 and the metal pad 1122 are taken along the direction of the orthographic projection to measure the spacer overlay error, the image of the metal pad 1122 appears bright due to the reflective characteristics of the metal, while the image of the first spacer 113 appears dark, which is conducive to accurately finding the boundary of the first spacer 113, so that by measuring the size and position of the orthographic projection of the first spacer 113, the size and offset of other first spacers 113 can be determined. It is understandable that the number of the first spacers 113 is inconsistent with the number of the metal pads 1122 . The number of the first spacers 113 is greater than the number of the metal pads 1122 . The metal pads 1122 are only disposed on the bottom side of the first spacers 113 serving as a test mark.

[0039] The array substrate 11 provided in the present application adopts a solid structure metal pad 1122 to cooperate with the first spacer 113. By setting the first spacer 113 on the metal pad 1122 with a larger orthographic projection area, the boundary of the first spacer 113 can be easily and accurately found when measuring the spacer overlay error, thereby effectively solving the technical problem of high error rate in the traditional spacer overlay error measurement method applied to POA design, which is beneficial to improving the accuracy of spacer overlay error measurement in POA design.

[0040] For further information, see Figure 1 In this embodiment, the array substrate 11 further includes a planar layer (PV) 114, which is disposed on the first substrate 111 and covers the first metal layer 112, and the first spacer 113 is disposed on the planar layer 114. That is, a layer of insulating material is coated on the first substrate provided with the first metal layer 112, so that the insulating material covers the first metal layer 112, and then the insulating material is heated and solidified to form the planar layer 114, and the first spacer 113 is disposed on the surface of the planar layer 114 away from the metal pad 1122, so that the planarization effect of the array substrate 11 can be achieved, and it is ensured that the bottom surface of the first spacer 113 is perpendicular to the orthographic projection direction thereof, so that the orthographic projection of the first spacer 113 falls within the area covered by the metal pad 1122.

[0041] Second embodiment:

[0042] See also Figure 3The array substrate provided in this embodiment is a large panel 11-1 (i.e., a full-size array substrate that has not been divided), which is basically the same as the array substrate 11 provided in the first embodiment, except that: the large panel 11-1 further includes a plurality of display areas 1101, a non-display area 1102, and a second spacer (not shown), the non-display area 1102 is arranged around the plurality of display areas 1101, the second spacer is located in the display area 1101, and the first spacer 113 and the metal pad 1122 are located in the non-display area 1102. Specifically, the plurality of display areas 1101 indicates that the large panel 11-1 can be divided into a plurality of small-size array substrates, each display area 1101 corresponds to a small-size array substrate, and in each display area 1101, reference can be made to Figure 5 In addition to the first metal layer 112 and the planar layer 114, an insulating layer 116, an active layer 117, a second metal layer 118 and a passivation layer 119 are disposed between the first metal layer 112 and the planar layer 114, and the first metal layer 112 further includes a metal line 1121 (see Figure 6 ), the metal wire 1121, the active layer 117 and the second metal layer 118 together constitute a pixel driving circuit; and the non-display area 1102 is used as a protection area of ​​the display area 1101 or a separation area between two adjacent display areas 1101, and does not have a display function, and thus the metal pad 1122 and the metal wire 1121 located in the non-display area 1102 do not need to be connected, but the metal pad 1122 and the metal wire 1121 are manufactured in the same process, thereby reducing the process and simplifying the production process of the large panel 11-1. Improve production efficiency; in this embodiment, the number of first spacers 113 and the number of metal pads 1122 correspond one to one, the structure of the first spacer 113 is consistent with the structure of the second spacer, and the first spacer 113 and the second spacer are manufactured in the same process, that is, the second spacer is arranged on the surface of the flat layer 114 away from the metal wire 1121. The difference between the two is that the second spacer plays a supporting role for supporting the array substrate and the color filter substrate, while the first spacer 113 is only used as a detection mark and does not play a supporting role.

[0043] In the actual detection process, the large panel 11-1 is first scanned by a camera to obtain a grayscale distribution diagram of the large panel 11-1 in the top view direction, and then at least two first spacers 113 and the corresponding metal pads 1122 are selected at the position of the grayscale distribution diagram corresponding to the non-display area 1102, and the size and coordinates of the first spacers 113 are obtained. Then, the coordinates of the first spacers 113 are compared with the standard coordinates to obtain the offset of the first spacers 113, and finally, the size and offset of the second spacers can be determined by measuring the size and position of the orthographic projection of the first spacers 113. It can be understood that the term "standard coordinates" in this application refers to the coordinates of the first spacers determined in the design stage of the array substrate.

[0044] Since the first spacer 113 and the metal pad 1122 are located in the non-display area 1102, the metal pad 1122 is not blocked by structural layers such as the insulating layer 116, the active layer 117, the second metal layer 118 and the passivation layer 119, which is conducive to quickly and accurately finding the boundary of the first spacer 113 on the grayscale distribution map, making the measurement of the spacer overlay error easier and more accurate.

[0045] Further, in this embodiment, the first metal layer 112 includes a plurality of metal pads 1122, and the plurality of metal pads 1122 are arranged at intervals along the edge of the first substrate 111 and surround the periphery of the plurality of display regions 1101. That is, the plurality of metal pads 1122 are arranged at intervals in the local region of the non-display region 1102 located at the edge of the first substrate 111, thereby facilitating rapid identification of the metal pads 1122 and the first spacer 113 as detection marks, making it easier and more accurate to measure the spacer overlay error.

[0046] Third embodiment:

[0047] See also Figure 4 The array substrate provided in this embodiment is a small board 11-2 (i.e., a small-sized array substrate divided from the large board 11-1 or produced according to the size required by the customer), which is basically the same as the array substrate 11 provided in the first embodiment, and also includes a display area 1101 and a non-display area 1102, and the non-display area 1102 is arranged around the display area 1101. The difference is that: the small board 11-2 also includes a virtual pixel area 1103 and a second spacer (not shown), wherein the virtual pixel area 1103 is arranged between the display area 1101 and the non-display area 1102, the second spacer is located in the display area 1101, and the first spacer 113 and the metal pad 1122 are located in the virtual pixel area 1103. Specifically, the virtual pixel area 1103 is redundant with the display area 1101, has pixel and display functions, and is used to avoid excessive etching of the first column or the first row of the display area 1101 during the etching process. Therefore, the structure of the virtual pixel area 1103 is basically the same as that of the display area 1101. The difference between the two is that a second spacer is provided in the display area 1101, and a metal pad 1122 and a first spacer 113 are provided in the virtual pixel area 1103. The second spacer plays a supporting role and is used to support the array substrate and the color filter substrate, while the first spacer 113 is only used as a detection mark and does not play a supporting role. In this embodiment, the number of first spacers 113 corresponds to the number of metal pads 1122, the structure of the first spacer 113 is consistent with the structure of the second spacer, and the first spacer 113 and the second spacer are manufactured in the same process, and the metal layer 112 also includes a metal line 1121 (see Figure 6), the metal line 1121 covers the display area 1101 and the virtual pixel area 1103, the metal pad 1122 is connected to the metal line 1121 located in the virtual pixel area 1103, and is manufactured in the same process as the metal line 1121.

[0048] During the actual detection process, the small board 11-2 is first scanned by a camera to obtain a grayscale distribution map of the small board 11-2 in the top view direction, and then at least two first spacers 113 and the corresponding metal pads 1122 are selected at the position of the virtual pixel area 1103 corresponding to the grayscale distribution map to obtain the size and coordinates of the first spacer 113. Then, the coordinates of the first spacer 113 are compared with the standard coordinates to obtain the offset of the first spacer 113. Finally, by measuring the size and position of the orthographic projection of the first spacer 113, the size and offset of the second spacer can be determined.

[0049] Since the first spacer 113 and the metal pad 1122 are located in the virtual pixel area 1103, and the virtual pixel area 1103 is surrounded by the display area 1101 and the non-display area 1102, the area position is relatively fixed, which is conducive to quickly finding the metal pad 1122 and the first spacer 113 as detection marks, making the spacer overlay error measurement easier and more accurate.

[0050] Furthermore, please combine Figure 5 In this embodiment, the small board 11-2 further includes a first color resist layer 115, which is located in the display area 1101 and the virtual pixel area 1103, and is disposed on the first metal layer 112. A first through hole 110 is provided on the first color resist layer 112, and the position of the first through hole 110 corresponds to the position of the metal pad 1122, and the opening area of ​​the first through hole 110 is larger than the orthographic projection area of ​​the first spacer 113. That is, the first color resist layer 115 covers the side of the first metal layer 112 away from the first substrate 111, and the first through hole 110 is provided at the position of the first color resist layer 115 corresponding to the metal pad 1122. By avoiding the metal pad 1122 through the first through hole 110, the first color resist layer 115 can avoid blocking the metal pad 1122, thereby ensuring that the boundary of the first spacer 113 can be accurately found on the grayscale distribution diagram.

[0051] Furthermore, please combine Figure 5In this embodiment, the small board 11-2 also includes an insulating layer 116, an active layer 117, a second metal layer 118 and a passivation layer 119, wherein the insulating layer 116 is arranged on the first substrate 111, and the insulating layer 116 covers the first metal layer 112, the active layer 117 is arranged on the insulating layer 116, the second metal layer 118 is arranged on the active layer 117, the passivation layer 119 is arranged on the insulating layer 116, and the passivation layer 119 covers the active layer 117 and the second metal layer 118; the first color resist layer 115 is arranged on the passivation layer 119; the first through hole 110 penetrates the insulating layer 118 and the passivation layer 119; the position of the metal pad 1122 corresponds to the gap of the second metal layer 118, and the area of ​​the gap of the second metal layer 118 is larger than the positive projection area of ​​the first spacer 113. Specifically, the insulating layer 116 is coated on the surface of the first substrate 111 provided with the first metal layer 11, the active layer 117 is formed on the surface of the insulating layer 116 away from the first substrate 111 by deposition, photolithography and other processes, the second metal layer 118 is formed on the surface of the insulating layer 116 provided with the active layer 117 by deposition, photolithography and other processes, the passivation layer 119 is coated on the surface of the insulating layer 116 provided with the active layer 117 and the second metal layer 118, and the first color resist layer 117 is formed on the surface of the insulating layer 116 provided with the active layer 117 and the second metal layer 118. The first through hole 110 is formed on the surface of the passivation layer 119 away from the insulating layer 116 by coating, photolithography and other processes. The first through hole 110 sequentially penetrates the first color resist layer 115, the passivation layer 119 and the insulating layer 118. The flat layer 114 covers the surface of the first color resist layer 115 away from the passivation layer 119, the hole wall of the first through hole 110 and the surface of the metal pad 1122 of the first metal layer 112. The first spacer 113 is arranged on the surface of the flat layer 114 away from the metal pad 1122. Thus, the first through hole 110 avoids the metal pad 1122, so that the first color resist layer 115 can avoid blocking the metal pad 1122, ensuring that the boundary of the first spacer 113 can be accurately found on the grayscale distribution map.

[0052] Fourth embodiment:

[0053] See also Figure 1 This embodiment provides a display panel 1, which includes a color filter substrate 12 and an array substrate 11 provided in the above embodiment, wherein the color filter substrate 12 and the array substrate 11 are laminated and bonded.

[0054] The display panel 1 provided in the present application adopts an array substrate 11. By setting the first spacer 113 on a metal pad 1122 with a larger orthographic projection area, the boundary of the first spacer 113 can be easily and accurately found when measuring the spacer overlay error, thereby effectively solving the technical problem of high error rate in the traditional spacer overlay error measurement method applied to POA design, which is beneficial to improving the accuracy of spacer overlay error measurement in POA design.

[0055] Further, in the present embodiment, the color filter substrate 12 includes a second substrate 121 and a black matrix 122, wherein the black matrix 122 is disposed on the second substrate 121, the position of the first spacer 113 of the array substrate 11 corresponds to the position of the gap of the black matrix 122, and the area at the gap of the black matrix 122 is larger than the area of ​​the orthographic projection of the first spacer 113. Specifically, on the second substrate 121, the orthographic projection of the first spacer 113 will fall into the middle of the gap of the black matrix 122, that is, the first spacer 113 and at least part of the metal pad 1122 can be avoided through the gap of the black matrix 122, so that the images of the first spacer 113 and the metal pad 1122 can be smoothly collected during the spacer overlay error measurement process.

[0056] Furthermore, please combine Figure 6 In this embodiment, a second color resist layer 123 is further provided on the second substrate 121, the second color resist layer 123 fills the gaps in the black matrix 122, and a second through hole 120 is provided on the second color resist layer 123, the position of the second through hole 120 corresponds to the position of the metal pad 1122, and the opening area of ​​the second through hole 120 is larger than the orthographic projection area of ​​the first spacer 113. Specifically, on the cross section of the second through hole 120, the orthographic projection of the first spacer 113 will fall into the middle of the second through hole 120; by providing the second through hole 120 on the second color resist layer 123, the first spacer 113 and at least part of the metal pad 1122 can be avoided, so that the images of the first spacer 113 and the metal pad 1122 can be smoothly collected during the spacer overlay error measurement process. It is understandable that when the second color resist layer 123 is disposed on the second substrate 121 , the array substrate 11 does not include the first color resist layer 115 , and only one of the first color resist layer 115 and the second color resist layer 123 exists on the display panel 1 .

[0057] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. An array substrate, comprising a first substrate and a first metal layer, wherein the first metal layer is disposed on the first substrate, characterized in that: The first metal layer includes a metal pad, which is a solid structure. A first spacer is arranged on the metal pad, and an orthographic projection area of ​​the first spacer is smaller than an orthographic projection area of ​​the metal pad. The array substrate also includes a display area, a non-display area, a virtual pixel area and a second spacer. The non-display area is arranged around the display area, and the virtual pixel area is arranged between the display area and the non-display area. The second spacer is located in the display area. The first spacer and the metal pad are located in the virtual pixel area. The first spacer is used for detecting marks, and the second spacer is used for supporting the array substrate. The color film substrate includes a second substrate and a black matrix, and the black matrix is ​​arranged on the second substrate. The position of the first spacer corresponds to the gap of the black matrix, and the area of ​​the gap of the black matrix is ​​larger than the orthographic projection area of ​​the first spacer.

2. The array substrate according to claim 1, characterized in that: The first metal layer includes a plurality of metal pads, which are arranged at intervals along the edge of the first substrate and surround the peripheries of the plurality of display areas.

3. The array substrate according to claim 2, characterized in that: The array substrate also includes a first color resist layer, which is located in the display area and the virtual pixel area and is disposed on the first metal layer. A first through hole is opened on the first color resist layer, and the position of the first through hole corresponds to the position of the metal pad, and the opening area of ​​the first through hole is larger than the orthographic projection area of ​​the first spacer.

4. The array substrate according to claim 3, characterized in that: The array substrate further comprises an insulating layer, an active layer, a second metal layer and a passivation layer, wherein the insulating layer is disposed on the first substrate and covers the first metal layer, the active layer is disposed on the insulating layer, the second metal layer is disposed on the active layer, the passivation layer is disposed on the insulating layer and covers the active layer and the second metal layer, and the first color resist layer is disposed on the passivation layer; The first through hole penetrates the insulating layer and the passivation layer; the position of the metal pad corresponds to the gap of the second metal layer, and the area of ​​the gap of the second metal layer is larger than the orthographic projection area of ​​the first spacer.

5. The array substrate according to any one of claims 1 to 4, characterized in that: The array substrate further includes a flat layer, which is disposed on the first substrate and covers the first metal layer, and the first spacer is disposed on the flat layer.

6. A display panel, characterized in that: It comprises a color filter substrate and the array substrate according to any one of claims 1 to 3, wherein the color filter substrate and the array substrate are laminated and bonded.

7. The display panel according to claim 6, wherein: A second color resist layer is provided on the second substrate, the second color resist layer fills the gaps in the black matrix, and a second through hole is opened on the second color resist layer, the position of the second through hole corresponds to the position of the metal pad, and the opening area of ​​the second through hole is larger than the orthographic projection area of ​​the first spacer.

Images