A system for fast access to remote storage devices based on FPGA

Abstract

A system for quickly accessing remote storage devices based on FPGA includes: a receiving module; an arbitration module; a storage module; wherein the receiving module is connected to the arbitration module and configured to encapsulate a data transmission task into a descriptor and send it to the arbitration module; the arbitration module is connected to the storage module and configured to send the data transmitted by the data transmission task corresponding to the descriptor to the storage module for storage according to the descriptor. The system for quickly accessing remote storage devices based on FPGA proposed by the present invention uses an active reverse device handshake protocol; register to descriptor logic; polling arbitration, and multi-channel output. It realizes efficient interaction with the host side, and data transmission does not need to occupy interrupt resources, and multiple storage devices can be linked to achieve storage load balancing; register configuration is used to transfer descriptor execution to improve hardware execution efficiency, and host requests can be processed in batches to improve the efficiency of system access to storage devices.

Description

Technical Field

[0001] The invention belongs to the field of computer storage, and in particular relates to a system for quickly accessing a remote storage device based on FPGA. Background Art

[0002] Since FPGA has the advantages of fast speed, high efficiency, flexibility, stability, and high integration, it is very necessary in hardware logic verification and design. For high-speed peripheral data transmission, an effective way is to bypass the CPU, directly access the memory, and directly transfer data blocks between the peripheral and the memory. This transmission is completed by external hardware without the intervention of the CPU. The CPU can read / write external storage through its port address to initialize or query the status of the fast access remote storage device. However, it is significantly different from the general interface circuit. The fast access remote storage device can obtain the control right of the system bus. When it obtains the control right of the system bus, it can provide a series of control signals to manipulate the data transmission between the peripheral and the memory like the CPU. That is, the fast access remote storage device has two working states: slave module state (or passive state): as an interface circuit, it is controlled by the CPU master module state (or active state): control the system bus. The way that the fast access remote storage device controls the data transmission of memory and peripherals is completely different from the way of the CPU. In FPGA and ASIC design, fast access to remote storage devices can be widely used in data transmission systems because it can save a lot of CPU interrupt resources and has a high transmission rate. At present, when remote devices are transmitting data, they mostly rely on the interaction between the CPUs at both ends, which requires frequent CPU interrupts. When moving data, the CPU needs to complete memory access and moving operations, which consumes a lot of bus resources for data transmission. The existing technology has the following defects: 1. Accessing remote storage requires a large number of CPU interrupt resources; 2. Most of the byte transmission is used, and data block transmission cannot be realized; 3. The transmission rate is low, and multiple storage devices cannot be accessed at the same time.

[0003] Therefore, there is an urgent need for a system for quickly accessing remote storage devices to complete the migration and remote transmission of memory block data without the need for the CPU to participate in the transmission. Summary of the invention

[0004] To solve the above problems, the present invention proposes a system for quickly accessing a remote storage device based on FPGA, comprising:

[0005] Receiver module;

[0006] Arbitration module;

[0007] Storage module;

[0008] Wherein, the receiving module is connected to the arbitration module and is configured to encapsulate the data transmission task into a descriptor and send it to the arbitration module;

[0009] The arbitration module is connected to the storage module and is configured to send the data transmitted by the data transmission task corresponding to the descriptor to the storage module for storage according to the descriptor.

[0010] In some embodiments of the present invention, the arbitration module includes an arbitrator and a plurality of handshake modules.

[0011] The arbitrator is configured to receive the descriptor of the receiving module and distribute the descriptor to the corresponding handshake module.

[0012] In some embodiments of the present invention, the storage module includes a plurality of storage channels and a plurality of storage devices, and the plurality of storage channels are connected to the plurality of storage devices in a one-to-one correspondence.

[0013] In some implementations of the present invention, the receiving module includes a configuration register module, and the configuration register module is configured to receive the data transmission task and parse and encapsulate the data transmission task into the descriptor.

[0014] In some embodiments of the present invention, the configuration register module is further configured to:

[0015] Acquire the data transmission task, and configure the descriptor control word of the descriptor according to a predetermined transmission specification;

[0016] Configuring a storage channel of the descriptor according to a source address and a destination address of the data transmission task;

[0017] Configuring the number of transmission bytes of the descriptor according to the data size of the data transmission task;

[0018] The source device and the destination device of the descriptor are configured according to the source address and the destination address of the data transmission task.

[0019] In some embodiments of the present invention, the arbitrator is further configured to:

[0020] Monitor the multiple handshake modules, and in response to the destination devices and / or storage channels in the descriptors in the multiple handshake modules being the same, and the multiple handshake modules initiating handshake requests with the host end, arbitrate the handshake requests of the multiple handshake modules and control the storage channels in the storage modules.

[0021] In some embodiments of the present invention, the arbitrator is further configured to:

[0022] Monitor the multiple handshake modules, and in response to the source device and the destination device in the descriptor in any of the handshake modules being in the storage module, arbitrate the use of the corresponding storage channels in the storage module by the multiple handshake modules other than the handshake module where the descriptor is located.

[0023] In some embodiments of the present invention, the storage module further includes a cache module, and the cache module is configured to cache data in the arbitration module and / or the storage module that cannot be stored in time.

[0024] In some embodiments of the present invention, the receiving module further includes a descriptor queue, and the descriptor queue is configured to receive and cache the descriptors encapsulated by the configuration register module.

[0025] In some implementations of the present invention, a plurality of handshake modules obtain data in the data transmission task from a data bus mounted on the system in a reverse handshake manner.

[0026] The present invention proposes a system for quickly accessing remote storage devices based on FPGA, through active reverse device handshake protocol; register to descriptor logic; polling arbitration, multi-channel output. It realizes efficient interaction with the host side, data transmission does not need to occupy interrupt resources, can link multiple storage devices, can realize storage device data interaction within the present invention, and realize storage load balancing; adopts register configuration to descriptor execution, improves hardware execution efficiency, can batch process host requests, and improves system access efficiency to storage devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A structural diagram of a system for quickly accessing a remote storage device based on FPGA provided by an embodiment of the present invention;

[0029] Figure 2 A data handshake schematic diagram of an embodiment of a system for quickly accessing a remote storage device based on FPGA provided by the present invention;

[0030] Figure 3 A data handshake schematic diagram of an embodiment of a system for quickly accessing a remote storage device based on FPGA provided by the present invention;

[0031] Figure 4 A data handshake diagram of an embodiment of a system for quickly accessing a remote storage device based on FPGA provided by the present invention. DETAILED DESCRIPTION

[0032] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the embodiments of the present invention are further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0033] like Figure 1 As shown, in order to solve the above problems, the present invention proposes a system for quickly accessing a remote storage device based on FPGA, comprising:

[0034] Receiving module 1;

[0035] Arbitration module 2;

[0036] Storage module 3;

[0037] Wherein, the receiving module 1 is connected to the arbitration module 2 and is configured to encapsulate the data transmission task into a descriptor and send it to the arbitration module 2;

[0038] The arbitration module 2 is connected to the storage module 3 and is configured to send the data transmitted by the data transmission task corresponding to the descriptor to the storage module 3 for storage according to the descriptor.

[0039] In this embodiment, if Figure 1 As shown, the present invention proposes a system for quickly accessing a remote storage device by programming an FPGA chip. In the present invention, the system proposed by the present invention is as follows Figure 1 As shown, it generally includes large modules, namely, receiving module 1, arbitration module 2 and storage module 3. Receiving module 1 is responsible for receiving the data transmission task of the data bus mounted by the system for quickly accessing remote storage devices proposed by the present invention (hereinafter referred to as the system), and parsing and encapsulating the data transmission task into a descriptor defined in the system provided by the present invention, and further sending the descriptor to arbitration module 2, which performs corresponding data processing operations according to the content of the descriptor. And the data in the data transmission task is sent to the storage module for storage. Or according to the content of the descriptor, the corresponding data is read from the storage module and sent to the data bus mounted by the system. The data bus mounted by the system of the present invention is not limited, and can be adapted according to the data transmission needs of different buses, such as PCIE bus and other computer high-speed buses.

[0040] In some embodiments of the present invention, the data bus also refers to the end device data bus: a data transmission bus of the end device, which is also accompanied by data interaction with the end device when a handshake requirement is generated.

[0041] In some embodiments of the present invention, the arbitration module includes an arbitrator and a plurality of handshake modules.

[0042] The arbitrator is configured to receive the descriptor of the receiving module and distribute the descriptor to the corresponding handshake module.

[0043] like Figure 1 As shown, the arbitration module 2 includes an arbitrator 6 and multiple handshake modules 7 . The arbitrator 6 is connected to the receiving module 1 , obtains the descriptor sent from the receiving module 1 , and sends the descriptor to the multiple handshake modules 7 .

[0044] In some embodiments of the present invention, the storage module includes a plurality of storage channels 8 and a plurality of storage devices 10, and the plurality of storage channels are connected to the plurality of storage devices in a one-to-one correspondence.

[0045] like Figure 1 As shown, in this embodiment, the storage module 3 includes multiple storage channels 8, each of which is independently connected to a storage device. The system implements management and data transmission of multiple external storage devices through multiple storage channels 8. Storage channel: A channel linked to a storage device, with AXI master-slave bus function, used to receive descriptors, parse descriptors, complete read and write interactions with storage devices, read data at a specified address, and transmit it to a specified address.

[0046] In some implementations of the present invention, the receiving module includes a configuration register module, and the configuration register module is configured to receive the data transmission task and parse and encapsulate the data transmission task into the descriptor.

[0047] In this embodiment, the receiving module 1 includes a configuration register module 4, which is connected to the data bus mounted by the system, receives a data transmission command from a master device mounted by the system, that is, a data transmission task, and parses and encapsulates the data transmission task, and encapsulates the data transmission task into a descriptor supported by the system. Specifically, taking the system mounted PCIE bus as an example, the configuration register module 4 communicates with the CPU, receives the data access control command issued by the CPU, and parses and encapsulates the command into the following structure:

[0048] Descriptor control word, storage channel, number of bytes transferred, source address, destination address; configuration for multiple consecutive transfers.

[0049] Among them, the descriptor control word is formulated according to the data transmission specification of the system provided by the present invention, the storage channel represents the storage channel 8 corresponding to the internal storage device through which the data is transmitted within the system of the present invention, the number of transmitted bytes represents the size of this data transmission task, the source address represents the source of the data transmitted this time, the destination address represents the data sending address of this data transmission task, and multiple consecutive transmissions indicate whether the task can be transmitted at breakpoints, that is, the data can be decomposed into multiple times to transmit to the destination address according to the busy situation of the task of this system.

[0050] In some embodiments of the present invention, the configuration register module is further configured to:

[0051] Acquire the data transmission task, and configure the descriptor control word of the descriptor according to a predetermined transmission specification;

[0052] Configuring a storage channel of the descriptor according to a source address and a destination address of the data transmission task;

[0053] Configuring the number of transmission bytes of the descriptor according to the data size of the data transmission task;

[0054] The source device and the destination device of the descriptor are configured according to the source address and the destination address of the data transmission task.

[0055] In this embodiment, the configuration register module 4 parses and encapsulates the received data task, that is, configures the descriptor control word used for data transmission in the subsequent module according to the transmission specification provided by the system of the present invention, and determines the storage channel 8 used for subsequent data transmission according to the source address and destination address of the data transmission task. Specifically, if it is a task to write data, the storage channel connected to the storage device is determined according to the destination write storage device. In the configuration register module 4, the storage channel is written into the descriptor of the data transmission task in the system of the present invention.

[0056] In addition, the descriptor also contains the number of bytes of data transferred to record the size of the data when it is transferred, including the overall data size and the block size when the data is transferred in block storage.

[0057] In addition, the source address and destination address of the data transfer task are added to the descriptor.

[0058] In some embodiments of the present invention, the arbitrator is further configured to:

[0059] Monitor the multiple handshake modules, and in response to the destination devices and / or storage channels in the descriptors in the multiple handshake modules being the same, and the multiple handshake modules initiating handshake requests with the host end, arbitrate the handshake requests of the multiple handshake modules and control the storage channels in the storage modules.

[0060] In this embodiment, after the arbitrator 6 is responsible for sending each descriptor to each handshake module 7, it is also necessary to monitor the data transmission tasks performed in each handshake module 7. If there are two handshake modules 7 using the same storage channel at the same time, and both handshake modules 7 obtain or send data from the data bus by handshake, the data needs to be stored in the corresponding storage device through the same storage channel, or the corresponding data is read from the same storage device and sent to the data bus. At this time, in order to prevent the two handshake modules 7 from using a storage channel at the same time and causing data transmission anomalies, the arbitrator 6 arbitrates the lagging multiple handshake modules 7 in sequence, and prohibits the multiple handshake modules 7 from interacting with the data bus by handshake. Only the first handshake module 7 is retained to transmit data with the data bus by handshake. At the same time, the corresponding storage channel 8 is controlled to receive only the data in the reserved handshake module 7.

[0061] In some embodiments of the present invention, the arbitrator is further configured to:

[0062] Monitor the multiple handshake modules, and in response to the source device and the destination device in the descriptor in any of the handshake modules being in the storage module, arbitrate the use of the corresponding storage channels in the storage module by the multiple handshake modules other than the handshake module where the descriptor is located.

[0063] In this embodiment, when the destination device and the source device in the descriptor are both storage devices connected to the storage module, it means that the data transmission is considered not to be controlled by other devices outside the system of the present invention, and the data transmission can be realized only through two or more storage channels in the system. At this time, the arbitrator 6 arbitrates the use of the storage channel by other handshake modules 7, and only retains the use of the storage channel by the handshake module where the descriptor is located.

[0064] In some embodiments of the present invention, the storage module further includes a cache module, and the cache module is configured to cache data in the arbitration module and / or the storage module that cannot be stored in time.

[0065] In this embodiment, the storage module 3 further includes a cache module 9, which is used to cache data obtained from the handshake module 7 or from the storage channel. The cache module 9 is composed of a cache BUFFER device to cache data obtained from the end device data bus according to the handshake protocol.

[0066] In some embodiments of the present invention, when the arbitrator in the arbitration module 2 arbitrates the handshake module, it can allow some handshake modules 7 to interact with the data bus through handshake according to the capacity of the cache module 9, but the data obtained by the handshake module 7 will not be transmitted through the storage channel 8 already used by other handshake modules 7, but will be cached in the cache module 9. Specifically, when the remaining space in the cache module 9 is more than 50%, the arbitrator determines the number of transmission bytes in the descriptor corresponding to the arbitrated handshake module. If the number of transmission bytes in the descriptor is less than 5% of the total capacity of the cache module, the corresponding handshake module 7 is operated to interact with the data bus through handshake to obtain the corresponding data, and cache it in the cache module 9.

[0067] In addition, in some embodiments of the present invention, when a handshake module 7 executes data transfer between multiple storage devices within a storage module, other handshake modules that are connected to the data bus and obtain data from the data bus can normally perform the handshake interaction process to obtain data from the data bus and cache it in the cache module 9.

[0068] In some embodiments of the present invention, the receiving module further includes a descriptor queue, and the descriptor queue is configured to receive and cache the descriptors encapsulated by the configuration register module.

[0069] In this embodiment, the receiving module 1 is further provided with a descriptor queue 5 for caching the descriptors generated by the configuration register module 4. The arbiter 6 can obtain the descriptors from the descriptor queue 5 and send them to the handshake module.

[0070] In some embodiments of the present invention, when a descriptor configuration parameter includes a configuration that can be transmitted multiple times continuously, the arbitrator 6 can flexibly interrupt the data transmission of the descriptor, that is, when the transmission load of the system provided by the present invention is fully loaded, other descriptors can be processed preferentially. Specifically, the descriptor is sent to the descriptor queue 5, and the data transmission task represented by the descriptor is transmitted and completed in multiple times.

[0071] In some implementations of the present invention, a plurality of handshake modules obtain data in the data transmission task from a data bus mounted on the system in a reverse handshake manner.

[0072] In this embodiment, in the present invention, the handshake module 7 does not receive data from the data bus but obtains corresponding data through a reverse handshake interaction method proposed by the present invention with the data bus and sends the data to the corresponding storage channel 8 through the cache module 9, and further transmits it to the storage device 10.

[0073] In this embodiment, the handshake module 7 obtains data through handshake with the data bus. Figure 2As shown, the system provided by the present invention generates a corresponding descriptor in the configuration register module, and after the handshake module obtains the descriptor for reading data from the data bus in the arbiter 6, the handshake module 7 in the system first initiates a cfg 1Read request to the data bus, and the data bus responds to Cfg 1CPL when conditions permit, and then the handshake module 7 initiates a Data Read request to the data bus, and then the data on the data bus is sent to the storage channel 8 corresponding to the descriptor and further sent to the storage device 10. After the data transmission on the data bus is completed, the data bus sends a CPLD response to the handshake module, indicating that the data transmission is completed, and the system stores the data in the storage device 10 through the corresponding storage channel. It should be noted that the source address and destination address in the descriptor not only refer to the corresponding storage device 10 but also include the corresponding data storage address.

[0074] In some embodiments of the present invention, the process of the handshake module 7 sending data to the data bus is as follows: Figure 3 As shown, specifically, after obtaining the corresponding descriptor, the handshake module 7 initiates a handshake request cfg1Read with the data bus according to the descriptor;

[0075] The data bus responds to Cfg 1CPL when conditions permit;

[0076] The system will read the data specified in the descriptor from the corresponding storage device 10 through the storage channel 8 and send it to the data bus or cache module 9. After all the data are sent to the data bus, the storage device 10 responds to the CPLD and sends it to the handshake module 7;

[0077] After receiving the CPLD, the system initiates a Data Write handshake request to the data bus;

[0078] After receiving Data Write, the data bus processes the relevant data and sends a response Wreqcmplt to the handshake module in the system. The handshake module 7 completes the data transmission to the data bus.

[0079] In some embodiments of the present invention, the handshake interaction process of data transmission between storage devices 10 is as follows: Figure 4 As shown, the system sends the corresponding Cfg 1Rread to the data bus through the handshake module 7;

[0080] Data bus response Cfg 1CPL;

[0081] The system transfers data between multiple storage devices 10 through multiple internal storage channels, namely, Dataexchange;

[0082] After the data transfer is completed, the CPLD response is returned to the storage device and the system;

[0083] After receiving the CPLD, the system sends EX CPL to the data bus through the handshake module 7;

[0084] The data bus responds to Exreq cmplt and the data transmission task is completed.

[0085] The present invention proposes a system for quickly accessing remote storage devices based on FPGA, through active reverse device handshake protocol; register to descriptor logic; polling arbitration, multi-channel output. It realizes efficient interaction with the host side, data transmission does not need to occupy interrupt resources, can link multiple storage devices, can realize storage device data interaction within the present invention, and realize storage load balancing; adopts register configuration to descriptor execution, improves hardware execution efficiency, can batch process host requests, and improves system access efficiency to storage devices.

[0086] In the system provided by the present invention, the transmission of the handshake module 7 and the data bus can be decoupled from the descriptor generated by the configuration register module 4, that is, the configuration register module 4 is only responsible for obtaining the corresponding data transmission task and generating the corresponding descriptor, and then the handshake module 7 is responsible for communicating with the data bus. As long as the arbitrator arbitration allows, the handshake module 7 can interact with the data bus by handshake initiated by the handshake module 7. And it is generated by FPGA programming, and the number of handshake modules and the number of configuration registers can be configured according to the pressure of the data transmission task, so as to realize flexible allocation, and the data transmission task originally executed by the main control chip can be executed in parallel by multiple handshake modules 7.

[0087] The above are exemplary embodiments disclosed in the present invention, but it should be noted that various changes and modifications may be made without departing from the scope disclosed in the embodiments of the present invention as defined in the claims. The functions, steps and / or actions of the method claims according to the disclosed embodiments described herein do not need to be performed in any particular order. In addition, although the elements disclosed in the embodiments of the present invention may be described or required in individual form, they may also be understood as multiple unless explicitly limited to the singular.

[0088] A person skilled in the art should understand that the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the disclosure of the embodiments of the present invention (including the claims) is limited to these examples; under the concept of the embodiments of the present invention, the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the embodiments of the present invention as described above, which are not provided in detail for the sake of simplicity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present invention should be included in the protection scope of the embodiments of the present invention.

Claims

1. A system for quickly accessing a remote storage device based on FPGA, characterized in that: include: Receiver module; Arbitration module; Storage module; Wherein, the receiving module is connected to the arbitration module and is configured to encapsulate the data transmission task into a descriptor and send it to the arbitration module; The arbitration module is connected to the storage module and is configured to send the data transmitted by the data transmission task corresponding to the descriptor to the storage module for storage according to the descriptor; Wherein, the arbitration module comprises an arbitrator and a plurality of handshake modules, wherein the arbitrator is configured to receive the descriptor of the receiving module and distribute the descriptor to the corresponding handshake module; The receiving module includes a configuration register module, and the configuration register module is configured to receive the data transmission task and parse the data transmission task and encapsulate it into the descriptor; The configuration register module is further configured to: obtain the data transmission task, configure the descriptor control word of the descriptor according to the predetermined transmission specification; configure the storage channel of the descriptor according to the source address and destination address of the data transmission task; configure the number of transmission bytes of the descriptor according to the data size of the data transmission task; configure the source device and destination device of the descriptor according to the source address and destination address of the data transmission task; The arbiter is further configured to: monitor the multiple handshake modules, and in response to the source device and the destination device in the descriptor in any of the handshake modules being in the storage module, arbitrate the use of the corresponding storage channels in the storage module by the multiple handshake modules other than the handshake module where the descriptor is located so as to retain only the use of the storage channel by the handshake module where the descriptor is located; The storage module also includes a cache module, which is configured to cache data in the arbitration module and / or the storage module that cannot be stored in time. When the arbitrator in the arbitration module arbitrates the handshake module, some handshake modules are allowed to interact with the data bus by handshake according to the available capacity of the cache module.

2. The system according to claim 1, characterized in that The storage module includes a plurality of storage channels and a plurality of storage devices, and the plurality of storage channels are connected to the plurality of storage devices in a one-to-one correspondence.

3. The system according to claim 1, characterized in that The arbitrator is further configured to: Monitor the multiple handshake modules, and in response to the destination devices and / or storage channels in the descriptors in the multiple handshake modules being the same, and the multiple handshake modules initiating handshake requests with the host end, arbitrate the handshake requests of the multiple handshake modules and control the storage channels in the storage modules.

4. The system according to claim 1, characterized in that The receiving module further includes a descriptor queue configured to receive and cache the descriptors encapsulated by the configuration register module.

5. The system according to claim 1, characterized in that The multiple handshake modules obtain the data in the data transmission task from the data bus mounted on the system in a reverse handshake manner.

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