Simulation method and system for printed circuit board pressing, forming, post-processing and reflow soldering

Abstract

The present invention provides a simulation method and system for press-molding-post-processing-reflow soldering of a printed circuit board. The method determines the partitioning scheme of each wiring layer according to the acquired PCB parameter data, identifies the circuit characteristic information of each partition, establishes a PCB three-dimensional geometric model with the partition identification information, configures the equivalent performance parameters calculated based on the characteristic information for each partition of the PCB three-dimensional geometric model, calls the PCB resin curing deformation module for solving, and obtains the press-molding simulation result; obtains the evolution data of the material performance according to the identified hole characteristic information of each partition; obtains the post-processing simulation result according to the press-molding simulation result and the evolution data of the material performance; obtains the reflow soldering simulation result according to the post-processing simulation result and the evolution data of the material performance; the present invention can fully reflect the temperature, displacement and stress conditions of the PCB in the entire preparation process from press-molding to reflow soldering, and has a short simulation cycle and strong versatility.

Description

Technical Field

[0001] The invention relates to the technical field of printed circuit board manufacturing, and in particular to a simulation method and system for press forming-post processing-reflow soldering of a printed circuit board. Background Art

[0002] The statements in this section merely provide background art related to the present invention and do not necessarily constitute prior art.

[0003] At present, with the increasing development of integrated circuit design and manufacturing level, the functions of printed circuit boards (PCBs) are increasingly enhanced, and the number of stacking layers is increasing, which puts forward higher requirements for the preparation process. After the PCB is pressed and formed and before the reflow soldering, it will also undergo a variety of processing processes, such as drilling, copper plating in the hole, copper plating on the surface and etching. During the pressing process of the PCB, the PCB is pressed by the upper and lower pressing plates and heated by the high temperature of the pressing plates. The uncured resin in the semi-cured sheet layer in the PCB gradually enters the viscous flow state as the temperature rises, filling the empty valley left after the copper foil etching in the PCB wiring layer. As the temperature further increases, these resins begin to undergo a curing reaction and produce a volume shrinkage effect. Since each layer of the PCB has its own function and wiring design, the distribution of the resin in the thickness direction and the in-plane direction of the PCB is asymmetric, which leads to the difference in the spatial distribution of the chemical shrinkage, and then causes the PCB to warp after the pressing is completed and the pressing plate is withdrawn. After that, after the PCB goes through the processes of drilling, copper plating in holes, copper plating on the surface and etching, the internal stress caused by chemical shrinkage will be released to a certain extent, and the warping deformation morphology and deformation degree will change. In addition, the asymmetric spatial distribution of the resin will also lead to the asymmetry of the thermal expansion degree of the PCB in space, which will cause further warping deformation of the PCB during the heating process of reflow soldering.

[0004] The flatness of PCB under high temperature reflow soldering is a direct factor affecting the quality of BGA soldering. Uneven PCB will cause pillow effect, bridging and other failures when reflow soldering with BGA chip. In the case of light, it needs to be repaired and reprocessed, and in the case of heavy, it directly leads to the damage of chip and the whole circuit. Optimizing the degree of warping deformation under this state is also the ultimate goal of enterprises. However, between pressing and reflow soldering, PCB needs to go through punching, copper plating in holes, surface etching and copper plating. The equivalent material properties of each partition of PCB will change to different degrees due to the number of holes, hole size and copper plating thickness. On the basis of punching, the upper and lower surfaces of PCB, which were originally homogeneous copper foil, are transformed into copper-resin mixed layers (similar to wiring layers) after etching and copper plating. This makes it difficult to establish a PCB geometric model that is truly consistent with the actual situation in the post-processing process. It is still necessary to establish equivalent material performance models of each layer and each zone by partitioning. According to analysis, the punching and surface etching processes will weaken the mechanical properties of some partitions, thereby breaking the mechanical equilibrium state formed after pressing, and changing the morphology and degree of warping deformation of the PCB; and in the process of copper plating in the hole and on the surface, the copper ions are deposited on the surface of the PCB in a mechanical equilibrium state. Although this process (conformity) does not destroy the existing mechanical balance of the PCB, it will increase the stiffness of the partition to a certain extent.

[0005] This problem has not received much attention in the past when the chip size was generally small, but as the chip size increases, it has gradually begun to attract the attention of relevant companies and researchers around the world. Especially under the current international blockade and pressure faced by the integrated circuit industry, larger chips have to be used to make up for the shortcomings of the chip manufacturing industry in terms of process. The PCB warping problem has become a problem that major PCB manufacturing and application companies in my country pay special attention to and urgently need to solve.

[0006] To deeply study the mechanism of PCB warping deformation or the impact of process and design improvements on yield rate, it is necessary to go through the complete process of pressing, post-processing, and reflow soldering, which takes a long time and is costly. For the optimization process of PCB process and design, it requires continuous attempts and repeated iterations. If each attempt and iteration requires a long cycle to get the final result, it will seriously restrict the design process of PCB. In addition, the shadow moiré test used to measure the warping deformation of PCB also requires a long cycle and high testing cost, and can only obtain the deformation of specific states such as after pressing and after punching, and cannot obtain the evolution of the deformation of PCB in these processes, and the stress-strain state of PCB is even more unknown. In this way, it is difficult to conduct in-depth research on its deformation mechanism based on only a limited number of deformation results, and it is also difficult to provide reasonable and well-founded feedback for the process of optimizing design. Summary of the invention

[0007] In order to clarify the warping deformation mechanism of PCB during the whole process of pressing and forming-post-processing and provide more comprehensive data feedback for the design and whole process optimization of PCB preparation, the present invention provides a simulation method and system for pressing and forming-post-processing-reflow soldering of printed circuit board, which can fully reflect the temperature, displacement and stress of PCB during the whole preparation process from pressing to reflow soldering, with short simulation cycle and strong versatility.

[0008] In order to achieve the above object, the present invention adopts the following technical solution:

[0009] A first aspect of the present invention provides a simulation method for press-molding-post-processing-reflow soldering of a printed circuit board.

[0010] A simulation method for press forming-post processing-reflow soldering of a printed circuit board includes the following processes:

[0011] Obtain parameter data of printed circuit board;

[0012] Determine the partitioning scheme of each wiring layer according to the acquired parameter data;

[0013] According to the partitioning scheme, the circuit characteristic information of each partition is identified, and a three-dimensional geometric model of the printed circuit board with the partition identification information is established;

[0014] Calculate the equivalent performance parameters of each partition according to the identified characteristic information, and configure the equivalent performance parameters calculated based on the characteristic information for each partition of the three-dimensional geometric model of the printed circuit board according to the partition identification information;

[0015] Configure the boundary conditions and loads for the simulation calculation of the pressing process, call the printed circuit board resin curing deformation module for solution, terminate the simulation calculation according to the moment when the pressing is completed in the pressing molding process, and obtain the pressing molding simulation result;

[0016] According to the partitioning scheme, the hole characteristic information of each layer and each area of ​​the printed circuit board is identified, and the evolution data of the material performance is obtained based on the hole characteristic information;

[0017] According to the simulation results of the press-forming process, combined with the evolution data of material properties, the boundary conditions and loads of the post-processing process are configured, and the solution is continued. The simulation calculation is terminated according to the moment when the processing in the post-processing process ends, and the post-processing simulation results are obtained;

[0018] According to the post-processing simulation results, combined with the evolution data of material properties, the boundary conditions and loads of the reflow process are configured, and the solution is continued. The simulation calculation is ended according to the moment when the reflow is finished in the reflow process to obtain the reflow simulation results.

[0019] Furthermore, the evolution of material properties is the change of material properties in each layer and area caused by drilling, copper plating in the hole, and surface etching-copper plating.

[0020] Furthermore, according to the evolution data of material properties, corresponding loads and boundary conditions are configured during the post-processing simulation of the printed circuit board, and at least the spatial distribution of temperature, displacement and stress of the printed circuit board during the post-processing is obtained.

[0021] Furthermore, according to the reflow process parameters, corresponding boundary conditions and calculation time are configured during the reflow analysis of the printed circuit board, the starting material performance parameters during the reflow simulation are obtained based on the evolution data of the material properties, and the heat transfer model is called to at least obtain the spatial distribution of temperature, displacement and stress of the printed circuit board during the reflow process.

[0022] Furthermore, the circuit characteristic information at least includes: copper volume fraction, resin volume fraction and copper wire orientation.

[0023] Furthermore, the pore characteristic information includes at least: pore quantity, pore size, pore volume fraction and pore depth.

[0024] Furthermore, the evolution data of material properties are obtained based on the hole feature information, including: obtaining the distribution of the stiffness of the surface layer after etching and copper plating through the wiring layer equivalent performance model, and combining microscopic finite element analysis and experiments to obtain the stiffness changes of each layer and area caused by the drilling and copper plating processes in the hole.

[0025] Furthermore, the characteristic information of each partition is identified, including:

[0026] Design the wiring Figure 2 Value conversion, with the first color pixel representing the copper foil and other color pixels representing the resin;

[0027] Output the proportion of first color pixels in each partition of each layer of wiring diagram and the direction of continuous lines composed of first color pixels, with the proportion of first color pixels as copper content and the direction of continuous lines composed of first color pixels as copper line direction;

[0028] The identified copper content and copper wire direction data are marked with the coordinate information of the partition center point and stored in the form of a data file.

[0029] Furthermore, a three-dimensional geometric model of a printed circuit board with partition identification information is established, including:

[0030] Establish the geometric model of each wiring layer in finite element software;

[0031] Then, each wiring layer is cut into equal sizes according to the partitioning scheme determined by batch processing to obtain a geometric model with partitions;

[0032] The coordinate position information of the center point of each partition is read to mark each partition with unique identification information, and the geometric models of each insulation layer are established according to the printed circuit board stacking plan and assembled with the wiring layer geometric model into a complete example printed circuit board geometric model according to the stacking plan.

[0033] Furthermore, the hole feature information of each layer and each area of ​​the printed circuit board is identified, including:

[0034] Design the wiring Figure 2 Value conversion, using the second color pixel to represent the hole, and other color pixels to represent the non-hole;

[0035] Output the ratio of the second color pixels in each partition in the aperture distribution map and the number of independent blocks consisting of consecutive second color pixels;

[0036] The ratio of the second color pixels is the pore content, and the number of independent blocks consisting of continuous second color pixels is the number of pores;

[0037] The identified pore content and pore quantity data are marked according to the partition coordinate position and stored in the form of a data file.

[0038] The second aspect of the present invention provides a simulation system for press-molding-post-processing-reflow soldering of a printed circuit board.

[0039] A simulation system for press forming, post-processing and reflow soldering of a printed circuit board, comprising:

[0040] The data acquisition module is configured to: acquire parameter data of the printed circuit board;

[0041] The partitioning module is configured to: determine a partitioning scheme for each wiring layer according to the acquired parameter data;

[0042] The model building module is configured to: identify circuit feature information of each partition according to the partition scheme, and establish a three-dimensional geometric model of the printed circuit board with the partition identification information;

[0043] The model parameter matching module is configured to: calculate the equivalent performance parameters of each partition according to the identified feature information, and configure the equivalent performance parameters calculated based on the feature information for each partition of the three-dimensional geometric model of the printed circuit board according to the partition identification information;

[0044] The pressing and forming simulation module is configured to: configure boundary conditions and loads for the pressing process simulation calculation, call the printed circuit board resin curing deformation module for solving, terminate the simulation calculation according to the moment when the pressing is completed in the pressing and forming process, and obtain the pressing and forming simulation result;

[0045] The material performance evolution data acquisition module is configured to: identify hole feature information of each layer and each area of ​​the printed circuit board according to the partitioning scheme, and obtain the material performance evolution data according to the hole feature information;

[0046] The post-processing simulation module is configured to: configure the boundary conditions and loads of the post-processing process according to the press-forming simulation results and the evolution data of the material properties, continue to solve, terminate the simulation calculation according to the moment when the processing is finished in the post-processing process, and obtain the post-processing simulation results;

[0047] The reflow soldering simulation module is configured as follows: according to the post-processing simulation results, combined with the evolution data of material properties, the boundary conditions and loads of the reflow soldering process are configured, and the solution is continued. The simulation calculation is ended according to the moment when the reflow soldering ends in the reflow soldering process to obtain the reflow soldering simulation results.

[0048] The third aspect of the present invention provides a computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the steps in the simulation method of printed circuit board pressing-forming-post-processing-reflow soldering as described in the first aspect of the present invention.

[0049] The fourth aspect of the present invention provides an electronic device, comprising a memory, a processor, and a program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps in the simulation method of printed circuit board pressing-forming-post-processing-reflow soldering as described in the first aspect of the present invention are implemented.

[0050] Compared with the prior art, the present invention has the following beneficial effects:

[0051] 1. The whole process modeling and analysis method of printed circuit board pressing, post-processing and reflow soldering proposed in the present invention is applicable to PCBs with any number of wiring layers, any size and any complexity. Through geometric partitioning, reasonable equivalence and reasonable evolution of material properties, it is ensured that the simulation analysis has the accuracy requirements that meet the needs of engineering applications.

[0052] 2. The simulation method proposed in the present invention can output the warping deformation state of the PCB under the condition of inheriting the entire processing history under the condition of high temperature reflow soldering, and can directly verify the influence of PCB wiring design, process design, etc. on the warping deformation of the PCB under the reflow soldering state.

[0053] 3. The method proposed in the present invention can output simulation result data of any process and any time, providing sufficient convenient conditions for the study of PCB manufacturing process.

[0054] Advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0056] Figure 1 A schematic flow chart of a simulation method for printed circuit board pressing-molding-post-processing-reflow soldering provided in Example 1 of the present invention.

[0057] Figure 2 This is a design diagram of eight wiring layers of a PCB provided in Example 1 of the present invention.

[0058] Figure 3 Schematic diagram of the geometric model of a multi-layer PCB with equal-size partitions provided in Example 1 of the present invention.

[0059] Figure 4 Schematic diagram of the displacement distribution in the thickness direction of the surface layer of the PCB after compression molding provided in Example 1 of the present invention.

[0060] Figure 5 A schematic diagram of the displacement distribution in the thickness direction of the surface layer of a PCB after reflow soldering provided in Example 1 of the present invention.

[0061] Figure 6 This is a design diagram of eight wiring layers of a PCB provided in Example 2 of the present invention.

[0062] Figure 7 A schematic diagram of partitioning by feature information provided in Example 2 of the present invention. DETAILED DESCRIPTION

[0063] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0064] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0065] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0066] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0067] Embodiment 1:

[0068] like Figure 1 As shown, embodiment 1 of the present invention provides a full-process modeling and analysis method for press-forming-post-processing-reflow soldering that can be applied to complex, large-size, multi-layer printed circuit boards. The press-forming, post-processing process and reflow soldering are fully simulated and analyzed by a full coupling or sequential coupling method. For the post-processing process, the reduction or enhancement of the partition stiffness is used to simulate the influence of the processing processes such as punching after press-forming, copper plating in the hole, surface etching and copper plating on the initial mechanical properties of reflow soldering.

[0069] For a specific PCB, first pre-process its design files to obtain the PCB geometry, stacking scheme, wiring design drawings of each wiring layer, and punching design drawings. Then determine the process parameters of each process step in the PCB manufacturing process, determine the partitioning scheme, and establish a PCB simulation analysis model. Then call the pressing process analysis module, post-processing process analysis module, and reflow process analysis module in sequence to carry out finite element simulation analysis of the entire PCB manufacturing process.

[0070] Specifically, the simulation analysis of the whole process of PCB pressing, forming, post-processing and reflow soldering based on the equal-size partitioning scheme includes the following processes:

[0071] This embodiment uses finite element software and intelligent scripts developed based on Python language to achieve PCB equal-size partition modeling and simulation analysis of the manufacturing process. This implementation method has the advantages of high efficiency and simple implementation. The disadvantages in simulation accuracy can also be effectively compensated by increasing the number of partitions. The specific implementation process is as follows:

[0072] S1.1: Output the wiring diagram of each layer of the sample PCB from the PCB design software as a sufficiently clear bitmap format (such as .jpg, .png, etc.) image file, such as Figure 2 shown.

[0073] S1.2: Obtain the process parameters such as temperature, pressure and time of each process stage of PCB pressing-post-processing-reflow soldering;

[0074] S1.3: Analyze the wiring diagram of each layer of the sample PCB, determine the equal-size partitioning scheme that meets the accuracy requirements and computational efficiency, and apply the wiring diagram recognition script developed based on the Python language. During the script running process, call specific functions in the OpenCV computer vision library to convert the wiring design Figure 2The computer outputs the wiring diagram of each layer, the proportion of black pixels in each partition, and the direction of the continuous lines composed of black pixels. The proportion of black pixels is the copper content, and the direction of the continuous lines composed of black pixels is the copper line direction. Subsequently, the identified copper content and copper line direction data are marked with the coordinate information of the partition center point and stored in the computer memory in the form of a data file.

[0075] S1.4: Establish the geometric model of each wiring layer in the finite element software, and then cut each wiring layer into equal sizes according to the partitioning scheme determined in S1.3 by batch processing to obtain a geometric model with partitions. Read the coordinate information of the center point of each partition to mark each partition with unique identification information. At the same time, establish the geometric model of each insulation layer according to the PCB stacking scheme and assemble it with the wiring layer geometric model according to the stacking scheme to form a complete sample PCB geometric model, such as Figure 3 shown.

[0076] S1.5: Calculate the equivalent modulus, Poisson's ratio, density, specific heat capacity, thermal conductivity, thermal expansion coefficient and chemical shrinkage coefficient of each partition based on its characteristic information, and store them in the computer memory in the form of a data file.

[0077] S1.6: In the finite element software, the corresponding equivalent material properties are searched in the equivalent material properties data file stored in S1.5 through the identification information of the partition marked in S1.4 and bound to the geometric model of the partition.

[0078] S1.7: According to the actual production process conditions of the example PCB pressing process, establish the corresponding boundary conditions and loads in the finite element software.

[0079] S1.8: Call the resin curing deformation module to define the resin curing reaction kinetic model, viscoelastic constitutive model, etc.

[0080] S1.9: Solve in the finite element solver and output the simulation calculation results of the pressing and forming process, such as Figure 4 shown.

[0081] S1.10: According to the partitioning scheme, a hole feature information recognition script developed based on Python language is applied. During the script running process, a specific function in the OpenCV computer vision library is called to convert the wiring design Figure 2The pore distribution diagram is then quantified (black pixels represent pores, white pixels represent non-pores, other colors can also be used as long as the pores and non-pores can be effectively distinguished) and the proportion of black pixels in each partition in the pore distribution diagram and the number of independent blocks composed of continuous black pixels are output. The proportion of black pixels is the pore content, and the number of independent blocks composed of continuous black pixels is the number of pores. Subsequently, the identified pore content and pore number data are marked according to the partition coordinate position, and the evolution of material properties is calculated based on this, and stored in the computer memory in the form of a data file.

[0082] S1.11: Inherit the simulation calculation results of the compression molding process and continue to solve in the finite element solver. When it comes to the evolution of material properties caused by processing, call the material property evolution data to update the equivalent material properties of each partition, so as to obtain the simulation calculation results of the post-processing process.

[0083] S1.12: Inherit the simulation calculation results of the post-processing process, inherit the material performance data of the end state of the processing process, continue to solve in the finite element solver, obtain and output the simulation calculation results of the reflow soldering process, such as Figure 5 shown.

[0084] Embodiment 2:

[0085] Embodiment 2 of the present invention provides a simulation and analysis method for the whole process of PCB pressing, forming, post-processing and reflow soldering that considers the copper distribution characteristics of the wiring layer and the hole characteristics for partitioning. The manufacturing process modeling and simulation analysis of the PCB partitioned by the copper distribution characteristics of the wiring layer and the hole distribution characteristics are realized by means of finite element software and an intelligent script developed based on the Python language. This implementation method can fully consider the anisotropic material properties brought about by the directional distribution of copper wires and the concentrated arrangement of holes in each partition of the PCB, and has the advantage of high simulation accuracy, but the implementation process is relatively complicated. The specific implementation process is similar to that of Embodiment 1, except that the partitioning scheme adopted is different from that of Embodiment 1, specifically, including:

[0086] S2.1: Output the wiring diagram of each layer of the sample PCB from the PCB design software as a sufficiently clear bitmap format (such as .jpg, .png, etc.) image file, such as Figure 6 shown.

[0087] S2.2: Obtain the process parameters such as temperature, pressure and time of each process stage of PCB pressing-post-processing-reflow soldering;

[0088] S2.3: Analyze the wiring diagram of each layer of the example PCB, and determine the partitioning scheme that meets the accuracy requirements and calculation efficiency based on the copper distribution characteristics and hole characteristics of the wiring layer, such as Figure 7 As shown, areas A1, A2, and A3 are directional distribution areas for copper wire bundles, areas B1 and B2 are pure resin areas, and area C1 is a concentrated hole distribution area.

[0089] S2.4: Use the intelligent wiring diagram recognition script independently developed based on Python language. During the script running process, call the specific function in the OpenCV computer vision library to recognize the wiring design. Figure 2 The copper content and the direction of the continuous lines composed of black pixels are taken as the copper line direction. Subsequently, the identified copper content and copper line direction data are marked according to the partition coordinate position and stored in the computer memory in the form of a data file.

[0090] S2.5: Establish a geometric model of each wiring layer in the finite element software, and then cut each wiring layer according to the partitioning scheme determined in S2.3 by batch processing to obtain a geometric model with partitions. Read the coordinate information of the center point of each partition to mark each partition with unique identification information, and at the same time establish the geometric model of each insulation layer according to the PCB stacking scheme and assemble it with the wiring layer geometric model according to the stacking scheme to form a complete sample PCB geometric model.

[0091] S2.6: Calculate the equivalent modulus, Poisson's ratio, density, specific heat capacity, thermal conductivity, thermal expansion coefficient and chemical shrinkage coefficient of each partition according to the characteristic information thereof, and store the data in a computer memory in the form of a data file;

[0092] S2.7: In the finite element software, the corresponding equivalent material properties are searched in the equivalent material properties data file stored in S2.6 through the identification information of the partition marked in S2.5 and bound to the geometric model of the partition;

[0093] S2.8: According to the actual production process conditions of the example PCB pressing process, establish the corresponding boundary conditions and loads in the finite element software;

[0094] S2.9: Call the resin curing deformation module to define the resin curing reaction kinetic model, viscoelastic constitutive model, etc.;

[0095] S2.10: Solve in the finite element solver and output the simulation calculation results of the pressing and forming process.

[0096] S2.11: According to the partitioning scheme determined in S2.3, a hole feature information recognition script developed based on Python language is applied. During the script running process, a specific function in the OpenCV computer vision library is called to convert the wiring design Figure 2The pore distribution diagram is quantified (black pixels represent pores and white pixels represent non-pores. Other colors can also be used as long as the pores and non-pores can be effectively distinguished) and the proportion of black pixels in each partition in the pore distribution diagram and the number of independent blocks composed of continuous black pixels are output. The proportion of black pixels is the pore content, and the number of independent blocks composed of continuous black pixels is the pore number. Subsequently, the identified pore content and pore number data are marked according to the partition coordinate position and stored in the computer memory in the form of a data file.

[0097] S2.12: Inherit the simulation calculation results of the press forming process and continue to solve in the finite element solver. When it comes to the evolution of material properties caused by processing, call the material property evolution data to update the equivalent material properties of each partition, so as to obtain the simulation calculation results of the post-processing process.

[0098] S2.13: Inherit the simulation calculation results of the post-processing process, inherit the material performance data of the end state of the processing process, continue to solve in the finite element solver, obtain and output the simulation calculation results of the reflow process.

[0099] Embodiment 3:

[0100] Embodiment 3 of the present invention provides a simulation system for press forming, post-processing and reflow soldering of a printed circuit board, including:

[0101] The data acquisition module is configured to: acquire parameter data of the printed circuit board;

[0102] The partitioning module is configured to: determine a partitioning scheme for each wiring layer according to the acquired parameter data;

[0103] The model building module is configured to: identify circuit feature information of each partition according to the partition scheme, and establish a three-dimensional geometric model of the printed circuit board with the partition identification information;

[0104] The model parameter matching module is configured to: calculate the equivalent performance parameters of each partition according to the identified feature information, and configure the equivalent performance parameters calculated based on the feature information for each partition of the three-dimensional geometric model of the printed circuit board according to the partition identification information;

[0105] The pressing and forming simulation module is configured to: configure boundary conditions and loads for the pressing process simulation calculation, call the printed circuit board resin curing deformation module for solving, terminate the simulation calculation according to the moment when the pressing is completed in the pressing and forming process, and obtain the pressing and forming simulation result;

[0106] The material performance evolution data acquisition module is configured to: identify hole feature information of each layer and each area of ​​the printed circuit board according to the partitioning scheme, and obtain the material performance evolution data according to the hole feature information;

[0107] The post-processing simulation module is configured to: configure the boundary conditions and loads of the post-processing process according to the press-forming simulation results and the evolution data of the material properties, continue to solve, terminate the simulation calculation according to the moment when the processing is finished in the post-processing process, and obtain the post-processing simulation results;

[0108] The reflow soldering simulation module is configured as follows: according to the post-processing simulation results, combined with the evolution data of material properties, the boundary conditions and loads of the reflow soldering process are configured, and the solution is continued. The simulation calculation is ended according to the moment when the reflow soldering ends in the reflow soldering process to obtain the reflow soldering simulation results.

[0109] The working method of the system is the same as the simulation method described in Example 1 or Example 2, and will not be described in detail here.

[0110] Embodiment 4:

[0111] Embodiment 4 of the present invention provides a computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the steps in the simulation method of printed circuit board pressing and forming - post-processing - reflow soldering as described in Embodiment 1 or Embodiment 2 of the present invention.

[0112] Embodiment 5:

[0113] Embodiment 5 of the present invention provides an electronic device, comprising a memory, a processor, and a program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps in the simulation method of printed circuit board pressing-forming-post-processing-reflow soldering as described in Embodiment 1 or Embodiment 2 of the present invention are implemented.

[0114] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of hardware embodiments, software embodiments, or embodiments combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) containing computer-usable program code.

[0115] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0116] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0117] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0118] A person skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0119] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A simulation method for press forming-post processing-reflow soldering of a printed circuit board, characterized in that: The process includes: Obtain parameter data of printed circuit board; Determine the partitioning scheme of each wiring layer according to the acquired parameter data; According to the partitioning scheme, the circuit characteristic information of each partition is identified, and a three-dimensional geometric model of the printed circuit board with the partition identification information is established; Calculate the equivalent performance parameters of each partition according to the identified characteristic information, and configure the equivalent performance parameters calculated based on the characteristic information for each partition of the three-dimensional geometric model of the printed circuit board according to the partition identification information; Configure the boundary conditions and loads for the simulation calculation of the pressing process, call the printed circuit board resin curing deformation module for solution, terminate the simulation calculation according to the moment when the pressing is completed in the pressing molding process, and obtain the pressing molding simulation result; According to the partitioning scheme, the hole characteristic information of each layer and each area of ​​the printed circuit board is identified, and the evolution data of the material performance is obtained based on the hole characteristic information; According to the simulation results of the press-forming process, combined with the evolution data of material properties, the boundary conditions and loads of the post-processing process are configured, and the solution is continued. The simulation calculation is terminated according to the moment when the processing in the post-processing process ends, and the post-processing simulation results are obtained; According to the post-processing simulation results, combined with the evolution data of material properties, the boundary conditions and loads of the reflow process are configured, and the solution is continued. The simulation calculation is ended according to the moment when the reflow is finished in the reflow process to obtain the reflow simulation results.

2. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: The evolution of material properties is the change of material properties in each layer and area caused by drilling, copper plating in the hole, and surface etching-copper plating.

3. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: According to the evolution data of material properties, corresponding loads and boundary conditions are configured during the post-processing simulation of the printed circuit board, so as to at least obtain the spatial distribution of temperature, displacement and stress of the printed circuit board during the post-processing process.

4. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: According to the reflow process parameters, the corresponding boundary conditions and calculation time are configured during the reflow analysis of the printed circuit board. The starting material performance parameters during the reflow simulation are obtained based on the evolution data of the material properties. The heat transfer model is called to at least obtain the spatial distribution of the temperature, displacement and stress of the printed circuit board during the reflow process.

5. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: Circuit characteristic information includes at least: copper volume fraction, resin volume fraction and copper wire direction.

6. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: The pore characteristic information includes at least: pore quantity, pore size, pore volume fraction and pore depth.

7. The simulation method of printed circuit board press molding-post processing-reflow soldering as claimed in claim 1, characterized in that: The evolution data of material properties are obtained based on the hole feature information, including: obtaining the distribution of the stiffness of the surface layer after etching and copper plating through the wiring layer equivalent performance model, and combining microscopic finite element analysis and experiments to obtain the stiffness changes of each layer and area caused by the drilling and copper plating processes in the hole; or, Identify the characteristic information of each partition, including: Binarize the wiring design diagram, use the first color pixel to represent the copper foil, and use other color pixels to represent the resin; Output the proportion of first color pixels in each partition of each layer of wiring diagram and the direction of continuous lines composed of first color pixels, with the proportion of first color pixels as copper content and the direction of continuous lines composed of first color pixels as copper line direction; The identified copper content and copper wire direction data are marked with the coordinate information of the partition center point and stored in the form of a data file; or, Establish a 3D geometric model of a printed circuit board with partition identification information, including: Establish the geometric model of each wiring layer in finite element software; Then, each wiring layer is cut into equal sizes according to the partitioning scheme determined by batch processing to obtain a geometric model with partitions; Read the coordinate position information of the center point of each partition to mark each partition with unique identification information, establish the geometric model of each insulation layer according to the printed circuit board stacking plan, and assemble it with the wiring layer geometric model according to the stacking plan to form a complete sample printed circuit board geometric model; or, Identify hole feature information of each layer and area of ​​the printed circuit board, including: Binarize the wiring design diagram, use the second color pixel to represent the hole, and use other color pixels to represent the non-hole; Output the proportion of second color pixels in each partition of the aperture distribution map and the number of independent blocks consisting of consecutive second color pixels; The ratio of the second color pixels is the pore content, and the number of independent blocks composed of continuous second color pixels is the number of pores; The identified pore content and pore quantity data are marked according to the partition coordinate position and stored in the form of a data file.

8. A simulation system for press forming, post-processing and reflow soldering of printed circuit boards, characterized in that: include: The data acquisition module is configured to: acquire parameter data of the printed circuit board; The partitioning module is configured to: determine a partitioning scheme for each wiring layer according to the acquired parameter data; The model building module is configured to: identify circuit feature information of each partition according to the partition scheme, and establish a three-dimensional geometric model of the printed circuit board with the partition identification information; The model parameter matching module is configured to: calculate the equivalent performance parameters of each partition according to the identified feature information, and configure the equivalent performance parameters calculated based on the feature information for each partition of the three-dimensional geometric model of the printed circuit board according to the partition identification information; The pressing and forming simulation module is configured to: configure boundary conditions and loads for the pressing process simulation calculation, call the printed circuit board resin curing deformation module for solving, terminate the simulation calculation according to the moment when the pressing is completed in the pressing and forming process, and obtain the pressing and forming simulation result; The material performance evolution data acquisition module is configured to: identify hole feature information of each layer and each area of ​​the printed circuit board according to the partitioning scheme, and obtain the material performance evolution data according to the hole feature information; The post-processing simulation module is configured to: configure the boundary conditions and loads of the post-processing process according to the press-forming simulation results and the evolution data of the material properties, continue to solve, terminate the simulation calculation according to the moment when the processing is finished in the post-processing process, and obtain the post-processing simulation results; The reflow soldering simulation module is configured as follows: according to the post-processing simulation results, combined with the evolution data of material properties, the boundary conditions and loads of the reflow soldering process are configured, and the solution is continued. The simulation calculation is ended according to the moment when the reflow soldering ends in the reflow soldering process to obtain the reflow soldering simulation results.

9. A computer-readable storage medium having a program stored thereon, characterized in that: When the program is executed by a processor, the steps in the simulation method of printed circuit board pressing-forming-post-processing-reflow soldering as described in any one of claims 1 to 7 are implemented.

10. An electronic device comprising a memory, a processor, and a program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps in the simulation method of printed circuit board pressing-forming-post-processing-reflow soldering as described in any one of claims 1 to 7 are implemented.

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