Display panel and display terminal
By setting the first sub-pixel circuit of the plane display area in the curved display area, the number and thickness of the film layers of the inorganic layer and the thin film packaging layer are reduced, and the problem of cracks that are prone to when bending is solved, improving the resistance to bending Performance and display quality.
Patent Information
- Application Number
- CN202210236733.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-11
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2042-03-11
AI Technical Summary
The curved display panel is prone to cracks when bent, resulting in abnormal display.
By setting the first sub-pixel circuit of the curved display area in the plan display area, the number of inorganic layer film layers in the curved display area and the distance between the film encapsulation layer and the substrate are reduced, thereby avoiding the occurrence of the inorganic layer and the film encapsulation layer when bending crack.
Improve the bending resistance of the surface display panel, avoid display abnormalities, and ensure the stability and display quality of the surface display part.
Smart Images

Figure CN114613824B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display, and in particular to a display panel and a display terminal. Background Art
[0002] Organic light-emitting display panels (OLED) have been widely used in people's lives, such as display screens of mobile phones and computers. With the development of display technology, in order to expand the area of the display area, curved display panels that can be bent or folded for use have gradually become a research and development trend. Curved display panels refer to display panels with curved edges, while displaying images on the curved surface, such as dual-curved display panels and quad-curved display panels.
[0003] However, due to the complex pixel circuits in the curved portion, the curved portion is thicker and has many film layers, such as multiple inorganic layers, which makes it easy for cracks to appear when the curved portion of the curved display panel is bent, resulting in display abnormalities such as broken lines and dark lines in the curved display portion of the curved display panel. Summary of the invention
[0004] The embodiments of the present application provide a display panel and a display terminal, which can solve the problem that a curved display area in a display panel is prone to cracks when being bent.
[0005] An embodiment of the present application provides a display panel, including a flat display area and a curved display area connected to the flat display area, the display panel including:
[0006] A first sub-pixel circuit and a first light-emitting device, wherein the first sub-pixel circuit is arranged in the flat display area, and the first light-emitting device is arranged in the curved display area;
[0007] The connecting electrode is electrically connected between the first sub-pixel circuit and the first light-emitting device.
[0008] Optionally, in some embodiments of the present application, the display panel also includes a substrate and a thin film encapsulation layer, the first sub-pixel circuit and the first light-emitting device are arranged between the substrate and the thin film encapsulation layer, and the distance from the thin film encapsulation layer to the substrate in the curved display area is smaller than the distance from the thin film encapsulation layer to the substrate in the flat display area.
[0009] Optionally, in some embodiments of the present application, the display panel further includes a second sub-pixel circuit and a second light-emitting device arranged in the planar display area, and the second sub-pixel circuit and the second light-emitting device are arranged between the substrate and the thin film encapsulation layer.
[0010] Optionally, in some embodiments of the present application, the first sub-pixel circuit includes a first transistor, and the second sub-pixel circuit includes a second transistor;
[0011] The second transistor is disposed on the substrate, the second light emitting device is disposed on the second transistor, the first light emitting device is disposed on the substrate, and a distance from the first light emitting device to the substrate is smaller than a distance from the second light emitting device to the substrate.
[0012] Optionally, in some embodiments of the present application, the first transistor includes a first source and a first drain, the second transistor includes a second source and a second drain, the first light-emitting device is electrically connected to the first drain through the connecting electrode, and the second light-emitting device is electrically connected to the second drain.
[0013] Optionally, in some embodiments of the present application, the first transistor and the second transistor include a gate insulating layer and an interlayer insulating layer, the display panel also includes a first through hole passing through the gate insulating layer and the interlayer insulating layer, the first drain includes a through hole electrode located in the first through hole, and the connecting electrode is electrically connected to the through hole electrode.
[0014] Optionally, in some embodiments of the present application, a pixel definition layer is further included, wherein the pixel definition layer includes a first sub-pixel definition layer disposed in the curved display area and a second sub-pixel definition layer disposed in the flat display area;
[0015] The second sub-pixel definition layer is disposed on the second transistor, and the second light emitting device is disposed in an opening of the second sub-pixel definition layer;
[0016] The first sub-pixel definition layer is disposed on the substrate, the first light-emitting device is disposed in an opening of the first sub-pixel definition layer, and the connecting electrode is disposed between the first sub-pixel definition layer and the substrate.
[0017] Optionally, in some embodiments of the present application, the first light-emitting device includes a first electrode and a second electrode disposed on the first electrode, and a first light-emitting material layer disposed between the first electrode and the second electrode, and the second light-emitting device includes a third electrode and a fourth electrode disposed on the third electrode, and a second light-emitting material layer disposed between the third electrode and the fourth electrode;
[0018] The display panel further includes a planar layer located in the planar display area and disposed between the third electrode and the second drain electrode of the second light emitting device, and the first electrode of the first light emitting device is disposed in contact with the substrate.
[0019] Optionally, in some embodiments of the present application, the connecting electrode and the first electrode of the first light-emitting device are formed by the same process.
[0020] Correspondingly, an embodiment of the present application further provides a display terminal, comprising a terminal body and any one of the display panels described above, wherein the terminal body and the display panel are combined into one.
[0021] In an embodiment of the present application, a display panel and a display terminal are provided, wherein the display panel includes a flat display area and a curved display area connected to the flat display area, and the display panel includes: a first sub-pixel circuit and a first light-emitting device, wherein the first sub-pixel circuit is arranged in the flat display area, and the first light-emitting device is arranged in the curved display area; a connecting electrode, electrically connected between the first sub-pixel circuit and the first light-emitting device. The present application arranges the first sub-pixel circuit of the curved display area in the flat display area, thereby reducing the number of film layers of the inorganic layer in the curved display area and reducing the distance from the thin film encapsulation layer to the substrate in the curved display area. When the curved display area is bent, cracks in the film layer of the inorganic layer can be avoided, and the inorganic layer in the thin film encapsulation layer is closer to the bent stress neutral layer, thereby avoiding cracks in the inorganic layer in the thin film encapsulation layer and improving the anti-bending performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0023] Figure 1 A schematic diagram of a cross-sectional structure of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION
[0024] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words such as "upper" and "lower" used generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device.
[0025] The embodiment of the present application provides a display panel, including a flat display area and a curved display area connected to the flat display area, the display panel includes: a first sub-pixel circuit and a first light-emitting device, the first sub-pixel circuit is arranged in the flat display area, and the first light-emitting device is arranged in the curved display area; a connecting electrode, electrically connected between the first sub-pixel circuit and the first light-emitting device. The embodiment of the present application also provides a display terminal including the aforementioned display panel. The following is a detailed description of each. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments.
[0026] Embodiment 1
[0027] See also Figure 1 , Figure 1 A schematic diagram of a cross-sectional structure of a display panel 100 provided in an embodiment of the present application.
[0028] An embodiment of the present application provides a display panel 100, including a flat display area AA2 and a curved display area AA1 connected to the flat display area AA2, the display panel 100 includes a first sub-pixel circuit 101, a first light-emitting device 201 and a connecting electrode 71, the first sub-pixel circuit 101 is arranged in the flat display area AA2, the first light-emitting device 201 is arranged in the curved display area AA1; the connecting electrode 71 is electrically connected between the first sub-pixel circuit 101 and the first light-emitting device 201.
[0029] Specifically, the display panel 100 includes a flat display area AA2 and a curved display area AA1 connected to the flat display area AA2. The display panel 100 may be a dual-curved display panel or a quad-curved display panel. The display panel 100 may be other types of curved display panels, which are not limited herein.
[0030] Specifically, both the flat display area AA2 and the curved display area AA1 are used to display images, and the display panel 100 further includes a non-display area (not shown in the figure), which at least partially surrounds the flat display area AA2 and the curved display area AA1.
[0031] Specifically, the first sub-pixel circuit 101 is a sub-pixel driving circuit that drives the first light-emitting device 201 to display an image. The first sub-pixel circuit 101 and the subsequent second sub-pixel circuit 102 can be pixel driving circuits of types such as 2T1C, 7T1C, and 8T2C. The first sub-pixel circuit 101 and the second sub-pixel circuit 102 can be any type of pixel driving circuit in the prior art, and are not limited here.
[0032] Specifically, the first sub-pixel circuit 101 is located in the planar display area AA2, the first light-emitting device 201 is arranged in the curved display area AA1, the connecting electrode 71 is electrically connected between the first sub-pixel circuit 101 and the first light-emitting device 201, and the first sub-pixel circuit 101 transmits an electrical signal through the connecting electrode 71 to drive the first light-emitting device 201 to emit light.
[0033] It should be noted that the flat display area AA2 is the flat display portion of the display panel, and the curved display area AA1 is the curved display portion of the display panel.
[0034] In some embodiments, the display panel 100 also includes a substrate 11 and a thin film encapsulation layer 30, the first sub-pixel circuit 101 and the first light-emitting device 201 are arranged between the substrate 11 and the thin film encapsulation layer 30, and the distance from the thin film encapsulation layer 30 to the substrate 11 in the curved display area AA1 is smaller than the distance from the thin film encapsulation layer 30 to the substrate 11 in the flat display area AA2.
[0035] Specifically, the distance from the thin film encapsulation layer 30 to the substrate 11 in the curved display area AA1 is smaller than the distance from the thin film encapsulation layer 30 to the substrate 11 in the flat display area AA2, that is, the thickness of the film layer between the thin film encapsulation layer 30 and the substrate 11 in the curved display area AA1 is smaller than the thickness of the film layer in the flat display area AA2, so that the display panel has a smaller thickness in the curved display area AA1 than in the flat display area AA2.
[0036] In this embodiment, the first sub-pixel circuit 101 of the curved display area AA1 is arranged in the flat display area AA2, thereby reducing the number of film layers of the inorganic layer in the curved display area AA1 and reducing the distance from the thin film encapsulation layer 30 of the curved display area AA1 to the substrate 11. When the curved display area AA1 is bent, cracks in the film layer of the inorganic layer can be avoided, and the inorganic layer in the thin film encapsulation layer 30 is closer to the bent stress-neutral layer, thereby avoiding cracks in the inorganic layer in the thin film encapsulation layer 30 and improving the bending resistance.
[0037] Embodiment 2
[0038] This embodiment is the same as or similar to the above embodiment, except that the structure of the display panel 100 is further described.
[0039] In some embodiments, the display panel 100 further includes a second sub-pixel circuit 102 and a second light emitting device 202 disposed in the planar display area AA2 , and the second sub-pixel circuit 102 and the second light emitting device 202 are disposed between the substrate 11 and the thin film encapsulation layer 30 .
[0040] Specifically, the second sub-pixel circuit 102 and the second light-emitting device 202 are located in the planar display area AA2, and the second sub-pixel circuit 102 drives the second light-emitting device 202 to display an image.
[0041] Specifically, the planar display area AA2 does not need to be bent, and the second sub-pixel circuit 102 and the first sub-pixel circuit 101 may be arranged to be located in the planar display area AA2.
[0042] In some embodiments, the first sub-pixel circuit 101 includes a first transistor 1011, and the second sub-pixel circuit 102 includes a second transistor 1021; the second transistor 1021 is disposed on a substrate 11, the second light-emitting device 202 is disposed on the second transistor 1021, the first light-emitting device 201 is disposed on the substrate 11, and the distance from the first light-emitting device 201 to the substrate 11 is less than the distance from the second light-emitting device 202 to the substrate 11.
[0043] Specifically, since the first sub-pixel circuit 101 is located in the planar display area AA2, the distance from the first light-emitting device 201 to the substrate 11 is smaller than the distance from the second light-emitting device 202 to the substrate 11, that is, the number of film layers between the first light-emitting device 201 and the substrate 11 is smaller than the number of film layers between the second light-emitting device 202 and the substrate 11.
[0044] Specifically, the first transistor 1011 and the second transistor 1021 are both thin film transistors.
[0045] In some embodiments, the first transistor 1011 includes a first source and a first drain 1017 , the second transistor 1021 includes a second source and a second drain 1027 , the first light-emitting device 201 is electrically connected to the first drain 1017 via the connecting electrode 71 , and the second light-emitting device 202 is electrically connected to the second drain 1027 .
[0046] Specifically, the first light emitting device 201 is electrically connected to the first drain 1017 via the connecting electrode 71 , that is, the electrical signal of the first transistor 1011 is transmitted to the first light emitting device 201 via the first drain 1017 and the connecting electrode 71 in sequence.
[0047] In some embodiments, the first transistor 1011 and the second transistor 1021 include a gate insulating layer 13 and an interlayer insulating layer 16, the display panel 100 also includes a first through hole penetrating the gate insulating layer 13 and the interlayer insulating layer 16, the first drain 1017 includes a through hole electrode 10171 located in the first through hole, and the connecting electrode 71 is electrically connected to the through hole electrode 10171.
[0048] Specifically, Figure 1 As shown, Figure 1 An example of a structure of the display panel 100 is shown. Figure 1In the plane display area AA2, the layer structure of the display panel 100 includes: a substrate 11, a semiconductor layer 12, a gate insulating layer 13, a gate metal layer 14, a first insulating layer 15, a first metal layer 41, an interlayer insulating layer 16, a source and drain metal layer 17, a flat layer 18, a pixel definition layer 20 (the plane display area AA2 is the second sub-pixel definition layer 22 of the pixel definition layer 20, and the second sub-pixel definition layer 22 is arranged on the third electrode 2021), a second light-emitting device 202, and a thin film encapsulation layer 30.
[0049] Specifically, the first metal layer 41 may be a capacitor metal layer, and may form a storage capacitor with the gate metal layer 14 , but is not limited thereto.
[0050] Specifically, in some implementations, the first insulating layer 15 and the first metal layer 41 may not be provided, which is not limited here.
[0051] Specifically, since the first sub-pixel circuit 101 is arranged in the flat display area AA2, multiple film layer structures or partial film layer structures of the first sub-pixel circuit 101 are not arranged in the curved display area AA1, so that the thickness of the curved display area AA1 is smaller, and it is also necessary to form a first through hole penetrating the gate insulating layer 13 and the interlayer insulating layer 16. When the first drain 1017 is formed, a through hole electrode 10171 is also formed in the first through hole, and the connecting electrode 71 is electrically connected to the through hole electrode 10171.
[0052] In some embodiments, the display panel 100 also includes a pixel definition layer 20, the pixel definition layer 20 includes a first sub-pixel definition layer 21 arranged in the curved display area AA1 and a second sub-pixel definition layer 22 arranged in the flat display area AA2; the second sub-pixel definition layer 22 is arranged on the second transistor 1021, and the second light-emitting device 202 is arranged in the opening of the second sub-pixel definition layer 22; the first sub-pixel definition layer 21 is arranged on the substrate 11, the first light-emitting device 201 is arranged in the opening of the first sub-pixel definition layer 21, and the connecting electrode 71 is arranged between the first sub-pixel definition layer 21 and the substrate 11.
[0053] In some embodiments, the first light-emitting device 201 includes a first electrode 2011 and a second electrode disposed on the first electrode 2011, and a first light-emitting material layer disposed between the first electrode 2011 and the second electrode, the second light-emitting device 202 includes a third electrode 2021 and a fourth electrode disposed on the third electrode 2021, and a second light-emitting material layer disposed between the third electrode 2021 and the fourth electrode; the display panel 100 also includes a flat layer 18 located in the plane display area AA2 and disposed between the third electrode 2021 and the second drain 1027 of the second light-emitting device 202, and the first electrode 2011 of the first light-emitting device 201 is disposed in contact with the substrate 11.
[0054] Specifically, the first electrode 2011 of the first light emitting device 201 is arranged in contact with the substrate 11, so that the thickness of the curved display area AA1 is smaller, and the distance from the thin film encapsulation layer 30 from the curved display area AA1 to the substrate 11 is smaller, which can better improve the anti-bending performance.
[0055] Specifically, the first electrode 2011 and the third electrode 2021 may both be anodes, the second electrode and the fourth electrode may both be cathodes, and the second electrode and the fourth electrode may be connected to each other (not shown in the figure), which is not limited here.
[0056] Specifically, when the first electrode 2011 and the third electrode 2021 are both anodes, the first electrode 2011 and the third electrode 2021 are both formed by patterning the anode metal layer 19 .
[0057] Specifically, when the second electrode and the fourth electrode are both cathodes, the cathode (not shown in the figure) can be entirely disposed on the first light-emitting material layer, the second light-emitting material layer and the pixel definition layer 20, and the encapsulation layer 30 is disposed on the cathode, that is, the encapsulation layer 30 is disposed on the side of the cathode away from the substrate 11.
[0058] Specifically, Figure 1 As shown, Figure 1 An example of a structure of the display panel 100 is shown. Figure 1 In the curved display area AA1, the layer structure of the display panel 100 includes: a substrate 11, a first electrode 2011, a pixel definition layer 20 (the curved display area AA1 is the first sub-pixel definition layer 21 of the pixel definition layer 20), a first light-emitting device 201, and a thin film encapsulation layer 30.
[0059] Specifically, the thin film encapsulation layer 30 may include a stacked structure of an inorganic layer and an organic layer, for example, a stacked structure including a first encapsulation inorganic layer 31 , a first encapsulation organic layer 32 , and a second encapsulation inorganic layer 33 in sequence, which is not limited here.
[0060] In some embodiments, the connecting electrode 71 and the first electrode 2011 of the first light emitting device 201 are formed by the same process.
[0061] Specifically, the connecting electrode 71 and the first electrode 2011 of the first light-emitting device 201 are formed by the same process, which can reduce the production process steps. Without increasing the production process steps, the connecting electrode 71 and the first electrode 2011 of the first light-emitting device 201 are formed at the same time.
[0062] In this embodiment, the first sub-pixel circuit 101 of the curved display area AA1 is arranged in the flat display area AA2, thereby reducing the number of film layers of the inorganic layer of the curved display area AA1, specifically reducing the film layers and / or the flat layer 18 of the first transistor 1011, and reducing the distance from the thin film encapsulation layer 30 of the curved display area AA1 to the substrate 11. When the curved display area AA1 is bent, cracks in the film layer of the inorganic layer can be avoided, and the inorganic layer in the thin film encapsulation layer 30 is closer to the bent stress-neutral layer, thereby avoiding cracks in the inorganic layer in the thin film encapsulation layer 30 and improving the bending resistance.
[0063] Embodiment 3
[0064] This embodiment is the same as or similar to the second embodiment, except that the curved display area AA1 may further include a flat layer 18 .
[0065] Specifically, see Figure 1 In the curved display area AA1, the layer structure of the display panel 100 includes: a substrate 11, a flat substrate 18 ( Figure 1 The first electrode 2011, the pixel definition layer 20 (first sub-pixel definition layer 21), the first light emitting device 201, and the thin film encapsulation layer 30. In the curved display area AA1, the first electrode 2011 is disposed on the flat surface 18, and the flat surface 18 is located between the first electrode 2011 and the substrate 11.
[0066] Specifically, the planar layer 18 is an organic layer, which can provide buffering and stress release functions for the first electrode 2011 .
[0067] Embodiment 4
[0068] An embodiment of the present application provides a display terminal, which includes a terminal body and a display panel 100 according to any one of the above embodiments, wherein the terminal body and the display panel are integrated into one.
[0069] Specifically, the display terminal may be a smart phone, etc. More specifically, the display terminal may be a smart phone with a dual-curved display panel, or a smart phone with a quad-curved display panel.
[0070] The above is a detailed introduction to a display panel and a display terminal provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A display panel, characterized in that: The display panel comprises a flat display area and a curved display area connected to the flat display area, and the display panel comprises: A first sub-pixel circuit and a first light-emitting device, wherein the first sub-pixel circuit is arranged in the flat display area, and the first light-emitting device is arranged in the curved display area; A connecting electrode electrically connected between the first sub-pixel circuit and the first light-emitting device; The display panel also includes a substrate and a thin film encapsulation layer, the first sub-pixel circuit and the first light-emitting device are arranged between the substrate and the thin film encapsulation layer, and the distance from the thin film encapsulation layer to the substrate in the curved display area is smaller than the distance from the thin film encapsulation layer to the substrate in the flat display area.
2. The display panel according to claim 1, wherein: The display panel further includes a second sub-pixel circuit and a second light emitting device disposed in the planar display area, wherein the second sub-pixel circuit and the second light emitting device are disposed between the substrate and the thin film encapsulation layer.
3. The display panel according to claim 2, wherein: The first sub-pixel circuit includes a first transistor, and the second sub-pixel circuit includes a second transistor; The second transistor is disposed on the substrate, the second light emitting device is disposed on the second transistor, the first light emitting device is disposed on the substrate, and a distance from the first light emitting device to the substrate is smaller than a distance from the second light emitting device to the substrate.
4. The display panel according to claim 3, wherein: The first transistor includes a first source and a first drain, the second transistor includes a second source and a second drain, the first light emitting device is electrically connected to the first drain through the connecting electrode, and the second light emitting device is electrically connected to the second drain.
5. The display panel according to claim 4, wherein: The first transistor and the second transistor include a gate insulating layer and an interlayer insulating layer, the display panel also includes a first through hole penetrating the gate insulating layer and the interlayer insulating layer, the first drain includes a through hole electrode located in the first through hole, and the connecting electrode is electrically connected to the through hole electrode.
6. The display panel according to claim 5, wherein: It also includes a pixel definition layer, wherein the pixel definition layer includes a first sub-pixel definition layer disposed in the curved display area and a second sub-pixel definition layer disposed in the flat display area; The second sub-pixel definition layer is disposed on the second transistor, and the second light emitting device is disposed in an opening of the second sub-pixel definition layer; The first sub-pixel definition layer is disposed on the substrate, the first light-emitting device is disposed in an opening of the first sub-pixel definition layer, and the connecting electrode is disposed between the first sub-pixel definition layer and the substrate.
7. The display panel according to claim 5, wherein: The first light-emitting device includes a first electrode and a second electrode disposed on the first electrode, and a first light-emitting material layer disposed between the first electrode and the second electrode; the second light-emitting device includes a third electrode and a fourth electrode disposed on the third electrode, and a second light-emitting material layer disposed between the third electrode and the fourth electrode; The display panel further includes a planar layer located in the planar display area and disposed between the third electrode and the second drain electrode of the second light emitting device, and the first electrode of the first light emitting device is disposed in contact with the substrate.
8. The display panel according to claim 7, wherein: The connecting electrode and the first electrode of the first light emitting device are formed by the same process.
9. A display terminal, characterized in that: The invention comprises a terminal body and a display panel as claimed in any one of claims 1 to 8, wherein the terminal body and the display panel are integrated into one body.
Citation Information
Patent Citations
Display panel
CN111312721A