Signal conversion circuit

Abstract

The present invention relates to the technical field of integrated circuits, and provides a signal conversion circuit, which firstly uses an amplification module to proportionally amplify an input voltage to generate an intermediate voltage; secondly uses an output module to sample the intermediate signal based on a pulse signal; and generates a pulse signal provided to the output module according to the proportional coefficient of the amplification module through a control module connected to the amplification module and the output module respectively, so that the duty cycle of the pulse signal is proportional to the proportional coefficient of the aforementioned amplification module. This can save costs and improve the output accuracy and reliability of the circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a signal conversion circuit. Background Art

[0002] With the development of modern communication technology, the requirements for the accuracy of signal transmission between systems in integrated circuit systems are becoming increasingly higher. For example, in mixed analog and digital circuits or power management circuits, accurate reference voltages can provide an accurate reference to the ground for the entire system. The system's overvoltage protection, overcurrent protection, overheating protection, error amplifier, comparator, and precise current all require an accurate reference point. However, when the reference voltage signal is relatively small, due to interference from system errors, detection accuracy, and layout and wiring parasitic parameters, it is easy to cause a large deviation between the data received by the system and the signal source data, thereby affecting the accuracy of signal transmission, resulting in a decline in system performance, or even system malfunction.

[0003] A signal conversion circuit in the prior art converts a reference voltage into a current output. By converting the reference voltage and transmitting the converted current between modules, the ability to suppress parasitic interference is enhanced. If the current is restored to the reference voltage in the local module, the accurate transmission of the reference voltage will eventually be achieved. Figure 1 shown. Figure 1 It is a signal conversion circuit in the prior art, which includes: a reference power supply for providing a reference voltage VREF, an error amplifier EA, a capacitor Cc, a current mirror structure composed of a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5 and a transistor M6, a transistor M7, and a resistor R1 and a resistor R2. The reference power supply is used to provide the reference voltage VREF to the in-phase input terminal of the error amplifier EA. The output terminal of the error amplifier EA is connected to the control terminal of the transistor M7, and the source terminal of the transistor M7 is fed back to the inverting input terminal of the error amplifier EA. By adjusting the width-to-depth ratio of each transistor in the current mirror structure, the accuracy of the current I1 copied by the current mirror structure is adjusted, that is, the size of the mirror current I2 and the mirror current I3 and the output voltage Vo is controlled. However, when the VREF voltage is small, the vos of the amplifier EA itself will cause a large deviation in its output, reducing the system accuracy.

[0004] Figure 2 It is the prior art Figure 1 A signal conversion circuit improved on the basis of. The signal conversion circuit basically adopts Figure 1The structure of the signal conversion circuit shown in the figure is different in that a resistor R3 is added, which is connected between the drain terminal of the transistor M4 and the drain terminal of the transistor M7. Although the added resistor R3 reduces the minimum operating voltage VIN of the circuit to about 2.45 volts, it increases the area of ​​the integrated circuit chip. At the same time, the resistor R3 is easily affected by process changes. The bias voltage formed by R3 on M4, M5, and M6 will change with the process and temperature, which is very likely to make M4, M5, and M6 enter the linear region, greatly weakening the role of the current mirror of the CASCDOE structure in accurately copying the current. Similarly, when the VREF voltage is small, the vos of the amplifier EA itself will cause a large deviation in its output, reducing the system accuracy. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a signal conversion circuit, which can save costs and improve the output accuracy and reliability of the circuit.

[0006] The present invention provides a signal conversion circuit, comprising:

[0007] An amplification module, used for proportionally amplifying the input voltage to generate an intermediate voltage;

[0008] an output module, the input end of which is connected to the output end of the aforementioned amplification module, and is used to sample the intermediate signal based on the pulse signal; and

[0009] The control module is respectively connected to the aforementioned amplification module and the aforementioned output module, and is used to generate the aforementioned pulse signal provided to the output module according to the proportional coefficient of the amplification module, so that the duty cycle of the pulse signal is proportional to the proportional coefficient of the aforementioned amplification module.

[0010] Preferably, the aforementioned amplification module comprises:

[0011] A first amplifier, wherein the first amplifier has a non-inverting input terminal for obtaining the aforementioned input voltage, and an output terminal for providing the aforementioned intermediate voltage;

[0012] A second resistor and a third resistor are connected in series between the output terminal of the first amplifier and the ground, and a connection node of the second resistor and the third resistor is connected to the inverting input terminal of the first amplifier.

[0013] Preferably, the aforementioned signal conversion circuit further includes:

[0014] A voltage-current conversion module, which is connected between the aforementioned amplification module and the aforementioned output module, and is used to perform voltage-current conversion on the aforementioned intermediate voltage to obtain a conversion current.

[0015] The output module samples the conversion current based on the pulse signal, and the duty cycle of the pulse signal and the gain coefficient of the input voltage amplification are reciprocal to each other.

[0016] Preferably, the pressure-flow conversion module comprises:

[0017] A first current mirror, the first current mirror comprising a first transistor and a second transistor, and the first current mirror having a first path connected to a drain terminal of the first transistor and a second path connected to a drain terminal of the second transistor,

[0018] The first path is used to provide the conversion current according to the intermediate, and the second path is used to output a mirror current of the conversion current.

[0019] Preferably, the pressure-flow conversion module further comprises:

[0020] a second amplifier, wherein the non-inverting input terminal of the second amplifier is connected to the output terminal of the first amplifier for receiving the intermediate voltage;

[0021] Furthermore, the first path includes a third transistor and a first resistor connected in series between the drain terminal of the first transistor and ground, the control terminal of the third transistor is connected to the output terminal of the second amplifier, and the connection node between the third transistor and the first resistor is connected to the inverting input terminal of the second amplifier.

[0022] Preferably, the output module comprises:

[0023] A second current mirror, the second current mirror comprising a fourth transistor and a fifth transistor, the second path of the first current mirror being connected to the drain end of the fourth transistor, and the drain end of the fifth transistor serving as an output end of the signal conversion circuit;

[0024] The switch module is connected to the output end of the control module, receives the aforementioned pulse signal, and is connected between the gate end of the aforementioned fourth transistor and the gate end of the aforementioned fifth transistor. The pulse signal is used to control the on-off between the gate end of the aforementioned fourth transistor and the gate end of the aforementioned fifth transistor.

[0025] Preferably, the aforementioned switch module is a relay or a power semiconductor switch device.

[0026] Preferably, at least one of the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor is a metal oxide semiconductor field effect transistor.

[0027] Preferably, at least one of the first transistor and the second transistor is a P-type metal oxide semiconductor field effect transistor.

[0028] Preferably, at least one of the third transistor, the fourth transistor and the fifth transistor is an N-type metal oxide semiconductor field effect transistor.

[0029] The beneficial effects of the present invention are as follows: the signal conversion circuit provided by the present invention firstly uses an amplification module to proportionally amplify the input voltage to generate an intermediate voltage; secondly uses an output module to sample the intermediate signal based on a pulse signal; and through a control module connected to the amplification module and the output module respectively, generates a pulse signal provided to the output module according to the proportional coefficient of the amplification module, so that the duty cycle of the pulse signal is proportional to the proportional coefficient of the aforementioned amplification module. The circuit designs the duty cycle of the pulse signal and the gain coefficient of the input voltage amplification, so that the mean value of the signal output by the duty cycle control sampling is the conversion signal corresponding to the input voltage, thereby realizing high-precision conversion, which not only saves costs but also improves the output accuracy and reliability of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings.

[0031] Figure 1 A schematic diagram showing a signal conversion circuit in the prior art;

[0032] Figure 2 A schematic diagram showing another signal conversion circuit in the prior art;

[0033] Figure 3 A schematic block diagram showing the structure of a signal conversion circuit provided in one embodiment of the present disclosure is shown;

[0034] Figure 4 A schematic block diagram showing the structure of a signal conversion circuit provided in another embodiment of the present disclosure is shown;

[0035] Figure 5 Show Figure 4 A circuit diagram of a signal conversion circuit in one embodiment;

[0036] Figure 6 Show Figure 5 The timing diagram of the pulse signal S0 connected to the switch module is shown. DETAILED DESCRIPTION

[0037] In order to facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the content of the present disclosure more thorough and comprehensive.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0039] According to relevant technologies, signal transmission error is an influencing factor that cannot be ignored in the control performance of the system. Therefore, the requirements for the accuracy of signal transmission between systems are becoming higher and higher. For example, in mixed analog and digital circuits or in power management circuits, accurate reference voltage can provide an accurate reference to the ground for the entire system. The system's overvoltage protection, overcurrent protection, overheating protection, error amplifier, comparator and precise current all require an accurate reference point. However, when the reference voltage signal is relatively small, due to system errors, detection accuracy, and interference from layout and wiring parasitic parameters, it is easy to cause a large deviation between the data received by the system and the signal source data, thereby affecting the accuracy of signal transmission, resulting in a decline in system performance, or even system malfunction.

[0040] Based on this, the present disclosure provides a signal conversion circuit, which designs the duty cycle of the pulse signal and the gain coefficient of the input voltage amplification so that the mean value of the duty cycle-controlled sampling output signal is proportional to the conversion signal corresponding to the input voltage, so as to achieve high-precision conversion, improve the output accuracy and reliability of the circuit, and ensure the accuracy and stability of signal transmission in actual circuit applications.

[0041] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0042] Figure 3 A schematic block diagram of the structure of a signal conversion circuit provided in one embodiment of the present disclosure is shown.

[0043] refer to Figure 3 , a voltage-to-voltage signal conversion circuit 100 provided in an embodiment of the present disclosure includes: an amplification module 110, a control module 120 and an output module 130, wherein the amplification module 110 is used to proportionally amplify the input voltage S11 to generate an intermediate voltage S12; the input end of the output module 130 is connected to the output end of the aforementioned amplification module 110, and is used to sample and output the intermediate signal S12 based on the pulse signal S0; and the control module 120 is connected to the amplification module 110 and the output module 130 respectively, and is used to generate a pulse signal S0 provided to the output module 130 according to the proportional coefficient of the amplification module 110, so that the duty cycle of the pulse signal S0 is proportional to the proportional coefficient of the aforementioned amplification module. The signal S13 after amplitude amplification can be used in subsequent system applications to avoid the susceptibility of too small signals to interference during signal transmission and to avoid generating large errors.

[0044] In a preferred embodiment, the amplification module 110, for example, includes a first amplifier (not shown), the in-phase input terminal of the first amplifier is used to obtain the aforementioned input voltage S11, and the inverting input terminal is used to obtain a sample of the intermediate voltage S12 provided by the output terminal of the first amplifier, and the output module 130 uses the pulse signal S0 generated according to the proportional coefficient of the amplification module 110 to sample and output S13 (in this embodiment, the output S13 is a voltage signal) to complete the shaping and conversion of the input voltage S11 into the output voltage S13.

[0045] The signal conversion circuit 100 in this embodiment designs the duty cycle of the pulse signal S0 and the gain coefficient of the input voltage S11 so that the duty cycle controls the average value of the sampled output voltage S13 to be proportional to the conversion signal corresponding to the input voltage S11, so as to achieve high-precision conversion, improve the output accuracy and reliability of the circuit, and at the same time ensure the accuracy and stability of signal transmission in actual circuit applications, such as in voltage converters.

[0046] Furthermore, if the output voltage needs to be a stable DC voltage signal, a filter device can be added after the amplification module 110 outputs the intermediate voltage S12 to further obtain a stable conversion voltage, that is, a high-precision output voltage S13 converted corresponding to the input voltage can be obtained.

[0047] Figure 4 FIG. 1 is a schematic block diagram showing a structure of a signal conversion circuit provided in another embodiment of the present disclosure, Figure 5 Show Figure 4 A circuit diagram of a signal conversion circuit in one implementation is shown.

[0048] refer to Figure 4 and Figure 5 In another embodiment, the present disclosure provides a voltage-to-current signal conversion circuit 200, which includes: an amplification module 210, a voltage-to-current conversion module 240, a control module 220 and an output module 230, wherein the amplification module 210 is used to proportionally amplify the input voltage V11 to generate an intermediate voltage S12; the control module 220 is connected to the amplification module 210 and the output module 230 respectively, and is used to generate a pulse signal S0 provided to the output module 230 according to the proportionality coefficient of the amplification module 210; the voltage-to-current conversion module 240 is connected between the amplification module 210 and the output module 230, and is used to perform voltage-to-current conversion on the aforementioned intermediate voltage S12 to obtain a mirror current S14 of the conversion current I11; and the input end of the output module 230 is connected to the output end of the aforementioned amplification module 210, and is used to sample the conversion current S14 based on the pulse signal S0 and output S13 (in this embodiment, the output S13 is a current signal), wherein the duty cycle of the pulse signal S0 is proportional to the proportionality coefficient of the aforementioned amplification module 210.

[0049] Further, in a preferred embodiment, the duty cycle of the pulse signal S0 and the gain coefficient of the aforementioned input voltage S11 amplification are reciprocal to each other, that is, under the control of the duty cycle of the pulse signal S0, the average value of the output current S13 is the current corresponding to the aforementioned input voltage S11.

[0050] refer to Figure 5 In this embodiment, the amplification module 210 at least includes a first amplifier 211, a second resistor R2 and a third resistor R3.

[0051] Among them, the non-inverting input terminal of the first amplifier 211 is used to obtain the aforementioned input voltage S11, and the output terminal provides the aforementioned intermediate voltage S12; the second resistor R2 and the third resistor R3 are connected in series between the output terminal of the first amplifier 211 and the ground, and the connection node of the second resistor R2 and the third resistor R3 is connected to the inverting input terminal of the aforementioned first amplifier 211.

[0052] Furthermore, the voltage-to-current conversion module 240 includes: a second amplifier 241, a first current mirror, a third transistor T3 and a first resistor R1. Specifically, the first transistor T1 and the second transistor T2 constitute a first current mirror, and the first current mirror has a first path connected to the drain end of the first transistor T1 and a second path connected to the drain end of the second transistor T2, wherein the first path is used to provide its conversion current I11 according to the aforementioned intermediate voltage S12, and the aforementioned second path is used to output the mirror current S14 of the aforementioned conversion current I11.

[0053] The non-inverting input terminal of the second amplifier 241 is connected to the output terminal of the first amplifier 211 to access the aforementioned intermediate voltage S12. The aforementioned first path includes a third transistor T3 and a first resistor R1 connected in series between the drain terminal of the first transistor T1 and the ground. The control terminal of the third transistor T3 is connected to the output terminal of the second amplifier 241, and the connection node between the third transistor T3 and the first resistor R1 is connected to the inverting input terminal of the second amplifier 241 to form a negative feedback loop. It is used to provide a feedback voltage Vn. The first resistor R1 is connected to the inverting input terminal of the second amplifier 241, so the current I11 flowing through the first resistor R1 is equal to the feedback voltage Vn divided by the resistance value of the first resistor R1.

[0054] Further, the output module 230 includes: a second current mirror and a switch module SW, specifically, the fourth transistor T5 and the fifth transistor T6 constitute a second current mirror, the second path of the aforementioned first current mirror is connected to the drain end of the fourth transistor T4, and the drain end of the fifth transistor T5 serves as the output end of the signal conversion circuit 200, for replicating the aforementioned mirror current S14 and outputting the mirror current S13; the switch module SW is connected to the pulse signal S0, and is connected between the gate end of the fourth transistor T4 and the gate end of the fifth transistor T5, and the pulse signal S0 is used to control the on-off between the gate end of the fourth transistor T4 and the gate end of the fifth transistor T5.

[0055] Furthermore, the first transistor T1 and the second transistor T2, the fourth transistor T4 and the fifth transistor T5 are designed to match each other, then the ratio of the conversion current I11 to its mirror current S14 is equal to the ratio of the width-to-length ratio of the first transistor T1 and the second transistor T2, and the ratio of the mirror current S14 to its mirror current S13 is equal to the ratio of the width-to-length ratio of the fourth transistor T4 and the fifth transistor T5. In a preferred embodiment of the present disclosure, for example, the ratio of the width-to-length ratio of the first transistor T1 and the second transistor T2, the fourth transistor T4 and the fifth transistor T5 are all 1:1 mutual matching relationship, thereby forming a precise current mirror matching.

[0056] Furthermore, the switch module SW is, for example but not limited to, a relay or a power semiconductor switch device (such as a transistor or a thyristor).

[0057] Furthermore, the first transistor T1 , the second transistor T2 , the third transistor T3 , the fourth transistor T4 and the fifth transistor T5 are, for example, metal oxide semiconductor field effect transistors (MOS transistors for short).

[0058] The signal conversion circuit 200 provided in the embodiment of the present disclosure is not limited to Figure 5 As shown in the circuit diagram, the transistors in the signal conversion circuit 200 of the present disclosure may also be other transistors such as bipolar junction transistors (BJT). In the following, in this embodiment, the first transistor T1 and the second transistor T2 are both PMOS transistors, and the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are all NMOS transistors.

[0059] Figure 6 Show Figure 5 The timing diagram of the pulse signal S0 connected to the switch module is shown.

[0060] refer to Figure 5 The signal conversion circuit 200 provided in the embodiment of the present disclosure uses the amplification module 210 to amplify the input voltage S11 by m times through the first amplifier 211 (assuming that the amplification gain coefficient of the first amplifier 211 is, for example, m, and m≥1), where m=(R2+R3) / R2, and the obtained intermediate voltage is:

[0061] S12=S11*m (1)

[0062] Then, the voltage-to-current conversion module 240 is used to obtain a conversion current I11 corresponding to the voltage S12, for example, its value is:

[0063] I11=S12 / R0 (2)

[0064] Wherein, R0 is the equivalent impedance in the pressure-to-flow conversion module 240 .

[0065] In the voltage-current conversion module 240, the feedback loop formed by the second amplifier 241 and the third transistor T3 is used to control the feedback voltage Vn to follow the change of the intermediate voltage S12. Figure 5 The circuit connection relationship is shown in Figure 2.

[0066] I11=Vn / R1=S12 / R1 (3)

[0067] Wherein, R1 represents the resistance value of the first resistor R1.

[0068] According to the first current mirror structure, S14 / I11=K, K is a constant, preferably, K is 1, that is,

[0069] S14=I11 (4)

[0070] Through the first current mirror, a mirror current S14 of the conversion current I11 corresponding to the voltage S12 is obtained and used by subsequent modules.

[0071] refer to Figure 5 and Figure 6 Assuming that the period of the pulse signal S0 is T, the ratio of the on-time t to the period T in each period (the duty cycle of the pulse signal S0) is, for example, 1 / m.

[0072] In the output module 230 of the present embodiment, the fourth transistor T4 and the fifth transistor T5 are in a mirror current relationship. If there is no switch module SW, the mirror current S14 is equal to the mirror current S13 in value. By connecting a switch module SW in series on the path of the mirror current S14 and the mirror current S13, and the duty cycle 1 / m of the pulse signal S0 and the gain coefficient m of the aforementioned input voltage S11 amplification are reciprocal to each other, the output module 230 is controlled to be in an intermittently conducting circuit state, and the wave of the obtained mirror current S13 is formed into a pulse shape, and its average value is:

[0073] AVE_S13=S14 / m (5)

[0074] Combining the above formulas (1) to (4), we can get the following after simplification:

[0075] AVE_S13=S11 / R0 (6)

[0076] That is, the average value of the mirror current S13 output by the signal conversion circuit 100 is the current corresponding to the aforementioned input voltage S11, thereby achieving the purpose of high-precision conversion and stable output.

[0077] In addition, the signal conversion circuit in the above description takes voltage conversion into current as an example, and the output current is a digital pulse signal, which can be directly applied to subsequent circuit scenarios such as in digital-analog hybrid circuits or in power management circuits.

[0078] The signal conversion circuit 200 provided in the embodiment of the present disclosure first utilizes the first amplifier 211 in the amplification module 210 to proportionally amplify the input voltage S11; then utilizes the input end of the voltage-to-current conversion module 240 to connect with the output end of the amplification module 210 to perform voltage-to-current conversion on the intermediate voltage S12 to obtain the conversion current I11; then utilizes the output module 230 connected to the voltage-to-current conversion module 240 to access a pulse signal S0 with a certain duty cycle, controls the output module 230 to be in an intermittently conductive circuit state, and samples the output current S13. Specifically, in one embodiment, the duty cycle 1 / m of the pulse signal S0 and the gain coefficient m of the aforementioned input voltage S11 amplification are reciprocals of each other, so that the average value AVE_S13 of the mirror current S13 of the aforementioned conversion current I11 outputted is the current corresponding to the input voltage S11.

[0079] In summary, the signal conversion circuit provided in the embodiment of the present disclosure designs the duty cycle of the pulse signal S0 and the gain coefficient of the amplification of the input voltage S11 so that the mean value of the duty cycle-controlled sampling output signal S13 is proportional to the conversion signal corresponding to the input voltage S11, so as to achieve high-precision conversion, improve the output accuracy and reliability of the circuit, and at the same time ensure the accuracy and stability of signal transmission in actual circuit applications, such as in voltage converters.

[0080] It should be noted that in the description of the present disclosure, it needs to be understood that the terms "upper", "lower", "inner" and the like indicating orientation or positional relationship are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the components or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present disclosure.

[0081] In addition, in this article, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device that includes the element.

[0082] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly illustrating the present disclosure, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present disclosure.

Claims

1. A signal conversion circuit, comprising: An amplification module, used for proportionally amplifying the input voltage to generate an intermediate voltage; an output module, the input end of the output module being connected to the output end of the amplification module and being used for sampling the intermediate signal based on the pulse signal; as well as a control module, connected to the amplification module and the output module respectively, for generating the pulse signal provided to the output module according to the proportionality coefficient of the amplification module, so that the duty cycle of the pulse signal is proportional to the proportionality coefficient of the amplification module, Wherein, the duty cycle of the pulse signal and the gain coefficient of the input voltage amplification are reciprocals of each other.

2. The signal conversion circuit according to claim 1, wherein: The amplification module comprises: A first amplifier, wherein a non-inverting input terminal of the first amplifier is used to obtain the input voltage, and an output terminal of the first amplifier provides the intermediate voltage; A second resistor and a third resistor are connected in series between the output terminal of the first amplifier and the ground, and a connection node of the second resistor and the third resistor is connected to the inverting input terminal of the first amplifier.

3. The signal conversion circuit according to claim 2, wherein: Also includes: A voltage-to-current conversion module, which is connected between the amplification module and the output module and is used to perform voltage-to-current conversion on the intermediate voltage to obtain a conversion current. The output module samples the conversion current based on the pulse signal.

4. The signal conversion circuit according to claim 3, wherein: The pressure-flow conversion module comprises: a first current mirror, the first current mirror comprising a first transistor and a second transistor, the first current mirror having a first path connected to a drain terminal of the first transistor and a second path connected to a drain terminal of the second transistor, The first path is used to provide the conversion current according to the intermediate voltage, and the second path is used to output a mirror current of the conversion current.

5. The signal conversion circuit according to claim 4, wherein: The pressure-flow conversion module also includes: a second amplifier, wherein a non-inverting input terminal of the second amplifier is connected to an output terminal of the first amplifier for receiving the intermediate voltage; Furthermore, the first path includes a third transistor and a first resistor connected in series between the drain terminal of the first transistor and ground, the control terminal of the third transistor is connected to the output terminal of the second amplifier, and the connection node between the third transistor and the first resistor is connected to the inverting input terminal of the second amplifier.

6. The signal conversion circuit according to claim 5, wherein: The output module comprises: a second current mirror, wherein the second current mirror comprises a fourth transistor and a fifth transistor, the second path of the first current mirror is connected to the drain end of the fourth transistor, and the drain end of the fifth transistor serves as the output end of the signal conversion circuit; A switch module is connected to the output end of the control module, receives the pulse signal, and is connected between the gate end of the fourth transistor and the gate end of the fifth transistor. The pulse signal is used to control the on-off between the gate end of the fourth transistor and the gate end of the fifth transistor.

7. The signal conversion circuit according to claim 6, wherein: The switch module is a relay or a power semiconductor switch device.

8. The signal conversion circuit according to claim 6, wherein: At least one of the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor is a metal oxide semiconductor field effect transistor.

9. The signal conversion circuit according to claim 8, wherein: Either the first transistor or the second transistor is a P-type metal oxide semiconductor field effect transistor.

10. The signal conversion circuit according to claim 8, wherein: Any one of the third transistor, the fourth transistor and the fifth transistor is an N-type metal oxide semiconductor field effect transistor.

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