A solder ball bump structure and preparation method thereof
By using composite pads and flux in electronic modules to form a high melting point bump structure, the thermal stress and warping problems of high-temperature solder balls are solved, and low-temperature bonding and high melting point bumps are achieved, suitable for small-scale Electronic module.
Patent Information
- Application Number
- CN202210336230.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-31
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2042-03-31
AI Technical Summary
In electronic modules, the high reflow temperature of high-temperature solder balls leads to thermal stress and warping problems. At the same time, the traditional low-temperature solder paste method is not suitable for bump sizes less than 100 microns. It is urgently necessary to have a new micro bump structure that can be used at low temperatures. Bond and maintain high melting point.
By applying a surface dielectric passivation layer and an electroplating seed layer on the sheet-shaped multilayer structure substrate, a new pad is formed and a solder ball is placed thereon, and a composite bump structure is formed using the melting point difference between the flux and the pad solder layer. The solder balls diffuse with the pad solder layer to form high melting point bumps, and the low melting point solder layer is electroplated on top to reduce the bonding temperature.
It realizes that the kyphoon remains high melting point after low temperature bonding, reduces thermal stress and warpage, and reduces the high temperature requirements for chips and substrates, and is suitable for small electronic modules.
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Figure CN114695149B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of advanced electronic packaging, and in particular relates to a solder ball convex point structure and a preparation method thereof. Background Art
[0002] As integrated electronic systems develop from 2D to 3D, solder ball bump arrays gradually replace traditional metal leads and metal tube legs to become the main form of electrical connection in electronic system modules. Electronic modules undergo multiple welding processes during production and use. High-reliability modules require temperature gradients between multiple welding processes during production and use to ensure that the formed solder joints no longer melt during subsequent welding processes. This requires a series of solder ball material bumps arranged from high to low melting points. For example, in current military electronic modules, high-lead Pb90Sn10 solder balls are commonly used high-temperature solder ball bump materials, with a welding temperature of around 330°C. When high-temperature solder balls are directly reflowed at high temperatures, not only does the reflow temperature that the reflow equipment can reach be high enough, but also special high-temperature resistant flux materials are required. At the same time, more stringent requirements are placed on the heat-bearing capacity of substrates and chips, etc. In addition, high reflow temperatures will also introduce a series of thermal stress problems such as increased residual stress and increased warping. In PCB surface mounting, the method of brushing low-temperature solder paste on the pad to solder high-temperature solder balls is usually used to reduce the soldering process temperature. However, as the size of the bumps in electronic modules is less than 100 microns, the above method is no longer applicable. There is an urgent need for a new type of micro-bump structure that can use a lower soldering process temperature during bonding, while the entire bump still has a higher melting point after bonding. Summary of the invention
[0003] The invention provides a solder ball bump structure and a preparation method thereof, so as to realize low temperature bonding of high temperature solder ball bumps.
[0004] To achieve the above object, the present invention proposes the following technical solutions:
[0005] A method for preparing a solder ball bump comprises the following steps:
[0006] Step 1: applying a surface dielectric passivation layer on the surface of the sheet-like multi-layer structure substrate, and providing a plurality of pad openings on the surface dielectric passivation layer;
[0007] Step 2: depositing an electroplating seed layer on the entire surface of the surface dielectric passivation layer, wherein the electroplating seed layer deposited in the pad opening contacts the sheet-like multilayer structure substrate;
[0008] Step 3: Graphically plate the pad conductive layer, pad isolation layer, and pad solder layer at the position corresponding to the pad opening, and the plated pad conductive layer, pad isolation layer, and pad solder layer together constitute a new pad;
[0009] Step 4: Apply flux on the new pad, and then place the solder ball on the new pad. The melting point of the solder ball is higher than the melting point of the solder layer of the pad. Based on the melting point of the solder layer of the pad, after heat reflow, the solder ball and the solder layer of the pad form a bump;
[0010] Step 5: Apply dielectric glue on the substrate where the bumps are formed, expose the top of the bumps, and electroplate a solder layer on the top of the bumps on the exposed tops of the bumps, wherein the melting point of the solder layer on the top of the bumps is lower than the melting point of the bumps;
[0011] Step 6: Remove the dielectric glue around the bumps and remove the electroplating seed layer exposed outside the bumps to complete the preparation.
[0012] Preferably, the sheet-like multilayer structure substrate comprises a base, a top metal layer and an intermetallic dielectric, wherein the base surface has a top metal layer, the top metal layer has a plurality of metal patterns, and an intermetallic dielectric is arranged between each metal pattern.
[0013] Preferably, the electroplating seed layer metal deposited in the pad opening in step 2 contacts the surface of the top metal layer.
[0014] Preferably, the electroplating seed layer includes a metal adhesion layer at a lower layer and an electroplating conductive layer at an upper layer.
[0015] Preferably, the pattern of the new pad on the plane completely covers and is larger than the pattern of the pad opening.
[0016] Preferably, the method of applying the flux in step 4 is large-area spin coating, large-area spray coating, fixed-point spray coating or fixed-point flux coating.
[0017] Preferably, the reflow temperature in step 4 is generally the melting point of the solder layer of the pad plus 20-30°C.
[0018] Preferably, in step six, a large area, small dose, shallow exposure and development method is used to remove the dielectric glue.
[0019] Preferably, the thickness of the pad conductive layer is greater than 3 microns and less than 100 microns; the thickness of the pad isolation layer is greater than 2 microns and less than 10 microns; the thickness of the pad solder layer is greater than 5 microns and less than 100 microns; the thickness of the solder layer on the top of the bump is greater than 5 microns and less than 100 microns.
[0020] A solder ball bump structure comprises a substrate, an intermetallic dielectric, a surface dielectric passivation layer, a top metal layer, a pad opening, an electroplating seed layer, a pad conductive layer, a pad isolation layer, a bump and a bump top solder layer;
[0021] A top metal layer is provided on the surface of the substrate; a plurality of metal patterns are provided on the top metal layer, and a metal intermediary is provided between each metal pattern to achieve electrical insulation isolation; a pad opening is provided on the surface dielectric passivation layer, an electroplating seed layer is provided on the pad opening, a pad conductive layer, a pad isolation layer and bumps are provided on the electroplating seed layer, and a top solder layer is provided on the bumps;
[0022] The top solder layer covers the top of the bump and is in full contact with the spherical crown surface of the top of the bump;
[0023] The present invention is beneficial in that:
[0024] The present invention provides a solder ball bump structure and a preparation method thereof. A bump top solder layer is electroplated on an exposed bump top to form a composite structure bump. The melting point of the bump top solder layer is lower than the melting point of the bump. In this way, the welding process temperature during bonding is reduced, and the welding process temperature may not be higher than the melting point of the high-temperature solder ball bump. After bonding is completed, due to the diffusion of different solder components, the composite structure disappears, and the low-temperature solder layer disappears, so that the entire solder ball bump still presents a high melting point characteristic after bonding, which is beneficial to reducing thermal stress and warping, and also reduces the high temperature requirements for all related materials involved in the welding bonding process, such as chips, substrates, and flux. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:
[0026] Figure 1 It is a schematic diagram of the cross-sectional structure of a sheet-like multi-layer substrate.
[0027] Figure 2 It is a schematic diagram of the cross-sectional structure after the electroplating seed layer is deposited on the entire surface of the sheet-like multi-layer structure substrate.
[0028] Figure 3 It is a schematic diagram of the cross-sectional structure after a new pad is formed by patterned electroplating on a sheet-like multi-layer structure substrate.
[0029] Figure 4 A schematic diagram of the cross-sectional structure for placing a solder ball on a new pad.
[0030] Figure 5 It is a schematic diagram of the cross-sectional structure after reflow.
[0031] Figure 6 It is a schematic diagram of the cross-sectional structure after a bump patterning mask.
[0032] Figure 7 This is a schematic diagram of the cross-sectional structure of a bump after patterned solder electroplating on the top.
[0033] Figure 8 It is a schematic diagram of a sheet-like multilayer structure with a solder layer on top of the bump.
[0034] Fig. 9 This is a schematic diagram of the cross-sectional structure of another type of bump patterning mask.
[0035] Fig.10 This is a schematic diagram of the cross-sectional structure of another type of bump after patterned solder electroplating on the top.
[0036] Fig.11 It is a schematic diagram of the cross-sectional structure of a sheet-like multilayer structure with a solder layer on the top of the bump, which is placed upside down on another substrate.
[0037] Fig.12 It is a schematic diagram of the cross-sectional structure of a sheet-like multilayer structure with a solder layer on the top of a bump being flip-chip bonded to another substrate.
[0038] Fig.13 A schematic diagram of a method for preparing solder ball bumps. DETAILED DESCRIPTION
[0039] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present invention can be combined with each other without conflict.
[0040] The following detailed description is an exemplary description, which is intended to provide further detailed description of the present invention. Unless otherwise specified, all technical terms used in the present invention have the same meaning as those generally understood by those skilled in the art to which the present invention belongs. The terms used in the present invention are only for describing specific embodiments, and are not intended to limit the exemplary embodiments according to the present invention.
[0041] Embodiment 1:
[0042] The invention provides a solder ball convex point structure and a preparation method thereof.
[0043] Reference Figure 8 , a solder ball bump structure, comprising a substrate 1, an intermetallic dielectric 2, a surface dielectric passivation layer 3, a top metal layer 4, a pad opening 5, an electroplating seed layer 6, an electroplating pad conductive layer 7, a pad isolation layer 8, a bump 11 and a bump top solder layer 13;
[0044] A top metal layer 4 is provided on the surface of the substrate 1; a plurality of metal patterns are provided on the top metal layer 4, and a metal interlayer dielectric 2 is provided between each metal pattern to achieve electrical insulation isolation; a pad opening 5 is provided on the surface dielectric passivation layer 3, a plating seed layer 6 is provided on the pad opening 5, a plating pad conductive layer 7, a pad isolation layer 8 and a bump 11 are provided on the plating seed layer 6, and a top solder layer 13 is provided on the bump 11.
[0045] The top solder layer (13) covers the top of the bump (11) and is in complete contact with the spherical crown surface of the top of the bump (11);
[0046] The melting point of the top solder layer (13) is lower than the melting point of the bump (11).
[0047] A method for preparing a solder ball bump comprises the following steps:
[0048] Step 1: If Figure 1 As shown, a surface dielectric passivation layer 3 is applied to the surface of a sheet-like multilayer structure substrate 100, and a top metal layer 4 at a position corresponding to the bump is exposed; the sheet-like multilayer structure substrate 100 comprises a substrate 1, an intermetallic dielectric 2 and a top metal layer 4; there is a top metal layer 4 on the surface of the substrate 1, and the top metal layer 4 can be composed of a single metal, such as copper or aluminum, but is not limited thereto, and can also be a composite metal layer composed of multiple single metal layers; the top metal layer 4 can be an external lead-out metal layer of the chip, and there are multiple metal patterns on the top metal layer 4, and an intermetallic dielectric 2 is provided between each metal pattern to achieve electrical insulation isolation.
[0049] There are multiple pad openings 5 on the surface dielectric passivation layer 3. When the surface metal passivation layer 3 is applied to the surface of the sheet-like multilayer structure substrate 100, the portion of the top metal layer 4 corresponding to the pad opening 5 is exposed to become the external electrical lead-out pad of the base 1. The portion of the top metal layer 4 corresponding to the pad opening 5 can be gold or aluminum, but not limited to this; the shape can be square, rectangular, circular, regular polygon, etc., but not limited to this.
[0050] Surface treatments such as electroless nickel-gold or nickel-palladium-gold can be applied to enhance protection of exposed metal surfaces.
[0051] Step 2: If Figure 2 , depositing an electroplating seed layer 6 on the entire surface of the surface dielectric passivation layer 3;
[0052] The electroplating seed layer 6 is deposited on the entire surface of the surface dielectric passivation layer 3, and a portion of the electroplating seed layer 6 is deposited in the pad opening 5. The portion of the electroplating seed layer 6 deposited in the pad opening 5 contacts the surface of the top metal layer 4, forming an electrical connection between the top metal layer 4 and the electroplating seed layer 6.
[0053] The electroplating seed layer 6 includes a metal adhesion layer and an electroplating conductive layer. The metal adhesion layer is located in the lower layer and directly contacts the surface dielectric passivation layer 3 and the upper surface of the top metal layer 4 exposed in the pad opening 5. Its function is to enhance the bonding force between the electroplating seed layer 6 and the surface dielectric passivation layer 3 and the top metal layer 4.
[0054] The thickness of the metal adhesion layer of the electroplating seed layer 6 is in the range of 0.05-0.3 microns, and the material can be Ti, TiN, Ta, TaN, TiW, etc., but not limited thereto. The electroplating conductive layer is located on the metal adhesion layer, and its thickness is in the range of 0.2-1 microns, and the material can be Cu, Ni, etc., but not limited thereto.
[0055] Step 3: If Figure 3 , patterning the electroplated pad conductive layer 7, the pad isolation layer 8, and the pad solder layer 9 at the corresponding position of the bump to form a new pad;
[0056] The electroplated pad conductive layer 7, pad isolation layer 8, and pad solder layer 9 are patterned in sequence at the position corresponding to the pad opening 5, and the shapes of the above layers on the plane are consistent. The electroplated pad conductive layer 7, pad isolation layer 8, and pad solder layer 9 together constitute a new pad, and the shape of the new pad on the plane can be a circle or a regular polygon, but a circle is preferred. The pattern of the above new pad on the plane completely covers and is larger than the pattern of the pad opening 5, and the upper surface of the top metal layer 4 exposed in the pad opening 5 is completely covered by the new pad. At the same time, the new pad also covers part of the surface dielectric passivation layer 3 around the pad opening 5. This not only enhances the bonding force of the new pad, but also protects the top metal layer 4, especially the top metal layer 4 exposed in the pad opening 5, in subsequent wet processes such as electroplating and flux cleaning.
[0057] The material of the pad conductive layer 7 is preferably copper, and the thickness ranges from greater than 3 microns to less than 100 microns.
[0058] The material of the pad isolation layer 8 is preferably nickel, and the thickness ranges from greater than 2 microns to less than 10 microns.
[0059] The material of the pad solder layer 9 is tin or tin alloy material, which can be a binary alloy or a ternary or higher multi-element alloy; the thickness of the pad solder layer 9 is greater than 5 microns and less than 100 microns; the melting point of the pad solder layer 9 is less than the melting point of the solder ball 10.
[0060] Step 4: If Figure 4 , 5 , placing a solder ball 10 on the new pad, based on the melting point of the pad solder layer 9, and forming a bump 11 after thermal reflow;
[0061] First, apply flux on the new pad prepared as above. Methods of applying flux include large-area spin coating, large-area spray coating, fixed-point spray coating, and fixed-point flux coating, but not limited to these. Then place the solder balls 10 on the corresponding new pads one by one. The placement methods include wafer-level ball planting, steel mesh ball planting, laser ball planting, etc., but not limited to these. The flux will temporarily adhere the single solder ball 10 to the new pad to prevent the solder ball 10 from rolling and falling off. The melting point of the solder ball 10 is higher than the melting point of the pad solder layer 9. The solder ball 10 can be a high-lead solder ball, such as Pb90Sn10, or a lead-free solder ball, and can be a binary alloy or a ternary or higher multi-element alloy.
[0062] The substrate with the solder ball 10 placed on the new pad is subjected to thermal reflow, and the reflow temperature is generally the melting point of the pad solder layer 9 plus 20-30°C. The melting point of the solder ball 10 is higher than the melting point of the pad solder layer 9. During the thermal reflow process, the solder ball 10 itself does not melt or does not melt fully. During the thermal reflow process, the pad solder layer 9 melts, and the material of the pad solder layer 9 and the material of the solder ball 10 diffuse and fuse with each other to form a bump 11. The melting point of the formed bump 11 is higher than the melting point of the pad solder layer 9 and slightly lower than the melting point of the solder ball 10.
[0063] Step 5: If Figure 6 , 7 , applying dielectric glue 12 on the substrate of the bump 11 to expose the top of the bump 11, and electroplating a bump top solder layer 13 on the top of the exposed bump 11;
[0064] A dielectric glue 12 is applied to the substrate with the formed bump 11. The method of applying the dielectric glue includes spin coating and spray coating, but is not limited thereto. Since the thickness of the dielectric glue 12 on the bump 11 is much smaller than the thickness of the dielectric glue 12 on the surrounding electroplating seed layer 6, a method of large-area, small-dose shallow exposure and development is adopted to remove the dielectric glue 12 on the top of the bump 11 and expose the top of the bump 11. The exposed surface of the top of the bump 11 obtained by this method is higher than the top surface of the surrounding residual dielectric glue 12, as shown in the attached Figure 6 As shown, it is easier to implement patterned electroplating.
[0065] A voltage is applied to the electroplating seed layer 6 to electroplate a bump top solder layer 13 on the top of the exposed bumps 11 .
[0066] The material of the solder layer 13 on the top of the bump is tin or a tin alloy material, which can be a binary alloy or a ternary or higher multi-element alloy. The melting point of the solder layer 13 on the top of the bump is lower than the melting point of the bump 11; the thickness of the solder layer 13 on the top of the bump is greater than 5 microns and less than 100 microns.
[0067] Step 6: If Figure 8, remove the dielectric glue 12 around the bump 11, and remove the exposed electroplating seed layer 6, to complete the preparation of the composite bump with a solder layer on the top of the solder ball bump;.
[0068] The dielectric glue 12 around the bump 11 is removed to expose the electroplating seed layer 6 at the bottom, and then the exposed electroplating seed layer 6 is further etched away to complete the preparation of the bump with the top low-temperature solder layer on the substrate, forming a sheet-like multilayer structure 200 with a solder layer on the top of the bump, as shown in FIG. Figure 8 shown.
[0069] Methods for removing the dielectric glue 12 include, but are not limited to, organic solution dissolution or stripping, dry plasma stripping, and the like.
[0070] The etching of the electroplating seed layer 6 is preferably wet etching, and the amount of side etching needs to be controlled.
[0071] Embodiment 2:
[0072] like Fig.11 , a sheet-like multilayer structure 200 with a solder layer on the top of the bump is dipped in flux on the top of the bump 11, including the solder layer 13, or flux is applied to the pad 15 on the surface of the substrate 14, and then the sheet-like multilayer structure 200 with a solder layer on the top of the bump is placed upside down on the surface of the substrate 14, so that the solder layer 13 on the top of each bump 11 is aligned with and in contact with the center of a corresponding pad 15 on the substrate 14.
[0073] The adhesion of the solder flux prevents the bump 11 and the top solder layer 13 from sliding significantly relative to the corresponding pad 15 during the subsequent transfer process.
[0074] like Fig.12 , the solder layer 13 on the top of the bump 11 and the pad 15 in contact, after the heating welding process, when the welding temperature reaches the melting point of the solder layer 13, the molten solder layer 13 material on the one hand, diffuses with the surface material of the pad 15, and on the other hand, diffuses with the material of the bump 11, completing the stable bonding between the bump 11 and the pad 15, forming a new bonding bump 16. After welding and bonding, the solder layer 13 basically disappears, and the melting point of the bonding bump 16 is higher than that of the solder layer 13, still showing the characteristics of a high-temperature bump. Thereafter, when the temperature rises to the melting point of the solder layer 13 again, the bonding bump 16 will not melt.
[0075] Embodiment 3:
[0076] The removal of the dielectric glue 12 on the top of the bump 11 can also be done by patterned photolithography. The opening diameter of the photolithography mask is smaller than the projection diameter of the bump 11 in the XY plane direction. The cross section after exposure and development is as follows: Fig. 9 As shown, the exposed surface of the top of the bump 11 is lower than the surface of the surrounding dielectric glue 12 , that is, the exposed surface of the top of the bump 11 is located at the bottom of the opening of the dielectric glue 12 .
[0077] Power is applied to the electroplating seed layer 6, and the top solder layer 13 of the bump is electroplated on the exposed surface of the top of the bump 11 at the bottom of the opening of the dielectric glue 12. The electroplating area is limited by the size of the opening of the dielectric glue 12. Then, after removing the dielectric glue 12 and the subsequent exposed electroplating seed layer 6, the same structure is formed. Figure 8 The multi-layer structure 200 is shown as a sheet with a solder layer on top of the bumps.
[0078] The melting point of the bump top solder layer 13 is lower than the melting point of the bump 11 .
[0079] It is known from common technical knowledge that the present invention can be implemented by other embodiments that do not deviate from its spirit or essential features. Therefore, the above disclosed embodiments are only illustrative in all respects and are not exclusive. All changes within the scope of the present invention or within the scope equivalent to the present invention are included in the present invention.
Claims
1. A method for preparing a solder ball bump, characterized in that: The steps include: Step 1: applying a surface dielectric passivation layer (3) on the surface of a sheet-like multilayer structure substrate (100), wherein a plurality of pad openings (5) are provided on the surface dielectric passivation layer (3); Step 2: depositing an electroplating seed layer (6) on the entire surface of the surface dielectric passivation layer (3), wherein the electroplating seed layer (6) deposited in the pad opening (5) contacts the sheet-like multilayer structure substrate (100); Step 3: patterning a pad conductive layer (7), a pad isolation layer (8), and a pad solder layer (9) at a position corresponding to the pad opening (5), wherein the pad conductive layer (7), the pad isolation layer (8), and the pad solder layer (9) together constitute a new pad; Step 4: applying flux on the new pad, and then placing a solder ball (10) on the new pad, the melting point of the solder ball (10) being higher than the melting point of the pad solder layer (9), and based on the melting point of the pad solder layer (9), after heat reflow, the solder ball (10) and the pad solder layer (9) form a bump (11); Step 5: Applying a dielectric glue (12) on a substrate on which a bump (11) is formed to expose the top of the bump (11), and electroplating a bump top solder layer (13) on the top of the exposed bump (11), wherein the melting point of the bump top solder layer (13) is lower than the melting point of the bump (11); Step 6: Remove the dielectric glue (12) around the bump (11), and remove the electroplating seed layer (6) exposed outside the bump (11), to complete the preparation of the solder ball bump.
2. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The sheet-like multilayer structure substrate (100) comprises a base (1), a top metal layer (4) and an intermetallic dielectric (2). The base (1) has a top metal layer (4) on its surface, the top metal layer (4) has a plurality of metal patterns, and the intermetallic dielectric (2) is provided between the metal patterns.
3. A method for preparing a solder ball bump as claimed in claim 2, characterized in that: The electroplating seed layer (6) metal deposited in the pad opening (5) in step 2 contacts the surface of the corresponding top metal layer (4).
4. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The electroplating seed layer (6) comprises a metal adhesion layer at a lower layer and an electroplating conductive layer at an upper layer.
5. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The pattern of the new pad on the plane completely covers and is larger than the pattern of the pad opening (5).
6. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The method of applying the flux in step 4 is large-area spin coating, large-area spray coating, fixed-point spray coating or fixed-point flux coating.
7. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The reflow temperature in step 4 is the melting point of the pad solder layer (9) plus 20-30°C.
8. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: In step six, a large-area, small-dose shallow exposure and development method is used to remove the dielectric glue (12).
9. A method for preparing a solder ball bump as claimed in claim 1, characterized in that: The thickness of the pad conductive layer (7) is greater than 3 microns and less than 100 microns; the thickness of the pad isolation layer (8) is greater than 2 microns and less than 10 microns; the thickness of the pad solder layer (9) is greater than 5 microns and less than 100 microns; and the thickness of the bump top solder layer (13) is greater than 5 microns and less than 100 microns.
10. A solder ball bump structure, characterized in that: A solder ball bump prepared by a method for preparing a solder ball bump according to any one of claims 1 to 9, comprising a substrate (1), an intermetallic dielectric (2), a surface dielectric passivation layer (3), a top metal layer (4), a pad opening (5), an electroplating seed layer (6), an electroplating pad conductive layer (7), a pad isolation layer (8), a bump (11) and a bump top solder layer (13); A top metal layer (4) is provided on the surface of the substrate (1); A plurality of metal patterns are provided on the top metal layer (4), and a metal intermediary (2) is provided between each metal pattern to achieve electrical insulation isolation; a surface dielectric passivation layer (3) is provided on the metal intermediary (2) and the top metal layer (4); a plurality of pad openings (5) are provided on the surface dielectric passivation layer (3), and the positions of the pad openings (5) correspond to the corresponding metal patterns of the top metal layer (4); an electroplating seed layer (6) is provided on the pad openings (5), an electroplating pad conductive layer (7), a pad isolation layer (8) and a bump (11) are provided on the electroplating seed layer (6), and a top solder layer (13) is provided on the bump (11); The top solder layer (13) covers the top of the bump (11) and is in complete contact with the spherical crown surface of the top of the bump (11).
