Circuit structure and method for realizing phase fine-tuning of square wave control of brushless DC motor

Abstract

The present invention relates to a circuit structure for fine-tuning the square-wave control phase of a brushless DC motor. The circuit structure comprises a PWM configuration register that generates six n-bit PWM signals based on rotor position; a 3-8 decoder that divides the signals into six signals, namely, bit 1 through bit 6; an expansion module that expands the bit 1 through bit 6 signals into n-bit identical signals, resulting in 6n-bit signals; an n-bit AND gate module that performs an AND operation on the expanded 6n-bit signals and the 6n-bit PWM configuration signals; and an n-bit OR gate module that receives the six fused signal groups and performs an OR operation on the six n-bit PWM configuration signals. The circuit structure and method for fine-tuning the square-wave control phase of a brushless DC motor employing the present invention fine-tunes the phase advance or lag by changing the duty cycle configuration register, thereby improving motor operating efficiency without requiring complex software programming. Hardware implementation of the commutation process simplifies software implementation and reduces CPU time, freeing the CPU for other safety controls.

Description

Technical Field

[0001] The present invention relates to the field of motor control, in particular to the field of square wave control mode, and specifically refers to a circuit structure and method for achieving phase fine-tuning of square wave control of a brushless DC motor. Background Art

[0002] The square-wave control mode of brushless DC motors offers high starting torque, simple control, and low cost, so it is still widely used in many fields. As control requirements increase, software complexity also gradually increases.

[0003] For example, for the square wave control mode, the conventional control (HPWM-LON) results are shown in Figure 1 , the torque pulsation is obvious during the commutation process, and the life of the MOS tubes in the upper and lower arms will also be different.

[0004] Patent CN106685278A proposes to calculate the quadrature-axis current by sampling the phase current to determine whether the current phase adjustment is optimal. However, this adjustment scheme is suitable for permanent magnet synchronous motor control, but not for square wave control of brushless DC motors.

[0005] The existing phase adjustment technology mainly involves coarse adjustment of lead and lag, and when implemented by software, it is necessary to calculate the speed and then compensate for the large lead.

[0006] The existing technology has the following disadvantages:

[0007] 1. Control methods used in permanent magnet synchronous motors, such as the method of determining the quadrature-axis current, cannot be directly applied to brushless DC motors. This is because all three phases of the former are conducting, while only two phases of the brushless DC motor are conducting. Therefore, torque fluctuations will occur during phase switching, and the current phase adjustment cannot be achieved by controlling the id (direct-axis current) to 0, as in permanent magnet synchronous motors.

[0008] 2. Phase adjustment generally uses coarse adjustment to advance or lag, which cannot achieve optimal control.

[0009] 3. Currently, motor control commutation or phase adjustment methods all rely on software control. The present invention uses hardware to achieve automatic phase fine-tuning without occupying CPU resources. Summary of the Invention

[0010] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a circuit structure and method for realizing square wave control phase fine adjustment of a brushless DC motor with simple control, low control cost and a wide range of applications.

[0011] In order to achieve the above object, the circuit structure of the present invention for realizing square wave control phase fine adjustment of a brushless DC motor is as follows:

[0012] The circuit structure for achieving square wave control phase fine adjustment of a brushless DC motor has the following main features:

[0013] PWM configuration register, used to obtain 6 groups of n-bit configuration PWM signals according to the rotor position;

[0014] Signal input module, used to receive input hall signal and identify 6 rotor positions;

[0015] The 3-8 decoder and the signal input module are used to divide the signal into 6 signals, namely bit1 to bit6 signals, through the 3-8 decoder;

[0016] An expansion module is connected to the 3-8 decoder and is used to expand the bit1 to bit6 signals into n-bit identical signals respectively to obtain a 6n-bit signal;

[0017] The n-bit AND gate module is combined and connected to the expansion module to perform AND operations on the expanded 6n-bit signal and the 6n-bit configuration signal of PWM respectively to obtain 6 groups of fusion signal results and obtain the result PWM at the current rotor position. i×j , the result is 0 at non-current rotor positions;

[0018] The n-bit OR gate module is connected to the n-bit AND gate module combination, and is used to receive 6 groups of fusion signal results, perform OR operation on the 6 groups of PWM n-bit configuration signals, and obtain the upper and lower bridge arm PWM configuration signals of the front rotor position.

[0019] Preferably, the PWM configuration register includes two duty cycle registers, which are connected to each other. The PWM configuration signal contains 9 bits, the first three bits of which respectively control the UVW output to be a PWM signal corresponding to a duty cycle of 0 or 1, and the last 6 bits of which respectively indicate whether the upper and lower bridge arms of the UVW are turned on.

[0020] Preferably, the PWM configuration register further includes 6 duty cycle registers for realizing different UVW duty cycles.

[0021] Preferably, the n-bit AND gate module combination performs an n-bit AND operation on the n-bit configuration signal output of a group of PWM signals corresponding to the current rotor position and the extended n-bit 111111111 to obtain the result PWM i×j , the result is 0 at non-current rotor positions.

[0022] Preferably, the PWM configuration register is composed of a selector, which selects a PWM signal corresponding to a duty cycle of 0 or 1 according to the value corresponding to each bit in PWM_config<8:0> set in the PWM configuration register, and outputs the corresponding PWM signal.

[0023] The method for realizing square wave control phase fine adjustment of a brushless DC motor using the above circuit structure is characterized in that the method specifically comprises the following steps:

[0024] The average power supply voltage of the motor is changed in segments by changing the duty cycle in segments, thereby achieving phase advance and lag.

[0025] Preferably, the method comprises the following steps:

[0026] (1) Sample the voltage on the sampling resistor when the lower bridge arm is turned on and the phase is changed to 60 degrees;

[0027] (2) Sample the voltage on the sampling resistor when the lower bridge arm is turned on to 120 degrees;

[0028] (3) Determine whether the voltage at 60 degrees is greater than the voltage at 120 degrees. If so, proceed to step (4); otherwise, proceed to step (5);

[0029] (4) Perform hysteresis adjustment so that the value of AMPIN0 is smaller than that of AMPIN1 and the center value remains unchanged;

[0030] (5) Perform advance adjustment so that the value of AMPIN0 is greater than the value of AMPIN1, and the center value remains unchanged. The circuit structure and method of the present invention are used to implement phase fine-tuning of square wave control of a brushless DC motor. By changing the duty cycle configuration register to fine-tune the phase advance or lag, it helps to improve the operating efficiency of the motor without requiring complex software programs. After the hardware implements this commutation process, the software implementation is simple and the CPU occupies less time, which can be used for other safety controls. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Schematic diagram of conventional control results in the prior art.

[0032] Figure 2 The diagram is a schematic diagram of the upper and lower bridge arm PWM configuration of the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0033] Figure 3 A schematic diagram of the HALL signal of the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention is expanded into n bits.

[0034] Figure 4 This is a schematic diagram of the HALL signal expansion result and PWM configuration register of the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0035] Figure 5This is a schematic diagram of the output result of the AND operation of the 6n-bit signal expanded by the HALL and the 6n-bit configuration signal of the PWM in the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0036] Figure 6 This is a circuit structure diagram of a PWM configuration signal output circuit under the current rotor position of a circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0037] Figure 7 This is a schematic diagram of the PWM register configuration and corresponding PWM output of the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0038] Figure 8 This is a diagram showing the configuration of the PWM register and the corresponding PWM output circuit structure of the circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to the present invention.

[0039] Figure 9 The present invention is a flow chart of the phase fine-tuning steps of the method for achieving phase fine-tuning of a brushless DC motor with square wave control. DETAILED DESCRIPTION

[0040] In order to more clearly describe the technical content of the present invention, further description is given below in conjunction with specific embodiments.

[0041] The circuit structure of the present invention for realizing square wave control phase fine adjustment of a brushless DC motor includes:

[0042] PWM configuration register, used to obtain 6 groups of n-bit configuration PWM signals according to the rotor position;

[0043] Signal input module, used to receive input hall signal and identify 6 rotor positions;

[0044] The 3-8 decoder and the signal input module are used to divide the signal into 6 signals, namely bit1 to bit6 signals, through the 3-8 decoder;

[0045] An expansion module is connected to the 3-8 decoder and is used to expand the bit1 to bit6 signals into n-bit identical signals respectively to obtain a 6n-bit signal;

[0046] The n-bit AND gate module is combined and connected to the expansion module to perform AND operations on the expanded 6n-bit signal and the 6n-bit configuration signal of PWM respectively to obtain 6 groups of fusion signal results and obtain the result PWM at the current rotor position. i×j , the result is 0 at non-current rotor positions;

[0047] The n-bit OR gate module is connected to the n-bit AND gate module combination, and is used to receive 6 groups of fusion signal results, perform OR operation on the 6 groups of PWM n-bit configuration signals, and obtain the upper and lower bridge arm PWM configuration signals of the front rotor position.

[0048] As a preferred embodiment of the present invention, the PWM configuration register includes two duty cycle registers, which are connected to each other. The PWM configuration signal contains 9 bits, the first three bits of which respectively control the UVW output to be a PWM signal corresponding to a duty cycle of 0 or 1, and the last 6 bits of which respectively indicate whether the upper and lower bridge arms of the UVW are turned on.

[0049] As a preferred embodiment of the present invention, the PWM configuration register further includes 6 duty cycle registers for realizing different UVW duty cycles.

[0050] As a preferred embodiment of the present invention, the n-bit AND gate module combination performs an n-bit AND operation on the n-bit configuration signal output of a group of PWM signals corresponding to the current rotor position and the extended n-bit 111111111 to obtain the result PWM i×j , the result is 0 at non-current rotor positions.

[0051] As a preferred embodiment of the present invention, the PWM configuration register is composed of a selector, which selects the PWM signal corresponding to the duty cycle 0 or 1 according to the value corresponding to each bit in PWM_config<8:0> set in the PWM configuration register, and outputs the corresponding PWM signal.

[0052] The method of the present invention for achieving square wave control phase fine adjustment of a brushless DC motor using the above circuit structure comprises the following steps:

[0053] The average power supply voltage of the motor is changed in segments by changing the duty cycle in segments, thereby achieving phase advance and lag.

[0054] This includes the following steps:

[0055] (1) Sample the voltage on the sampling resistor when the lower bridge arm is turned on and the phase is changed to 60 degrees;

[0056] (2) Sample the voltage on the sampling resistor when the lower bridge arm is turned on to 120 degrees;

[0057] (3) Determine whether the voltage at 60 degrees is greater than the voltage at 120 degrees. If so, proceed to step (4); otherwise, proceed to step (5);

[0058] (4) Perform hysteresis adjustment so that the value of AMPIN0 is smaller than that of AMPIN1 and the center value remains unchanged;

[0059] (5) Make advance adjustment so that the value of AMPIN0 is greater than the value of AMPIN1, and the center value remains unchanged.

[0060] In a specific embodiment of the present invention, when a brushless DC motor adopts square wave mode control, it is generally controlled normally according to the commutation table. With the requirements for high efficiency and less torque pulsation of motor control, sinusoidal wave control methods or FOC control methods have emerged, but these two control methods are relatively complex. The square wave control method is relatively simple, and the adjustment of the current phase is also easy to achieve. However, for square wave control, the fine-tuning effect of the current phase is not easy to detect, but it is beneficial to improve the efficiency of motor control.

[0061] Currently, square-wave control modes are implemented using software. While this approach offers flexibility, it also requires significant CPU resources as demand increases. For complex systems, the CPU must not only handle motor commutation and emergency response, but also calculate whether optimal motor control is currently in place. To address this issue, the present invention designs a dedicated hardware circuit to automatically implement phase fine-tuning.

[0062] For square-wave motor control, phase change occurs immediately based on updated rotor position information. As speed increases, phase change lags. Advancing the phase requires significant changes to the commutation table. The present invention's application is in hardware-based circuits for implementing automatic motor commutation. By simply adding a bit and a duty cycle register, phase advance can be achieved, making the circuit design and application innovative.

[0063] This invention designs a phase fine-tuning hardware circuit that fine-tunes the phase by varying the PWM duty cycle each time the rotor position signal is detected and updated, thereby changing the voltage between the current rotor position update and the next. Before the motor is running, the corresponding rotor position PWM configuration register is filled with the desired duty cycle. During motor operation, the corresponding duty cycle is then written.

[0064] Control methods used in permanent magnet synchronous motors, such as those that determine the quadrature-axis current, cannot be directly applied to brushless DC motors. This is because all three phases of the former are conducting, while only two phases are conducting in a brushless DC motor. This results in torque fluctuations during commutation, and current phase adjustment cannot be achieved by controlling the id (direct-axis current) to zero, as is the case with permanent magnet synchronous motors. Phase adjustment typically uses coarse lead or lag adjustment, which does not achieve optimal control. Current motor control commutation or phase adjustment methods rely on software control. The present invention utilizes hardware to achieve automatic phase fine-tuning, eliminating CPU resource consumption.

[0065] The present invention changes the duty cycle during motor commutation to fine-tune the motor current phase, and utilizes hardware circuits to achieve automatic motor commutation under square wave control.

[0066] The present invention designs two duty cycle registers. The PWM configuration signal contains 9 bits. The first three bits are used to control whether the UVW output is a PWM signal corresponding to a duty cycle of 0 or a signal corresponding to a duty cycle of 1. The last 6 bits: bit<5:4>, bit<3:2>, bit<1:0> respectively indicate whether the upper and lower bridge arms of the UVW are turned on. Figure 4 Medium bit <8> ~bit <0> They are defined as dutyUx, dutyVx, dutyWx, Uhl1<1:0>, Vhl1<1:0>, and Whl1<1:0>, respectively, with x defined as 1 to 6. If more duty cycle signals are required, they must be selected using more bits of dutyUx.

[0067] For example, the inverter's three-phase half-bridge uses N-type transistors for both upper and lower arms. The PWM configuration register that controls whether the upper and lower arms are turned on is set to PWM_config<8:0>=10X100100, where X represents any value, which can be 1 or 0. Bits <5:4>=10 indicate that the upper arm U is turned on and the lower arm is turned off (the lower arm NMOS control signal is set to 0). Bits <3:2>=01 indicate that the upper arm V is turned off (the upper arm NMOS control signal is set to 0) and the lower arm is turned on. Bits <1:0>=00 indicate that both the upper and lower arms W are turned off (the upper arm NMOS control signals are both set to 0). <8> =1 means U selects the PWM signal corresponding to duty cycle 0, bit <7> =0 means V selects the PWM signal corresponding to duty cycle 1, bit <6> Arbitrary, because both the upper and lower arms of W are turned off, the PWM output is 0.

[0068] like Figure 2 The circuit structure shown is as follows:

[0069] ① Based on the input of the motor rotor position hall signal, the hardware circuit of the present invention identifies the six rotor positions (only the sequence 1 to 6 will appear when the hall signal is not phase-shifted). Therefore, the three-bit hall signal ② is output to ③ via the output bits 1 to 6 of the 3-8 decoder.

[0070] ③ is to expand the bit1~bit6 signals into n-bit identical signals, that is, bit1~bit6 are transformed into 6×n-bit signals and transmitted to ④, such as Figure 3 As shown;

[0071] ④ is to AND the 6n-bit signal expanded from HALL with the 6n-bit configuration signal of PWM. Figure 4As shown, a set of PWM n-bit configuration signal outputs corresponding to the current rotor position are ANDed with the extended n-bit 111111111, and HALL i×j &PWM i×j The result is PWM i×j , rather than the extended n bits of the current rotor position, are 0. At this time, HALL i×j &PWM i×j The result is 0, see the output Figure 5 ;

[0072] ⑤The last 6 groups of PWM n-bit configuration signals are the phase or upper and lower bridge arm PWM configuration signals of the current rotor position, such as Figure 6 As shown. The duty cycle is Figure 7 Given the duty cycle.

[0073] Under square wave control, the duty cycles of the three phases UVW are generally consistent, so only two duty cycle registers are required. If UVW requires different duty cycles, six duty cycle registers are required.

[0074] based on Figure 2 The current rotor is output under PWM configuration, and then connected to Figure 8 The circuit can be realized Figure 3 The signal output is implemented by taking the UH and UL outputs of PWM_config<8:0>=10X100100 as an example: Figure 8 In the selector section, when PWM_config <8> If bit<5:4>=10, UH outputs the PWM signal corresponding to the duty cycle 0, and UL outputs 0.

[0075] like Figure 9 The following is a schematic diagram of the steps of an embodiment of the present invention. The present invention emphasizes the phase fine-tuning method and the corresponding hardware implementation. The fine-tuning step is a software operation and can be implemented in different ways. The embodiment of the phase fine-tuning step of the present invention is as follows:

[0076] Typically, the sampling resistor is located in the lower bridge arm. One electrical cycle is 360 degrees, and the lower bridge arm conduction time is 120 degrees. Assuming 0 degrees is the time when the lower bridge arm of a phase begins conducting, at 60 degrees, the other phases will switch, and the lower bridge arm remains conducting, sampling the lower bridge arm voltage. Similarly, at 120 degrees, after the phase change, the lower bridge arm voltage is sampled and compared. If the former current is greater, a lag adjustment is required to make the value of AMPIN0 less than AMPIN1. Otherwise, a lead adjustment is made to make the value of AMPIN0 greater than AMPIN1.

[0077] The circuit structure and method for fine-tuning the phase of a brushless DC motor with square-wave control employs the present invention. By adjusting the duty cycle configuration register, the phase advance or lag can be fine-tuned, helping to improve motor operating efficiency without requiring complex software programming. Hardware implementation of this commutation process simplifies software implementation, minimizing CPU time and freeing it for other safety controls.

[0078] In this specification, the present invention has been described with reference to specific embodiments thereof. However, it will be apparent that various modifications and variations may be made without departing from the spirit and scope of the present invention. Accordingly, the specification and drawings are to be regarded as illustrative rather than restrictive.

Claims

1. A circuit structure for achieving phase fine-tuning of a brushless DC motor with square wave control, characterized in that: The circuit structure includes: PWM configuration register, used to obtain 6 groups of n-bit configuration PWM signals according to the rotor position; Signal input module, used to receive input hall signal and identify 6 rotor positions; The 3-8 decoder and the signal input module are used to divide the signal into 6 signals, namely bit1 to bit6 signals, through the 3-8 decoder; An expansion module is connected to the 3-8 decoder and is used to expand the bit1 to bit6 signals into n-bit identical signals respectively to obtain a 6n-bit signal; The n-bit AND gate module is combined and connected to the expansion module to perform AND operations on the expanded 6n-bit signal and the 6n-bit configuration signal of PWM respectively to obtain 6 groups of fusion signal results and obtain the result PWM at the current rotor position. i×j , the result is 0 at the non-current rotor position, where the PWM i×j Represents the relationship matrix between the current i-th rotor position and the j-th PWM configuration signal; The n-bit OR gate module is connected to the n-bit AND gate module combination, and is used to receive 6 groups of fusion signal results, perform OR operation on the 6 groups of PWM n-bit configuration signals, and obtain the upper and lower bridge arm PWM configuration signals of the front rotor position.

2. The circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to claim 1, characterized in that: The PWM configuration register includes two duty cycle registers, which are connected to each other. The PWM configuration signal contains 9 bits. The first three bits of the signal control the UVW output to be a PWM signal corresponding to a duty cycle of 0 or 1, and the last 6 bits of the signal indicate whether the upper and lower bridge arms of the UVW are turned on.

3. The circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to claim 1, characterized in that: The PWM configuration register also includes 6 duty cycle registers for realizing different UVW duty cycles.

4. The circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to claim 1, characterized in that: The n-bit AND gate module combination performs an n-bit AND operation on the n-bit configuration signal output of a group of PWM signals corresponding to the current rotor position and the extended n-bit 111111111 to obtain the result PWM i×j , the result is 0 at non-current rotor positions.

5. The circuit structure for realizing square wave control phase fine adjustment of a brushless DC motor according to claim 1, characterized in that: The PWM configuration register is composed of a selector, which selects the PWM signal corresponding to the duty cycle 0 or 1 according to the value corresponding to each bit in PWM_config<8:0> set in the PWM configuration register, and outputs the corresponding PWM signal, where PWM_config<8:0> represents a 9-bit PWM configuration signal.

6. A method for achieving phase fine-tuning of a brushless DC motor using the circuit structure of claim 1, characterized in that: The method specifically comprises the following steps: The average power supply voltage of the motor is changed in segments by changing the duty cycle in segments, thereby achieving phase advance and lag.

7. The method for achieving phase fine-tuning of a brushless DC motor with square wave control according to claim 6, characterized in that: The method specifically comprises the following steps: (1) Sample the voltage on the sampling resistor when the lower bridge arm is turned on and the phase is changed to 60 degrees; (2) Sample the voltage on the sampling resistor when the lower bridge arm is turned on to 120 degrees; (3) Determine whether the voltage at 60 degrees is greater than the voltage at 120 degrees. If so, proceed to step (4); otherwise, proceed to step (5); (4) Performing hysteresis adjustment so that the value of AMPIN0 is smaller than the value of AMPIN1, the center value remains unchanged, and the process ends, wherein AMPIN0 represents the first duty cycle register and AMPIN1 represents the second duty cycle register; (5) Perform advance adjustment so that the value of AMPIN0 is greater than the value of AMPIN1, the center value remains unchanged, and the process ends.

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