Capacitive speaker driver circuit

Abstract

The present invention discloses a capacitive speaker driving circuit. The positive power supply terminal and the negative power supply terminal of the first output stage circuit are respectively coupled to the first power supply and the second power supply. The first output stage circuit outputs a first voltage signal to the first end of the capacitive load of the capacitive speaker according to a first audio input signal, the first power supply and the second power supply. The positive power supply terminal and the negative power supply terminal of the second output stage circuit are respectively coupled to the second power supply and the third power supply. The second output stage circuit outputs a second voltage signal to the second end of the capacitive load according to a second audio input signal, the second power supply and the third power supply.

Description

Technical Field

[0001] The invention relates to a loudspeaker, and in particular to a capacitive loudspeaker driving circuit. Background Art

[0002] Speakers are important components in sound playback devices. Speakers are widely used in people's daily lives and bring a lot of convenience. In the fields of various electronic products such as computers, speakers are used almost everywhere. In recent years, with the rapid development of science and technology, speakers are developed in the direction of thinner, lighter and smaller.

[0003] However, capacitors and resistors are required between the output stage and the speaker of the conventional capacitive speaker driving circuit, wherein the capacitor is used to filter the DC voltage of the signal, and then the filtered AC signal is adjusted by the resistor connected to the voltage source, so that the speaker plays the audio signal of the desired volume. However, these capacitors and resistors not only take up space, but also increase additional power consumption. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a capacitive speaker driving circuit suitable for a speaker in view of the shortcomings of the prior art. The speaker includes a capacitive load. The capacitive speaker driving circuit includes a first output stage circuit, a second output stage circuit and a buffer circuit. The positive power supply end of the first output stage circuit is coupled to the first power supply. The negative power supply end of the first output stage circuit is connected to a node to receive the voltage of the node as the second power supply. The first signal input end of the first output stage circuit is connected to the input circuit and receives the first signal input signal from the input circuit. The output end of the first output stage circuit is connected to the first end of the capacitive load. The first output stage circuit is configured to generate a first voltage signal according to the first signal input signal, the first power supply and the second power supply. The positive power supply end of the second output stage circuit is connected to the node to receive the second power supply. The negative power supply end of the second output stage circuit is coupled to the third power supply. The second signal input end of the second output stage circuit is connected to the input circuit and receives the second signal input signal from the input circuit. The output end of the second output stage circuit is connected to the second end of the capacitive load. The second output stage circuit is configured to generate a second voltage signal according to the second signal input signal, the second power supply and the third power supply. The first output stage circuit and the second output stage circuit respectively output a first voltage signal and a second voltage signal to the capacitive load, so that the speaker plays an audio output signal.

[0005] In one embodiment, the first power source is greater than the second power source, and the second power source is greater than the third power source, so that the voltage of the first voltage signal is maintained greater than the voltage of the second voltage signal.

[0006] In one embodiment, the first output stage circuit includes a first transistor and a second transistor. The control terminal of the first transistor is connected to the input circuit. The first terminal of the first transistor is coupled to the first power supply. The second terminal of the first transistor is connected to the first terminal of the second transistor and the first terminal of the capacitive load. The control terminal of the second transistor is connected to the input circuit. The second terminal of the second transistor is connected to the node.

[0007] In one embodiment, the second output stage circuit includes a third transistor and a fourth transistor. The control terminal of the third transistor is connected to the input circuit. The first terminal of the third transistor is connected to the node. The second terminal of the third transistor is connected to the first terminal of the fourth transistor and the second terminal of the capacitive load. The control terminal of the fourth transistor is connected to the input circuit. The second terminal of the fourth transistor is coupled to the third power supply.

[0008] In one embodiment, the second terminal of the fourth transistor is grounded, and the third power supply is at zero voltage.

[0009] In one embodiment, during the charging process of the capacitive load, a first current flows from the first power source to the first transistor, then to the capacitive load, then to the fourth transistor, and finally to the third power source.

[0010] In one embodiment, during the charging process of the capacitive load, the difference between the first voltage signal and the second voltage signal gradually increases, the first voltage signal gradually rises, and the third power source absorbs the first current so that the second voltage signal gradually decreases.

[0011] In one embodiment, during the discharge process of the capacitive load, the second current of the capacitive load flows to the second transistor, then flows to the third transistor, and finally flows back to the capacitive load.

[0012] In one embodiment, during the discharge process of the capacitive load, the difference between the first voltage signal and the second voltage signal gradually decreases, the second power supply absorbs the second current so that the first voltage signal gradually decreases, the second power supply outputs the second current so that the second voltage signal gradually increases, and the amount of the second current absorbed by the second power supply is equal to the amount of the second current output by the second power supply, so that the net current provided by the second power supply is zero.

[0013] In one embodiment, the first output stage circuit includes a first amplifier. The first input terminal of the first amplifier is connected to the input circuit through a first input resistor, and is connected to the output terminal of the first amplifier through a first feedback resistor. The first amplifier is configured to calculate a first average value of the first power supply and the second power supply as a voltage value of the second input terminal of the first amplifier, calculate a first difference between the first average value and the voltage of the first audio input signal, amplify the first difference with a first gain, and output a first voltage signal.

[0014] In one embodiment, the second output stage circuit includes a second amplifier. The first input terminal of the second amplifier is connected to the input circuit through a second input resistor, and is connected to the output terminal of the second amplifier through a second feedback resistor. The second amplifier is configured to calculate a second average value of the second power supply and the third power supply as a voltage value of the second input terminal of the second amplifier, calculate a second difference between the second average value and the voltage of the second audio input signal, amplify the second difference with a second gain, and output a second voltage signal.

[0015] In one embodiment, the capacitive speaker driving circuit further comprises a first power supply circuit connected to a positive power supply terminal of the first output stage circuit and configured to output a first power supply to the positive power supply terminal of the first output stage circuit.

[0016] In one embodiment, the capacitive speaker driving circuit further comprises a second power supply circuit connected to a negative power supply terminal of the second output stage circuit and configured to output a third power supply to the negative power supply terminal of the second output stage circuit.

[0017] In one embodiment, the capacitive speaker driving circuit further includes a modulation circuit. The modulation circuit is connected between the input circuit and the first power circuit. The modulation circuit is configured to generate a first modulation signal according to the amplitude of the first audio input signal. The first power circuit outputs the first power according to the first modulation signal.

[0018] In one embodiment, the modulation circuit is connected between the input circuit and the second power circuit. The modulation circuit is configured to generate a second modulation signal according to the amplitude of the second audio input signal. The second power circuit outputs a third power according to the second modulation signal.

[0019] In one embodiment, the modulation circuit is connected between the input circuit and the buffer circuit. The modulation circuit is configured to generate a third modulation signal according to the amplitude of the first audio input signal and the second audio input signal to output to the node as the second power supply.

[0020] In one embodiment, the capacitive speaker driving circuit further comprises a buffer circuit connected to the node and configured to stabilize the second power supply of the node to maintain a fixed voltage value and output the second power supply according to the third modulation signal.

[0021] In one embodiment, the third power supply is a negative voltage. The negative power supply terminal of the first output stage circuit and the positive power supply terminal of the second output stage circuit are grounded through the node, so that the voltage of the first voltage signal is between the first power supply and zero voltage, and the voltage of the second voltage signal is between zero voltage and the third power supply.

[0022] In one embodiment, the capacitive speaker driving circuit further comprises a buffer circuit connected to the node and configured to stabilize the second power supply of the node to maintain a fixed voltage value.

[0023] As described above, the present invention provides a capacitive speaker driving circuit, which, compared with the traditional capacitive speaker driving circuit, can omit the capacitors and resistors between the output stage and the speaker, thereby saving the space occupied by these capacitors and resistors, effectively reducing power consumption, and having a preferred frequency response when operating at low frequencies.

[0024] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 FIG. 4 is a block diagram of a capacitive speaker driving circuit according to a first embodiment of the present invention.

[0026] Figure 2 1 is a waveform diagram of a first voltage signal and a second voltage signal of a capacitive speaker driving circuit according to the first embodiment of the present invention.

[0027] Figure 3 FIG. 1 is a circuit layout diagram of a capacitive speaker driving circuit and a speaker being charged according to a second embodiment of the present invention.

[0028] Figure 4 FIG. 1 is a circuit layout diagram of a capacitive speaker driving circuit and a speaker being discharged according to a second embodiment of the present invention.

[0029] Figure 5 1 is a waveform diagram of a first voltage signal, a second voltage signal and a first current signal of a capacitive speaker driving circuit according to a second embodiment of the present invention.

[0030] Figure 6 FIG. 4 is a functional diagram of a capacitive speaker driving circuit according to a third embodiment of the present invention.

[0031] Figure 7 FIG. 4 is a functional diagram of a capacitive speaker driving circuit according to a fourth embodiment of the present invention.

[0032] Figure 8 FIG. 4 is a functional diagram of a capacitive speaker driving circuit according to a fifth embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0034] [First embodiment]

[0035] See also Figure 1 and Figure 2 ,in Figure 1 is a block diagram of a capacitive speaker driving circuit according to a first embodiment of the present invention; Figure 2 1 is a waveform diagram of a first voltage signal and a second voltage signal of a capacitive speaker driving circuit according to the first embodiment of the present invention.

[0036] like Figure 1 As shown, the capacitive speaker driving circuit of this embodiment includes a first output stage circuit 11, a second output stage circuit 12 and a buffer circuit 20, and is suitable for a speaker 30. The speaker 30 includes a capacitive load 31.

[0037] The buffer circuit 20 is connected to a node, and the buffer circuit 20 is configured to regulate the second power source VM of the node to maintain a fixed voltage value.

[0038] The positive power supply terminal of the first output stage circuit 11 is coupled to the first power supply VP1. The negative power supply terminal of the first output stage circuit 11 is connected to a node to receive the voltage of the node, i.e., the second power supply VM. The first signal input terminal of the first output stage circuit 11 is connected to an input circuit and receives a first signal input signal from the input circuit. The output terminal of the first output stage circuit 11 is connected to a first terminal of the capacitive load 31, such as a positive terminal. The first output stage circuit 11 is configured to generate a first voltage signal VOP according to the first signal input signal, the first power supply VP1, and the second power supply VM.

[0039] The positive power supply terminal of the second output stage circuit 12 is connected to a node having a second power supply VM to receive the second power supply VM. The negative power supply terminal of the second output stage circuit 12 is coupled to a third power supply VG. The third power supply VG can be, for example, zero voltage, so that the negative power supply terminal of the second output stage circuit 12 is (equivalent to) grounded. The second signal input terminal of the second output stage circuit 12 is connected to an input circuit, and receives a second signal input signal that is the same as or different from the first signal input signal from the input circuit. The output terminal of the second output stage circuit 12 is connected to a second terminal of the capacitive load 31, such as a negative terminal. The second output stage circuit 12 is configured to generate a second voltage signal VON according to the second signal input signal, the second power supply VM and the third power supply VG.

[0040] The first output stage circuit 11 and the second output stage circuit 12 respectively output the first voltage signal VOP and the second voltage signal VON to the capacitive load 31, so that the speaker 30 plays an audio output signal. The volume of the audio output signal played by the speaker 30 depends on the amplitude of the first voltage signal VOP and the second voltage signal VON.

[0041] like Figure 2 As shown, the first power supply VP1 can be set to be greater than the second power supply VM, and the second power supply VM can be set to be greater than the third power supply VG, that is, the second power supply VM is between the first power supply VP1 and the third power supply VG, so that the voltage of the first voltage signal VOP is always maintained to be greater than the voltage of the second voltage signal VON, so that the sound quality of the audio output signal played by the speaker 30 is better.

[0042] [Second embodiment]

[0043] See also Figures 3 to 5 ,in Figure 3 is a circuit layout diagram of a capacitive speaker driving circuit and a speaker being charged according to a second embodiment of the present invention; Figure 4 is a circuit layout diagram of a capacitive speaker driving circuit and a speaker being discharged according to a second embodiment of the present invention; Figure 5 1 is a waveform diagram of a first voltage signal, a second voltage signal and a first current signal of a capacitive speaker driving circuit according to a second embodiment of the present invention.

[0044] like Figure 3 As shown, the capacitive speaker driving circuit of this embodiment includes a first output stage circuit 11 and a second output stage circuit 12, and is suitable for a speaker 30 having a capacitive load 31. In other embodiments, the first output stage circuit 11 may have the same Figure 3 The second output stage circuit 12 of other embodiments may have the same circuit component configuration as the first output stage circuit 11 shown in FIG. Figure 3 The second output stage circuit 12 shown has the same circuit component configuration.

[0045] like Figure 3 As shown, the first output stage circuit 11 may include a first transistor T1 and a second transistor T2, such as but not limited to a PMOS (P-type metal oxide semiconductor) transistor and an NMOS transistor, respectively.

[0046] The first end of the first transistor T1 is coupled to the first power source VP1. The second end of the first transistor T1 is connected to the first end of the second transistor T2 and the first end of the capacitive load 31. The second end of the second transistor T2 is connected to a node having the second power source VM. The control end of the first transistor T1 and the control end of the second transistor T2 are connected to the input circuit.

[0047] Similarly, the second output stage circuit 12 may include a third transistor T3 and a fourth transistor T4 , which are, for example but not limited to, a PMOS transistor and an NMOS transistor respectively.

[0048] A first end of the third transistor T3 is connected to a node having a power source VM. A second end of the third transistor T3 is connected to a first end of a fourth transistor T4 and a second end of a capacitive load 31. A second end of the fourth transistor T4 is coupled to a third power source VG, for example, to a ground terminal. A control end of the third transistor T3 and a control end of the fourth transistor T4 are connected to an input circuit.

[0049] The input circuit can output the same or different first audio input signals to the control end of the first transistor T1 and the control end of the second transistor T2, respectively, to control the operation of the first transistor T1 and the second transistor T2, respectively. In addition, the input circuit can output the same or different second audio input signals to the control end of the third transistor T3 and the fourth transistor T4, respectively, to control the operation of the third transistor T3 and the fourth transistor T4, respectively.

[0050] like Figure 3 As shown, during the charging process of the capacitive load 31 of the speaker 30, the first current IL1 flows from the first power source VP1 to the first transistor T1, then flows to the capacitive load 31 of the speaker 30, then flows to the fourth transistor T4, and finally flows to the third power source VG, such as the ground. Figure 5 As shown, in the charging time interval of the first phase PH1, the first voltage signal VOP gradually increases, and the third power source VG absorbs the first current IL1 to make the second voltage signal VON gradually decrease, so that the difference between the first voltage signal VOP and the second voltage signal VON gradually increases.

[0051] like Figure 4As shown, during the discharge process of the capacitive load 31 of the speaker 30, the second current IL2 of the capacitive load 31 flows to the second transistor T2, then flows to the third transistor T3, and finally flows back to the capacitive load 31 of the speaker 30. Figure 5 As shown, during the discharge time interval of the second phase PH2, the second power supply VM absorbs the second current IL2 flowing through the second transistor T2, so that the first voltage signal VOP gradually decreases, and at the same time, the second power supply VM outputs the second current IL2 flowing into the third transistor T3, so that the second voltage signal VON gradually increases, so that the difference between the first voltage signal VOP and the second voltage signal VON gradually decreases.

[0052] If the amount of the second current IL2 absorbed by the second power source VM flowing through the second transistor T2 is equal to the amount of the second current IL2 flowing into the third transistor T3, the net current provided by the second power source VM will be zero. Figure 5 As shown, the first power supply VP1 of the capacitive speaker driving circuit of the embodiment of the present invention only needs to provide a charging current (i.e., the first power supply current IVP1) in the first phase PH1, and does not need to provide a charging current in the second phase PH2. Therefore, compared to the conventional capacitive speaker driving circuit that needs to provide a charging current in both the first phase PH1 and the second phase PH2, the capacitive speaker driving circuit of the embodiment can save half of the energy.

[0053] See also Figure 6 , which is a functional schematic diagram of a capacitive speaker driving circuit according to a third embodiment of the present invention.

[0054] like Figure 6 As shown, the capacitive speaker driving circuit of this embodiment may include a first amplifier 110 and a second amplifier 120, and is suitable for a speaker 30 having a capacitive load 31. The first output stage circuit 11 of other embodiments may include the first amplifier 110, and the second output stage circuit 12 of other embodiments may include the second amplifier 120.

[0055] The positive power terminal of the first amplifier 110 is coupled to the first power supply VP1, and the negative power terminal of the first amplifier 110 is coupled to the second power supply VM. The first input terminal of the first amplifier 110, for example, the inverting input terminal, can be connected to the output terminal of the first amplifier 110 through the first feedback resistor RF1, and can be connected to the input circuit through the first input resistor R1 to receive the first audio input signal VIN1 from the input circuit.

[0056] The second input terminal, such as the non-inverting input terminal, of the first amplifier 110 may be coupled to the first reference signal. For example, the first amplifier 110 may calculate a first average value of the first power source VP1 and the second power source VM as the voltage value of the second input terminal, such as the non-inverting input terminal, of the first amplifier 110 (i.e., the voltage value of the first reference signal), calculate a first difference between the first average value and the voltage of the first audio input signal, and amplify the first difference with a first gain (the first gain value is RF1 / R1) to generate a first voltage signal VOP.

[0057] The positive power terminal of the second amplifier 120 is coupled to the second power VM, and the negative power terminal of the second amplifier 120 is coupled to the third power VG. The first input terminal of the second amplifier 120, for example, the inverting input terminal, can be connected to the output terminal of the second amplifier 120 through the second feedback resistor RF2, and can be connected to the input circuit through the second input resistor R2 to receive the second audio input signal VIN2 from the input circuit.

[0058] The second input terminal, such as the non-inverting input terminal, of the second amplifier 120 may be coupled to the second reference signal. For example, the second amplifier 120 may calculate a second average value of the second power supply VM and the third power supply VG as the voltage value of the second input terminal, such as the non-inverting input terminal, of the second amplifier 120 (i.e., the voltage value of the second reference signal), calculate a second difference between the second average value and the voltage of the second audio input signal, and amplify the second difference with a second gain (the second gain value is RF2 / R2) to generate a second voltage signal VON.

[0059] The first amplifier 110 and the second amplifier 120 can respectively output a first voltage signal VOP and a second voltage signal VON to the capacitive load 31 of the speaker 30 , so that the speaker 30 plays an audio output signal with a desired volume.

[0060] See also Figure 7 , which is a functional schematic diagram of a capacitive speaker driving circuit according to a fourth embodiment of the present invention. The same contents as above are not repeated here.

[0061] like Figure 7 As shown, the capacitive speaker driving circuit of this embodiment may include a first output stage circuit 11, a second output stage circuit 12, a buffer circuit 20, a modulation circuit 50, an input circuit 60 (which can be used as the input circuit of other embodiments), a first power supply circuit 71 and a second power supply circuit 72, and is suitable for a speaker 30 with a capacitive load 31.

[0062] The first power circuit 71 can be connected to the positive power terminal of the first output stage circuit 11. The modulation circuit 50 can be connected between the input circuit 60 and the first power circuit 71. The modulation circuit 50 can generate a first modulation signal according to the amplitude of the first audio input signal output by the input circuit 60. The first power circuit 71 can output the first power VP1 to the positive power terminal of the first output stage circuit 11 (the first amplifier 110) according to the first modulation signal.

[0063] The second power circuit 72 can be connected to the negative power terminal of the second output stage circuit 12. The modulation circuit 50 can be connected between the input circuit 60 and the second power circuit 72. The modulation circuit 50 can generate a second modulation signal according to the amplitude of the second audio input signal output by the input circuit 60. The second power circuit 72 can output the third power VG to the negative power terminal of the second output stage circuit 12 (the second amplifier 120) according to the second modulation signal.

[0064] The modulation circuit 50 can be connected between the input circuit 60 and the buffer circuit 20. The modulation circuit 50 can generate a third modulation signal according to the amplitude of the first audio input signal and the amplitude of the second audio input signal. The buffer circuit 20 can output the second power VM to the negative power terminal of the first output stage circuit 11 and the positive power terminal of the second output stage circuit 12 according to the third modulation signal.

[0065] See also Figure 8 , which is a functional schematic diagram of a capacitive speaker driving circuit according to a fifth embodiment of the present invention. The same contents as those of the first embodiment are not repeated here, and the different technical features are described as follows.

[0066] In the first embodiment, the capacitive speaker driving circuit is provided with a buffer circuit 20 connected to a node between the first output stage circuit 11 and the second output stage circuit 12. The node is connected to the buffer circuit 20. The negative power supply terminal of the first output stage circuit 11 and the positive power supply terminal of the second output stage circuit 12 receive the second power supply VM outputted to the node by the buffer circuit 20.

[0067] Differently, in the present embodiment, the capacitive speaker driving circuit is not provided with any buffer circuit. The node between the first output stage circuit 11 and the second output stage circuit 12 is grounded. The negative power supply terminal of the first output stage circuit 11 and the positive power supply terminal of the second output stage circuit 12 are grounded through this node to receive zero voltage from the ground terminal. In addition, the third power supply VG coupled to the negative power supply terminal of the second output stage circuit 12 can be a negative voltage. In this way, the voltage of the first voltage signal VOP received by the speaker 30 is between the first power supply VP1 and the zero voltage, and the voltage of the second voltage signal VON is between the zero voltage and the negative voltage.

[0068] In summary, the present invention provides a capacitive speaker driving circuit, which, compared with the traditional capacitive speaker driving circuit, can omit the capacitors and resistors between the output stage and the speaker, thereby saving the space occupied by these capacitors and resistors, effectively reducing power consumption, and having a preferred frequency response when operating at low frequencies.

[0069] The contents disclosed above are only preferred feasible embodiments of the present invention, and are not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made using the contents of the present invention description and drawings are included in the claims of the present invention.

Claims

1. A capacitive speaker driving circuit, suitable for a speaker, wherein the speaker comprises a capacitive load, characterized in that: The capacitive speaker driving circuit comprises: a first output stage circuit, wherein a positive power supply terminal of the first output stage circuit is coupled to a first power supply, a negative power supply terminal of the first output stage circuit is connected to a node to receive a voltage of the node as a second power supply, a first signal input terminal of the first output stage circuit is connected to an input circuit and receives a first signal input signal from the input circuit, an output terminal of the first output stage circuit is connected to a first terminal of the capacitive load, and the first output stage circuit is configured to generate a first voltage signal according to the first signal input signal, the first power supply, and the second power supply; as well as a second output stage circuit, wherein a positive power supply terminal of the second output stage circuit is connected to the node to receive the second power supply, a negative power supply terminal of the second output stage circuit is coupled to a third power supply, a second signal input terminal of the second output stage circuit is connected to the input circuit and receives a second signal input signal from the input circuit, an output terminal of the second output stage circuit is connected to a second terminal of the capacitive load, and the second output stage circuit is configured to generate a second voltage signal according to the second signal input signal, the second power supply, and the third power supply; The first output stage circuit and the second output stage circuit respectively output the first voltage signal and the second voltage signal to the capacitive load, so that the speaker plays an audio output signal.

2. The capacitive speaker driving circuit according to claim 1, characterized in that: The first power source is greater than the second power source, and the second power source is greater than the third power source, so that the voltage of the first voltage signal is maintained greater than the voltage of the second voltage signal.

3. The capacitive speaker driving circuit according to claim 1, characterized in that: The first output stage circuit includes a first transistor and a second transistor, the control end of the first transistor is connected to the input circuit, the first end of the first transistor is coupled to the first power supply, the second end of the first transistor is connected to the first end of the second transistor and the first end of the capacitive load, the control end of the second transistor is connected to the input circuit, and the second end of the second transistor is connected to the node.

4. The capacitive speaker driving circuit according to claim 3, characterized in that: The second output stage circuit includes a third transistor and a fourth transistor, the control end of the third transistor is connected to the input circuit, the first end of the third transistor is connected to the node, the second end of the third transistor is connected to the first end of the fourth transistor and the second end of the capacitive load, the control end of the fourth transistor is connected to the input circuit, and the second end of the fourth transistor is coupled to the third power supply.

5. The capacitive speaker driving circuit according to claim 4, characterized in that: The second terminal of the fourth transistor is grounded, and the third power supply is zero voltage.

6. The capacitive speaker driving circuit according to claim 5, characterized in that: During the charging process of the capacitive load, a first current flows from the first power source to the first transistor, then to the capacitive load, then to the fourth transistor, and finally to the third power source.

7. The capacitive speaker driving circuit according to claim 6, characterized in that: During the charging process of the capacitive load, the difference between the first voltage signal and the second voltage signal gradually increases, the first voltage signal gradually rises, and the third power supply absorbs the first current so that the second voltage signal gradually decreases.

8. The capacitive speaker driving circuit according to claim 7, characterized in that: During the discharge process of the capacitive load, the second current of the capacitive load flows to the second transistor, then flows to the third transistor, and finally flows back to the capacitive load.

9. The capacitive speaker driving circuit according to claim 8, characterized in that: During the discharge process of the capacitive load, the difference between the first voltage signal and the second voltage signal gradually decreases, the second power supply absorbs the second current so that the first voltage signal gradually decreases, the second power supply outputs the second current so that the second voltage signal gradually increases, and the amount of the second current absorbed by the second power supply is equal to the amount of the second current output by the second power supply, so that the net current provided by the second power supply is zero.

10. The capacitive speaker driving circuit according to claim 1, characterized in that: The first output stage circuit includes a first amplifier, wherein a first input terminal of the first amplifier is connected to the input circuit via a first input resistor and is connected to an output terminal of the first amplifier via a first feedback resistor. The first amplifier is configured to calculate a first average value of the first power supply and the second power supply as a voltage value of a second input terminal of the first amplifier, calculate a first difference between the first average value and a voltage of the first audio input signal, amplify the first difference with a first gain, and output the first voltage signal.

11. The capacitive speaker driving circuit according to claim 10, characterized in that: The second output stage circuit includes a second amplifier, a first input terminal of the second amplifier is connected to the input circuit via a second input resistor, and is connected to the output terminal of the second amplifier via a second feedback resistor, the second amplifier is configured to calculate a second average value of the second power supply and the third power supply as a voltage value of the second input terminal of the second amplifier, calculate a second difference between the second average value and the voltage of the second audio input signal, amplify the second difference with a second gain, and output the second voltage signal.

12. The capacitive speaker driving circuit according to claim 1, characterized in that: The capacitive speaker driving circuit further includes a first power supply circuit connected to the positive power supply terminal of the first output stage circuit and configured to output the first power supply to the positive power supply terminal of the first output stage circuit.

13. The capacitive speaker driving circuit according to claim 12, characterized in that: The capacitive speaker driving circuit further includes a second power supply circuit connected to the negative power supply terminal of the second output stage circuit and configured to output the third power supply to the negative power supply terminal of the second output stage circuit.

14. The capacitive speaker driving circuit according to claim 13, characterized in that: The capacitive speaker driving circuit further includes a modulation circuit connected between the input circuit and the first power circuit, and configured to generate a first modulation signal according to the amplitude of the first audio input signal, and the first power circuit outputs the first power according to the first modulation signal.

15. The capacitive speaker driving circuit according to claim 14, characterized in that: The modulation circuit is connected between the input circuit and the second power circuit, and is configured to generate a second modulation signal according to the amplitude of the second audio input signal. The second power circuit outputs the third power according to the second modulation signal.

16. The capacitive speaker driving circuit according to claim 15, characterized in that: The modulation circuit is connected between the input circuit and the buffer circuit, and is configured to generate a third modulation signal according to the amplitudes of the first audio input signal and the second audio input signal, and output the third modulation signal to the node as the second power source.

17. The capacitive speaker driving circuit according to claim 16, characterized in that: The capacitive speaker driving circuit further comprises: The buffer circuit is connected to the node, and is configured to stabilize the second power supply of the node to maintain a fixed voltage value, and output the second power supply according to the third modulation signal.

18. The capacitive speaker driving circuit according to claim 1, characterized in that: The third power supply is a negative voltage, the negative power supply terminal of the first output stage circuit and the positive power supply terminal of the second output stage circuit are grounded through the node, so that the voltage of the first voltage signal is between the first power supply and zero voltage, and the voltage of the second voltage signal is between zero voltage and the third power supply.

19. The capacitive speaker driving circuit according to claim 1, characterized in that: The capacitive speaker driving circuit further comprises: The buffer circuit is connected to the node and configured to stabilize the second power supply of the node to maintain a fixed voltage value.

Images