Electroencephalogram detection device, impedance detection method, and storage medium

Abstract

The application discloses an electroencephalogram detection device, an impedance detection method and a storage medium. The electroencephalogram detection device comprises an impedance network, a switching circuit unit, an analog processing unit, an analog-digital conversion unit and a digital processing unit. The signal output end of the impedance network is electrically connected with the signal input end of the analog processing unit, the driven end of the impedance network is electrically connected with the driving end of the analog processing unit, the signal output end of the analog processing unit is electrically connected with the signal input end of the analog-digital conversion unit, the signal output end of the analog-digital conversion unit is connected with the signal input end of the digital processing unit, the switching circuit unit is connected between the signal output end of the impedance network and the signal input end of the analog processing unit, and the controlled end of the switching circuit unit is electrically connected with the control end of the digital processing unit. The application can guarantee the stability and reliability of the collection and processing results of the electroencephalogram signals.

Description

Technical Field

[0001] This invention relates to an electroencephalogram (EEG) detection device for detecting EEG signals in the medical field, specifically to an EEG detection device, an impedance detection method, and a storage medium. Background Technology

[0002] Living human tissue cells constantly generate very weak bioelectricity. Electroencephalogram (EEG) signals are the overall effect of the electrical activity of a large number of brain nerve cells in a highly coherent state on the cerebral cortex. Electrodes placed on the scalp are used to extract this electrical activity from brain cells, which is then amplified and analyzed by EEG monitoring equipment. This EEG signal contains specific waveforms, amplitudes, frequencies, and phases, and these waveforms are variable; this is known as electroencephalogram (EEG) analysis. When functional changes occur in brain tissue, these waveforms will change accordingly, thus providing a basis for clinical diagnosis and treatment.

[0003] Because EEG signals are inherently very weak, various external factors inevitably cause artifacts and noise that affect the quality of the EEG signal during measurement. Interference caused by poor electrode-scalp contact, power frequency interference, and amplification channel noise are the three most significant sources of interference in EEG testing. Some traditional EEG testing devices lack the ability to monitor electrode connections, while others can only partially measure the connections of some leads, making it impossible to measure all lead connections. Summary of the Invention

[0004] This invention provides an electroencephalogram (EEG) detection device, an impedance detection method, and a storage medium, aiming to solve the technical problem of unstable processing results of EEG signals.

[0005] To achieve the above objectives, the present invention provides an electroencephalogram (EEG) detection device, which includes an impedance network, a switching circuit unit, an analog processing unit, an analog-to-digital converter (ADC), and a digital processing unit. The signal output terminal of the impedance network is electrically connected to the signal input terminal of the analog processing unit, the driven terminal of the impedance network is electrically connected to the driving terminal of the analog processing unit, the signal output terminal of the analog processing unit is electrically connected to the signal input terminal of the ADC, the signal output terminal of the ADC is connected to the signal input terminal of the digital processing unit, the switching circuit unit is connected in series between the signal output terminal of the impedance network and the signal input terminal of the analog processing unit, and the controlled terminal of the switching circuit unit is electrically connected to the control terminal of the digital processing unit.

[0006] Furthermore, the EEG detection device also includes an auxiliary circuit unit connected in series between the impedance network and the switching circuit unit.

[0007] Optionally, the EEG detection device further includes a power supply module, which includes a positive power supply and a first resistor; the positive power supply is a constant current source, which is connected to the switching circuit unit, and one end of the first resistor is connected to the switching circuit unit, while the other end is grounded.

[0008] Furthermore, the digital processing unit includes:

[0009] The switch control subunit is electrically connected to the controlled terminal of the switch circuit unit;

[0010] An impedance detection subunit is electrically connected to the signal output terminal of the analog-to-digital conversion unit, and includes a test signal filter and an impedance calculator that are interconnected.

[0011] The EEG signal processing subunit is electrically connected to the signal output terminal of the analog-to-digital conversion unit and includes an EEG signal filter and an EEG signal processor that are interconnected.

[0012] Specifically, the analog processing unit includes a filter amplifier circuit and a drive circuit. The signal input terminal of the filter amplifier circuit is connected to the signal input terminal of the impedance network, the signal output terminal of the filter amplifier circuit is connected to the signal input terminal of the analog-to-digital conversion unit, and the drive terminal of the drive circuit is connected to the driven terminal of the impedance network.

[0013] Specifically, the impedance network includes at least two EEG signal testing electrodes, an impedance testing auxiliary electrode, and a driving auxiliary electrode. The EEG signal testing electrodes are respectively connected to the signal input terminal of the filter amplification circuit, the impedance testing auxiliary electrode is connected to the signal input terminal of the filter amplification circuit, and the driving auxiliary electrode is connected to the driving terminal of the driving circuit.

[0014] Furthermore, the switching circuit unit includes at least two sets of signal test switches and a first switch. Each signal test switch corresponds one-to-one with an EEG signal test electrode. Each signal test switch includes a first signal test switch and a second signal test switch. One end of the first signal test switch is connected to the signal output terminal of the EEG signal test electrode, the signal input terminal of the filter amplification circuit, and a node of the second signal test switch. The other end of the first signal test switch is connected to the positive power supply. One end of the second signal test switch is connected to the signal output terminal of the EEG signal test electrode, the signal input terminal of the filter amplification circuit, and a node of the first signal test switch. The other end of the second signal test switch is connected to the driving terminal of the driving circuit and a node of the driven terminal of the impedance network. One end of the first switch is connected to the first resistor, and the other end of the first switch is connected to the signal input terminal of the filter amplification circuit.

[0015] To achieve the above objectives, this application also proposes an impedance detection method for an electroencephalogram (EEG) detection device, the steps of which include:

[0016] Obtain control commands and select the working mode of the EEG detection device according to the control commands;

[0017] If the EEG acquisition mode is selected, EEG signals will be acquired, and EEG signal processing results will be generated based on the EEG signals.

[0018] If the impedance detection mode is selected, the power supply test signal is acquired, an impedance detection signal is generated based on the power supply test signal, and the theoretical contact impedance is obtained based on the impedance detection signal.

[0019] Optionally, the current amplitude of the positive power supply and the circuit amplification gain can be obtained;

[0020] Obtain the first resistance value of the first resistor;

[0021] The theoretical contact impedance is calculated based on the voltage amplitude, the first resistance value, the circuit amplification gain, and the impedance detection signal.

[0022] To achieve the above objectives, this application also proposes a storage medium storing an impedance detection program for an electroencephalogram (EEG) detection device, wherein the impedance detection program for the EEG detection device is executed by a processor to implement the EEG detection device.

[0023] This application provides an electroencephalogram (EEG) detection device. Since the EEG detection device includes an interconnected impedance network, a switching circuit unit, an analog processing unit, an analog-to-digital conversion unit, and a digital processing unit, the EEG detection device can complete the processing of EEG signals and the detection of the internal impedance of the device, thereby ensuring that the results of the acquisition and processing of EEG signals are stable and reliable. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the module structure of an electroencephalogram (EEG) detection device according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of the module structure of an electroencephalogram (EEG) detection device according to another embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of the module structure of an electroencephalogram (EEG) detection device according to another embodiment of the present invention;

[0028] Figure 4 This is a schematic diagram of the module structure of an electroencephalogram (EEG) detection device according to another embodiment of the present invention;

[0029] Figure 5 This is a flowchart of an impedance detection method for an electroencephalogram (EEG) detection device according to an embodiment of the present invention;

[0030] Figure 6 This is a circuit diagram of an electroencephalogram (EEG) detection device according to an embodiment of the present invention.

[0031] Explanation of icon numbers:

[0032]

[0033] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0034] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0035] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0036] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0037] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0038] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0039] Based on the above hardware structure, various embodiments of the method of the present invention are proposed.

[0040] Living human tissue cells constantly generate very weak bioelectricity. Electroencephalogram (EEG) signals are the overall effect of the electrical activity of a large number of brain nerve cells in a highly coherent state on the cerebral cortex. Electrodes placed on the scalp are used to extract this electrical activity from brain cells, which is then amplified and analyzed by EEG monitoring equipment. This EEG signal contains specific waveforms, amplitudes, frequencies, and phases, and these waveforms are variable; this is known as electroencephalogram (EEG) analysis. When functional changes occur in brain tissue, these waveforms will change accordingly, thus providing a basis for clinical diagnosis and treatment.

[0041] Because EEG signals are inherently very weak, various external factors inevitably cause artifacts and noise that affect the quality of the EEG signal during measurement. Interference caused by poor electrode-scalp contact, power frequency interference, and amplification channel noise are the three most significant sources of interference in EEG testing. Some traditional EEG testing devices lack the ability to monitor electrode connections, while others can only partially measure the connections of some leads, making it impossible to measure all lead connections.

[0042] To address the aforementioned problems, this application proposes an electroencephalogram (EEG) detection device, referring to... Figure 2In a first embodiment of the EEG detection device of the present invention, the EEG detection device includes: an impedance network 1, a switching circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4, and a digital processing unit 5; the signal output terminal of the impedance network 1 is electrically connected to the signal input terminal of the analog processing unit 3, the driven terminal of the impedance network 1 is electrically connected to the driving terminal of the analog processing unit 3, the signal output terminal of the analog processing unit is electrically connected to the signal input terminal of the analog-to-digital conversion unit 4, the signal output terminal of the analog-to-digital conversion unit 4 is connected to the signal input terminal of the digital processing unit 5, the switching circuit unit 2 is connected in series between the signal output terminal of the impedance network 1 and the signal input terminal of the analog processing unit 3, and the controlled terminal of the switching circuit unit 2 is electrically connected to the control terminal of the digital processing unit 5.

[0043] In this embodiment, the electroencephalogram (EEG) detection device includes: an impedance network 1, a switching circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4, and a digital processing unit 5. The impedance network 1 includes at least four lead electrodes, which are placed on the scalp to collect EEG signals from brain cells. EEG signals are the overall effect of the electrical activity of a large number of brain nerve cells in a highly coherent state on the cerebral cortex.

[0044] The signal output terminal of impedance network 1 and the signal input terminal of analog processing unit 3 are electrically connected. After the impedance network 1 acquires the EEG signal, it transmits the EEG signal to analog processing unit 3. Analog processing unit 3 is used to perform filtering and amplification of the EEG signal. In addition, the driving terminal of analog processing unit 3 is connected to the driven terminal of impedance network 1 to maintain the trackability of EEG signal.

[0045] The signal output terminal of the analog processing unit is electrically connected to the signal input terminal of the analog-to-digital converter 4. After filtering and amplification, the EEG signal enters the analog-to-digital converter 4, which performs digital quantization and encoding on the EEG signal. In one embodiment, the analog processing unit consists of multiple identical operational amplifiers.

[0046] The signal output terminal of the analog-to-digital conversion unit 4 is connected to the signal input terminal of the digital processing unit 5. The analog-to-digital conversion unit 4 inputs the digitally quantized and encoded EEG signal to the digital processing unit 5, which can perform signal processing on the EEG signal to obtain the waveform of the EEG. In one embodiment, the analog-to-digital conversion unit 4 is an AD converter.

[0047] In addition, the switching circuit unit 2 is connected in series between the signal output terminal of the impedance network 1 and the signal input terminal of the analog processing unit 3 to control the opening and closing of the EEG signal detection process.

[0048] This application provides an electroencephalogram (EEG) detection device, which includes an interconnected impedance network 1, a switching circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4, and a digital processing unit 5. The EEG detection device can process EEG signals and detect the internal impedance of the device, thereby ensuring that the results of EEG signal acquisition and processing are stable and reliable.

[0049] In one embodiment, the EEG detection device further includes an auxiliary circuit unit 6, which is connected in series between the impedance network 1 and the switching circuit unit 2.

[0050] In this embodiment, the auxiliary circuit unit 6 is connected in series between the impedance network 1 and the switching circuit unit 2. Before the impedance network 1 transmits the acquired EEG signal to the switching circuit unit 2, it will first transmit the EEG signal to the auxiliary circuit unit 6. The auxiliary circuit unit 6 is used for defibrillation and ESD defibrillation, that is, to limit the harmful large signals in the EEG signal, and then transmit the EEG signal to the switching circuit unit 2.

[0051] In one embodiment, the EEG detection device further includes a power supply module 7, which includes a positive power supply 71 and a first resistor 72; the positive power supply 71 is a constant current source, which is connected to the switching circuit unit 2, and one end of the first resistor 72 is connected to the switching circuit unit 2, while the other end is grounded.

[0052] The EEG detection device also includes a power supply module 7. In this embodiment, the power supply module 7 includes a positive power supply 71 and a first resistor 72. The positive power supply 71 is a constant current source, and the fundamental frequency of the constant current source is not limited. It can be AC ​​or DC, sine or square wave, and can be either in-band or out-of-band EEG signal, but it must be within the passband of the analog processing unit 3. In this application, the number of constant current sources is one, that is, a single pusher type.

[0053] Furthermore, the EEG detection device in this application has two operating modes. In the EEG acquisition mode, the current source does not operate. In addition to the EEG acquisition mode for acquiring and processing EEG signals, there is also an impedance testing mode for testing the impedance of the leads in the impedance network 1. In the impedance testing mode, the positive power supply 71 generates a power supply test signal. The power supply test signal can form a closed loop at the scalp through the impedance network 1, generating an impedance test signal. The impedance test signal passes sequentially through the analog processing unit 3 and the analog-to-digital conversion unit 4 to reach the digital processing unit 5. The digital processing unit 5 can calculate the theoretical contact impedance of each lead based on the impedance test signal.

[0054] In one embodiment, the digital processing unit 5 includes:

[0055] The switch control subunit 51 is electrically connected to the controlled terminal of the switch circuit unit 2;

[0056] Impedance detection subunit 52 is electrically connected to the signal output terminal of analog-to-digital conversion unit 4, and includes a test signal filter and an impedance calculator that are interconnected.

[0057] The EEG signal processing subunit 53 is electrically connected to the signal output terminal of the analog-to-digital conversion unit 4, and includes an EEG signal filter and an EEG signal processor connected to each other.

[0058] In this embodiment, the digital processing unit 5 includes a switch control subunit 51, an impedance detection subunit 52, and an EEG signal processing subunit 53. The control terminal of the switch control subunit 51 is electrically connected to the controlled terminal of the switch circuit unit 2, and is used to control the opening and closing of each switch in the switch circuit unit 2. The signal input terminal of the impedance detection subunit 52 is electrically connected to the signal output terminal of the analog-to-digital converter unit 4, and is used to receive the impedance test signal output by the analog-to-digital converter unit 4, filter out the EEG signal through a test signal filter, and then calculate the theoretical contact impedance of each lead electrode using an impedance calculator.

[0059] The EEG signal processing subunit 53 is electrically connected to the signal output terminal of the analog-to-digital converter 4. It is used to receive the EEG signal output by the analog-to-digital converter 4, filter out the impedance test signal through the EEG signal filter, and then perform final processing on the EEG signal through the EEG signal processor.

[0060] In one embodiment, the analog processing unit 3 includes a filter amplifier circuit 31 and a drive circuit 32. The signal input terminal of the filter amplifier circuit 31 is connected to the signal input terminal of the impedance network 1, the signal output terminal of the filter amplifier circuit 31 is connected to the signal input terminal of the analog-to-digital conversion unit 4, and the drive terminal of the drive circuit 32 is connected to the driven terminal of the impedance network 1.

[0061] In this embodiment, the analog processing unit 3 includes a filter amplification circuit 31 and a drive circuit 32. The signal input terminal of the filter amplification circuit 31 is connected to the signal output terminal of the impedance network 1, and the signal output terminal of the filter amplification circuit 31 is connected to the signal input terminal of the analog-to-digital conversion unit 4, used to filter and amplify the impedance test signal and the EEG signal. The drive terminal of the drive circuit 32 is connected to the driven terminal of the impedance network 1. Whether in EEG acquisition mode or impedance test mode, the drive circuit 32 can extract the slow-changing wave in the EEG signal and send the slow-changing wave through the impedance module to the user's scalp. The negative feedback acts on the scalp to cancel the static voltage fluctuation on the scalp, thereby compressing the dynamic range of the EEG signal to match the signal input range of the analog processing unit 3, thus maintaining the trackability of the EEG signal.

[0062] In one embodiment, the impedance network 1 includes at least two EEG signal testing electrodes Z1-Zn, an impedance testing auxiliary electrode Zref, and a driving auxiliary electrode Zgnd. The EEG signal testing electrodes Z1-Zn are respectively connected to the signal input terminal of the filter amplifier circuit 31, the impedance testing auxiliary electrode Zref is connected to the signal input terminal of the filter amplifier circuit 31, and the driving auxiliary electrode Zgnd is connected to the driving terminal of the driving circuit 32.

[0063] In this embodiment, the impedance network 1 includes at least two EEG signal testing electrodes Z1-Zn, at least one impedance testing auxiliary electrode Zref, and at least one driving auxiliary electrode Zgnd. The EEG signal testing electrodes Z1-Zn are connected to the signal input terminal of the filter amplifier circuit 31, the impedance testing auxiliary electrode Zref is connected to the signal input terminal of the filter amplifier circuit 31, and the driving auxiliary electrode Zgnd is connected to the driving terminal of the driving circuit 32. The EEG signal testing electrodes Z1-Zn are used to acquire EEG signals, the impedance testing auxiliary electrode Zref is used to perform impedance testing, and the driving auxiliary electrode Zgnd assists the driving circuit 32 in maintaining the trackability of the EEG signals.

[0064] In one embodiment, the switching circuit unit 2 includes at least two sets of signal test switches S1-Sn and a first switch S0, wherein the signal test switches S1-Sn are connected to the EEG signal test electrodes Z1-Zn. In a one-to-one correspondence, the signal test switches S1-Sn include a first signal test switch S1S1-Sn and a second signal test switch S2S1-Sn. One end of the first signal test switch S1S1-Sn is connected to the signal output terminal of the EEG signal test electrodes Z1-Zn, the signal input terminal of the filter amplifier circuit 31, and a node of the second signal test switch S2S1-Sn. The other end of the first signal test switch S1S1-Sn is connected to the positive power supply 71. One end of the second signal test switch S2S1-Sn is connected to the signal output terminal of the EEG signal test electrodes Z1-Zn, the signal input terminal of the filter amplifier circuit 31, and a node of the first signal test switch S1S1-Sn. The other end of the second signal test switch S2S1-Sn is connected to the driving terminal of the driving circuit 32 and a node of the driven terminal of the impedance network 1. One end of the first switch S0 is connected to the first resistor 72, and the other end of the first switch S0 is connected to the signal input terminal of the filter amplifier circuit 31.

[0065] In this embodiment, as Figure 6As shown, the switching circuit unit 2 includes at least two sets of signal test switches S1-Sn, each set of signal test switches S1-Sn includes two switches, and each set of signal test switches S1-Sn corresponds one-to-one with an EEG signal test electrode Z1-Zn. Specifically, each signal test switch S1-Sn can control whether the power supply test signal passes through the impedance network 1 and forms a closed loop at the scalp, generating an impedance test signal.

[0066] Furthermore, the filter amplifier circuit 31 includes at least three operational amplifiers, including two EEG signal testing operational amplifiers and one drive auxiliary operational amplifier. The EEG signal testing electrodes Z1-Zn correspond one-to-one with the EEG signal testing operational amplifiers, and the drive auxiliary electrode Zgnd corresponds to the drive auxiliary operational amplifier. Specifically, each EEG signal testing electrode Z1-Zn is connected to the non-inverting input of its corresponding EEG signal testing operational amplifier, the drive auxiliary electrode Zgnd is connected to the non-inverting input of the drive auxiliary operational amplifier, and the impedance testing auxiliary electrode Zref is connected to the inverting input of all operational amplifiers.

[0067] The present invention also proposes an impedance detection method for an electroencephalogram (EEG) detection device, wherein the impedance detection method includes the following steps:

[0068] Step S100: Obtain control instructions and select the working mode of the EEG detection device according to the control instructions;

[0069] Step S200: If the EEG acquisition mode is selected, then the EEG signal is acquired, and the EEG signal processing result is generated based on the EEG signal.

[0070] In step S300, if the impedance detection mode is selected, the power supply test signal is acquired, an impedance detection signal is generated based on the power supply test signal, and the theoretical contact impedance is obtained based on the impedance detection signal.

[0071] The EEG detection device in this application has two working modes: one is the EEG acquisition mode, which acquires and processes EEG signals, and the other is the impedance testing mode, which tests the impedance of the lead electrodes in the impedance network 1.

[0072] In EEG acquisition mode, at least two EEG signal testing electrodes Z1-Zn in impedance network 1 are placed on the user's scalp to collect EEG signals. These signals can simultaneously reach the switching circuit unit 2 and the auxiliary circuit unit 6. In EEG acquisition mode, all switches in the switching circuit unit 2 are open, so the power module 7 does not affect EEG acquisition. The auxiliary circuit unit 6 restricts harmful large signals in the EEG signals. The EEG signals then enter the analog processing unit 3, which filters and amplifies them. The amplified EEG signals then enter the analog-to-digital conversion unit 4 to convert them from analog to digital signals. Finally, the converted EEG signals enter the digital processing unit 5 to obtain the EEG signal processing result. This result can be an EEG graph or a text recording.

[0073] In impedance test mode, the positive power supply 71 and the negative power supply each generate a power supply test signal. These power supply test signals include a positive power supply 71 test signal and a negative power supply test signal; the positive power supply 71 generates its own positive power supply test signal, and the negative power supply generates its own negative power supply test signal. For example... Figure 6 As shown, in impedance testing mode, switch S0 is closed, and switches S1-Sn in switch circuit unit 2 are closed in turn for a first preset time and then opened, thereby testing the theoretical contact impedance of each EEG signal testing electrode Z1-Zn in impedance network 1 in turn. The first preset time is a time length set in advance by those skilled in the art. In this way, the power supply test signal forms a closed loop at the scalp after passing through impedance network 1, generating an impedance test signal for analog processing unit 3. Analog processing unit 3 also filters and amplifies the impedance test signal, and then the impedance test signal passes through analog-to-digital conversion unit 4 to reach digital processing unit 5. Digital processing unit 5 can calculate the theoretical contact impedance of each lead electrode based on the impedance test signal.

[0074] In one embodiment, the step of obtaining the theoretical contact impedance based on the impedance detection signal includes:

[0075] Obtain the current amplitude and circuit amplification gain of the positive power supply 71;

[0076] Obtain the first resistance value of the first resistor 72;

[0077] The theoretical contact impedance is calculated based on the voltage amplitude, the first resistance value, the circuit amplification gain, and the impedance detection signal.

[0078] In this embodiment, Figure 6 For example, since the positive power supply 71 is a constant current source, the current amplitude of the constant current source can be set to I. Then, the amplitude of the impedance detection signal received by the digital processing unit 5 can be U1, U2, ..., U...n-1 U n U 1g U 2g And the first resistance value of the first resistor 72 can be set to R.

[0079] Among them, U 1g The amplitude of the impedance detection signal after switch S1 is closed, passing through channel CH1; U 2g Let S2 be the impedance detection signal amplitude after switch S2 is closed, passing through channel CH2. Then the following system of equations can be established:

[0080]

[0081] Among them, Z1, Z2, Z3.......Z n Z ref Z gnd These represent the theoretical contact impedances corresponding to each conductive electrode. g is the circuit amplification gain of simulation processing unit 3. In I, g, R, U1, U2...U n-1 U n U 1g U 2g Given that all quantities are known, the theoretical contact impedance of each lead electrode can be calculated. Based on the above calculation method, this application supports contact impedance testing of the zero electrode, and this application also supports impedance testing of the lead electrodes of a fully differential circuit.

[0082] The present invention also proposes an impedance detection device for an electroencephalogram (EEG) detection device. The impedance detection device for the EEG detection device includes a memory, a processor, and an impedance detection program for the EEG detection device stored in the memory and executable on the processor. The impedance detection program for the EEG detection device is used to execute the methods described in the various embodiments of the present invention.

[0083] The present invention also proposes a storage medium storing an impedance detection program of an electroencephalogram (EEG) detection device. The storage medium includes a computer-readable storage medium, which may be... Figure 1 The memory in the storage medium may be at least one of ROM (Read-Only Memory) / RAM (Random Access Memory), magnetic disk, optical disk, etc. The storage medium includes several instructions to cause an Internet of Things (IoT) terminal device with a processor (which may be a mobile phone, computer, server, IoT terminal, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0084] In this invention, the terms "first," "second," "third," "fourth," and "fifth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0085] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in multiple embodiments or examples of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0086] Although embodiments of the present invention have been shown and described above, the scope of protection of the present invention is not limited thereto. It is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, and substitutions to the above embodiments within the scope of the present invention, and such changes, modifications, and substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An electroencephalogram (EEG) detection device, characterized in that, The EEG detection device includes an impedance network, a switching circuit unit, an analog processing unit, an analog-to-digital converter (ADC), and a digital processing unit. The signal output terminal of the impedance network is electrically connected to the signal input terminal of the analog processing unit. The driven terminal of the impedance network is electrically connected to the driving terminal of the analog processing unit. The signal output terminal of the analog processing unit is electrically connected to the signal input terminal of the ADC. The signal output terminal of the ADC is connected to the signal input terminal of the digital processing unit. The switching circuit unit is connected in series between the signal output terminal of the impedance network and the signal input terminal of the analog processing unit. The controlled terminal of the switching circuit unit is electrically connected to the control terminal of the digital processing unit. The analog processing unit includes a filter amplifier circuit and a drive circuit. The signal input terminal of the filter amplifier circuit is connected to the signal output terminal of the impedance network, the signal output terminal of the filter amplifier circuit is connected to the signal input terminal of the analog-to-digital conversion unit, and the drive terminal of the drive circuit is connected to the driven terminal of the impedance network. The impedance network includes at least two EEG signal testing electrodes, an impedance testing auxiliary electrode, and a driving auxiliary electrode. The EEG signal testing electrodes are respectively connected to the signal input terminal of the filter amplifier circuit. The impedance testing auxiliary electrode is connected to the signal input terminal of the filter amplifier circuit. The driving auxiliary electrode is connected to the driving terminal of the driving circuit. The filter amplifier circuit includes three operational amplifiers, including two EEG signal testing operational amplifiers and one driving auxiliary operational amplifier. Each EEG signal testing electrode is connected to the non-inverting input terminal of the corresponding EEG signal testing operational amplifier. The driving auxiliary electrode is connected to the non-inverting input terminal of the driving auxiliary operational amplifier. The impedance testing auxiliary electrode is connected to the inverting input terminal of each EEG signal testing operational amplifier and the driving auxiliary operational amplifier.

2. The EEG detection device as described in claim 1, characterized in that, The EEG detection device also includes an auxiliary circuit unit, which is connected in series between the impedance network and the switching circuit unit.

3. The EEG detection device as described in claim 1, characterized in that, The EEG detection device also includes a power supply module, which includes a positive power supply and a first resistor; the positive power supply is a constant current source, which is connected to the switching circuit unit; one end of the first resistor is connected to the switching circuit unit, and the other end is grounded.

4. The EEG detection device as described in claim 3, characterized in that, The digital processing unit includes: The switch control subunit is electrically connected to the controlled terminal of the switch circuit unit; An impedance detection subunit is electrically connected to the signal output terminal of the analog-to-digital conversion unit, and includes a test signal filter and an impedance calculator that are interconnected. The EEG signal processing subunit is electrically connected to the signal output terminal of the analog-to-digital conversion unit and includes an EEG signal filter and an EEG signal processor that are interconnected.

5. The EEG detection device as described in claim 3, characterized in that, The switching circuit unit includes at least two sets of signal test switches and a first switch. Each signal test switch corresponds one-to-one with an EEG signal test electrode. Each signal test switch includes a first signal test switch and a second signal test switch. One end of the first signal test switch is connected to the signal output terminal of the EEG signal test electrode, the signal input terminal of the filter amplifier circuit, and a node of the second signal test switch. The other end of the first signal test switch is connected to the positive power supply. One end of the second signal test switch is connected to the signal output terminal of the EEG signal test electrode, the signal input terminal of the filter amplifier circuit, and a node of the first signal test switch. The other end of the second signal test switch is connected to the driving terminal of the driving circuit and a node of the driven terminal of the impedance network. One end of the first switch is connected to the first resistor, and the other end of the first switch is connected to the signal input terminal of the filter amplifier circuit.

6. An impedance detection method based on the electroencephalogram (EEG) detection device according to any one of claims 1 to 5, characterized in that, The impedance detection method of the electroencephalogram (EEG) detection device includes the following steps: Obtain control commands and select the working mode of the EEG detection device according to the control commands; If the EEG acquisition mode is selected, EEG signals will be acquired, and EEG signal processing results will be generated based on the EEG signals. If the impedance detection mode is selected, the power supply test signal is acquired, an impedance detection signal is generated based on the power supply test signal, and the theoretical contact impedance is obtained based on the impedance detection signal.

7. The impedance detection method of the EEG detection device as described in claim 6, characterized in that, The step of obtaining the theoretical contact impedance based on the impedance detection signal includes: Obtain the current amplitude of the positive power supply and the circuit amplification gain; Obtain the first resistance value of the first resistor; The theoretical contact impedance is calculated based on the current amplitude, the first resistance value, the circuit amplification gain, and the impedance detection signal.

8. A storage medium, characterized in that, The storage medium stores an impedance detection program for an EEG detection device, which, when executed by a processor, implements the steps of the EEG detection device as described in any one of claims 6 to 7.

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