Carrier plates for plasma processing systems

Abstract

A carrier plate for receiving a wafer includes a recess defined in a middle portion of a top surface of the carrier plate and having a surface diameter. The recess defines a substrate support area. A retaining feature of the carrier plate is defined at an outer edge of the recess. A tapered portion of the carrier plate extends from the retaining feature to the outer diameter. The tapered portion is configured to receive a focus ring. The bottom surface of the carrier plate is configured to be positioned above a susceptor used in a processing chamber. A plurality of wafer supports are disposed on the top surface of the substrate support area to support the wafer when receiving the wafer.

Description

[0001] This application is a divisional application of the invention patent application with application number 201780068130.0, application date October 26, 2017, applicant is Rum Research Company, and invention name is "Carrier plate for plasma processing system". Technical Field

[0002] The present invention relates to structures used in semiconductor processing tools, and more particularly to a carrier plate structure for supporting semiconductor wafers on a susceptor, and a method for transferring using the carrier plate structure. Background Art

[0003] In wafer processing such as plasma-enhanced chemical vapor deposition (PECVD), a carry ring assembly is employed to transport the wafer from one station to another. To lift and position the wafer from one processing station to the next, retaining features are employed in the carry ring assembly. The retaining features are designed to extend beneath the edge of the wafer but not contact the edge of the wafer during processing positioning. This arrangement leaves a significant gap around the edge of the wafer. Consequently, in a hot PECVD process, the wafer edge is cooler, experiences different RF coupling than the rest of the wafer, and experiences potential or periodic parasitic plasma ignition in the gap, thereby disrupting RF power handling and potentially causing a host of other detrimental issues. Furthermore, as the carry ring makes and breaks contact with the wafer as the wafer indexes around the processing tool, particles generated in the processing chamber are likely to migrate and deposit on the wafer edge, impacting die yield.

[0004] Temperature discontinuities at the wafer edge (where the wafer overhangs the carrier ring retention feature) are tolerable as long as a certain amount of edge exclusion zone is maintained (e.g., 3 mm), where the wafer die does not form. However, as manufacturers push the edge exclusion zone farther outward (e.g., to about 1.8 mm or less), this overhang area is increasingly becoming a source of competitive disadvantage and engineering challenges to overcome.

[0005] Furthermore, these defects lead to various sources of non-uniformity in film thickness and other performance indicators. For processing modules that use a robot to transfer wafers directly to a pedestal or chuck via lift pins, this variation can lead to performance issues. Non-uniformity becomes a problem, particularly in processing modules with multiple processing stations, such as the four-station processing module manufactured by Lam Research Corporation. To overcome these issues, ringless wafer transport mechanisms using carrier rings have been adopted. However, carrier rings require coordination, additional mechanisms (e.g., spindle motors), and increased automation. Furthermore, wafer transport mechanisms using carrier rings require unacceptably large radial clearances in the wafer receiving pockets, which contribute to cumulative handoff errors during transport. In wafer transport mechanisms, the carrier ring does not extend completely under the wafer, but instead begins just at or beyond the wafer edge. Furthermore, to maintain a competitive advantage, newer processes require high-precision features to be located very close to the wafer edge, in the area just occupied by the carrier ring retaining features. To provide such advantages, deposition on the backside of the wafer, particularly at the wafer edge, must be eliminated or significantly reduced.

[0006] It is against this background that embodiments of the present invention emerge. Summary of the Invention

[0007] Embodiments of the present disclosure provide systems, devices, and methods that utilize a removable carrier plate that supports the wafer while receiving the wafer, which enables a process similar to that of a carrier ring wafer transfer, but without the disadvantages of carrier ring wafer transfer. For example, the carrier plate overcomes the limitations of ringless wafer transfer mechanisms and other wafer transfer mechanisms. The carrier plate has a recess in which the wafer is placed during processing, and the carrier plate is configured to rest on a base. When the wafer needs to be transported to a different station, the carrier plate with the wafer thereon can be lifted and moved to another base. Therefore, the transfer of the wafer from one station to another can be achieved by transferring the carrier plate without the need to lift the wafer from the support surface of the carrier plate.

[0008] In a specific example of a processing chamber for deposition (e.g., PECVD), a wafer is received and supported on a carrier plate, which is received on a base of the processing chamber. The carrier plate includes a recess that, when receiving the wafer, covers a surface extending at least across the diameter of the wafer. The sides and bottom of the recess are continuous because they are formed from a single component structure. The recess defines a substrate support area. In one embodiment, the wafer remains in contact with the carrier plate during processing and transport. As a result, when the carrier plate is moved to achieve wafer transport, such movement does not require making or breaking contact with the wafer. This design of the carrier plate also eliminates gaps below the edge of the wafer. By manufacturing the spacing features directly into the substrate support area of the carrier plate, the wafer carrier plate spacing features (e.g., small bumps that provide a minimum contact area) can be made very small. The precise manufacturing of these spacing features minimizes gaps on the underside of the wafer. In one embodiment, a hybrid wafer receiving mechanism can be designed by using ceramic for the carrier plate and metal for the base. This hybrid structure retains the simplicity and throughput advantages of a ring conveyor mechanism while addressing its limitations.

[0009] The various embodiments discussed herein provide many benefits compared to conventional wafer transfer mechanisms. One of these benefits includes eliminating temperature discontinuities at the edge of the wafer. Another benefit is the elimination of gaps around the edge of the wafer, which could lead to parasitic plasma ignition or discontinuous high-frequency transfer impedance. Because the carrier plate provides high-precision recessed features that extend under the wafer and wrap around critical areas near the edge of the wafer, particle contamination at the edge and underside of the wafer is reduced. The carrier plate remains in contact with the wafer as it moves from one station to another with the wafer as a unit. As a result, a separate transfer mechanism is not required to lift the wafer out of the recess. The carrier plate provides a surface on which the wafer can be placed with high precision by a robot without causing eccentric transfers, such as those involved in conventional spindle-carrier ring transfers. The carrier plate provides a low-cost solution by combining a high-precision ceramic surface under the wafer and a low-cost metal (e.g., aluminum) base that receives the carrier plate.

[0010] In one embodiment, a processing chamber for processing wafers is disclosed. The processing chamber includes a susceptor configured to receive a carrier plate. The susceptor has a top surface and an annular surface. The top surface of the susceptor is defined in a middle portion of the carrier plate and extends across a surface diameter. The annular surface of the susceptor is separated from the top surface by a downward step defining a first height. The annular surface extends outward from the surface diameter of the top surface to an outer diameter of the susceptor. The carrier plate has a recess defined in a middle portion of the top surface of the carrier plate and extends at least to the surface diameter. A retaining feature is provided near an outer edge of the recess. A tapered portion extends from the retaining feature to the outer diameter of the susceptor. When a wafer is received, the recess defines a substrate support area for supporting the wafer. A plurality of carrier supports are distributed along the top surface of the susceptor. When a wafer is received, the plurality of carrier supports define a minimum contact area that provides reliable support for the carrier plate.

[0011] In another embodiment, a carrier plate for receiving a wafer is disclosed. The carrier plate includes a recess defined in a central portion of the carrier plate and having a surface diameter. The recess defines a substrate support region. A retaining feature is defined in the carrier plate at an outer edge of the recess. A tapered portion is defined in the carrier plate and is configured to extend from the retaining feature to the outer diameter. The tapered portion is configured to receive a focus ring. The bottom surface of the carrier plate is configured to be positioned above a susceptor. A plurality of wafer supports are disposed on a top surface of the substrate support region to support the wafer when receiving the wafer.

[0012] Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1A A substrate processing system for processing a wafer, for example, to form a film thereon, is shown according to one embodiment.

[0014] Figure 1B A substrate processing system configured to perform a deposition process on a wafer is shown according to one embodiment.

[0015] Figure 1C-1 、 Figure 1C-2 and Figure 1C-3 A substrate processing system for processing wafers according to an alternative embodiment is shown.

[0016] Figure 1D A cross-sectional view of a multi-station chamber of a substrate processing system configured to perform a deposition process on a wafer is shown according to one embodiment.

[0017] Figure 2AA top view of a multi-station processing tool of a substrate processing system is shown according to one embodiment, wherein four processing stations are provided and a spider fork is used to move a carrier plate.

[0018] Figure 2B According to one embodiment, Figure 2A A schematic diagram of an embodiment of a multi-station processing tool of a substrate processing system having an inbound load lock and an outbound load lock is shown in FIG.

[0019] Figure 3 A top view of a multi-station processing tool of a substrate processing system having a wafer paddle for moving a carrier plate is shown according to an alternative embodiment.

[0020] Figure 4 A top view of an example configuration of processing stations of a multi-station processing tool is shown according to one embodiment.

[0021] Figure 5A A cross-sectional view of a peripheral portion of a susceptor 300 on which a carrier plate is received in a substrate processing system according to an embodiment of the present invention is shown.

[0022] Figure 5A-1 shows the acceptance of an embodiment according to the present invention Figure 5A An enlarged view of the edge portion of the wafer in the recess identified in FIG.

[0023] Figure 5B A cross-sectional view of a peripheral portion of a wafer including a carrier plate for receiving a focus ring is shown according to an alternative embodiment of the present invention.

[0024] Figure 5C-1 and Figure 5C-2 A cross-sectional view of a peripheral portion of a wafer including a carrier plate for receiving a focus ring is shown according to an alternative embodiment of the present invention.

[0025] Figure 5D-1 and Figure 5D-2 A cross-sectional view of a peripheral portion of a wafer received on a carrier plate is shown in accordance with an alternative embodiment of the present invention.

[0026] Figure 5E A cross-sectional view of a carrier plate is shown identifying details of an electrostatic chuck assembly according to an embodiment of the present invention.

[0027] Figure 5E-1 An enlarged view of a peripheral portion of a wafer received in a pocket of a carrier plate is shown, identifying details of the carrier plate, in accordance with an embodiment of the present invention.

[0028] Figure 5F-1An enlarged cross-sectional view of a carrier plate including a plurality of lift pins distributed in a base body in a disengaged state is shown according to an embodiment of the present invention.

[0029] Figure 5F-2 A cross-sectional view of a carrier plate with a plurality of lift pins in an engaged state is shown in accordance with an embodiment of the present invention.

[0030] Figure 6 A control module (ie, controller) for controlling a system is shown according to one embodiment. DETAILED DESCRIPTION

[0031] Embodiments of the present disclosure provide various details of a carrier plate for a processing chamber. The carrier plate can be used in a processing chamber that includes one or more pedestals. In one configuration, if the processing chamber includes a set of pedestals, the processing chamber will have a similar set of carrier plates. Wafers are loaded onto the carrier plate, and the carrier plate can be moved from one pedestal to another without removing the wafer from the corresponding carrier plate. In one configuration, when the carrier plate is transferred, the system can transfer all the carrier plates at the same time, for example, by a rotating assembly. In this way, all the carrier plates are transferred to different pedestals to enable further processing in the processing chamber. It should be understood that embodiments of the present invention can be implemented in a variety of ways, such as processes, apparatuses, systems, devices, or methods. Several embodiments are described below.

[0032] The deposition of the film can be achieved in a plasma enhanced chemical vapor deposition (PECVD) system. The PECVD system can take many different forms. The PECVD system includes one or more chambers or "reactors" suitable for wafer processing. Each chamber can include multiple stations to accommodate one or more wafers for processing. The one or more chambers hold the wafer in one or more defined positions (with or without movements such as rotation, vibration or other agitation in the position). The wafer being deposited can be transferred in and out of the reactor chamber during the processing and transferred from one station to another within the reactor chamber. Of course, film deposition can occur entirely at a single station or any portion of the film can be deposited at any number of stations.

[0033] While in process, the wafer is held in place by a carrier plate, wafer chuck, and / or other support device received on a susceptor.For certain operations, the device may include a heater (eg, a heating plate) to heat the wafer.

[0034] Figure 1AAn exemplary substrate processing system 100 is shown for processing a wafer 101. The system includes a processing chamber 102 having an upper chamber portion 102a and a lower chamber portion 102b. A central column is configured to support a pedestal 140. In one embodiment, the pedestal 140 is a powered electrode. In this embodiment, the pedestal 140 is electrically connected to a power supply 104 via a matching network 106. The power supply is controlled by a control module 110 (e.g., a controller). The controller 110 is configured to operate the substrate processing system 100 by executing inputs provided by a process input and control device 108. The process input and control device 108 can provide process recipe inputs, such as power levels, timing parameters, process gases, inputs for controlling the mechanical movement of the wafer 101, etc., so as to deposit or form a film on the wafer 101.

[0035] In one embodiment, the center column is shown as including at least a portion of a lift pin mechanism. The lift pin mechanism includes lift pins 120 that are controlled by lift pin control 122. Figure 1A In the illustrated embodiment, the lift pins are shown as being disposed in the center column. It should be noted that in other embodiments, the lift pins can be disposed anywhere in the body of the base 140 and are not limited to the center column. The lift pins 120 are used to raise the carrier plate 200 from the base 140 to allow an end effector or spider fork mechanism to lift the carrier plate from the surface of the base 140 or lower the carrier plate to the surface of the base 140. The substrate processing system 100 also includes a gas supply manifold 112 that is connected to a process gas 114, for example, a gas chemical supply source from the facility. Depending on the process being performed, the controller 110 controls the delivery of the process gas 114 via the gas supply manifold 112. The selected gas is then caused to flow into the showerhead 150 and distributed in the volume defined between the face of the showerhead 150 facing the wafer 101 and the top surface of the wafer 101 resting on the carrier plate received on the base 140.

[0036] In addition, the gases may be pre-mixed or not. Appropriate valves and mass flow control mechanisms may be used to ensure that suitable gases are delivered during the deposition and plasma treatment phases of the process. The process gases leave the chamber via an outlet. A vacuum pump (e.g., one or two stage mechanical dry pumps and / or turbomolecular pumps) is used to extract the process gases and maintain a suitably low pressure within the reactor through a closed-loop controlled flow restriction device (e.g., a throttle valve or a pendulum valve).

[0037] Also shown is a carrier plate 200, which is received on the susceptor 140. The carrier plate 200 is configured to support and hold the wafer 101 when received. In some embodiments, the carrier plate 200 is a removable unit that can be moved into and out of the processing chamber. In such embodiments, wafers are preloaded onto the carrier plate 200 outside the processing chamber, and the carrier plate 200 with the loaded wafers is transported into the processing chamber. The carrier plate 200 with the preloaded wafer 101 is received on the susceptor 140.

[0038] The carrier plate 200 includes a substrate support area 201 defined in a central region and extending a surface diameter of the top surface of the susceptor 140. In some embodiments, the surface diameter is at least equal to the diameter of a wafer being received on the carrier plate 200.

[0039] The pedestal 140 is connected to an electrostatic chuck (ESC) controller (not shown). A voltage applied to the pedestal 140 by the ESC controller enables generation of a clamping force or a release force for clamping the carrier plate 200 to the top surface of the pedestal or releasing the carrier plate 200 from the top surface of the pedestal. In some embodiments, the clamping or release voltage can be provided in response to a signal provided by the controller 110. The controller 110 is also configured to control a lift pin mechanism such that, when the lift pins are activated, the carrier plate can be lifted from the top surface of the pedestal.

[0040] Figure 1B An alternative example of a substrate processing system is shown that is configured to be engaged within a processing chamber. Figure 1B The components of the substrate handling system are similar to Figure 1A The substrate processing system shown in FIG. 1 is different in that the power supply is electrically connected to the showerhead 150 instead of the pedestal 140 through the matching network 106 . Figure 1A and Figure 1B Similar components in the drawings are numbered with the same reference numerals.

[0041] Figure 1C-1 Shown with Figure 1A The exemplary substrate processing system shown in FIG. 1 is an example of a different substrate processing system 100. Figure 1A and Figure 1C-1 Components that are common to the drawings are numbered with the same reference numerals. It should be noted that the sizes of the various components shown in the various drawings are exaggerated to facilitate identification of the components and are not true representations of actual size. Figure 1C-1The base 140' includes a top surface extending the outer diameter. In this example, the base 140' does not include an annular surface. The carrier plate 200' is received above the base 140'. The geometry of the bottom surface of the carrier plate 200' is configured to match the geometry of the top surface of the base 140'. A recess is defined in the middle portion of the carrier plate 200' to cover a surface diameter that is smaller than the outer diameter of the base 140'. In one embodiment, the carrier plate 200' is received on the base 140' by engaging a plurality of motion pins (not shown) provided on the base 140'. In some embodiments, three motion pins are evenly distributed on the top surface of the base 140' and are used to align the carrier plate 200' when being received on the base 140'. The motion pins provide reliable contact support for the carrier plate 200'. It should be noted that the number of kinematic pins engaged is exemplary, and additional kinematic pins may be provided on the base 140' for aligning the carrier plate 200' on the base 140'. In such an embodiment, the carrier support may not be provided on the top surface of the base 140', and the kinematic pins provide the MCA to reliably support the carrier plate 200'.

[0042] Figure 1C-2 and Figure 1C-3 An alternative embodiment is shown in which a different alignment mechanism is used instead of a kinematic pin to receive the carrier plate 200' on the base 140'. In this embodiment, a groove-like feature 141 is defined on the top surface of the base 140'. The bottom surface of the carrier plate 200' includes an extension 201 near the outer periphery of the carrier plate 200'. The extension 201 of the carrier plate 201' is sized to fit into the groove-like feature 141 of the base 140'. In some embodiments, the outer diameter of the base 140' is equal to the diameter of the carrier plate 200'. In such an embodiment, the groove-like feature 141 is defined near the outer periphery of the base 140' so that the diameter of the extension 201 of the carrier plate 200' is equal to the diameter of the groove-like feature 141. In other embodiments, the diameter of the base 140' may be greater than the diameter of the carrier plate 200'. In such an embodiment, the groove-like feature of the base can be defined at an appropriate distance from the outer periphery of the base 140' so that the diameter of the groove-like feature is equal to the diameter of the extension 201 defined on the carrier plate 200'. The carrier plate 200' is supported by the groove-like feature 141, and no bearing support is provided on the top surface of the base 140'. The top surface of the base 140' and the bottom surface of the carrier plate have similar geometric profiles.

[0043] Figure 1DA cross-sectional view of a substrate processing system 100' that incorporates multiple stations according to one embodiment is shown. The processing chamber 102' includes a lower chamber portion 102b' that accommodates the multiple stations and an upper chamber portion 102a' that accommodates a plurality of showerheads 150. The number of showerheads 150 in the upper chamber portion 102a' is equal to the number of stations disposed in the lower chamber portion 102b'. The upper chamber portion 102a' is configured to lower the showerheads 150 so that the showerheads 150 are substantially aligned with the base 140 of each station. The lower chamber portion 102b' is configured to be supported by a support structure 103. The support structure 103 can be defined by any suitable structure capable of supporting the multi-station processing chamber 102' and facilities for providing gases, RF power, pressure control, temperature control, timing, and associated controllers and electronics. In one embodiment, the support structure 103 is defined by a metal tubular structure that supports the processing chamber 102' above a surface (e.g., a clean room floor) in which the processing chambers 102' of the substrate processing system 100' are mounted. Vacuum pumps 160a, 160b are provided and connected to the lower chamber portion 102b'. The vacuum pumps 160a, 160b are configured to provide adequate gas flow, remove process gases, and / or provide pressure control within the processing chamber 102'. Generally, the process gas is allowed to flow over the substrate 101 and over the edge of the carrier plate 200 toward the vacuum pumps 160a, 160b, thereby defining a gas flow path 402.

[0044] Figure 2A A top view of a multi-station substrate processing system 100' is shown in which four processing stations are provided in a processing chamber 102'. The top view is of a lower chamber portion 102b' of the processing chamber 102' (e.g., the upper chamber portion 102a' is removed for illustration). In one embodiment, the four stations are accessed by a lifting mechanism 226 that engages a spider fork. Each spider fork includes a first arm and a second arm, each arm being positioned around a portion of each side of a base 140. In this view, the spider forks are drawn in dashed lines to indicate that they are below the carrier plate 200. The spider forks are coupled to a rotating mechanism 220. Although the reference numeral 226 points to the spider forks, it should be noted that the spider forks and the rotating mechanism 220 are part of the lifting mechanism 226. The spider forks, when engaged, are configured to move beneath the outer edge of the carrier plate 200 and simultaneously lift the carrier plate 200 from the station (i.e., from the lower surface of the carrier plate 200) and then rotate at least one or more of the stations before lowering the carrier plate 200 (at least one of which supports a wafer 101) to the next position so that further plasma treatment, processing and / or film deposition can be performed on the corresponding wafer 101.

[0045] Figure 2BA schematic diagram of an embodiment of a multi-station substrate processing system 100' is shown having an inbound load lock 301 and an outbound load lock 303. A robot 305 is configured at atmospheric pressure to move wafers from a cassette loaded via a wafer boat 313 into the inbound load lock 301 via an atmospheric port 310. The inbound load lock 301 is coupled to a vacuum source (not shown) such that the inbound load lock 301 can be evacuated when the atmospheric port 310 is closed. The inbound load lock 301 also includes a chamber transfer port 316 connected to the processing chamber 102'. Thus, when the chamber transfer port 316 is open, another robot (not shown) can move the wafer from the inbound load lock 301 to the pedestal 140 of the first processing station disposed in the lower chamber portion 102b' for processing.

[0046] The depicted processing chamber 102' includes four processing stations, Figure 2B In the illustrated embodiment, they are numbered 1 through 4. In some embodiments, the processing chamber 102' can be configured to maintain a low pressure environment so that wafers can be transferred between processing stations using the carrier plate 200 without experiencing vacuum break and / or air exposure. Figure 2B Each processing station depicted in FIG. 1 includes a pedestal 140 for receiving a carrier plate with wafers and a process gas delivery line inlet (not shown).

[0047] Figure 2B Also depicted is the spider fork of the lift mechanism 226 used to transport substrates within the processing chamber 102'. As will be described in more detail below, the spider fork rotates and enables wafers to be transferred from one station to another. Transfer occurs by enabling the spider fork to move beneath the outer lower surface of the carrier plate 200 and lift the carrier plate 200 with the wafer 101. The carrier plate with the wafer 101 is then moved to the next pedestal 140. In one configuration, the spider fork is made of a ceramic material to withstand the high levels of heat during processing.

[0048] exist Figure 2A and Figure 2B In the configuration described above, no ground plate is provided around each pedestal. This leaves the lower chamber body exposed, and the RF ground return typically passes through the chamber wall. This configuration does not provide any symmetry for the RF ground return. In alternative embodiments, a ground plate can be included to provide a symmetrical RF ground return.

[0049] Figure 3 Shown Figure 2A An alternative embodiment of the lift mechanism is shown in FIG. The lift mechanism 226′ includes wafer blades instead of spider forks. The wafer blades of the lift mechanism 226′ are attached to the rotation mechanism 220. Although Figure 3Reference numeral 226' in FIG. 1 refers to the spider fork, but it should be noted that the spider fork and the rotating mechanism 220 are part of an elevator mechanism 226' employed in the processing chamber 102' for raising and lowering the carrier plate 200. In some embodiments, the rotating mechanism 220 is a spindle operated by a spindle motor (not shown).

[0050] When the carrier plate 200 must be moved, the lift pins are engaged using the lift pin controls. The lift pins lift the carrier plate 200 with the wafers from the pedestals 140. The wafer blade moves under the carrier plate 200 and lifts the carrier plate 200 off the lift pins. The lift pins retract into the housing and the spindle and wafer blade rotate the carrier plate 200 to the next pedestal 140. The lift pins engage again to receive the carrier plate 200 from the wafer blade. The wafer blade and spindle rotate away and the carrier plate 200 is received on the pedestal 140. The transfer of the carrier plate 200 with the wafers is coordinated so that the carrier plate 200 with the wafers is positioned on a different pedestal to enable further processing of the wafers. Figure 3 In the embodiment shown, the lift pins are strategically located in the body of the susceptor so as not to interfere with the movement of the wafer paddle when the lift pins are engaged.

[0051] Figure 4 1 is a top view of the lower chamber portion 102b', illustrating the positioning of the pedestals 140 at various stations. As shown, the pedestals 140 are disposed within a process opening defined on a surface disposed within the lower chamber portion 102b'. The pedestals 140 are configured to receive a carrier plate 200. In some embodiments, the diameter of the carrier plate 200 received on the pedestal 140 is equal to the outer diameter of the pedestal 140, which is smaller than the diameter of the process opening.

[0052] In some embodiments, the geometric profile of the bottom surface of the carrier plate 200 matches the geometric profile of the top of the susceptor 140, allowing the carrier plate 200 to rest on the susceptor 140 when received. In some embodiments, a recess is defined in a central portion of the top surface of the carrier plate 200 and extends across a surface diameter. The surface diameter D2 of the recess is sized to accommodate the width of the wafer 101 received on the carrier plate 200 for processing. For more information on the dimensions of the recess surface diameter, reference may be made to application Ser. No. 14 / 578,126, filed Dec. 19, 2014, entitled "Reducing Backside Deposition at WaferEdge," which is incorporated herein by reference in its entirety. A gap exists between each of the susceptor, the carrier plate, and the outer edge of the process opening. The gap provides sufficient space for air / process gas flow. It should be understood that the size of the gap will scale depending on the size of the susceptor and carrier plate used. For systems accommodating larger or smaller wafers, the exemplary dimensions will scale accordingly.

[0053] In some embodiments, the surface of the lower chamber portion 102b' can be configured to provide a symmetrical ground potential around the process opening defined by diameter D1 so that a return path to ground is defined for the RF power. This improves process uniformity and enables tighter control of the deposited film.

[0054] In some embodiments, the surface of the lower chamber portion 102b' also includes a central opening for accommodating the rotation mechanism 220 of the lift mechanism 226 or 226'. The rotation mechanism 220 is coupled to a spider fork. Although the spider fork is shown attached to the rotation mechanism 220, other embodiments may engage a wafer blade instead of a spider fork. In embodiments where the lift mechanisms 226, 226' engage a spider fork or wafer blade, the lift mechanisms are configured for radial movement. In other embodiments, instead of lift mechanisms with spider forks or wafer blades, other lift mechanisms may be used, which may or may not include the rotation mechanism 220. In embodiments where different lift mechanisms 226 are provided in the processing chamber 102', the lift mechanisms may be positioned on one side of the corresponding pedestals. In such embodiments, the lift mechanisms may be configured to move vertically as well as radially to lift and move the carrier plate 200. Regardless of the type of lift mechanism used, the lift mechanism 226 is connected to the controller 110. When the carrier plate 200 with the wafers must be moved, the controller 110 provides the necessary signals to activate the lift pins and lift mechanism at the processing station. By way of an overview of the substrate processing system, reference will now be made to Figure 5A-5F-2 Details of a carrier plate used in a substrate processing system are described.

[0055] Figure 5AAn exemplary cross-sectional view of a susceptor 140 within a processing chamber 102 is shown, with a carrier plate 200 received thereon. The susceptor 140 includes a top surface 140a and an annular surface 140b. The top surface 140a is defined in the middle portion of the susceptor 140 and extends from the central axis to cover the surface diameter. The annular surface 140b is defined as a step 140c downward from the outer edge of the top surface 140a, such that the vertical position of the top surface 140a is higher than the vertical position of the annular surface 140b. In one embodiment, the annular surface 140b extends toward the outer diameter of the susceptor 140. In some embodiments, the outer diameter of the annular surface 140b may be smaller than the outer diameter of the susceptor 140. In such embodiments, an additional step may be defined in the susceptor 140 to separate the annular surface 140b from a second annular surface 140d of the susceptor 140. In other embodiments, the outer diameter of the annular surface 140b may extend to the outer diameter of the susceptor 140. The step 140c separating the top surface 140a and the annular surface 140b of the pedestal 140 defines a step height. In some embodiments, the step height is between about 3 mm and about 6 mm. In other embodiments, the step height is about 4 mm. The carrier plate 200 is configured to rest on the top surface 140a of the pedestal 140 when received in the processing chamber 102. In some embodiments, a plurality of carrier supports can be provided on the top surface 140a of the pedestal 140, and the carrier plate 200 is received on the top surface 140a.

[0056] In some embodiments, the bottom surface of the carrier plate may have a surface profile that enables the carrier plate to be placed on the base 140. For example, the bottom surface may include a center portion, a vertical portion, and a horizontal portion. The center portion is defined at the center of the carrier plate. The vertical portion is defined as from the outer edge of the center portion downward to the inner edge of the horizontal portion. In this embodiment, the height of the vertical portion is defined as a second height "d2". The second height d2 is equal to the height of the step 140c of the base 140. Additional steps can be defined in the base 140 to separate the annular surface 140b from the second annular surface 140d. In one embodiment, the step 140c and the additional step (where applicable) define a recess in which a lifting mechanism such as a spider fork 226 is disposed. When engaged, the spider fork 226 is used to support and move the carrier plate 200.

[0057] In some embodiments, the carrier plate 200 includes a recess 202 defined in a middle portion of the top surface of the carrier plate 200. The recess 202 defines a substrate support area 201 that is configured to cover at least the surface diameter of the top portion of the susceptor 140. In one embodiment, the surface diameter of the recess is defined to cover at least the surface diameter of the wafer received thereon. The surface diameter of the wafer can be one of a 100 mm wafer, a 150 mm wafer, a 200 mm wafer, a 330 mm wafer, and a 450 mm wafer. Of course, the wafer diameters provided here are merely examples, and wafers of other sizes can be received in the recess 202 of appropriate size.

[0058] The carrier plate 200 also includes a retaining feature 204 disposed near the outer edge of the recess 202. A top surface 204a of the retaining feature is adjacent to the recess. A step 206 defining the wall of the recess 202 separates the top surface 204a of the retaining feature 204 from the substrate support area 201 of the carrier plate 200. The step 206 extends upward to a first height 'd1' such that the horizontal surface of the substrate support area 201 is lower than the horizontal surface of the top surface 204a of the retaining feature 204. In some embodiments, the first height is designed to be greater than the thickness of a wafer received on the substrate support area 201 of the recess 202. A tapered portion 204b of the carrier plate 200 is disposed adjacent to the retaining feature 204 and extends from the retaining feature 204 to the outer diameter of the susceptor 140. The tapered portion 204b is configured to receive a focus ring 208.

[0059] In some embodiments, the top surface 140a of the base 140 includes a plurality of bearing supports 306a, 306b, etc. to support the carrier plate 200 at a support level above the top surface 140a of the base 140. In some embodiments, the bearing supports 306 are positioned at or along the edge of the top surface 140a of the base 140. In other embodiments, the bearing supports 306 are evenly distributed around the top surface 140a of the base 140 so that the carrier plate 200 can be securely rested. In some embodiments, additional bearing supports 306g, 306h can be defined on the annular surface 140b of the base 140 to support the bottom portion of the carrier plate 200. In alternative embodiments, no bearing supports are defined on the annular surface 140b. In such embodiments, the bottom portion of the carrier plate 200 rests directly on the annular surface 140b. This design may be implemented to avoid any gaps between the carrier plate 200 and the annular surface 140 b , thereby preventing any plasma or other precursors present in the processing chamber from entering the underside of the carrier plate 200 .

[0060] A plurality of wafer supports 304a, 304b, etc. are evenly distributed along the top surface of the substrate support region 201 defined in the pocket 202 of the carrier plate 200 to provide reliable support for the wafer 101 when received in the pocket 202 of the carrier plate 200. The height of the wafer supports 304 in the pocket 202 and the depth of the pocket 202 are defined so that the wafer 101 is flush with the top surface of the carrier plate 200 (i.e., the top surface of the retention feature 204) when received in the pocket 202. In some embodiments, the depth of the pocket 202 can be equal to the combined height of the wafer supports 304 on the substrate support region 201 and the thickness of the wafer 101. In some embodiments, when the wafer 101 is supported on the wafer supports 304 within the pocket 202 of the carrier plate 200, a gap 203 can exist between the edge of the wafer 101 and the inner edge of the retention feature 204 of the carrier plate 200. In some embodiments, the gap 203 can be controlled so that when the wafer 101 is received in the pocket 202, the top surface 204a of the retaining feature 204 provides a substantially flat surface extending from the top surface of the wafer 101. It should be noted that the dimensions of the pocket 202 defined on the carrier plate 200 are set according to the diameter of the wafer 101 received therein. For example, for a 300 mm wafer received in the pocket 202 of the carrier plate 200, the dimensions of the pocket 202 are set so that the gap 203 is between about 0.2 mm and about 1 mm.

[0061] In some embodiments, the thickness "d3" of the carrier plate at the substrate supporting area 201 (i.e., the portion of the carrier plate 200 within the recess 202) is based on the material used and the total weight of the carrier plate 200. Additionally, the thickness d3 of the carrier plate at the substrate supporting area 201 can depend on the top surface profile of the substrate supporting area 201 defined within the recess 202. In some embodiments, the thickness d3 of the carrier plate at the substrate supporting area 201 defined within the recess 202 is between about 0.5 mm and about 5 mm. In some embodiments, when the top surface of the substrate supporting area 201 within the recess 202 has a uniform, flat surface profile, the thickness d3 of the carrier plate at the substrate supporting area 201 can be between about 1 mm and about 1.5 mm. In some other embodiments, when the top surface of the substrate supporting area 201 within the recess 202 has a ribbed surface profile, the thickness d3 of the carrier plate at the substrate supporting area 201 within the recess 202 can be between about 1 mm and about 3 mm. In some embodiments, substrate supporting region 201 is made of a ceramic material.

[0062] In some embodiments, the edges and top surface 204a of the retaining feature 204 and the tapered portion 204b of the carrier plate 200 can accommodate varying geometric contours. Figure 5AIn one embodiment shown, the retaining feature 204 is designed to have a top surface 204a proximate to a step 206 that separates the substrate support area 201 in the cavity 202 from the retaining feature 204. A second step 207 is defined on the side opposite the step 206, and a tapered portion 204b extends outward from the bottom edge of the second step 207 to the outer diameter of the base 140 to define a wedge-shaped profile. It should be noted that the retaining feature 204 and the tapered portion 204b can be modified to alternative geometric profiles, including Figure 5B and the example shown in Figure 5C.

[0063] Figure 5A-1 An enlarged view of the edge of the pocket 202 is shown in which the wafer 101 is received. The wafer 101 is received on a wafer support 304a or the like defined in the substrate support area 201 of the pocket 202, which provides a secure contact area for the wafer 101.

[0064] continue Figure 5A , wafer supports 304a, 304b, etc. are shown distributed over the top surface of the substrate support area 201. In some embodiments, the wafer supports 304a, 304b, etc. are symmetrically distributed around a peripheral portion of the top surface of the substrate support area 201. In other embodiments, any number of wafer supports may be distributed over the top surface of the substrate support area 201, and the wafer supports 304 may be distributed around the top surface of the substrate support area 201 in any suitable configuration for supporting a wafer during deposition processing operations. In some embodiments, the wafer supports 304a, 304b, etc. are fabricated directly into the carrier plate as small bumps. The small bumps define a minimum contact area (MCA) that provides continuous contact for the wafer 101 when receiving the wafer 101. The MCA is used to improve the precise fit between the wafer surface and the top surface of the substrate support area 201 of the carrier plate 200 when high precision or tolerance is required and / or minimal physical contact is desired to reduce the risk of defects.

[0065] In some embodiments, when the wafer support is manufactured as part of a single component, a high-precision wafer support with a smaller size can be manufactured. For example, the precision wafer support can be manufactured directly on the top surface of the substrate support area 201 of the recess 202, with the sides and bottom of the recess 202 being continuous. In one embodiment, the carrier plate 200 can be made of a different material than the base 140. For example, the carrier plate 200 can be made of a ceramic material, while the base 140 can be made of a metal, such as aluminum.

[0066] In one embodiment, the carrier plate 200 can be made of a non-silicon-containing material. In one embodiment, the non-silicon-containing material can include aluminum oxide, etc. In another embodiment, the carrier plate 200 can be made of a high thermal conductivity material, such as aluminum nitride, silicon, etc. In some other embodiments, the carrier plate 200 can be made of aluminum oxide. The above materials are provided as examples and should not be interpreted as an exhaustive list. In some embodiments, the base 140 can be made of a dielectric material. The hybrid base-carrier plate provides a low-cost solution for moving the wafer 101 from one processing station or chamber to another processing station or chamber to achieve wafer movement without having to make or break contact. When the wafer 101 is present, the design of the carrier plate 200 eliminates the gap below the edge of the wafer 101. The MCA is not limited to the carrier plate area, but can be included in other areas of the carrier plate 200, such as on the top surface of the tapered portion 204b.

[0067] In one embodiment, the focus ring 208 is received on the tapered portion 204b of the carrier plate 200 to extend the deposition surface of the wafer 101 received on the carrier plate 200. In addition, the focus ring 208 protects the tapered portion 204b of the carrier plate 200 from exposure to chemicals used in the processing chamber. In some embodiments, the dielectric constant of the focus ring is less than the dielectric constant of the carrier plate 200. The focus ring 208 is received on the tapered portion 204b. The focus ring extends from the recess defined by the step 207 to the outer diameter of the carrier plate 200. In some embodiments, the geometric profile of the focus ring 208 matches the geometric profile of the tapered portion 204b. For example, in Figure 5A In the illustrated embodiment, the tapered portion 204b is shown as having a wedge-shaped profile. The wider side of the tapered portion 204b is positioned adjacent to the step 140c of the pedestal 140, while the narrow side of the tapered portion 204b is positioned toward the outside of the pedestal 140. In this embodiment, the focus ring 208, which is received on the top surface of the tapered portion 204b of the carrier plate 200, is also shown as having a wedge-shaped profile. The focus ring 208 is positioned above the tapered portion 204b such that the narrow side of the focus ring 208 faces inward and the wider side of the focus ring 208 faces outward. This arrangement allows the top surface of the focus ring 208, when received on the carrier plate 200, to be substantially flush with the top surface of the wafer 101. In one embodiment, the focus ring 208 is configured to have an impedance adjusted to contain the plasma during deposition processing. For more information on impedance management, see application Ser. No. 15 / 077,844, filed Mar. 22, 2016, entitled “Asymmetric Pedestal / Carrier Ring Arrangement for Edge Impedance Modulation,” which is incorporated herein by reference in its entirety.

[0068] In one embodiment, the base 140 is designed to function as an electrostatic chuck (ESC). In such an embodiment, an ESC control device 351 can be coupled to the base 140 to provide the necessary voltages to the plurality of electrodes defined in the body of the base 140 to enable ESC clamping. In one embodiment, the ESC control device 351 is configured to provide voltages to induce bipolar clamping. Figure 5E The details of the ESC control device 351 will be described in more detail. The ESC control device 351 may include a power supply for providing an appropriate voltage for clamping or releasing, and may be connected to the controller 110. The controller 110 is configured to generate a first signal to the ESC control device 351 to apply a clamping voltage to the base 140 when the carrier plate 200 is received on the base 140, and to generate a second signal to apply a reverse voltage to the base 140 when the carrier plate 200 needs to be released from the base 140.

[0069] The controller 110 is configured to receive a process recipe by executing the process input and control device 108, and provide appropriate signals to various components of the processing chamber 102 according to the process recipe. A lifting mechanism such as a spider fork 226 can be provided on one or more sides of the base 140. The lifting mechanism is configured to lift or lower the carrier plate 200 from the base 140 to the base 140 when engaged. The spider fork 226 is connected to the controller 110 so that the controller 110 can provide appropriate signals to activate the spider fork 226. In some embodiments, the spider fork 226 can be further configured to move the carrier plate 200 from one processing station to another within a processing chamber (e.g., a four-surface mount processing chamber). The spider fork 226 is a form of lifting mechanism for lifting the carrier plate 200 from the base 140, and other mechanisms can also be used.

[0070] One or more recesses are provided on the top surface of the base 140. The recesses are configured to allow the lift pins to extend outward from their respective housings when activated. A plurality of lift pins are distributed throughout the body of the base 140. The lift pins are part of a lift pin mechanism that can be used to elevate the carrier plate 200 resting on the carrier supports 306 so that the spider fork 226 can lift and move the carrier plate 200. The lift pins are activated using a lift pin control device (not shown) coupled to the controller 110. A signal is provided by the controller 110 to activate or deactivate the lift pin control device.

[0071] In some embodiments, the bottom surface of the carrier plate 200 has a geometric profile that enables the carrier plate to be placed on the base 140. For example, the bottom surface of the carrier plate may include a central portion, a vertical portion, and a horizontal portion. The central portion is defined at the center of the carrier plate and extends at least the surface diameter of the recess. The vertical portion is defined from the outer edge of the central portion down to the inner edge of the horizontal portion. In this embodiment, the height of the vertical portion is defined as a second height "d2." When received on the base 140, the second height d2 is equal to the height of the step 140c. In one embodiment, an additional step may be defined in the base 140. For example, the additional step may separate the second annular surface 140d from the annular surface 140b, such that the vertical position of the annular surface 140b is higher than the vertical position of the second annular surface 140d. Step 140c and the additional step (if any) define a recess in which a fork-shaped mechanism (e.g., spider fork 226) is disposed. The spider fork 226, when engaged by the carrier plate 200, is used to lift the carrier plate 200.

[0072] Figure 5B A view of a peripheral portion of a base 140' is shown in one embodiment, with a carrier plate 200a received on the base 140'. The geometric profile of the base 140' differs from that of the reference Figure 5A The geometric profile of the base 140 discussed above. In this embodiment, the step 140c separating the top surface from the annular surface 140b of the base defines a recessed area in which the spider fork 226 is disposed. The geometric profile of the carrier plate 200a also differs from that of the reference Figure 5A As shown, the retaining feature 204 includes a top surface 204a of a step 206 adjacent to the recess 202, and an extension 204c of the retaining feature is defined adjacent the retaining feature 204 on a side away from the recess 202. The step 206 has a rectangular profile.

[0073] The geometric profile of the carrier plate 200a is substantially rectangular with a convex top surface 204a. The focus ring 208' is received on the extension 204c of the retaining feature 204 within a recess formed by a step 207 separating the top surface 204a from the extension 204c. In this embodiment, the geometric profile of the focus ring 208' matches the geometric profile of the carrier plate 200a and is substantially rectangular in shape. This is consistent with the embodiment of ... Figure 5A The tapered portion 204b shown in FIG. 3 is in contrast to the geometrical profile of the focus ring 208. The wafer support 304 and the carrier support 306 are formed in a manner similar to that of FIG. Figure 5A In addition, the bottom surface of the carrier plate 200a is substantially flat and extends to the outer diameter of the base 140. The profile of the bottom surface of the carrier plate 200a is straight and different from Figure 5A The outline shown in .

[0074] Figure 5C-1 and Figure 5C-2 An alternative embodiment is shown in which the top surface 204a' of the retaining feature 204 is shaped similar to Figure 5A The shape of the top surface 204 shown in FIG is different. In this embodiment, the top surface 204a' is pointed. The tapered portion 204b of the carrier plate 200b extends from the top surface 204a' over the annular surface 140b of the base 140. In this embodiment, the tapered portion 204b of the retaining feature 204 extends outward from the sharp edge of the top surface 204a' to the outer diameter of the base 140. In this embodiment, the step 206' has an inclined profile. Figure 5A As shown, the carrier plate with the tapered portion 204b has a wedge shape. The tapered portion 204b is configured to receive the focus ring 208, which is also wedge-shaped. A ring support 307 may be provided on the tapered portion 204b of the carrier plate 200 to provide a reliable support for the focus ring 208 when receiving the focus ring 208. The bottom surface profile of the base 140 is configured to include a central portion 140a, a vertical portion 140c, and a horizontal portion 140b, which is designed in a manner similar to Figure 5A The carrier plate 200, but different from Figure 5B bottom surface profile.

[0075] Figure 5C-2 An alternative embodiment is shown in which the carrier plate 200b' has a different bottom surface profile and the base 140" has a Figure 5C-1 The top surface profile shown in FIG is different from the top surface profile. Figure 5C-2 In the illustrated embodiment, the top surface 140a of the base 140" is substantially flat and extends to the outer diameter. There is no annular ring surface on the base 140". The bottom surface profile of the carrier plate 200b' is also flat and is configured to rest on the carrier support 306 disposed on the top surface 140a of the base 140".

[0076] Figure 5D-1 Another embodiment is shown in which the carrier plate 200c has a different geometric profile. In this embodiment, the top surface of the carrier plate 200c adjacent to the step 206" is sufficiently flat and flush with the top surface of the wafer 101 when the wafer is received on the substrate support area 201 of the carrier plate 200c. In addition, the top surface of the carrier plate 200c is substantially parallel to the annular surface 140b of the susceptor. In this embodiment, the carrier plate 200 is a single-piece structure, and a separate focus ring 208 is not provided in the carrier plate 200.

[0077] Furthermore, in this embodiment, the carrier plate 200 does not include the retaining feature 204 or the tapered portion 204b. In an alternative embodiment, the carrier plate may include the retaining feature 204, and the focus ring 208 may be integrally coupled with the retaining feature 204 of the carrier plate 200 to form a single unit. When the wafer 101 is received on the carrier plate 200, the top surface of the carrier plate-focus ring unit is flush with the top surface of the wafer 101. In this embodiment, the geometric profile of the focus ring is complementary to the geometric profile of the retaining feature 204. The profile of the step 206" is curvilinear. The bottom surface of the carrier plate 200c is similar to the reference Figure 5A Designed in the manner described by 5C.

[0078] Figure 5D-2 Yet another embodiment is shown, wherein the bottom surface of the carrier plate 200c and the top surface 140a of the base 140" are sufficiently flat and extend to the outer diameter. The profile of the base 140" is similar to Figure 5C-2 In addition, as shown in Figure 5D-1 As shown, when the wafer is received on the substrate support area 201 of the carrier plate 200c, the top surface of the carrier plate 200c is sufficiently flat and flush with the top surface of the wafer 101. In this embodiment, no separate focus ring is provided on the carrier plate 200c, but in other embodiments, a separate focus ring can be provided and integrated with the retaining features of the carrier plate 200c. In some embodiments, a plurality of carrier supports are provided on the top surface 140a of the base 140" for receiving the carrier plate. In an alternative embodiment, a plurality of kinematic pins can be provided in place of the carrier supports to align the carrier plate 200' with the base 140". For example, three kinematic pins can be evenly provided on the top surface of the base 140" and used to align the carrier plate 200' with the base 140". The kinematic pins, when present on the base 140", provide reliable contact support for the carrier plate 200'. Thus, according to various embodiments, the carrier plate can be aligned with the base and reliably supported on the base using a kinematic centering mechanism that engages the kinematic pins or using other alignment features (e.g., carrier supports, groove-like features, etc.).

[0079] Figure 5E A cross-sectional view of the base 140 is shown with the carrier plate 200 received thereon in one embodiment. Figure 5E-1 An enlarged view of the edge portion "B" of the carrier plate 200 is shown to clearly illustrate the different portions of the carrier plate 200. See also Figure 5E and 5E-1, carrier plate 200 includes a substrate supporting region 201 and a retaining feature 204, the substrate supporting region 201 being defined in a recess 202 formed in a central portion of carrier plate 200. A top surface 204a of retaining feature 204 is disposed adjacent to a step 206 forming a wall of recess 202. A tapered portion 204b is adjacent to the top surface 204a of retaining feature 204. The tapered portion 204b extends to the outer diameter of base 140.

[0080] In this embodiment, the bottom surface of the carrier plate 200 has a profile similar to that of the reference Figure 5A 5C and 5D . For example, a vertical portion of the bottom surface extends downward from the outer edge of the center portion to the height of step 140c, and a horizontal portion extends from the bottom of the vertical portion to the outer diameter of base 140. This extension can be used to align carrier plate 200 when received on base 140. As shown, carrier plate 200 includes a top surface 204a of retaining feature 204 adjacent step 206, and a tapered portion 204b extending from retaining feature 204 to the outer diameter of base 140.

[0081] In some embodiments, the retaining feature 204 may include a recess formed by a step 207 defined on a side opposite to the side where the pocket is formed, to properly position the focus ring 208 when the focus ring 208 is received on the tapered portion 204b. The step 207 extends downward from the top surface 204a to a third height. In one embodiment, the top side of the tapered portion 204b includes ring supports 307 (307a, 307b, 307c, 307d, 307e, 307f, etc.) to provide a precise fit with the bottom surface of the focus ring 208. These ring supports 307 are in addition to the wafer support 304 provided on the top surface of the substrate support region 201 to support the wafer 101 when receiving the wafer 101, and the carrier support 306 provided on the top surface 140a of the susceptor 140 to support the carrier plate 200.

[0082] An ESC control device 351 may be provided at the base 140 to enable the base 140 to function as an electrostatic chuck. The ESC control device 351 is coupled to a plurality of electrodes 352a, 352b, 352c, and 352d embedded in the body of the base 140, closer to the top surface 140a of the base 140. The ESC control device 351 includes a power supply that provides voltage to the electrodes 352a-352d. The electrodes 352a-352d may be evenly distributed below the top surface 140a of the base 140, or may be distributed along the periphery below the top surface 140a of the base 140, or may be distributed below both the top surface 140a of the base 140 and the annular surface 140b of the base 140.

[0083] In some embodiments, the ESC control device 351 is configured to provide bipolar clamping and release. In such embodiments, the voltage applied to the electrodes 352a-352d causes different types of charge (Q) (positive or negative) to accumulate at the carrier plate 200 and the base 140. The applied voltage may depend on the type and thickness of the material used in the base 140 and the type and thickness of the material used in the carrier plate 200.

[0084] When the carrier plate 200 is received on top of the pedestal 140, the controller 110 generates a clamping signal that is sent to the ESC control device 351 to apply sufficient voltage to apply a clamping force between the carrier plate 200 and the pedestal 140. In some embodiments, the applied voltage can be between about 500 volts and about 4000 volts. For example, when a voltage is applied at the electrodes 352a-352d, the charge migrates vertically so that the positive charge migrates to the carrier plate 200 and the negative charge remains at the pedestal 140, or the negative charge migrates to the carrier plate 200 and the positive charge remains at the pedestal 140. This vertical movement of charge results in a time-dependent attractive force at the pedestal-carrier plate interface that extends through to the carrier plate-wafer interface. The attractive force is caused by the opposite type of charge (Q) at each of the carrier plate 200 and the pedestal 140. + , Q - ) and is stronger at the base-carrier plate interface than at the carrier plate-wafer interface.

[0085] When removing the loading plate 200 from the pedestal, the controller 110 generates a release signal that causes the ESC control device 351 to apply a reverse voltage at the electrodes 352a-352d. In one embodiment, the time and release voltage can be controlled so that the loading plate 200 is released from the pedestal 140. As with the clamping force, the reverse voltage causes the application of a time-dependent release force, which causes a faster discharge at the loading plate-pedestal interface than at the loading plate-wafer interface. The rates of these different release forces allow the loading plate 200 to be lifted from the pedestal 140, while some residual charge remaining at the loading plate-wafer interface will keep the wafer 101 clamped to the substrate support area 201 of the loading plate 200.

[0086] For example, controlling the amount of reverse voltage applied allows the carrier plate-base interface to exhibit Coulombic chuck characteristics by loosening at a faster rate, while the carrier plate-wafer interface exhibits Johnson-Rahbek chuck characteristics by loosening at a slower rate. This differential loosening enables the carrier plate 200 to be lifted and moved from one processing station to another while keeping the wafer 101 clamped in place during transfer. In some embodiments, the applied time constant and reverse voltage are monitored to ensure that there is sufficient time to transfer the carrier plate 200 along with the wafer 101 before the next station applies the next clamping charge.

[0087] In some embodiments, the signal provided by the controller 110 indicates the amount of voltage and reverse voltage applied by the ESC control device 351 at the electrodes 352a-352d. The signal takes into account time factors, the thickness of the substrate support area, the thickness of the wafer, the amount of voltage to be applied, and other clamping / unclamping parameters so that sufficient attraction is applied during the clamping operation and discharge occurs in a controlled manner during the unclamping operation. Since the clamping force or unclamping force is greater near the location where the voltage or reverse voltage is applied (i.e., the base-carrier plate interface) and decreases as the charge moves further away, close monitoring of the applied voltage and time constant will ensure that the wafer 101 remains clamped to the carrier plate 200 as the carrier plate 200 moves into and out of the processing chamber and from one processing station to another. It should be noted that the above-mentioned method of providing differential unclamping is an example of ensuring that the wafer does not move during the transfer of the carrier plate from one processing station to another, and other differential unclamping methods can also be used.

[0088] In some embodiments, the carrier plate 200 can be preloaded with the wafer 101 outside the process chamber 102 and then moved into the process chamber 102. The wafer can be clamped to the carrier plate 200 during the preloading process. In such an embodiment, the carrier plate 200 loaded with the wafer 101 is moved using a reference Figure 5E 、 Figure 5E-1 or other similar devices to move into and out of the process chamber using the differential clamping / unclamping process explained herein.

[0089] In some embodiments, to effectively perform differential clamping and unclamping, portions of the carrier plate 200 may be made of a dielectric material. In alternative embodiments, the carrier plate may be made of alternating ceramic layers with metal layers therebetween.

[0090] Figure 5F-1 and Figure 5F-2A cross-sectional view of a base 140 having a lift pin mechanism for raising and lowering a carrier plate 200 is shown in one embodiment. The base 140 includes a lift pin mechanism that engages a plurality of lift pins 120, each of which is disposed in a recess defined on a top surface 140a of the base 140. In some embodiments, additional lift pins 120 may be provided in corresponding recesses defined on an annular surface 140b of the base 140. The lift pins 120 are connected to a lift pin control 122 that is coupled to the controller 110. When the lift pins are to be engaged or disengaged, the controller 110 sends an appropriate signal to the lift pin control 122. When the lift pins are disengaged, the lift pins retract into corresponding housings, as shown. Figure 5F-1 shown.

[0091] When the lift pins are engaged, the lift pins extend from the corresponding housings through the corresponding recesses to lift the carrier plate 200 . Figure 5F-2 One such embodiment is shown in which the lift pins are engaged and the carrier plate 200 with the wafer 101 received thereon is lifted off the top surface of the susceptor 140. The signal to disengage the lift pins is coordinated with the signal to clamp the carrier plate 200 to the susceptor 140. Similarly, the signal to engage the lift pins 120 is coordinated with the signal to release the carrier plate 200 so that the carrier plate 200 with the wafer 101 received thereon can be moved from the susceptor 140. Figure 5F-1 In the illustrated embodiment, three lift pins 120 are evenly distributed within the body of the base 140. In alternative embodiments, a plurality of lift pins 120 may be evenly distributed along a peripheral region of the body of the base 140 or evenly distributed within the body of the base 140.

[0092] In some embodiments, in addition to signals for clamping or releasing the carrier plate, a signal can also be generated to lift the wafer 101 from the carrier plate 200. This may be the case, for example, when processing of the wafer is complete and the processed wafer is to be removed from the processing chamber 102. When the wafer 101 is to be lifted from the carrier plate 200, a signal is sent from the controller 110 to the lift pin control device 122 to engage the lift pins to extend through corresponding recesses formed on the top surface of the pedestal 140 and through corresponding recesses defined on the top surface of the substrate support area 201 of the carrier plate 200. In such an embodiment, the carrier plate 200 is aligned with the pedestal 140 so that the corresponding recesses through which the lift pins can extend are properly aligned. Thus, the signal from the controller 110 enables the lift pins to be selectively extended so that the appropriate component (e.g., the carrier plate or the wafer) can be lifted.

[0093] Various embodiments describe an apparatus that includes a carrier plate extending completely beneath the wafer 101. This apparatus eliminates gaps beneath the edge of the wafer 101, thereby addressing the shortcomings of conventional carrier ring arrangements. In various embodiments, the wafer 101 is seated on a single piece and the feature surrounding the wafer 101 is a single piece. When the wafer 101 is in constant contact with the carrier plate 200 (e.g., an MCA formed on the carrier plate), movement of the carrier plate-wafer system does not cause contact to be made and broken to achieve movement of the wafer.

[0094] In addition, in some embodiments, wafer 101 can be positioned in the cavity 202 formed in carrier plate 200, and wherein the side and bottom of cavity 202 are continuous when they are manufactured as single parts.Precise wafer carrier plate spacing features (such as MCA) can be very small when they can be directly manufactured into carrier plate 200.Usually, such high-precision spacing features can be manufactured by, for example, grinding in ceramic (that is, the material for manufacturing carrier plate).In some embodiments, because the pedestal 140 made of ceramic is expensive, low-cost alternative can be adopted by using hybrid solution, wherein carrier plate 200 is made of ceramic, and pedestal 140 is made of metal (such as aluminum).Hybrid solution is not limited to the above-mentioned materials, and other materials can be used for carrier plate 200 and pedestal 140, while still maintaining its low cost and maintaining the function that design carrier plate 200 and pedestal 140 are directed to.

[0095] Additionally, in some embodiments, the carrier plate 200 can include an electrostatic chuck (ESC) mechanism. The ESC mechanism can be charged when the wafer 101 is first placed thereon, and if the applied temperature is not too high, the wafer 101 can remain attached to the carrier plate 200 during transport without applying any power. In some embodiments, the applied temperature can be controlled by the controller 110 using a process recipe provided by the process input and control device 108. Attaching the wafer 101 during transport has the advantage that wafer slippage does not occur during transport. The ESC clamping voltage can be capacitively coupled, eliminating the need for direct direct current (DC) electrical contact. Figure 5F-1 The capacitive coupling that occurs at the carrier plate-base interface when the carrier plate is clamped to the base is shown, which transcends to the carrier plate-wafer interface. Figure 5F-2 It is shown that even when the carrier plate is loosened from the base, residual capacitive coupling remaining at the carrier plate-wafer interface still clamps the wafer to the carrier plate.

[0096] In some embodiments, the carrier plate includes a separate focus ring component. In other embodiments, the focus ring may or may not be a separate component, and the relative geometries of the retaining features of the focus ring and the carrier plate may vary and complement each other.

[0097] Various embodiments overcome the limitations of conventional carrier ring assemblies by maintaining the simplicity and throughput benefits of carrier ring transport while overcoming the various disadvantages associated with conventional carrier ring assemblies. Some of the benefits of the various embodiments described herein are as follows. One benefit includes eliminating temperature discontinuities at the wafer edge. This occurs because the wafer surface transitions to the top surface of the carrier plate's retaining features without significant breakage. Gaps around the wafer edge, which can lead to unwanted parasitic plasma ignition, are eliminated. Because the carrier plate provides high-precision pocket features that extend beneath the wafer and wrap around critical areas near the wafer edge, particle contamination at the wafer edge and underside is reduced. The carrier plate remains in contact with the wafer as it moves as a unit from station to station within the processing chamber and from chamber to chamber. A separate transport mechanism is not required to lift the wafer out of the pocket. The carrier plate provides a surface on which the wafer can be placed with high precision by a robot, without the accumulated eccentricity associated with conventional spindle-carrier ring transfer. This is particularly true when an ESC clamping mechanism is employed between the wafer and the carrier plate. The carrier plate provides a low-cost solution by providing a high-precision ceramic surface under the wafer and a low-cost metal (eg, aluminum) base that receives the carrier plate with the wafer.

[0098] Figure 6 Shown is a control module 600 for controlling the above-mentioned system. In one embodiment, the control module 110 shown in each of the accompanying drawings may include some exemplary components. For example, the control module 600 may include a processor, a memory and one or more interfaces. The control module 600 may be used to control the equipment in the system based on the sensed value in part. For example only, the control module 600 may be based on the sensed value and other control parameter control valves 602, filter heater 604, pump 606 and other equipment 608, one or more. For example only, the control module 600 receives the sensed value from a pressure gauge 610, a flow meter 612, a temperature sensor 614 and / or other sensors 616. The control module 600 may also be used to control process conditions during the precursor transport and deposition of the film. The control module 600 typically will include one or more memory devices and one or more processors.

[0099] The control module 600 can control the activities of the precursor delivery system and the deposition apparatus. The control module 600 executes a computer program that includes grouped instructions for controlling process timing, delivery system temperature, pressure differential across filters, valve positions, gas mixing, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or susceptor position, and other parameters of a particular process. The control module 600 can also monitor the pressure differential and automatically switch the gaseous precursor delivery from one or more paths to one or more other paths. In some embodiments, other computer programs stored in a memory device associated with the control module 600 can be used.

[0100] Typically, there will be a user interface associated with the control module 600. The user interface may include a display 618 (e.g., a display screen and / or graphical software display of apparatus and / or process conditions), and a user input device 620, such as a pointing device, keyboard, touch screen, microphone, etc.

[0101] The computer program for controlling the delivery, deposition and other processing of the precursors in the process sequence can be written in, for example, any conventional computer-readable programming language: assembly language, C, C++, Pascal, Fortran or others. The compiled object code or script is executed by the processor to perform the tasks identified in the program.

[0102] Control module parameters relate to process conditions such as, for example, filter pressure differential, process gas composition and flow rate, temperature, pressure, plasma conditions (such as RF power level and low frequency RF frequency), cooling gas pressure, and chamber wall temperature.

[0103] The system software can be designed or configured in many different ways. For example, various chamber component subroutines or control objects can be written to control the operation of the chamber components necessary to perform the deposition process of the present invention. Examples of programs or program segments used for this purpose include substrate positioning code, process gas control code, pressure control code, heater control code, and plasma control code.

[0104] The substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and control the spacing between the substrate and other components of the chamber (e.g., a gas inlet and / or a target). The process gas control program may include code for controlling gas composition and flow rate and, optionally, for flowing gas into the chamber to stabilize the pressure in the chamber prior to deposition. The filter monitoring program may include code for comparing one or more measured differences with one or more predetermined values and / or code for switching paths. The pressure control program may include code for controlling the pressure in the chamber by adjusting, for example, a throttle valve in the exhaust system of the chamber. The heater control program may include code for controlling the current to a heating unit that is used to heat components within the precursor delivery system, the substrate, and / or other parts of the system. Alternatively, the heater control program may control the delivery of a heat transfer gas (e.g., helium) to the wafer chuck.

[0105] Examples of sensors that can be monitored during deposition include, but are not limited to, mass flow control modules, pressure sensors such as pressure gauge 610, thermocouples (e.g., temperature sensor 614) located within the transport system, pedestal, or chuck. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain desired process conditions. The foregoing describes implementation of embodiments of the present invention in single-chamber or multi-chamber semiconductor processing tools.

[0106] The foregoing description of the embodiments has been provided for the purpose of illustration and description. It is not intended to be exhaustive or to limit the present invention. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but are interchangeable where applicable and may be used in a selected embodiment, even if not specifically shown or described. The same may be varied in many ways. Such variations should not be considered a departure from the present invention, and all such modifications are intended to be included within the scope of the present invention.

[0107] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. The present embodiments are, therefore, to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within the scope and equivalents of the claims.

Claims

1. A carrier plate for receiving a wafer, the carrier plate being received on a base of a processing chamber, the carrier plate comprising: a recess defined in a central portion of the top surface of the carrier plate, the recess defining a substrate supporting area and covering at least a surface diameter; a retaining feature disposed adjacent an outer edge of the recess such that a top surface of the retaining feature is adjacent a step of the recess, the retaining feature comprising: a second step disposed on a side opposite to the step; and a tapered portion tapering from a bottom edge of the second step of the retaining feature to an outer diameter of the base to define an angled recess formed on a top surface of the tapered portion configured to receive a focus ring such that a top surface of the focus ring is coplanar with a top surface of the retaining feature and a top surface of the wafer when the wafer is received in the pocket; a bottom surface of the carrier plate configured to be received on the susceptor for use in the processing chamber, wherein a geometric profile of the bottom surface of the carrier plate matches a geometric profile of a top surface of the susceptor; as well as A plurality of wafer supports are provided on a top surface of the substrate supporting area to support the wafer when receiving the wafer.

2. The carrier plate of claim 1 , wherein the top surface of the base comprises a central portion extending the surface diameter, a vertical portion extending downwardly from an outer edge of the central portion to a second height, and a horizontal portion extending from a bottom of the vertical portion to an outer diameter, and The geometric profile of the bottom surface of the carrier plate matches the geometric profile of the top surface of the base. The carrier plate according to claim 2 , wherein the second height is 4 mm.

4. The carrier plate of claim 1 , wherein the geometric profile of the top surface of the base is flat, and wherein the geometric profile of the bottom surface of the carrier plate is flat to match the geometric profile of the top surface of the base.

5. The carrier plate of claim 1, wherein the bottom surface of the carrier plate extends to an outer diameter of the base.

6. The carrier plate of claim 1, wherein the carrier plate is a removable unit and is configured to be moved into and out of the processing chamber with the wafer received thereon.

7. The carrier plate according to claim 1, wherein: The surface diameter of the recess is at least the diameter of the wafer received on the carrier plate.

8. The carrier plate of claim 1, wherein a geometric profile of the focus ring matches a geometric profile of the tapered portion of the carrier plate.

9. The carrier plate of claim 1, wherein the focus ring is integrally coupled with the tapered portion of the carrier plate.

10. The carrier plate of claim 1, wherein the top surface of the tapered portion includes a plurality of ring supports to provide a minimum contact area for supporting the focus ring when receiving the focus ring.

11. The carrier plate according to claim 1, wherein The plurality of wafer supports define a minimum contact area for supporting the wafer when receiving the wafer.

12. The carrier plate of claim 1 , further comprising a plurality of recesses disposed on a top surface of the substrate support area to allow lift pins distributed in a body of the base on which the carrier plate is received to extend therethrough when activated, wherein the lift pins are configured to lift the wafer when activated.

13. A processing chamber for processing a wafer, comprising: a base configured to support the carrier plate, the top surface of the base extending to the outer diameter; The carrying plate is configured to be arranged on the base, and the carrying plate comprises: a recess defined in a central portion of the top surface of the carrier plate, the recess defining a substrate supporting area and covering at least a surface diameter; a retaining feature disposed adjacent an outer edge of the pocket such that a top surface of the retaining feature is adjacent a step of the pocket, the retaining feature including a second step disposed on a side opposite the step, and a tapered portion tapering from a bottom edge of the second step of the retaining feature to an outer diameter of the base to define an angled recess, the angled recess formed on a top surface of the tapered portion configured to receive a focus ring such that a top surface of the focus ring is coplanar with a top surface of the retaining feature and a top surface of the wafer when the wafer is received in the pocket; a bottom surface of the carrier plate configured to be received on the susceptor for use in the processing chamber, wherein a geometric profile of the bottom surface of the carrier plate matches a geometric profile of a top surface of the susceptor; as well as A plurality of wafer supports are provided on a top surface of the substrate supporting area to support the wafer when receiving the wafer.

14. The process chamber of claim 13 , wherein the top surface of the pedestal comprises a central portion extending the surface diameter, a vertical portion extending downwardly from an outer edge of the central portion to a second height, and a horizontal portion extending from a bottom of the vertical portion to an outer diameter, and The geometric profile of the bottom surface of the carrier plate matches the geometric profile of the top surface of the base.

15. The processing chamber of claim 13, wherein the geometric profile of the top surface of the pedestal is flat, and wherein the geometric profile of the bottom surface of the carrier plate is flat so as to match the geometric profile of the top surface of the pedestal.

16. The processing chamber of claim 13, further comprising a lifting mechanism integrated within the pedestal and coupled to a controller, the lifting mechanism configured to lift the carrier plate based on a signal from the controller, wherein the signal is a release signal.

17. The processing chamber of claim 16, wherein: The lifting mechanism includes a plurality of lift pins distributed throughout the body of the base, each of the plurality of lift pins being configured to extend outwardly through a corresponding recess defined on the top surface of the base when engaged and to retract into a housing when disengaged, the plurality of lift pins being connected to a lift pin control device coupled to the controller and configured to engage and disengage the plurality of lift pins in response to a signal from the controller.

18. The processing chamber of claim 13 , further comprising a plurality of electrodes disposed within the body of the pedestal proximate the top surface of the pedestal, the plurality of electrodes coupled to an electrostatic chuck control, the electrostatic chuck control configured to apply a voltage to the plurality of electrodes to cause bipolar clamping or unclamping between the pedestal and the carrier plate, the voltage for clamping or unclamping being applied in response to a signal received from a controller coupled to the electrostatic chuck control.

19. The processing chamber of claim 13, wherein the carrier plate is a removable unit and is configured to be moved into and out of the processing chamber with the wafer received thereon.

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