An embedded modular neural nucleus simulation platform based on ARM

Abstract

The present invention is an embedded modular neural nucleus simulation platform based on ARM. The system can simulate the BG-TH network in real time through the neuron discharge characteristic module, synaptic data transmission module, micro-relay array, modular assembly method and host computer debugging software, support real-time adjustment, expansion and cutting of the network, and can realize the simulation of the BG-TH network in multiple intervention modes through the host computer or external stimulation. The development time of simulation of different nervous system disease states is greatly reduced, and the essence of BG-TH network pathology and degeneration is further revealed at the neuron and synapse levels, and it is consistent with the real biological network on the time scale, which is of great significance for exploring various nervous system diseases and their related treatment plans.

Description

Technical Field

[0001] The invention relates to biomedical engineering technology, in particular to an embedded modular neural nucleus simulation platform based on ARM. Background Art

[0002] If we can understand the relevant symptoms through monitoring and analysis of the dynamic process of the nervous system, we can better achieve "the right medicine for the right disease". Compared with other systems, the ARM-based solution has extremely high performance per chip area, which can well realize the modular nervous system simulation process.

[0003] The basal ganglia (BG) is located near the thalamus. Its function is closely related to body movement and is involved in the formation of fine movements. It is mainly composed of three parts: the sub-thalamic nucleus (STN), the internal segment of the globus pallidus (GPi) and the external segment of the globus pallidus (GPe). Together with the thalamus (TH), it forms the basal ganglia-thalamus (BG-TH) network. Neurodegenerative diseases such as AD and PD are caused by the disorder of the BG-TH network in the brain. Therefore, it is of great research value to design an ARM-based solution to monitor and analyze the dynamic response process of the BG-TH network.

[0004] So far, the research on BG-TH network is mainly carried out through PC software simulation. This method has great limitations. On the one hand, the BG-TH network contains four nuclei, STN, GPi, GPe, and TH. When facing patients with different diseases, the number of neurons in different nuclei and their different performances need to be reconfigured, which will waste a lot of time; on the other hand, software simulation focuses more on the calculation of neuronal membrane potential in the network, and cannot well show the role of synapses in the symptoms of neurological diseases; furthermore, there is a non-real-time problem in the software simulation process.

[0005] Embedded CPUs based on ARM architecture have the advantages of high integration and high computing performance and power consumption ratio. This technology has a natural advantage in realizing neural network simulation and is increasingly used in brain-inspired neural computing. Compared with other hardware and software devices, it is smaller in size, has stronger computing power, less development time and cost, lower power consumption, and its modular characteristics support the simulation of network models of various scales. It is widely used in large-scale network implementation, brain-like computing, smart medical care, etc. Therefore, ARM-based solutions are an important method for exploring neural networks.

[0006] Through ARM-based embedded devices, modular large-scale neural network simulation can be realized. At the same time, the hardware needs to support the adjustment, expansion, and trimming of network modules, and be able to observe the dynamic processes of neurons and synapses in the network in real time. Summary of the invention

[0007] In view of the above problems and current deficiencies, the purpose of the present invention is to provide an embedded modular neural nucleus simulation platform based on ARM to realize the BG-TH network, and be able to make adjustments to the network characteristics of different symptoms, transmit the network discharge data on the ARM platform to the host computer through the USB to TTL interface, monitor the BG-TH network discharge in real time, study the impact of network changes on nervous system diseases, and adjust the external input stimulation accordingly to achieve the purpose of alleviating neurological diseases.

[0008] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is to design an embedded modular neural nucleus simulation platform based on ARM, which is characterized by adopting a decentralized multi-core architecture, which can flexibly expand and tailor the BG-TH network, and the highly integrated CPU supports neural nonlinear high-speed computing under low power consumption; at the same time, LabVIEW is used to design a matching host computer display interface to obtain the dynamic change characteristics of the network in real time, and realize information interaction with the host computer through USB communication.

[0009] The present invention realizes the real-time simulation of complex large-scale BG-TH networks through an embedded modular neural network simulation platform, and reproduces the neuronal discharge characteristics and synaptic characteristics therein, which has very important guiding significance for the study of neurological diseases such as Parkinson's disease and Alzheimer's disease. From the hardware level, the system achieves extremely high computing efficiency and extremely low power consumption through decentralized design and brain-like layered architecture, reducing the pressure of data transmission in large-scale network simulation; From the software level, the host computer interface can not only display the discharge information of each nucleus and synapse in the large-scale BG-TH network in real time, but also realizes data interaction between the host computer and the simulation system. The present invention innovatively proposes an embedded modular structure, which is of great significance for exploring the influence mechanism of BG-TH network on nervous system diseases. The working characteristics of the system are as follows:

[0010] 1) Neurons are important components of neural networks. Neurons rely on a large number of synapses to connect with each other. The information processing inside them is actually a large number of nonlinear calculation processes. The embedded CPU based on ARM is highly integrated, and its internal FPU high-speed floating-point unit can support a large number of fast nonlinear calculation processes inside the neural network, which is of great significance for the realization of real-time simulation.

[0011] 2) Neural networks contain a wealth of neuronal and synaptic properties. The system integrates neuronal and synaptic properties inside the CPU through programming, reproduces its rich dynamic characteristics and realizes real-time observation, and then studies the impact of neuronal or synaptic pathology and degeneration on large-scale BG-TH networks.

[0012] 3) For different diseases, the size of the network analysis will also change. The system adopts a modular design and integrates multiple network features in each module. When using it, there is no need to rebuild the network. You only need to flexibly connect the configured modules through the external interfaces that have been brought out to expand or cut the network size, which will greatly reduce development time and cost consumption.

[0013] 4) The system master node controls the power-on status of each core group through a micro-relay array. There are multiple power supply modes to choose from, such as working mode and sleep mode, which greatly reduces the overall power consumption of the system.

[0014] 5) The host computer interface designed by LabVIEW can interact with the system through USB. On the one hand, it can display the neuron and synaptic characteristics of the BG-TH network in the simulation system in real time. On the other hand, it can flexibly and in real time adjust the neuron and synaptic parameters in the network, avoiding the problem of manual adjustment of network parameters during software simulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is an overall block diagram of the embedded modular neural network simulation platform of the present invention.

[0016] Figure 2 It is the neuron discharge characteristic module of the present invention.

[0017] Figure 3 It is the synaptic data transmission module of the present invention.

[0018] Figure 4 This is a diagram of a micro relay array of the present invention.

[0019] Figure 5 It is a modular assembly diagram of the present invention.

[0020] Figure 6 It is a schematic diagram of the debugging interface of the host computer of the present invention. DETAILED DESCRIPTION

[0021] The present invention is further described in detail below with reference to the accompanying drawings.

[0022] The present invention is an embedded modular neural nucleus simulation platform for BG-TH network simulation. Figure 1 The system consists of four parts: neuron discharge characteristic module, synaptic data transmission module, micro relay array and host computer debugging software. Among them, the neuron module is built using the ARM-based STM32F407ZGT6 chip, the synaptic module is implemented by designing the circuit around the chip, and the micro relay array is used to implement the power supply strategy for the embedded processor. The entire system adopts a decentralized multi-core design concept to achieve real-time simulation of large-scale neural networks.

[0023] Neuron discharge characteristic module for BG-TH network: refer to the attached Figure 2The module includes several neuron cell body computing units, one axon unit, several dendrite units and one driving circuit control unit. Among them, the neuron cell body calculation unit is the main place for neuron nonlinear calculation. Three neuron models have been integrated inside, including the Hodgkin-Huxley (HH) model, the Izhikevich model and the Leaky Integrate and Fired (LIF) model, and their parameters have been preset. The host computer can select the appropriate neuron model according to different BG-TH states; the axon unit is responsible for short-term caching of the pulse sequence after the local neuron cell body calculation unit calculates, and then issues local impulse signals and transmits them to the dendrite unit of the back-end neuron. This is the same as the axon characteristics of real neurons. Each neuron module only needs one axon unit to complete the data transmission; the dendrite unit mainly receives impulse signals from other neurons and transmits the stimulus to the cell body unit for nonlinear data processing. Its most important feature is that it can receive data from multiple other neurons and superimpose them. Therefore, a large number of dendrite units are required in a neuron module; the drive circuit control unit is controlled by the main node at the top level of the system. During the network simulation process, the neuron discharge characteristic module is regularly set to work or sleep mode, thereby reducing the power consumption of the overall system. In this module, the nonlinear calculation process of multiple neuronal cell units is carried out simultaneously as a whole, which will greatly improve the real-time performance of the system; and the data transmission and reception in this module are completed through the multiplexing of the IO interface, which greatly reduces the hardware complexity.

[0024] Synaptic data transmission module in large-scale BG-TH network: see Appendix Figure 3, when completing the large-scale BG-TH network simulation, the data generated by the nonlinear calculation of the neuron module needs to be transmitted through the synapse. If information exchange occurs and the neuron module is in the same calculation module, the present invention calls it information interaction between local neurons, and it is controlled by the bottom routing logic; if information exchange occurs and the neuron module is in two calculation modules, the present invention calls it information interaction between remote neurons, and it is controlled by the top routing logic. Therefore, the module is mainly composed of two parts: the bottom routing and the top routing. Among them, the bottom routing has a large number of receiving ports to receive the discharge information generated after the nonlinear calculation of the local neurons, and this part is realized by the IO interface. After receiving the discharge signal, the bottom routing will be interrupted and the data will be passed to the information sorting unit. At this time, according to the loaded data packaging rules, the discharge signal of the neuron is added to the target address and packaged into a neat data packet, and the position of the target address is judged in the next step. Finally, the bottom routing logic unit completes the distribution of the data packet. If the destination address of the data packet is local, the bottom-level routing logic unit will determine it as local data and send it to the corresponding neuron module; if the destination address of the data packet is remote, the bottom-level routing logic unit will send the data packet to the top-level routing, and the bottom-level routing will also accept the data packets from the top-level routing and distribute them.

[0025] The top-level routing also implements the neuron discharge data packets from the bottom-level routing through the multiplexing of the IO interface. After receiving the discharge data packet, the top-level routing will be interrupted and read the address bits in the data packet, and then send the data to the destination through the target bottom-level routing according to the coordinates of the target address. At the same time, the top-level routing will also receive signals from the upper computer and distribute them after judging the address.

[0026] Micro relays for ARM-based embedded modular neural nucleus simulation platform: see attached Figure 4, the overall power supply strategy and program burning mechanism of the system need a unified and standardized solution. The present invention adopts the SWD program download mode and realizes the sequential burning function of the embedded chip through the relay array. Such a solution reduces the complexity of manual burning, reduces the consumption of space and wiring, and also avoids the life consumption of the embedded processor peripherals to a certain extent. When powering, a dedicated micro-relay is externally connected between each embedded processor and the power supply to form a micro-relay array, and the micro-relay array is controlled by the IO port signal of the system main node (i.e., the top-level routing). When the input control voltage of the micro-relay is at a low level, the relay is in a closed state, and the corresponding embedded processor is in a powered state; when the input control voltage of the micro-relay is at a high level, the relay is in a disconnected state, and the corresponding embedded processor will be in a powered-off state. A freewheeling diode is added to the circuit to prevent sudden changes in voltage and current in the circuit, provide a power consumption path for the reverse electromotive force, and avoid unnecessary damage to the embedded processor. At the same time, the SWD interfaces of all processors are connected together, so only one online debugger is needed to sequentially power the embedded processor through the main node, and the program burning work of the embedded device can be completed in a short time.

[0027] The system master node is not only responsible for communication between processors, but also for managing local power supply strategies. It has multiple working modes for local power supply strategies. When the host computer controls the master node to intervene in the underlying multi-cores, only one neuron computing core is selected for power supply at the same time. At this time, the system is in program burning mode; when the host computer initializes the master node, the input control voltage of all micro-relays is low, and the micro-relay arrays are in a closed state. All embedded processors are powered on. At this time, the system is in a normal working mode; in simulation, it is often necessary to intervene in a certain neuron module to put it in a dormant state or receive other external stimuli. At this time, the system is in an intervention working mode.

[0028] Modular assembly diagram of ARM-based embedded modular neural nucleus simulation platform: see attached Figure 5, the BG-TH network is composed of four core groups, STN, GPe, GPi and TH. In the present invention, each embedded processor will serve as a BG-TH computing module, which is composed of a large number of neuron modules and synapse modules. The modular design is convenient for adapting to changes in network scale. There are four types of BG-TH computing modules, namely STN computing module, GPe computing module, GPi computing module and TH computing module. When the network scale increases, it is only necessary to reuse the IO port on one side of the computing module as the expansion mode, and connect the corresponding computing module through the wiring, so that the newly added computing module can be automatically displayed on the host computer. The master node will automatically assign an address to the new computing module, thereby realizing the expansion of the network; when the network needs to be cut, it is only necessary to unplug the redundant modules in the power-off state. Such a design facilitates the realization of the mosaic mode of excitation-inhibition of the BG-TH network, and there is no need to re-layout the entire network during the development process. This decentralized multi-core architecture has better robustness, and the rich external interfaces can be used to configure the external stimulation of the BG-TH network, and the response of the BG-TH network when a certain part of the neuron module receives external stimulation can be studied accordingly.

[0029] Embedded modular neural network simulation platform host computer debugging software based on LabVIEW: refer to the attached Figure 6The main function of the host computer debugging software is to select the neuron model in the calculation module, adjust the parameters of the specific neuron module, and display the membrane potential, grid diagram, discharge frequency, etc. in the BG-TH network in real time. In the host computer interface, VISA Port is used to select the communication port between the host computer and the hardware system; when Terminator is in ON state, the system is in normal working mode, and when Terminator is in OFF state, the system is in program burning mode; Parity Check is the parity check bit; ReadBuffer status bar is used to display the data in the buffer area in the current state; Neural Membrane Potential status bar is used to display the membrane potential of the selected neuron module, the curve button can be used to select different neurons for observation, the Membrane Potential column is used to display the membrane potential value in real time, the unit is mV, Write Buffer can be used to adjust the parameters of the current neuron, after the setting is completed, click Initialize, Neuron Model can select the three preset neuron models in the calculation module; Real-Time Neuron Status in the upper right corner can display the number and position of the currently expanded BG-TH calculation modules in real time, and can display the connection status of up to 100 calculation modules; the two status frames RasterPlot and Spike Frequency below can display the discharge grid and discharge frequency status of the current system neurons in real time.

[0030] This ARM-based embedded modular neural nucleus simulation platform can simulate the BG-TH network in real time through the neuron discharge characteristic module, synaptic data transmission module, micro-relay array, modular assembly method and host computer debugging software, support real-time adjustment, expansion and cutting of the network, and can realize the simulation of the BG-TH network in various intervention modes through the host computer or by applying external stimulation, which is of great significance for exploring various neurological diseases and their related treatment plans.

Claims

1. An embedded modular neural nucleus simulation platform based on ARM, characterized by Explore the BG-TH network and build an embedded modular neural nucleus simulation platform for BG-TH network simulation. The simulation platform includes four parts: neuron discharge characteristic module, synaptic data transmission module, micro relay array and host computer debugging software; The neuron discharge characteristic module is built using the ARM-based STM32F407ZGT6 chip. It uses the internally integrated neuron model to perform neuron nonlinear calculations and caches, and emits local impulse signals and transmits them to the back end. The synaptic data transmission module is implemented by designing circuits around the chip, and is used to transmit data generated by nonlinear calculations of the neuron discharge characteristic module; The micro relay array is used to implement the power supply strategy for the embedded processor and realize the sequential programming function of the embedded chip; The host computer debugging software can exchange information with the system through USB through the host computer interface designed by LabVIEW.

2. The ARM-based embedded modular neural nucleus simulation platform according to claim 1, characterized in that: The neuron discharge characteristic module includes several neuron cell body calculation units, one axon unit, several dendrite units and one driving circuit control unit; the neuron cell body calculation unit performs neuron nonlinear calculation, and three neuron models are integrated inside it; the axon unit briefly caches the pulse sequence calculated by the local neuron cell body calculation unit, and then issues a local impulse signal; the dendrite unit receives data from multiple other neurons and superimposes it; the driving circuit control unit is controlled by the main node at the top level of the system; data transmission and reception in this module are completed through IO multiplexing.

3. The ARM-based embedded modular neural nucleus simulation platform according to claim 1, characterized in that: The synaptic data transmission module is mainly composed of two parts: bottom-level routing and top-level routing. The bottom-level routing and the top-level routing realize data packaging and distribution through the determination of the destination address.

4. The ARM-based embedded modular neural nucleus simulation platform according to claim 1, characterized in that: The micro relay array provides the overall power supply strategy and program burning mechanism solution for the system. It adopts the SWD program download mode to sequentially burn the embedded chip through the relay array. The micro relay array is controlled by the IO port signal of the system master node. A freewheeling diode is set in the circuit to provide a power consumption path for the reverse electromotive force. The master node provides sequential power supply to the embedded processor through the online debugger. The system master node is used for communication between processors and management of local power supply strategies. The system master node's local power supply strategies include: program burning mode, normal working mode and intervention working mode.

5. The ARM-based embedded modular neural nucleus simulation platform according to claim 1, characterized in that: When increasing the network scale, reuse one side IO port of the neuron cell body computing unit as the expansion mode, connect to the corresponding neuron cell body computing unit through the wiring, the upper computer debugging software displays the newly added neuron cell body computing unit, the master node automatically assigns addresses to the newly added neuron cell body computing unit, and expands the network; when the network needs to be trimmed, unplug the redundant modules in the power-off state.

6. The ARM-based embedded modular neural nucleus simulation platform according to claim 1, characterized in that: The host computer debugging software is implemented based on LabVIEW and is used to select the neuron model in the neuron discharge characteristic module, adjust the parameters of the specific neuron module, display the membrane potential, grid diagram, and discharge frequency in the BG-TH network in real time, and realize real-time data interaction between the host computer and the hardware system.

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