A method for realizing a packaging structure of an ultra-thin wafer

Abstract

The present invention discloses a method for realizing a packaging structure of an ultra-thin wafer, and belongs to the field of semiconductor packaging technology. The method protects the bumps on the front of the chip by coating a temporary bonding adhesive on the front of the wafer, carries the wafer by temporarily bonding the carrier, and then separates the carrier by chemical debonding. This packaging method can overcome the fragmentation problem and warping problem caused by directly grinding the wafer into an ultra-thin sheet, as well as a series of problems that the back gold layer cannot be operated due to excessive warping, so that the production line process can meet the needs of operating ultra-thin sheets and obtain lower packaging resistance.

Description

Technical Field

[0001] The invention relates to a method for realizing a packaging structure of an ultra-thin slice-level wafer, and belongs to the technical field of semiconductor packaging. Background Art

[0002] At present, with the continuous development of 5G industry, consumer and power electronics, the performance requirements of electronic products are constantly increasing. For power products such as MOSFET, the front of the chip is provided with a photoresist protection layer and metal bumps, and the back of the chip is provided with a metal layer, referred to as the back gold layer. It is necessary to continuously reduce the chip packaging thickness and increase the thickness of the back gold layer to achieve the reduction of resistance and the improvement of product performance; and with the trend of continuous reduction in product resistance, the chip thickness of the client is also developing towards thinner and thinner.

[0003] The method for implementing the packaging structure of the ultra-thin wafer is as follows: a protective layer is formed on the front side of the wafer by photolithography, metal bumps are formed by electroplating or chemical plating, and then the back side of the wafer is directly ground and then a back gold layer is provided.

[0004] The existing packaging methods have the following problems: the mechanical strength of the wafer is directly related to the wafer thickness. As the wafer thickness decreases, the wafer after grinding becomes extremely fragile, which can easily lead to risks such as fragmentation in subsequent processes. The thinner the wafer thickness, the greater the warpage after grinding. Large warpage can cause subsequent processes to fail to operate or cause problems such as hidden cracks / fragments during wafer loading and vacuum adsorption. Considering the above problems, the thinnest grinding thickness supported by the current packaging method for 8-inch and 12-inch wafers directly grinding is 6 mil, which cannot meet the demand for ultra-thin wafer packaging in the production process. Summary of the invention

[0005] In order to overcome the deficiencies of the prior art, the present invention provides a method for implementing a packaging structure of an ultra-thin wafer, which solves the problems of fragmentation and warping.

[0006] The technical solution of the present invention:

[0007] The present invention provides a method for realizing a packaging structure of an ultra-thin wafer, and the process steps are as follows:

[0008] Step 1: a protective layer and its protective layer openings are provided on the upper surface of the wafer by a photolithography process, the protective layer openings correspond to the chip electrodes of the wafer, and the chip electrodes of the wafer are buried in the silicon substrate;

[0009] Step 2: Arranging metal bumps at the openings of the protective layer of the wafer by electroplating or chemical plating;

[0010] Step 3: forming a semi-solid temporary bonding adhesive on the upper surface of the wafer, wherein the thickness of the temporary bonding adhesive is greater than the sum of the heights of the protective layer and the metal bump;

[0011] Step 4: prepare a carrier sheet, pre-treat the carrier sheet, and apply a first organic material layer within a 2.5 mm to 3 mm annular width range on the edge of the inner surface of the carrier sheet, and then apply a second organic material layer on the entire inner circle of the carrier sheet;

[0012] Step 5: Through a temporary bonding method, at a certain temperature and pressure, the inner surface of the carrier is bonded with the temporary bonding adhesive and the wafer to form a temporary wafer body;

[0013] Step 6: Thinning the silicon substrate on the back of the temporary wafer body by grinding to achieve the target grinding thickness of the wafer;

[0014] Step 7: Setting a back gold layer on the back side of the temporary wafer body by sputtering, electroplating or evaporation process;

[0015] Step 8: forming a photoresist pattern and a photoresist pattern opening on the back gold layer by coating, exposure, and development processes in sequence, and then removing the excess back gold layer and excess photoresist in the photoresist pattern opening by etching to form a specific metal pattern, wherein the photoresist pattern opening I of the photoresist pattern is in the shape of long strips that are vertically staggered and connected in the horizontal and vertical directions, and pre-dividing the back gold layer into a plurality of chip monomers according to the chip size, and setting a photoresist pattern opening II at a corner of each chip monomer; removing the back gold layer in the photoresist pattern opening I and the photoresist pattern opening II by etching, and after removing the photoresist, forming horizontal and vertical scribing roads and circular identification points on the back gold layer;

[0016] Step 9: Separate the wafer carrier by chemical debonding and remove the temporary bonding glue on the front side of the wafer;

[0017] The debonding method is as follows:

[0018] The temporary wafer body is erected and placed on a device supporting the wafer after bonding, the temporary wafer body is clamped front and back and suspended on the upper edge of the tank body to prevent immersion in the solution, and the edge position of the temporary wafer body is rotated and immersed in the organic solution for about 1 to 2 hours, and a chemical reaction of releasing the viscosity occurs between the organic solution and the first organic material layer;

[0019] Take out the soaked temporary wafer and place it on a hot plate at a temperature of 80-100°C. Then use a tool with a certain suction force to suck the exposed surface of the carrier, and then remove the carrier manually, or use an automated machine to separate the carrier.

[0020] Step 10: Clean the surface of the wafer with the carrier removed to form an ultra-thin wafer with scribe lines and identification points.

[0021] Furthermore, in step 2, the material of the metal bump is one metal selected from the group consisting of Cu, Sn, Ni, Pd, and Au, or a combination of several metals.

[0022] Furthermore, in step 2, a metal tin layer for welding is electroplated or chemically plated on the top of the metal bump.

[0023] Furthermore, in step three, the temporary bonding adhesive is made of a liquid thermoplastic polymer organic material.

[0024] Furthermore, in step 4, the material of the first organic material layer is a liquid thermosetting polymer material.

[0025] Furthermore, in step 4, the second organic material layer is made of a liquid thermosetting polymer material and has a property of not mutually wetting with the first organic material layer.

[0026] Furthermore, in step six, the target thickness of the grinding sheet for the 12-inch wafer is 4 mil, and the target thickness of the grinding sheet for the 8-inch wafer is 3 mil.

[0027] Furthermore, in step seven, the material of the back gold layer is one metal or a combination of several metals selected from the group consisting of Cu, Cr, Ti, Ni and Ag.

[0028] Furthermore, in step eight, the photoresist pattern opening II is circular.

[0029] Beneficial Effects

[0030] The bumps on the front of the chip are protected by coating temporary bonding glue on the front of the wafer, and the wafer is supported by a temporary bonding carrier. This packaging method can overcome the fragmentation and warping problems caused by directly grinding the wafer into ultra-thin slices, as well as a series of problems that make it impossible to operate the back gold layer due to excessive warping, so that the production line process can meet the needs of operating ultra-thin slices and obtain lower packaging resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a flow chart of a method for realizing a packaging structure of an ultra-thin wafer according to the present invention;

[0032] Figures 2 to 16 A flowchart of a process of an embodiment of a method for realizing a packaging structure of an ultra-thin wafer according to the present invention;

[0033] Among them: Wafer 100

[0034] Protective layer 120

[0035] Protective layer opening 123

[0036] Chip electrode 110

[0037] Silicon-based 130

[0038] Metal Bump 140

[0039] Temporary bonding glue 200

[0040] Slide 500

[0041] First organic material layer 610

[0042] Second organic material layer 620

[0043] Back gold layer 700. DETAILED DESCRIPTION

[0044] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It should also be noted that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0045] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0046] The present invention is a flow chart of a method for implementing a packaging structure of an ultra-thin wafer, as shown in FIG. Figure 1 As shown:

[0047] Step S1: a protective layer and an opening of the protective layer are provided on the upper surface of the wafer by a photolithography process;

[0048] Step S2: Arranging metal bumps at the openings of the protection layer of the wafer;

[0049] Step S3: forming a semi-solid temporary bonding adhesive on the upper surface of the wafer;

[0050] Step S4: preparing a carrier, coating the first organic material layer within the annular width range of the edge of the inner surface of the carrier, and coating the second organic material layer on the entire inner circle of the carrier;

[0051] Step S5: bonding the inner surface of the carrier sheet with the temporary bonding adhesive and the wafer together by a temporary bonding method to form a temporary wafer body;

[0052] Step S6: thinning the silicon substrate on the back side of the temporary wafer body to reach the target thickness of the polished wafer;

[0053] Step S7: providing a back gold layer on the back side of the temporary wafer body by sputtering, electroplating or evaporation process;

[0054] Step S8: forming horizontal and vertical scribing tracks and identification points on the back gold layer;

[0055] Step S9: separating the carrier wafer by chemical debonding and removing the temporary bonding adhesive on the front side of the wafer;

[0056] Step S10: Cleaning the surface of the wafer from which the carrier is removed to form an ultra-thin wafer with scribe lines and identification points.

[0057] The examples are as follows:

[0058] The present invention provides a method for realizing a packaging structure of an ultra-thin wafer, such as Figures 2 to 16 As shown, the process steps are as follows:

[0059] Step 1: See Figure 2 A protective layer 120 and a protective layer opening 123 are provided on the upper surface of the wafer 100 by photolithography, and the protective layer opening 123 corresponds to the chip electrode 110 of the wafer 100, and the chip electrode 110 of the wafer 100 is buried in the silicon base 130. The material of the protective layer 120 is, for example, polyimide resin, which is insensitive to the photolithography process, and a negative photoresist is selected to form the required polyimide film image.

[0060] Step 2: See Figure 3 A metal bump 140 is provided at the protective layer opening 123 of the wafer 100 by electroplating or chemical plating. The metal bump 140 is one metal or a combination of several metals such as Cu / Sn or Ni / Au or Ni / Pd / Au. Generally, a metal tin layer of a certain thickness for welding is electroplated or chemically plated on the top thereof.

[0061] Step 3: See Figure 4 A layer of temporary bonding glue 200 is coated on the upper surface of the wafer 100. The temporary bonding glue 200 is made of liquid thermoplastic polymer organic material, such as HT10.10 glue produced by HiTachi of Japan, or other organic materials with the same function.

[0062] After applying the temporary bonding adhesive 200, baking is performed at 180°C for 3 minutes to form the temporary bonding adhesive 200 into a semi-solid state with a thickness greater than the sum of the heights of the protective layer 120 and the metal bump 140, so as to protect the protective layer 120 and the metal bump 140 already set on the front side from being damaged during the grinding and subsequent processes;

[0063] Step 4: See Figure 5 , Figure 6 and Figure 7 , prepare a carrier 500, which is a glass sheet, a silicon sheet or other non-conductive thin sheets with sufficient hardness; pre-treat the carrier 500 to increase the bonding force between the carrier 500 and the temporary bonding glue 200 to avoid delamination between the two in subsequent process steps.

[0064] Pre-treatment of slide 500:

[0065] The slide 500 is pre-processed by cleaning, baking, etc.;

[0066] A first organic material layer 610 is applied within a 2.5 mm to 3 mm annular width range at the edge of the inner surface of the carrier film 500. Figure 6 As shown, the material of the first organic material layer 610 is a liquid thermosetting polymer material, which may also be other organic materials with the same function.

[0067] Then, a second organic material layer 620 is coated on the entire inner surface of the carrier 500, such as Figure 7 As shown, the material of the second organic material layer 620 is a liquid thermosetting polymer material, which can also be an organic material with the same function. Because the first organic material layer 610 has been pre-coated within the annular width range of the edge of the carrier 500, the second organic material layer 620 and the first organic material layer 610 have the property of not wetting each other, such as the first organic material layer 610 uses EM glue from Hitachi, Japan, and the second organic material layer 620 uses 510 glue from Hitachi, Japan, so within this annular width range, the second organic material layer 620 cannot be coated again.

[0068] Step 5: See Figure 8 , by a temporary bonding method, selecting a bonding temperature of 100°C to 200°C, and bonding the inner surface of the carrier 500 with the temporary bonding adhesive 200 and the wafer 100 under a bonding pressure of 3000N to 6000N, to form a temporary wafer body 600, thereby enhancing its strength and reliability;

[0069] Step 6: See Fig. 9 The silicon substrate 130 on the back of the temporary wafer body 600 is thinned by grinding to achieve the target grinding thickness of the silicon substrate 130 of the wafer 100. Specifically, the target grinding thickness of the 12-inch wafer is 4 mil, and the target grinding thickness of the 8-inch wafer is 3 mil. The thinning of the target grinding thickness can obtain a lower package resistance.

[0070] Step 7: See Fig.10A back gold layer 700 is provided on the back side of the temporary wafer body 600 by sputtering, electroplating or evaporation process. The material of the back gold layer can be one metal selected from Cu, Cr, Ti, Ni, Ag, or a combination of several metals, such as a Cr / Cu combination, a Ti / Ni / Ag combination, a Ti / Ni / Ag / Ni combination, or a Cu / Ag combination.

[0071] Step 8: See Fig.11 and Fig.12 , Fig.13 , a photoresist pattern 710 and a photoresist pattern opening are formed on the back gold layer 700 through coating, exposure, and development processes in sequence, and then the excess back gold layer 700 and the excess photoresist in the photoresist pattern opening are removed by etching to form a specific metal pattern 770, which is used for the subsequent fan-out process; Fig.12 for Fig.11 , taking the formation of scribe lines for four chips as an example, the photoresist pattern opening I713 of the photoresist pattern 710 is in the shape of long strips that are vertically staggered and connected in the horizontal and vertical directions, and the back gold layer 700 is pre-divided into a plurality of chip monomers according to the chip size, and a photoresist pattern opening II714 is set at a corner of each chip monomer, and the photoresist pattern opening II714 is circular; the back gold layer 700 in the photoresist pattern opening I713 and the photoresist pattern opening II714 is removed by an etching process, and after removing the photoresist, horizontal and vertical scribe lines 740 and a circular identification point 760 are formed on the back gold layer 700, as shown in FIG. Fig.13 As shown, the size of the scribe line 740 is determined according to the requirements of the client, and the identification point 760 is used for subsequent processes.

[0072] Step 9: See Fig.14 , separating the carrier 500 by chemical debonding, and removing the temporary bonding glue 200 on the front side of the wafer 100;

[0073] The debonding method is as follows:

[0074] The temporary wafer body 600 is erected and placed on a device supporting the bonded wafer. The temporary wafer body 600 is clamped at the front and back and suspended on the upper edge of the tank to prevent soaking solution. Fig.14 As shown, the edge of the temporary wafer 600 is rotated and immersed in the organic solution for about 1 to 2 hours, and a chemical reaction of releasing the viscosity between the organic solution and the first organic material layer 610 occurs;

[0075] The temporary wafer body 600 that has been soaked is taken out and placed on a hot plate with a temperature of 80-100°C. Then, a tool with a certain suction force is used to suck the exposed surface of the carrier 500, and then the carrier 500 is manually removed, or an automated machine is used to separate the carrier 500. Fig.15 shown.

[0076] Step 10: The surface of the wafer 100 with the carrier 500 removed is dissolved with alcohol or IPA solution in the solid temporary bonding glue 200, and then cleaned with deionized water to form an ultra-thin wafer with a scribe line 740 and an identification point 760. In the subsequent process, the wafer 100 can be cut along the scribe line 740 by dicing to form a single ultra-thin chip, see Fig.16 .

[0077] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the embodiments of the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for realizing a packaging structure of an ultra-thin wafer, the process steps are as follows: Step 1: a protective layer (120) and a protective layer opening (123) are provided on the upper surface of the wafer (100) by a photolithography process, the protective layer opening (123) corresponds to the chip electrode (110) of the wafer (100), and the chip electrode (110) of the wafer (100) is buried in the silicon base (130); Step 2: providing a metal bump (140) at the protective layer opening (123) of the wafer (100) by electroplating or chemical plating process; Step three: forming a semi-solid temporary bonding adhesive (200) on the upper surface of the wafer (100), wherein the thickness of the temporary bonding adhesive (200) is greater than the sum of the heights of the protective layer (120) and the metal bump (140); Step 4: preparing a carrier sheet (500), pre-treating the carrier sheet (500), and coating a first organic material layer (610) within a ring width of 2.5 mm to 3 mm at the edge of the inner surface of the carrier sheet (500), and then coating a second organic material layer (620) on the entire inner circle of the carrier sheet (500), wherein the second organic material layer (620) has a property of not wetting with the first organic material layer (610), the material of the first organic material layer (610) is EM glue, and the material of the second organic material layer (620) is 510 glue; Step 5: bonding the inner surface of the carrier (500) with the temporary bonding adhesive (200) and the wafer (100) together by a temporary bonding method at a certain temperature and pressure to form a temporary wafer body (600); Step 6: Thinning the silicon substrate (130) on the back side of the temporary wafer body (600) by grinding to achieve the target grinding thickness of the wafer (100); Step 7: Arranging a back gold layer (700) on the back side of the temporary wafer body (600) by sputtering, electroplating or evaporation process; Step eight: forming a photoresist pattern (710) and a photoresist pattern opening on the back gold layer (700) by coating, exposing, and developing processes in sequence, and then removing the excess back gold layer (700) and the excess photoresist in the photoresist pattern opening by etching to form a specific metal pattern (770), wherein the photoresist pattern opening I (713) of the photoresist pattern (710) is in the form of long strips that are vertically staggered and connected in the horizontal and vertical directions, and pre-dividing the back gold layer (700) into a plurality of chip monomers according to the chip size, and setting a photoresist pattern opening II (714) at a corner of each chip monomer; removing the back gold layer (700) in the photoresist pattern opening I (713) and the photoresist pattern opening II (714) by etching, and after removing the photoresist, horizontal and vertical scribing roads (740) and circular identification points (760) are formed on the back gold layer (700); Step nine: Separating the carrier (500) by chemical debonding and thermal debonding in sequence, and removing the temporary bonding glue (200) on the front side of the wafer (100); The debonding method is as follows: The temporary wafer body (600) is erected and placed on a device supporting the bonded wafer, the temporary wafer body (600) is clamped front and back and suspended on the upper edge of a groove body to prevent soaking in a solution, and the edge of the temporary wafer body (600) is rotated and soaked in an organic solution for about 1 to 2 hours, until a chemical reaction occurs between the organic solution and the first organic material layer (610) to release the viscosity; The temporary wafer body (600) that has been soaked is taken out and placed on a hot plate, the temperature of the hot plate is 80-100° C., and then a tool with a certain suction force is used to suck the exposed surface of the carrier (500), and then the carrier (500) is manually removed, or an automated machine is used to separate the carrier (500); Step ten: cleaning the surface of the wafer (100) from which the carrier (500) has been removed, to form an ultra-thin wafer with scribe lines (740) and identification points (760).

2. The implementation method according to claim 1, characterized in that: In step 2, the material of the metal bump (140) is one metal selected from the group consisting of Cu, Sn, Ni, Pd, and Au, or a combination of several metals.

3. The implementation method according to claim 1 or 2, characterized in that: In step 2, a metal tin layer for welding is electroplated or chemically plated on the top of the metal bump (140).

4. The implementation method according to claim 1, characterized in that: In step three, the temporary bonding adhesive (200) is made of a liquid thermoplastic polymer organic material.

5. The implementation method according to claim 1, characterized in that: In step six, the target thickness of the grinding sheet for the 12-inch wafer is 4 mil, and the target thickness of the grinding sheet for the 8-inch wafer is 3 mil.

6. The implementation method according to claim 1, characterized in that: In step seven, the material of the back gold layer is one metal or a combination of several metals selected from the group consisting of Cu, Cr, Ti, Ni and Ag.

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