Circuit boards and electronic devices

Abstract

The present application discloses a circuit board and an electronic device, the circuit board comprising: a substrate, the substrate having a first surface and a second surface opposite to each other; a signal hole penetrating the substrate; a surface signal line located on the first surface, one end of the surface signal line being connected to one end of the signal hole located on the first surface, and the other end being used to connect to an interface; a thin film element connected to the signal hole, the thin film element being used to at least reduce the reflection of the signal transmitted in the signal hole or to increase the amplitude of the transmitted signal. In the circuit board, a thin film element connected to the signal hole is provided, which is used to reduce the reflection of the signal transmitted in the signal hole and / or to increase the amplitude of the transmitted signal. The thin film element can be directly made on the surface or inside of the circuit board, has a small volume, and has a low manufacturing cost.

Description

Technical Field

[0001] The present application relates to the technical field of electronic equipment, and more specifically, to a circuit board and electronic equipment. Background Art

[0002] With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, bringing great convenience to people's daily life and work, and becoming an indispensable and important tool for people today.

[0003] PCB (printed circuit board) is an important electronic component, a support for electronic components, and the main carrier for installing and connecting electronic components in electronic equipment. In PCB design, vias are required to interconnect transmission lines on different layers. In order to make PCB suitable for the performance requirements of electronic equipment with high-speed signal transmission, higher requirements are placed on the thickness of the PCB and the layout space of the transmission lines. If the unused part (or stub) in the via structure is too long, it will lead to problems such as reflection, scattering, and delay of high-speed signal transmission, and will cause the signal to resonate at a specific frequency, thereby affecting the integrity of the signal. Summary of the invention

[0004] In view of this, the present application provides a circuit board and an electronic device, and the scheme is as follows:

[0005] A circuit board, comprising:

[0006] a substrate having first and second opposing surfaces;

[0007] A signal hole penetrating the substrate;

[0008] a surface signal line located on the first surface, one end of the surface signal line being connected to one end of the signal hole located on the first surface, and the other end being used for connecting to an interface;

[0009] A thin film element connected to the signal hole, the thin film element is used for at least reducing reflection of the transmission signal in the signal hole or increasing the amplitude of the transmission signal.

[0010] Preferably, in the above-mentioned circuit board, the signal hole includes: a first group of differential vias, including a first conductive hole and a second conductive hole; a second group of differential vias, including a third conductive hole and a fourth conductive hole; the first conductive hole is connected to the third conductive hole through a first inner layer trace located in the circuit board; the second conductive hole is connected to the fourth conductive hole through a second inner layer trace located in the circuit board;

[0011] The surface signal line includes: a first surface routing line connected to the end of the first conductive hole located on the first surface and connected to a first interface located on the first surface; a second surface routing line connected to the end of the second conductive hole located on the first surface and connected to the first interface; a third surface routing line connected to the end of the third conductive hole located on the first surface and connected to the second interface located on the first surface; a fourth surface routing line connected to the end of the fourth conductive hole located on the first surface and connected to the second interface;

[0012] Wherein, at least one of the first conductive via to the fourth conductive via is connected to the thin film element.

[0013] Preferably, in the above circuit board, at least one of the following methods is included:

[0014] A first thin film element is connected between the first conductive hole and the second conductive hole;

[0015] Alternatively, at least one of the third conductive via and the fourth conductive via is grounded through a second thin film element.

[0016] Preferably, in the above circuit board, the first thin film element is a first thin film resistor connected between the first conductive hole and the second conductive hole.

[0017] Preferably, in the above circuit board, the substrate comprises a plurality of stacked metal layers, and an insulating layer is provided between adjacent metal layers; in the direction from the first surface to the second surface, the plurality of metal layers are sequentially from the first metal layer to the Nth metal layer, where N is a positive integer greater than 2;

[0018] The i-th metal layer includes the first inner layer routing and the second inner layer routing;

[0019] The first thin film resistor is located on the second surface, or between the second surface and the i-th metal layer, where i is a positive integer greater than 1 and less than N.

[0020] Preferably, in the above circuit board, the circuit board includes a metal ground, and the second thin film element is connected between the connected conductive hole and the metal ground.

[0021] Preferably, in the above circuit board, the third conductive via and the fourth conductive via are grounded via each of the second thin film elements.

[0022] Preferably, in the above circuit board, the substrate comprises a plurality of stacked metal layers, and an insulating layer is provided between adjacent metal layers; in the direction from the first surface to the second surface, the plurality of metal layers are sequentially from the first metal layer to the Nth metal layer, where N is a positive integer greater than 2;

[0023] The i-th metal layer includes the first inner layer routing and the second inner layer routing;

[0024] The second thin film element is located on the second surface, or between the second surface and the i-th metal layer, where i is a positive integer greater than 1 and less than N.

[0025] Preferably, in the above circuit board, the second thin film element comprises a second thin film resistor and a thin film inductor connected in series;

[0026] The second thin film resistor and the thin film inductor are located on the same layer of conductive dielectric material.

[0027] The present application also provides an electronic device, comprising any of the circuit boards described above.

[0028] It can be known from the above description that in the circuit board and electronic device provided by the technical solution of the present application, the circuit board includes: a substrate, the substrate having a first surface and a second surface opposite to each other; a signal hole penetrating the substrate; a surface signal line located on the first surface, one end of the surface signal line is connected to one end of the signal hole located on the first surface, and the other end is used to connect to an interface; a thin film element connected to the signal hole, the thin film element is used to at least reduce the reflection of the signal transmitted in the signal hole or to increase the amplitude of the transmission signal. In the circuit board, a thin film element connected to the signal hole is provided to reduce the reflection of the signal transmitted in the signal hole and / or increase the amplitude of the transmission signal. The thin film element can be directly made on the surface or inside of the circuit board, with a small volume and low manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0030] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application.

[0031] Figure 1 It is a schematic diagram of the structure of a circuit board before back drilling;

[0032] Figure 2 for Figure 1 The schematic diagram of the structure of the circuit board after back drilling is shown;

[0033] Figure 3 A schematic diagram of the structure of a circuit board provided in an embodiment of the present application;

[0034] Figure 4 A schematic diagram of the structure of another circuit board provided in an embodiment of the present application;

[0035] Figure 5 for Figure 4 Equivalent circuit diagram of the circuit in the circuit board shown;

[0036] Figure 6-Figure 8 Eye diagrams of signal transmission in different circuit boards. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the embodiments in the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0038] As described in the background art, stubs in a PCB can cause reflection, scattering, and delay in high-speed signal transmission, and can cause the signal to resonate at a specific frequency, thereby affecting signal integrity.

[0039] In order to solve the impact of the residual stubs in the vias on the communication quality, one method is to eliminate the via doping through the back drilling process. The principle is as follows Figure 1 and Figure 2 shown.

[0040] like Figure 1 and Figure 2 As shown, Figure 1 This is a schematic diagram of the structure of a circuit board before back drilling. Figure 2 for Figure 1 The schematic diagram of the structure of the circuit board after back drilling is shown. In this method, the circuit board includes a substrate 10, and the substrate 10 has a wiring. The wiring includes a wiring segment 11 and a conductive through hole 12. Specifically, the substrate 10 is provided with a wiring segment 11, and the wiring segment 11 is parallel to the substrate 10 ( Figure 1 and Figure 2 In order to facilitate the connection between the wiring segments 11 or between the wiring segments 11 and the circuit board surface, it is necessary to set a conductive through hole 12 that penetrates the substrate 10. The conductive through hole 12 extends in a direction perpendicular to the substrate 10 ( Figure 1 and Figure 2 In order to meet the circuit interconnection requirements, it is necessary to Figure 1 and Figure 2 The wiring path shown by the dotted line will result in a long stub 14 in the conductive via 12 for the routing segment 11 located in the inner layer of the circuit board. In order to solve the influence of the stub 14 on the communication quality, a back-drilling process can be used to form a back-drilling hole 13 at the position of the stub 14, so as to eliminate the stub 14 through the back-drilling hole 13.

[0041] For circuit boards used for high-speed communication, the circuit boards are relatively thick, resulting in high back drilling costs and process requirements. The greater the back drilling depth, the greater the back drilling error. When the back drilling depth is insufficient, the influence of residual piles on communication quality cannot be effectively eliminated.

[0042] In order to solve the impact of the stub in the via on the communication quality, another method is to solder passive components on the surface of the circuit board and use passive component termination at the via to eliminate the impact of the stub in the via on the communication quality. Terminating the passive components on the surface of the circuit board will cause the passive components to occupy the surface space of the circuit board, and the simple termination method will reduce the DC voltage drop of the circuit.

[0043] From the above description, it can be seen that neither the back drilling method to eliminate stubs nor the method of terminating passive devices on the circuit board surface can effectively eliminate the impact of stubs on communication quality. Moreover, in circuit boards used for high-speed signal transmission, stubs have a greater impact on communication quality. It is necessary to use equalization technology on the receiving chip to further improve the impact of stubs on signal integrity, which will make chip debugging more complicated and increase system power consumption.

[0044] In view of this, an embodiment of the present application provides a circuit board and an electronic device, wherein the circuit board includes:

[0045] a substrate having first and second opposing surfaces;

[0046] A signal hole penetrating the substrate;

[0047] a surface signal line located on the first surface, one end of the surface signal line being connected to one end of the signal hole located on the first surface, and the other end being used for connecting to an interface;

[0048] A thin film element connected to the signal hole, the thin film element is used for at least reducing reflection of the transmission signal in the signal hole or increasing the amplitude of the transmission signal.

[0049] In the circuit board provided in the embodiment of the present application, a thin film element connected to the signal hole is provided to reduce the reflection of the transmission signal in the signal hole and / or increase the amplitude of the transmission signal. The thin film element can be directly manufactured on the surface or inside of the circuit board, has a small size, and has a low manufacturing cost.

[0050] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0051] refer to Figure 3 As shown, Figure 3 A schematic diagram of the structure of a circuit board provided in an embodiment of the present application, wherein the circuit board includes:

[0052] A substrate 21, wherein the substrate 21 has a first surface S1 and a second surface S2 opposite to each other;

[0053] A signal hole 22 penetrating the substrate 21;

[0054] A surface signal line 23 located on the first surface S1 , one end of the surface signal line 23 is connected to one end of the signal hole 22 located on the first surface S1 , and the other end is used to connect to the interface 24 ;

[0055] A thin film element 25 connected to the signal hole, wherein the thin film element 25 is used for at least reducing reflection of the transmission signal in the signal hole or increasing the amplitude of the transmission signal.

[0056] In the embodiment of the present application, the circuit board is provided with a thin film element 25 connected to the signal hole 22, and the thin film element 25 is at least used to reduce the reflection of the transmission signal in the signal hole and / or increase the amplitude of the transmission signal. The thin film element 25 can be directly made on the surface or inside of the circuit board, has a small volume, and has a low production cost. Compared with the method of soldering passive components on the surface of the circuit board, the occupation of the circuit board surface space and the production cost are greatly reduced.

[0057] The thin film element 25 can be prepared by using a conductive dielectric material. The conductive dielectric material includes a metal oxide. In the circuit board manufacturing process, a thin film of the conductive dielectric material can be formed by a deposition process, and a desired pattern can be formed by an etching process to prepare the thin film element 25. The manufacturing process is simple, the manufacturing cost is low, and it has high compatibility with the existing circuit board manufacturing process.

[0058] High-speed interfaces in chips generally use AC-coupled differential low-voltage mode transmission, and the signal transmission rate is relatively high. In order to meet the communication requirements of chip high-speed interfaces, differential vias need to be set in the circuit board.

[0059] refer to Figure 4As shown, Figure 4 A schematic diagram of another circuit board structure provided in an embodiment of the present application, based on Figure 3 In the manner shown, the signal via 24 includes: a first group of differential vias, including a first conductive via Via1 and a second conductive via Via2; a second group of differential vias, including a third conductive via Via3 and a fourth conductive via Via4. The first conductive via Via1 is connected to the third conductive via Via3 through a first inner layer trace N1 located in the circuit board. The second conductive via Via2 is connected to the fourth conductive via Via4 through a second inner layer trace N2 located in the circuit board.

[0060] The surface signal line 23 includes: a first surface routing MS1, connected to the end of the first conductive hole Via1 located on the first surface S1, and connected to the first interface 241 located on the first surface S1; a second surface routing MS2, connected to the end of the second conductive hole Via2 located on the first surface S1, and connected to the first interface 241; a third surface routing SL1, connected to the end of the third conductive hole Via3 located on the first surface S1, and connected to the second interface 242 located on the first surface S1; a fourth surface routing SL2, connected to the end of the fourth conductive hole Via4 located on the first surface S1, and connected to the second interface 242.

[0061] The first conductive via Via1 and the second conductive via Via2 are respectively connected to a separate first interface 241. The third conductive via Via3 and the fourth conductive via Via4 are respectively connected to a separate second interface 242. At least one of the first conductive via Via1 to the fourth conductive via Via4 is connected to the thin film element 25.

[0062] In one embodiment, a first thin film element 251 is connected between the first conductive via Via1 and the second conductive via Via2.

[0063] In another embodiment, at least one of the third conductive via Via3 and the fourth conductive via Via4 is grounded through the second thin film element 252. In the embodiment of the present application, preferably, the third conductive via Via3 and the fourth conductive via Via4 are grounded through separate second thin film elements 252, respectively.

[0064] A first thin-film element 251 is connected between the first conductive via Via1 and the second conductive via Via2 , and at least one of the third conductive via Via3 and the fourth conductive via Via4 is grounded through a second thin-film element 252 .

[0065] exist Figure 4In the illustrated embodiment, a first thin film element 251 is connected between the first conductive via Via1 and the second conductive via Via2 , and the third conductive via Via3 and the fourth conductive via Via4 are grounded through one second thin film element 252 respectively.

[0066] In the embodiment of the present application, the first interface 241 is used to connect the transmitter chip TX. The first thin film element 251 is a first thin film resistor BR1 connected between the first conductive hole Via1 and the second conductive hole Via2. The first thin film resistor BR1 can absorb and reduce the reflected signal, and reduce the influence of the residual piles in the first conductive hole Via1 and the second conductive hole Via2 on the communication quality. Compared with the passive components that can be soldered on the surface of the circuit board, the first thin film resistor BR1 is smaller in size, which can reduce the occupation of the circuit board space and has lower cost. Moreover, the first thin film resistor BR1 can not only set the second surface S2, but also be placed inside the circuit board as an embedded resistor, which completely avoids the occupation of the surface layer space of the circuit board.

[0067] The resistance value of the first thin-film resistor BR1 may be calculated based on a transmission function from the connected surface wiring to the connected conductive via. The embodiment of the present application does not specifically limit the resistance value of the first thin-film resistor BR1.

[0068] The circuit board includes a metal ground 32, and the second thin film element 252 is connected between the connected conductive via and the metal ground 32. As described above, in the embodiment of the present application, in order to better eliminate the influence of the residual piles in the third conductive via Via3 and the fourth conductive via Via4 on the communication quality, the third conductive via Via3 and the fourth conductive via Via4 are respectively grounded through one of the second thin film elements 252.

[0069] When the circuit board is provided with the first thin film element 251 and the second thin film element 252 at the same time, the first thin film element 251 and the second thin film element 252 can be arranged on the same layer of conductive dielectric material. In this way, the first thin film element 251 and the second thin film element 252 can be simultaneously prepared through the same conductive dielectric layer, the manufacturing process is simple, the manufacturing cost is low, and the first thin film element 251 and the second thin film element 252 are arranged on the same layer, which can also reduce the thickness of the circuit board.

[0070] Both the first thin-film element 251 and the second thin-film element 252 can be placed inside the circuit board as embedded elements, thereby avoiding occupying the layout space on the surface of the circuit board.

[0071] Optionally, the second thin film element 252 is configured to include a second thin film resistor BR2 and a thin film inductor L connected in series; the thin film inductor L, as a high impedance element, can improve the reflection gain and increase the amplitude of the transmission signal. The resistance value of the thin film inductor L is obtained by calculating the transmission function from the corresponding surface trace MS to the corresponding conductive hole, and the technical solution of this application does not specifically limit the resistance value of the thin film inductor L.

[0072] The second thin film resistor BR2 and the thin film inductor L are located on the same layer of conductive dielectric material. In this way, the second thin film resistor BR2 and the thin film inductor L can be simultaneously prepared through the same conductive dielectric layer, the manufacturing process is simple, the manufacturing cost is low, and the second thin film resistor BR2 and the thin film inductor L are arranged on the same layer, which can also reduce the thickness of the circuit board.

[0073] In the embodiment of the present application, the second interface 242 is used to connect the receiving chip RX. The second thin film element 252 includes a second thin film resistor BR2 and a thin film inductor L connected in series, which can increase the amplitude of the transmission signal. The receiving chip RX does not need to have an equalization function, which reduces the complexity and power consumption of the receiving chip RX.

[0074] refer to Figure 5 As shown, Figure 5 for Figure 4 The equivalent circuit diagram of the circuit in the circuit board shown, combined with Figure 4 and Figure 5 As shown, the second thin film element 252 connected to the third conductive hole Via3 is set to include a thin film inductor L1 and a thin film resistor R1, and the second thin film element 252 connected to the fourth conductive hole Via4 includes a thin film inductor L2 and a thin film resistor R2. Generally, the resistance of the second thin film resistor BR2 in the second thin film element 252 is 50 ohms, that is, the thin film resistor R1 and the thin film resistor R2 are both 50 ohms. The resistance of the second thin film resistor BR2 is set according to communication requirements, and the embodiment of the present application does not specifically limit the resistance of the second thin film resistor BR2.

[0075] In the circuit board described in the embodiment of the present application, the substrate 21 includes a plurality of stacked metal layers M, and an insulating layer is provided between adjacent metal layers M. The insulating layer is not shown in the drawings of the present application. In the direction from the first surface S1 to the second surface S2, the plurality of metal layers M are sequentially from the first metal layer to the Nth metal layer, where N is a positive integer greater than 2.

[0076] The i-th metal layer includes the first inner layer routing N1 and the second inner layer routing N2, that is, the first inner layer routing N1 and the second inner layer routing N2 are patterned from the same metal layer M inside the circuit board.

[0077] The first thin film resistor BR1 may be disposed on the second surface S2, or between the second surface S2 and the i-th metal layer. The second thin film element 252 may be disposed on the second surface S2, or between the second surface S2 and the i-th metal layer.

[0078] In the circuit board, part of the multi-layer metal layer M is a metal ground 32, and part is a signal line layer. The metal ground 32 is a whole metal layer, and has a hollow area as an anti-pad at the position corresponding to the signal hole 22, and the hollow area surrounds the signal hole 22. The signal hole 22 is located in the hollow area and does not contact the metal ground. The signal line layer includes signal lines. In the embodiment of the present application, the surface wiring and the inner wiring are both prepared by the corresponding signal line layer graphics. When there are multiple layers of the signal line layer, there is at least one layer of the metal ground 32 between two adjacent signal line layers.

[0079] The metal ground 32 of each layer has a first hollow area surrounding the first group of differential vias, and the first hollow area simultaneously surrounds the first conductive via Via1 and the second conductive via Via2 in the first group of differential vias. The metal ground 32 of each layer has a second hollow area surrounding the second group of differential vias, and the second hollow area simultaneously surrounds the third conductive via Via3 and the fourth conductive via Via4 in the second group of differential vias.

[0080] In the embodiment of the present application, there are multiple grounding holes Via5 for connecting all the metal grounds 32. The metal grounds 32 of each layer are simultaneously grounded through the grounding holes Via5. One end of the second thin film element 252 is connected to the corresponding conductive hole, and the other end is connected to the adjacent grounding hole Via5. This can improve the amplitude of the transmitted signal while simplifying the circuit connection structure. Figure 4 As shown, the third conductive via Via3 is connected to a thin film inductor L, and the thin film inductor L is connected to an adjacent grounding via Via5 through a second thin film resistor BR2. The fourth conductive via Via4 is connected to a thin film inductor L, and the thin film inductor L is connected to an adjacent grounding via Via5 through a second thin film resistor BR2.

[0081] refer to Figure 6-Figure 8 As shown, Figure 6-Figure 8 Eye diagrams of signal transmission in different circuit boards. Figure 6 The eye diagram corresponding to the circuit board designed without the elimination stub in the circuit board is based on Figure 6 It can be seen that the communication quality is very poor at this time, the eye height and eye width in the eye diagram are very small, and the communication quality is very poor. Figure 7 This is the eye diagram corresponding to the passive device circuit board with separated terminations. Figure 6 and Figure 7 It can be seen that the method of terminating separate passive components on the surface of the circuit board can improve the communication quality to a certain extent and increase the eye height and eye width in the eye diagram. Figure 8 The eye diagram corresponding to the circuit board described in the embodiment of the present application is relative to Figure 7 As shown, the circuit board described in the embodiment of the present application further improves the communication quality and further improves the eye height and eye width in the eye diagram.

[0082] Based on the above embodiment, another embodiment of the present application further provides an electronic device, and the electronic device includes the circuit board described in the above embodiment.

[0083] The electronic devices described in the embodiments of the present application include mobile phones, computers, smart wearable devices and other electronic devices with circuit boards.

[0084] The electronic device adopts the circuit board described in the above embodiment, which can effectively eliminate the influence of the via stub on the communication quality, does not require a back drilling process, has a simple process, and has a low manufacturing cost. In addition, it can use embedded thin film components without occupying the layout space on the circuit board surface.

[0085] In this specification, each embodiment is described in a progressive, parallel, or progressive and parallel manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the electronic device disclosed in the embodiment, since it corresponds to the circuit board embodiment disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the corresponding part of the electronic device.

[0086] It should be noted that in the description of the present application, it should be understood that the description of the drawings and embodiments is illustrative rather than restrictive. The same drawings throughout the embodiments of the specification mark the same structure. In addition, for the sake of understanding and ease of description, the drawings may exaggerate the thickness of some layers, films, panels, regions, etc. It is also understood that when an element such as a layer, film, region or substrate is referred to as "on" another element, the element may be directly on the other element or there may be an intermediate element. In addition, "on" refers to positioning an element on or below another element, but does not essentially mean positioning on the upper side of another element according to the direction of gravity.

[0087] The terms "upper", "lower", "top", "bottom", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. When a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally arranged component at the same time.

[0088] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.

[0089] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A circuit board, comprising: a substrate having first and second opposing surfaces; A signal hole penetrating the substrate; a surface signal line located on the first surface, one end of the surface signal line being connected to one end of the signal hole located on the first surface, and the other end being used for connecting to an interface; The signal holes include: a first group of differential vias, including a first conductive hole and a second conductive hole; a second group of differential vias, including a third conductive hole and a fourth conductive hole; the first conductive hole is connected to the third conductive hole through a first inner layer trace located in the circuit board; the second conductive hole is connected to the fourth conductive hole through a second inner layer trace located in the circuit board; The surface signal line includes: a first surface routing line connected to the end of the first conductive hole located on the first surface and connected to a first interface located on the first surface; a second surface routing line connected to the end of the second conductive hole located on the first surface and connected to the first interface; a third surface routing line connected to the end of the third conductive hole located on the first surface and connected to the second interface located on the first surface; a fourth surface routing line connected to the end of the fourth conductive hole located on the first surface and connected to the second interface; Among them, a first thin film element is connected between the first conductive hole and the second conductive hole; and / or, at least one of the third conductive hole and the fourth conductive hole is grounded through the second thin film element; the thin film element is at least used to reduce the reflection of the transmission signal in the signal hole or to increase the amplitude of the transmission signal. 2 . The circuit board according to claim 1 , wherein the first thin film element is a first thin film resistor connected between the first conductive hole and the second conductive hole.

3. The circuit board according to claim 2, wherein the substrate comprises a plurality of stacked metal layers, and an insulating layer is provided between adjacent metal layers; in the direction from the first surface to the second surface, the plurality of metal layers are sequentially from the first metal layer to the Nth metal layer, where N is a positive integer greater than 2; The i-th metal layer includes the first inner layer routing and the second inner layer routing; The first thin film resistor is located on the second surface, or between the second surface and the i-th metal layer, where i is a positive integer greater than 1 and less than N. 4 . The circuit board according to claim 1 , comprising a metal ground, and the second thin film element is connected between the connected conductive via and the metal ground. 5 . The circuit board according to claim 1 , wherein the third conductive via and the fourth conductive via are respectively grounded through one of the second thin film elements.

6. The circuit board according to claim 1, wherein the substrate comprises a plurality of stacked metal layers, and an insulating layer is provided between adjacent metal layers; in a direction from the first surface to the second surface, the plurality of metal layers are sequentially from the first metal layer to the Nth metal layer, and N is a positive integer greater than 2; The i-th metal layer includes the first inner layer routing and the second inner layer routing; The second thin film element is located on the second surface, or between the second surface and the i-th metal layer, where i is a positive integer greater than 1 and less than N.

7. The circuit board according to claim 1, wherein the second thin film element comprises a second thin film resistor and a thin film inductor connected in series; The second thin film resistor and the thin film inductor are located on the same layer of conductive dielectric material.

8. An electronic device comprising the circuit board according to any one of claims 1 to 7.

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