Isolating circuits and vehicles

Abstract

The present application provides an isolation circuit and a vehicle. The circuit includes a first electronic unit; a second electronic unit; an isolation unit having a first end, a second end and a third end, wherein the first end of the isolation unit is electrically connected to the first electronic unit, and the second end of the isolation unit is electrically connected to the second electronic unit; a state monitoring unit having a first end, a second end and a third end, wherein the first end of the state monitoring unit is electrically connected to the first electronic unit, the second end of the state monitoring unit is electrically connected to the second electronic unit, and the third end of the state monitoring unit is electrically connected to the third end of the isolation unit, and the state monitoring unit is used to monitor the states of the first electronic unit and the second electronic unit, and when any one of the first electronic unit and the second electronic unit is detected to fail, the state monitoring unit controls at least one of the first electronic unit and the second electronic unit to shut down. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low.

Description

Technical Field

[0001] The present application relates to the field of vehicle control, and in particular, to an isolation circuit and a vehicle. Background Art

[0002] In the design of automotive electronic circuits, there are very high requirements for reliability and safety. For example, multiple electronic units are required to communicate with each other, or each electronic unit is controlled based on a control signal. When an electronic unit fails, various control pins may fail, including short circuit to power supply, short circuit to ground, etc. To improve reliability, signal isolation is required. Generally, an isolation circuit needs to be set between two communicating units to ensure that the failed unit will not cause functional failure or impact on other devices. However, the current isolation circuit uses relatively expensive devices, resulting in a high cost for the isolation circuit. Summary of the invention

[0003] The main purpose of the present application is to provide an isolation circuit and a vehicle to solve the problem of high cost of the isolation circuit in the prior art.

[0004] According to one aspect of an embodiment of the present invention, an isolation circuit is provided, comprising: a first electronic unit; a second electronic unit; an isolation unit having a first end, a second end and a third end, the first end of the isolation unit being electrically connected to the first electronic unit, and the second end of the isolation unit being electrically connected to the second electronic unit; a status monitoring unit having a first end, a second end and a third end, the first end of the status monitoring unit being electrically connected to the first electronic unit, the second end of the status monitoring unit being electrically connected to the second electronic unit, and the third end of the status monitoring unit being electrically connected to the third end of the isolation unit, the status monitoring unit being used to monitor the status of the first electronic unit and the second electronic unit, and in the event that any one of the first electronic unit and the second electronic unit is detected to fail, the status monitoring unit controls at least one of the first electronic unit and the second electronic unit to shut down.

[0005] Optionally, the state monitoring unit includes: a current monitoring module, having a first end and a second end, the first end of the current monitoring module is electrically connected to the first electronic unit, and the second end of the current monitoring module is electrically connected to the second electronic unit, the current monitoring module is used to monitor a first current value output by the first electronic unit, and determine the state of the first electronic unit through the first current value, and is also used to monitor a second current value output by the second electronic unit, and determine the state of the second electronic unit through the second current value; a voltage monitoring module, having a first end and a second end, the first end of the voltage monitoring module is electrically connected to the first electronic unit, and the second end of the voltage monitoring module is electrically connected to the second electronic unit, the voltage monitoring module is used to monitor a first voltage value output by the first electronic unit, and determine the state of the first electronic unit through the first voltage value, and is also used to monitor a second voltage value output by the second electronic unit, and determine the state of the second electronic unit through the second voltage value.

[0006] Optionally, the current monitoring module is further used to: determine that the first electronic unit has failed when the first current value is greater than a current value threshold, and / or determine that the second electronic unit has failed when the second current value is greater than the current value threshold.

[0007] Optionally, the voltage monitoring module is further used to: determine that the first electronic unit has failed when the first voltage value is greater than a voltage value threshold, and / or determine that the second electronic unit has failed when the second voltage value is greater than the voltage value threshold.

[0008] Optionally, the status monitoring unit includes: a timing monitoring module having a first end and a second end, the first end of the timing monitoring module being electrically connected to the first electronic unit, and the second end of the timing monitoring module being electrically connected to the second electronic unit, the timing monitoring module being used to monitor a first electrical signal emitted by the first electronic unit and a second electrical signal emitted by the second electronic unit at predetermined time intervals, and determining that the first electronic unit has failed if the first electrical signal cannot be monitored, and determining that the second electronic unit has failed if the second electrical signal cannot be monitored.

[0009] Optionally, the isolation unit includes: a multiplexer having a first end, a second end and a third end, the first end of the multiplexer being electrically connected to the first electronic unit, the second end of the multiplexer being electrically connected to the second electronic unit, and the third end of the multiplexer being electrically connected to the third end of the status monitoring unit.

[0010] Optionally, the isolation unit includes: an analog switch having a first end, a second end and a third end, the first end of the analog switch being electrically connected to the first electronic unit, the second end of the analog switch being electrically connected to the second electronic unit, the third end of the analog switch being electrically connected to the third end of the state monitoring unit, and the third end of the analog switch being a signal enable end.

[0011] Optionally, when the state monitoring unit detects that both the first electronic unit and the second electronic unit are not failed, the third end of the state monitoring unit outputs a first level signal; when the state monitoring unit detects that any one of the first electronic unit and the second electronic unit fails, the third end of the state monitoring unit outputs a second level signal; when the analog switch receives the second level signal, it controls at least one of the first electronic unit and the second electronic unit to shut down.

[0012] Optionally, the analog switch includes an analog chip, the analog chip having a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin and an eighth pin, the first pin, the second pin, the third pin and the fourth pin of the analog chip are electrically connected to the first electronic unit, and the fifth pin, the sixth pin, the seventh pin and the eighth pin of the analog chip are electrically connected to the second electronic unit.

[0013] Optionally, when the analog chip receives the first level signal, the first pin of the analog chip is connected to the fifth pin of the analog chip, the second pin of the analog chip is connected to the sixth pin of the analog chip, the third pin of the analog chip is connected to the seventh pin of the analog chip, and the fourth pin of the analog chip is connected to the eighth pin of the analog chip.

[0014] Optionally, when the analog chip receives the second level signal, the first pin of the analog chip and the fifth pin of the analog chip are not connected, the second pin of the analog chip and the sixth pin of the analog chip are not connected, the third pin of the analog chip and the seventh pin of the analog chip are not connected, and the fourth pin of the analog chip and the eighth pin of the analog chip are not connected.

[0015] Optionally, the analog switch further includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, and the analog chip further has a ninth pin, a tenth pin, an eleventh pin, a twelfth pin, a thirteenth pin and a fourteenth pin, wherein the first resistor has a first end and a second end, the first end of the first resistor is electrically connected to the ninth pin of the analog chip, and the second end of the first resistor is grounded; the second resistor has a first end and a second end, the first end of the second resistor is electrically connected to the tenth pin of the analog chip, and the second end of the second resistor is grounded; the third resistor has a first end and a second end, and the third resistor The first end of the resistor is electrically connected to the eleventh pin of the analog chip, and the second end of the third resistor is grounded; the fourth resistor has a first end and a second end, the first end of the fourth resistor is electrically connected to the twelfth pin of the analog chip, and the second end of the fourth resistor is grounded; the fifth resistor has a first end and a second end, the first end of the fifth resistor is electrically connected to the thirteenth pin of the analog chip and the signal enable end of the analog chip, respectively, and the second end of the fifth resistor is grounded; the sixth resistor has a first end and a second end, the first end of the sixth resistor is electrically connected to the fourteenth pin of the analog chip, and the second end of the sixth resistor is grounded.

[0016] Optionally, the analog switch also includes a capacitor module, and the analog chip also has a fifteenth pin, wherein the capacitor module has a first end and a second end, the first end of the capacitor module is electrically connected to the fifteenth pin of the analog chip, and the second end of the capacitor module is grounded.

[0017] Optionally, the circuit further includes: a display unit electrically connected to the status monitoring unit, and the display unit is used to display failure information when any one of the first electronic unit and the second electronic unit fails.

[0018] According to another aspect of an embodiment of the present invention, a vehicle is further provided, comprising an isolation circuit, wherein the isolation circuit is any type of isolation circuit.

[0019] In an embodiment of the present invention, a first electronic unit, a second electronic unit, an isolation unit and a state monitoring unit are included. The state of the first electronic unit and the second electronic unit is monitored by the state monitoring unit. When any one of the first electronic unit and the second electronic unit fails, the state monitoring unit controls the pin of the isolation unit to be turned off to isolate the first electronic unit from the second electronic unit. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0021] Figure 1 A schematic diagram of a structural diagram of an isolation circuit in the prior art is shown;

[0022] Figure 2 A schematic diagram showing the structure of another isolation circuit in the prior art is shown;

[0023] Figure 3 A schematic structural diagram of an isolation circuit according to an embodiment of the present application is shown;

[0024] Figure 4 A schematic diagram of the structure of the condition monitoring unit is shown;

[0025] Figure 5 A schematic structural diagram of another isolation circuit according to an embodiment of the present application is shown;

[0026] Figure 6 shows a block diagram of an analog chip;

[0027] Figure 7 A structural schematic diagram of yet another isolation circuit according to an embodiment of the present application is shown.

[0028] The above drawings include the following reference numerals:

[0029] 10. First electronic unit; 11. Second electronic unit; 12. Isolation unit; 13. Status monitoring unit; 131. Current monitoring module; 132. Voltage monitoring module; 133. Timing monitoring module; 14. Analog chip. DETAILED DESCRIPTION

[0030] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0031] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0032] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0033] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0034] In traditional vehicle circuit design, the circuits for signal isolation include the following two types:

[0035] The first type: optocoupler isolation, such as Figure 1 As shown, U6 in the circuit is a photoelectric coupling device, which can realize the isolation of a single signal. The circuit also includes resistors R12, R13, R14, diode D11, transistor Q11 and relay RL1. The disadvantage of this circuit is that the isolation circuit of each signal is relatively complex and large in size, resulting in a high cost of the isolation circuit, and when a failure occurs, the high and low levels of the left control signal are uncertain, which will affect the normal operation of the controlled circuit on the right.

[0036] The second type: dedicated isolation, such as Figure 2 As shown, the circuit includes a four-channel digital isolator (ISO674x-Q1) and a single-channel digital isolator (ADuM110). This circuit also includes capacitors C21 and C22, VCC1 = input power, VCC0 = output power, GND1 = input ground, GND0 = output ground. The isolation degree of this type of device can reach KV level. At the same time, in the event of a failure, the physical isolation of the signal can be achieved by controlling the power supply or Enable pin of the IC. However, it is expensive and is not suitable for internal communication of the device.

[0037] As mentioned in the background technology, the cost of the isolation circuit in the prior art is relatively high. In order to solve the above problem, in a typical implementation of the present application, an isolation circuit and a vehicle are provided.

[0038] According to an embodiment of the present application, an isolation circuit is provided.

[0039] Figure 3 is a schematic diagram of the structure of an isolation circuit according to an embodiment of the present application. Figure 3 As shown, the isolation circuit includes:

[0040] A first electronic unit 10;

[0041] A second electronic unit 11;

[0042] The isolation unit 12 has a first end, a second end and a third end. The first end of the isolation unit 12 is electrically connected to the first electronic unit 10, and the second end of the isolation unit 12 is electrically connected to the second electronic unit 11.

[0043] The state monitoring unit 13 has a first end, a second end and a third end. The first end of the state monitoring unit 13 is electrically connected to the first electronic unit 10, the second end of the state monitoring unit 13 is electrically connected to the second electronic unit 11, and the third end of the state monitoring unit 13 is electrically connected to the third end of the isolation unit 12. The state monitoring unit 13 is used to monitor the states of the first electronic unit 10 and the second electronic unit 11. When it is detected that any one of the first electronic unit 10 and the second electronic unit 11 fails, the state monitoring unit 13 controls at least one of the first electronic unit 10 and the second electronic unit 11 to shut down.

[0044] The above-mentioned isolation circuit includes a first electronic unit, a second electronic unit, an isolation unit and a status monitoring unit. The status of the first electronic unit and the second electronic unit is monitored by the status monitoring unit, and when it is detected that any one of the first electronic unit and the second electronic unit fails, the status monitoring unit controls the pin of the isolation unit to be turned off to achieve isolation between the first electronic unit and the second electronic unit. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low.

[0045] It should be noted that if Figure 3 As shown, the isolation unit can also be electrically connected to the power supply end, the first electronic unit can be an MCU or an ECU, and the second electronic unit can be an MCU or an ECU. Of course, it is not limited to the above situation. Those skilled in the art can also select the appropriate first electronic unit and second electronic unit according to actual conditions.

[0046] It should also be noted that when the status monitoring unit detects that any one of the first electronic unit and the second electronic unit fails, the GPIO signals on both sides of the isolation unit enter a high impedance state (high impedance, generally marked as High-Z) or a disconnected state). The high impedance state is not floating, but a state of infinite resistance to ground or power supply, which is almost the same as pin floating in practical applications. If the signal GPIO enters a high impedance state, it is the same as not being connected, and has no effect on the electronic units of the lower circuits, thereby achieving isolation.

[0047] In one embodiment of the present application, Figure 4 As shown, the state monitoring unit includes a current monitoring module 131 and a voltage monitoring module 132. The current monitoring module 131 has a first end and a second end. The first end of the current monitoring module 131 is electrically connected to the first electronic unit, and the second end of the current monitoring module 131 is electrically connected to the second electronic unit. The current monitoring module 131 is used to monitor the first current value output by the first electronic unit, and determine the state of the first electronic unit through the first current value, and is also used to monitor the second current value output by the second electronic unit, and determine the state of the second electronic unit through the second current value; the voltage monitoring module 132 has a first end and a second end. The first end of the voltage monitoring module 132 is electrically connected to the first electronic unit, and the second end of the voltage monitoring module 132 is electrically connected to the second electronic unit. The voltage monitoring module 132 is used to monitor the first voltage value output by the first electronic unit, and determine the state of the first electronic unit through the first voltage value, and is also used to monitor the second voltage value output by the second electronic unit, and determine the state of the second electronic unit through the second voltage value. In this embodiment, the first current value of the first electronic unit and the second current value of the second electronic unit can be monitored by the current monitoring module, and the first voltage value of the first electronic unit and the second voltage value of the second electronic unit can be monitored by the voltage monitoring module. Then, based on the monitored current value and voltage value, it can be determined more efficiently and accurately whether the first electronic unit and the second electronic unit have failed.

[0048] In another embodiment of the present application, the current monitoring module is further used to determine that the first electronic unit has failed when the first current value is greater than the current value threshold, and / or to determine that the second electronic unit has failed when the second current value is greater than the current value threshold. In this embodiment, the current monitoring module can directly and accurately determine that the first electronic unit has failed when the first current value is greater than the current value threshold, and the current monitoring module can directly and accurately determine that the second electronic unit has failed when the second current value is greater than the current value threshold.

[0049] In another embodiment of the present application, the voltage monitoring module is further used to determine that the first electronic unit has failed when the first voltage value is greater than a voltage value threshold, and / or to determine that the second electronic unit has failed when the second voltage value is greater than the voltage value threshold. In this embodiment, the voltage monitoring module can directly and accurately determine that the first electronic unit has failed when the first voltage value is greater than the voltage value threshold, and the voltage monitoring module can directly and accurately determine that the second electronic unit has failed when the second voltage value is greater than the voltage value threshold.

[0050] In another embodiment of the present application, Figure 4 As shown, the state monitoring unit includes a timing monitoring module 133, the timing monitoring module 133 has a first end and a second end, the first end of the timing monitoring module 133 is electrically connected to the first electronic unit, the second end of the timing monitoring module 133 is electrically connected to the second electronic unit, and the timing monitoring module 133 is used to monitor the first electrical signal emitted by the first electronic unit and the second electrical signal emitted by the second electronic unit at predetermined time intervals, and when the first electrical signal cannot be monitored, it is determined that the first electronic unit has failed, and when the second electrical signal cannot be monitored, it is determined that the second electronic unit has failed. In this embodiment, it is also possible to efficiently and accurately determine whether the first electronic unit and / or the second electronic unit has failed based on the timing monitoring module, further ensuring that the use effect of the isolation circuit is better.

[0051] In a specific embodiment of the present application, the isolation unit includes a multiplexer, the multiplexer has a first end, a second end and a third end, the first end of the multiplexer is electrically connected to the first electronic unit, the second end of the multiplexer is electrically connected to the second electronic unit, and the third end of the multiplexer is electrically connected to the third end of the state monitoring unit. In this embodiment, the multiplexer can be used to further efficiently achieve isolation between the first electronic unit and the second electronic unit.

[0052] In another specific embodiment of the present application, the isolation unit includes an analog switch, the analog switch has a first end, a second end and a third end, the first end of the analog switch is electrically connected to the first electronic unit, the second end of the analog switch is electrically connected to the second electronic unit, the third end of the analog switch is electrically connected to the third end of the state monitoring unit, and the third end of the analog switch is a signal enable end. In this embodiment, the use of the analog switch can further efficiently achieve isolation between the first electronic unit and the second electronic unit.

[0053] In another specific embodiment of the present application, when the state monitoring unit detects that both the first electronic unit and the second electronic unit are not failed, the third end of the state monitoring unit outputs a first level signal, and when the state monitoring unit detects that any one of the first electronic unit and the second electronic unit is failed, the third end of the state monitoring unit outputs a second level signal, and when the analog switch receives the second level signal, it controls at least one of the first electronic unit and the second electronic unit to be turned off. In this embodiment, when the state monitoring unit detects that both the first electronic unit and the second electronic unit are not failed, it can output the first level signal, and when the analog switch receives the first level signal, the first electronic unit and the second electronic unit are not turned off, and when the state monitoring unit detects that any one of the first electronic unit and the second electronic unit is failed, it can output the second level signal, and when the analog switch receives the second level signal, it controls at least one of the first electronic unit and the second electronic unit to be turned off, thereby more efficiently achieving the isolation of the first electronic unit and the second electronic unit.

[0054] In another specific embodiment of the present application, Figure 5 As shown, the analog switch includes an analog chip 14, and the analog chip 14 has a first pin S1A, a second pin S2A, a third pin S3A, a fourth pin S4A, a fifth pin D1, a sixth pin D2, a seventh pin D3 and an eighth pin D4. The first pin S1A, the second pin S2A, the third pin S3A and the fourth pin S4A of the analog chip 14 are electrically connected to the first electronic unit, and the fifth pin D1, the sixth pin D2, the seventh pin D3 and the eighth pin D4 of the analog chip 14 are electrically connected to the second electronic unit. In this embodiment, the pins of the analog chip are electrically connected to the first electronic unit and the second electronic unit respectively, so that the isolation between the two electronic units can be achieved by controlling the pins of the analog chip later.

[0055] Specifically, Figure 5 As shown, there are four signal paths between the analog chip 14 and the first electronic unit, the first electronic unit is MCU1, and the four signal paths are MCU1_GPIO1, MCU1_GPIO2, MCU1_GPIO3 and MCU1_GPIO14 respectively; there are four signal paths between the analog chip 14 and the second electronic unit, the second electronic unit is MCU2, and the four signal paths are MCU2_GPIO1, MCU2_GPIO2, MCU2_GPIO3 and MCU2_GPIO14 respectively.

[0056] In one embodiment of the present application, Figure 5As shown, when the analog chip 14 receives the first level signal, the first pin S1A of the analog chip 14 is connected to the fifth pin D1 of the analog chip 14, the second pin S2A of the analog chip 14 is connected to the sixth pin D2 of the analog chip 14, the third pin S3A of the analog chip 14 is connected to the seventh pin D3 of the analog chip 14, and the fourth pin S4A of the analog chip 14 is connected to the eighth pin D4 of the analog chip 14. In this embodiment, when the analog chip receives the first level signal, the isolation between the two electronic units can be more efficiently achieved by controlling the action of the pins.

[0057] In another embodiment of the present application, Figure 5 As shown, when the analog chip 14 receives the second level signal, the first pin S1A of the analog chip 14 is not connected to the fifth pin D1 of the analog chip 14, the second pin S2A of the analog chip 14 is not connected to the sixth pin D2 of the analog chip 14, the third pin S3A of the analog chip 14 is not connected to the seventh pin D3 of the analog chip 14, and the fourth pin S4A of the analog chip 14 is not connected to the eighth pin D4 of the analog chip 14. In this embodiment, when the analog chip receives the second level signal, the isolation between the two electronic units can be more efficiently achieved by controlling the action of the pins. .

[0058] In one embodiment, the first level signal is a low level signal, and the second level signal is a high level signal.

[0059] In another embodiment, the first level signal is a high level signal, and the second level signal is a low level signal.

[0060] In another embodiment of the present application, Figure 5As shown, the analog switch further includes a first resistor R6, a second resistor R7, a third resistor R8, a fourth resistor R9, a fifth resistor R10 and a sixth resistor R11, and the analog chip 14 further includes a ninth pin S1B, a tenth pin S2B, an eleventh pin S3B, a twelfth pin S4B, a thirteenth pin EN and a fourteenth pin SEL, wherein the first resistor R6 includes a first end and a second end, the first end of the first resistor R6 is electrically connected to the ninth pin S1B of the analog chip 14, and the second end of the first resistor R6 is grounded; the second resistor R7 includes a first end and a second end, the first end of the second resistor R7 is electrically connected to the tenth pin S2B of the analog chip 14, and the second end of the second resistor R7 is grounded; the third resistor R8 includes a first end and a second end, and the The first end of the third resistor R8 is electrically connected to the eleventh pin S3B of the analog chip 14, and the second end of the third resistor R8 is grounded; the fourth resistor R9 has a first end and a second end, the first end of the fourth resistor R9 is electrically connected to the twelfth pin S4B of the analog chip 14, and the second end of the fourth resistor R9 is grounded; the fifth resistor R10 has a first end and a second end, the first end of the fifth resistor R10 is electrically connected to the thirteenth pin EN of the analog chip 14 and the signal enable end of the analog chip 14, respectively, and the second end of the fifth resistor R10 is grounded; the sixth resistor R11 has a first end and a second end, the first end of the sixth resistor R11 is electrically connected to the fourteenth pin SEL of the analog chip 14, and the second end of the sixth resistor R11 is grounded. In this embodiment, the analog switch also includes a plurality of resistors, and the voltage can be divided by the plurality of resistors, thereby ensuring that the safety performance of the analog switch is good, thereby ensuring that the performance of the isolation store is good.

[0061] In another embodiment of the present application, the analog switch further includes a capacitor module, the capacitor module includes a capacitor C3, and the analog chip 14 further has a fifteenth pin VDD, wherein the capacitor module has a first end and a second end, the first end of the capacitor module is electrically connected to the fifteenth pin VDD of the analog chip 14, and the second end of the capacitor module is grounded. In this embodiment, the capacitor module can be used to filter the received signal, ensuring that the signal has a high accuracy, thereby ensuring good stability of the isolation circuit.

[0062] In one embodiment, the model of the analog chip is SN3257-Q1, and the truth table of the analog chip is as follows:

[0063]

[0064] According to the analog chip truth table, it can be determined that Figure 6As shown, when the received signal is a low-level signal, the signal of the analog chip 14 will be connected from the S1 end (S1A, S2A, S3A or S4A) or the S2 end (S1B, S2B, S3B or S4B) to the other end D end (D1, D2, D3 or D4), and when the received signal is a high-level signal, the IO of the analog chip 14 will be in a high-impedance state. When all the IOs of the analog chip 14 enter the high-impedance state, the GPIO1-GPIO4 between the first electronic unit and the second electronic unit will be in a high-impedance state, thereby achieving isolation between the two electronic units.

[0065] In a specific embodiment, the model of the analog chip is SN3257-Q1.

[0066] In a specific embodiment of the present application, the circuit further includes a display unit, which is electrically connected to the state monitoring unit, and is used to display failure information when any one of the first electronic unit and the second electronic unit fails. In this embodiment, by displaying the failure information on the display unit, passengers can promptly know that any one of the first electronic unit and the second electronic unit has failed.

[0067] In a specific embodiment, the isolation circuit is as follows Figure 7As shown, the first electronic unit is MCU1, the second electronic unit is MCU2, the resistor R353 (resistance value is 2MΩ) is electrically connected to MCU1_VDD+ and MCU1_VDD- respectively, the resistor R1005 (resistance value is 2MΩ) is electrically connected to MCU2_VDD+ and MCU2_VDD- respectively, the isolation circuit also includes a resistor R998 (resistance value is 10Ω), a resistor R999 (resistance value is 10Ω), a resistor R1001 (resistance value is 10Ω) and a resistor R1004 (resistance value is 10Ω), and the isolation circuit also includes a capacitor C830 (capacitance value is 0.1uF, voltage value is 50V) and a capacitor C831 (capacitance value is 0.1uF, voltage ... The state monitoring unit includes a monitoring chip U71, and the isolation circuit also includes a 3V3 power supply. The capacitor C829 (capacitance value is 0.1uF, voltage value is 50V) is electrically connected to the 3V3 power supply, and the resistor R1000 (resistance value is 10KΩ) is electrically connected to the 3V3 power supply. The isolation circuit also includes a PMOS tube Q107A. The analog chip U72 is electrically connected to the monitoring chip through the MOS tube Q107A. The isolation circuit also includes a resistor R2510 (resistance value is 100KΩ). The isolation circuit also includes a resistor R2512 (resistance value is 10KΩ), a resistor R2513 (resistance value is 10KΩ), a resistor R2514 (resistance value is 10KΩ), and a resistor R251 5 (resistance value is 10KΩ), resistor R2516 (resistance value is 10KΩ) and resistor R2517 (resistance value is 100KΩ), and also include capacitor C832 (capacitance value is 0.1uF, voltage value is 50V), the pins of the analog chip are electrically connected to MCU1 and MCU2 respectively, and the specific implementation principle of the isolation circuit is: the monitoring chip U71 is a current and voltage monitoring chip, which is used to monitor the power supply of MCU1 and MCU2. When MCU1 and MCU2 are not failed, the warning pin of the monitoring chip U71 outputs a high-level signal. After the isolation unit receives the high-level signal, the logic level signal is converted into a low-level signal through the PMOS tube Q107A. Level signal, that is, the enable pin of the analog chip U72 is a low-level signal, the analog chip U72 is in normal working mode, the GPIO of MCU1 and MCU2 can communicate normally, when the power supply of any one of MCU1 and MCU2 fails, the warning pin of the monitoring chip U71 outputs a low-level signal, and after the isolation unit receives the low-level signal, the logic level signal is converted into a high-level signal through the PMOS tube Q107A, that is, the enable pin of the analog chip U72 is a high-level signal, and the analog chip U72 is in failure working mode. According to the truth table, it can be determined that the port is in a high-impedance state. At this time, the communication interface of MCU1 and MCU2 is isolated.

[0068] The present application also provides a vehicle, the vehicle includes an isolation circuit, and the isolation circuit is any type of isolation circuit.

[0069] In the above-mentioned vehicle, since it includes any one of the above-mentioned isolation circuits, the circuit includes a first electronic unit, a second electronic unit, an isolation unit and a status monitoring unit. The status of the first electronic unit and the second electronic unit is monitored by the status monitoring unit, and when it is detected that any one of the first electronic unit and the second electronic unit fails, the status monitoring unit controls the pin of the isolation unit to be turned off to achieve isolation between the first electronic unit and the second electronic unit. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low.

[0070] In the above embodiments of the present invention, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0071] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the above-mentioned units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0072] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0073] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0074] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the above-mentioned methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and other media that can store program codes.

[0075] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0076] 1) The isolation circuit of the present application includes a first electronic unit, a second electronic unit, an isolation unit and a state monitoring unit. The state of the first electronic unit and the second electronic unit is monitored by the state monitoring unit. When any one of the first electronic unit and the second electronic unit fails, the state monitoring unit controls the pin of the isolation unit to be turned off to achieve isolation between the first electronic unit and the second electronic unit. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low.

[0077] 2) The vehicle of the present application includes any one of the above-mentioned isolation circuits, which includes a first electronic unit, a second electronic unit, an isolation unit and a status monitoring unit. The status of the first electronic unit and the second electronic unit is monitored by the status monitoring unit, and when any one of the first electronic unit and the second electronic unit is detected to fail, the status monitoring unit controls the pin of the isolation unit to be turned off to achieve isolation between the first electronic unit and the second electronic unit. The structure of the circuit is relatively simple, the cost of the device is low, and the cost of the isolation circuit is also low.

[0078] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An isolation circuit, characterized in that: include: First electronic unit; A second electronic unit; an isolation unit having a first end, a second end and a third end, wherein the first end of the isolation unit is electrically connected to the first electronic unit, and the second end of the isolation unit is electrically connected to the second electronic unit; A state monitoring unit has a first end, a second end and a third end, wherein the first end of the state monitoring unit is electrically connected to the first electronic unit, the second end of the state monitoring unit is electrically connected to the second electronic unit, and the third end of the state monitoring unit is electrically connected to the third end of the isolation unit. The state monitoring unit is used to monitor the states of the first electronic unit and the second electronic unit. When it is detected that any one of the first electronic unit and the second electronic unit fails, the state monitoring unit controls at least one of the first electronic unit and the second electronic unit to shut down.

2. The isolation circuit according to claim 1, characterized in that: The state monitoring unit comprises: a current monitoring module having a first end and a second end, wherein the first end of the current monitoring module is electrically connected to the first electronic unit, and the second end of the current monitoring module is electrically connected to the second electronic unit, and the current monitoring module is used to monitor a first current value output by the first electronic unit, and determine a state of the first electronic unit according to the first current value, and is also used to monitor a second current value output by the second electronic unit, and determine a state of the second electronic unit according to the second current value; A voltage monitoring module has a first end and a second end, the first end of the voltage monitoring module is electrically connected to the first electronic unit, and the second end of the voltage monitoring module is electrically connected to the second electronic unit. The voltage monitoring module is used to monitor a first voltage value output by the first electronic unit and determine the state of the first electronic unit through the first voltage value, and is also used to monitor a second voltage value output by the second electronic unit and determine the state of the second electronic unit through the second voltage value.

3. The isolation circuit according to claim 2, characterized in that: The current monitoring module is also used for: When the first current value is greater than a current value threshold, it is determined that the first electronic unit has failed, and / or when the second current value is greater than the current value threshold, it is determined that the second electronic unit has failed.

4. The isolation circuit according to claim 2, characterized in that: The voltage monitoring module is also used for: When the first voltage value is greater than a voltage value threshold, it is determined that the first electronic unit has failed, and / or when the second voltage value is greater than the voltage value threshold, it is determined that the second electronic unit has failed.

5. The isolation circuit according to any one of claims 1 to 4, characterized in that: The state monitoring unit comprises: A timing monitoring module has a first end and a second end, wherein the first end of the timing monitoring module is electrically connected to the first electronic unit, and the second end of the timing monitoring module is electrically connected to the second electronic unit. The timing monitoring module is used to monitor a first electrical signal emitted by the first electronic unit and a second electrical signal emitted by the second electronic unit at predetermined time intervals, and when the first electrical signal cannot be monitored, it is determined that the first electronic unit has failed, and when the second electrical signal cannot be monitored, it is determined that the second electronic unit has failed.

6. The isolation circuit according to any one of claims 1 to 4, characterized in that: The isolation unit comprises: The multiplexer has a first end, a second end and a third end, wherein the first end of the multiplexer is electrically connected to the first electronic unit, the second end of the multiplexer is electrically connected to the second electronic unit, and the third end of the multiplexer is electrically connected to the third end of the state monitoring unit.

7. The isolation circuit according to any one of claims 1 to 4, characterized in that: The isolation unit comprises: An analog switch has a first end, a second end and a third end, wherein the first end of the analog switch is electrically connected to the first electronic unit, the second end of the analog switch is electrically connected to the second electronic unit, the third end of the analog switch is electrically connected to the third end of the state monitoring unit, and the third end of the analog switch is a signal enable end.

8. The isolation circuit according to claim 7, characterized in that: When the state monitoring unit detects that both the first electronic unit and the second electronic unit are not failed, the third end of the state monitoring unit outputs a first level signal. When the state monitoring unit detects that any one of the first electronic unit and the second electronic unit fails, the third end of the state monitoring unit outputs a second level signal. When the analog switch receives the second level signal, it controls at least one of the first electronic unit and the second electronic unit to shut down.

9. The isolation circuit according to claim 8, characterized in that: The analog switch includes an analog chip, which has a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin and an eighth pin. The first pin, the second pin, the third pin and the fourth pin of the analog chip are electrically connected to the first electronic unit, and the fifth pin, the sixth pin, the seventh pin and the eighth pin of the analog chip are electrically connected to the second electronic unit.

10. The isolation circuit according to claim 9, characterized in that: When the analog chip receives the first level signal, the first pin of the analog chip is connected to the fifth pin of the analog chip, the second pin of the analog chip is connected to the sixth pin of the analog chip, the third pin of the analog chip is connected to the seventh pin of the analog chip, and the fourth pin of the analog chip is connected to the eighth pin of the analog chip.

11. The isolation circuit according to claim 9, characterized in that: When the analog chip receives the second level signal, the first pin of the analog chip and the fifth pin of the analog chip are not connected, the second pin of the analog chip and the sixth pin of the analog chip are not connected, the third pin of the analog chip and the seventh pin of the analog chip are not connected, and the fourth pin of the analog chip and the eighth pin of the analog chip are not connected.

12. The isolation circuit according to claim 9, characterized in that: The analog switch further includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, and the analog chip further has a ninth pin, a tenth pin, an eleventh pin, a twelfth pin, a thirteenth pin and a fourteenth pin, wherein: The first resistor has a first end and a second end, the first end of the first resistor is electrically connected to the ninth pin of the analog chip, and the second end of the first resistor is grounded; The second resistor has a first end and a second end, the first end of the second resistor is electrically connected to the tenth pin of the analog chip, and the second end of the second resistor is grounded; The third resistor has a first end and a second end, the first end of the third resistor is electrically connected to the eleventh pin of the analog chip, and the second end of the third resistor is grounded; The fourth resistor has a first end and a second end, the first end of the fourth resistor is electrically connected to the twelfth pin of the analog chip, and the second end of the fourth resistor is grounded; The fifth resistor has a first end and a second end, the first end of the fifth resistor is electrically connected to the thirteenth pin of the analog chip and the signal enable end of the analog chip respectively, and the second end of the fifth resistor is grounded; The sixth resistor has a first end and a second end. The first end of the sixth resistor is electrically connected to the fourteenth pin of the analog chip, and the second end of the sixth resistor is grounded.

13. The isolation circuit according to claim 12, characterized in that: The analog switch further includes a capacitor module, and the analog chip further includes a fifteenth pin, wherein: The capacitor module has a first end and a second end. The first end of the capacitor module is electrically connected to the fifteenth pin of the analog chip, and the second end of the capacitor module is grounded.

14. The isolation circuit according to any one of claims 1 to 4, characterized in that: The circuit further comprises: A display unit is electrically connected to the state monitoring unit, and is used to display failure information when any one of the first electronic unit and the second electronic unit fails.

15. A vehicle, characterized in that: It comprises an isolation circuit, wherein the isolation circuit is the isolation circuit of any one of claims 1 to 14.

Images