Semiconductor device and method for manufacturing the same
By forming an inclined surface on the outer peripheral portion of the insulating film opening of the semiconductor device and covering the base metal, the problems of InGaAs layer corrosion and unstable contact shape are solved, and the shape stability of the contact portion is achieved.
Patent Information
- Application Number
- CN202080092333.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-02-06
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2040-02-06
AI Technical Summary
In a semiconductor device, there is a gap in the metal laying on the InGaAs layer, resulting in corrosion of the InGaAs layer and the shape of the contact portion is unstable.
An inclined surface is formed at the open outer peripheral portion of the insulating film, and the base metal covers the upper surface and the inclined surface of the contact layer to form a plating layer to improve coverage, avoid plating liquid from invading and etching the contact layer.
The inclined surface improves the coverage of the base metal, avoids the contact layer etching caused by the coating interruption and the plating solution, and achieves stable shape of the contact part.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device having a dimensionally stable contact and a method for producing the same. Background Art
[0002] In semiconductor devices, an InGaAs layer is used as a contact layer with an electrode. It is known that if there is a gap in metallization on the InGaAs layer, the InGaAs layer will be corroded (for example, see Non-Patent Document 1).
[0003] Non-patent document 1: "Journal of Electronic Materials", February 1998, Volume 27, Issue 2, pp 89-95
[0004] The contact layer is exposed from the opening of the insulating film. A base metal is formed on the exposed contact layer. Since the inner wall of the opening of the insulating film is perpendicular to the upper surface of the contact layer, the coating is sometimes interrupted at the outer periphery of the opening of the insulating film to leave a gap. When forming the Au plating layer, the plating liquid intrudes from the gap and etches the contact layer at the outer periphery of the opening. As a result, there is a problem that the shape of the contact portion is unstable. Summary of the invention
[0005] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to obtain a semiconductor device having a stable contact portion shape and a method for manufacturing the same.
[0006] The semiconductor device involved in the present disclosure is characterized in that it comprises: a contact layer; an insulating film, which is formed on the above-mentioned contact layer and has an opening; a shape stabilizing layer, which has an inclined surface formed on the above-mentioned contact layer at the periphery of the above-mentioned opening; a base metal, which covers the upper surface of the above-mentioned contact layer exposed at the above-mentioned opening and the above-mentioned inclined surface; and a plating layer, which is formed on the above-mentioned base metal.
[0007] In the present disclosure, a shape-stable layer having an inclined surface is formed on the contact layer at the periphery of the opening. Furthermore, the base metal covers the upper surface and the inclined surface of the contact layer exposed at the opening. Since the coverage of the base metal is improved by the inclined surface, the coating is not interrupted at the periphery of the opening of the insulating film. Therefore, when forming the plating layer, no etching of the contact layer caused by the plating solution occurs, and thus, a semiconductor device with a shape-stable contact portion can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 This is a cross-sectional view showing the semiconductor device according to the first embodiment.
[0009] Figure 2It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0010] Figure 3 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0011] Figure 4 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0012] Figure 5 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0013] Figure 6 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0014] Figure 7 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0015] Figure 8 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0016] Fig. 9 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0017] Fig.10 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.
[0018] Fig.11 It is a cross-sectional view showing a state of a semiconductor device according to a comparative example before plating.
[0019] Fig.12 This is a cross-sectional view showing a modification of the semiconductor device according to the first embodiment.
[0020] Fig.13 It is a cross-sectional view showing a semiconductor device according to the second embodiment. DETAILED DESCRIPTION
[0021] A semiconductor device and a method for manufacturing the same according to the embodiments will be described with reference to the accompanying drawings. The same reference numerals are used for the same or corresponding components, and repeated description may be omitted.
[0022] Implementation Method 1
[0023] Figure 11 is a cross-sectional view showing a semiconductor device according to Embodiment 1. The semiconductor device is a ridge-type laser diode. An active layer 2 having a multiple quantum well structure of an InGaAsP system is formed on an n-type InP substrate 1. An InP ridge lower layer 3 and an InGaAsP layer 4 are sequentially formed on the outermost layer 2a of the active layer 2. A thin InP layer may also be formed on the InGaAsP layer 4 as a cap layer.
[0024] A diffraction grating 5 is embedded in the center of the InGaAsP layer 4. An InP ridge upper layer 6 and an InGaAs contact layer 7 are sequentially formed on the InGaAsP layer 4 and the diffraction grating 5. A shape stabilizing layer 8 having a film thickness of 30 nm to 100 nm is formed on the InGaAs contact layer 7. The shape stabilizing layer 8 has an opening in the center, and the inner wall of the opening is an inclined surface 9. The angle of the inclined surface 9 relative to the upper surface of the InGaAs contact layer 7 is 30° to 80°. The inclined surface 9 is a tapered shape in which the film thickness of the shape stabilizing layer 8 gradually becomes thinner from the outer periphery toward the center.
[0025] The InP ridge lower layer 3, the InGaAsP layer 4, the InP ridge upper layer 6, the InGaAs contact layer 7 and the shape stabilizing layer 8 constitute a ridge structure. The insulating film 10 is formed on the InGaAs contact layer 7 and the shape stabilizing layer 8 to cover the side of the ridge structure. The insulating film 10 is SiO 2 The insulating film 10 has an opening 11. The inclined surface 9 of the shape stabilizing layer 8 is formed on the InGaAs contact layer 7 at the outer periphery of the opening 11. The upper end of the inclined surface 9 is connected to the inner wall of the opening 11 of the insulating film 10, and the lower end of the inclined surface 9 is connected to the InGaAs contact layer 7. Due to the presence of the inclined surface 9, the lower end of the outer periphery of the opening 11 becomes flat. The base metal 12 covers the upper surface of the InGaAs contact layer 7 and the inclined surface 9 exposed at the opening 11. The Au plating layer 13 is formed on the base metal 12.
[0026] Figure 2 to Figure 10 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1. Figure 2 As shown in FIG. 1 , an active layer 2, an InP lower ridge layer 3, and an InGaAsP layer 4 are sequentially formed on an n-type InP substrate 1. Next, as shown in FIG. Figure 3 As shown in FIG. 4 , the central portion of the InGaAsP layer 4 is removed. Figure 4 As shown in FIG. 1 , InP is buried in the removed portion and grown to form a diffraction grating 5. Next, as shown in FIG. Figure 5 As shown, an InP ridge upper layer 6, an InGaAs contact layer 7, and a shape stabilizing layer 8 are sequentially formed on the InGaAsP layer 4 and the diffraction grating 5.
[0027] Next, if Figure 6 As shown, a mask 14 made of a photoresist or an insulating film is formed on the shape stabilizing layer 8. An opening is formed in the central portion of the mask 14 by photolithography or the like. Using the mask 14, the central portion of the shape stabilizing layer 8 is wet-etched using a wet etching solution such as hydrochloric acid and phosphoric acid, thereby exposing a portion of the upper surface of the InGaAs contact layer 7. During the wet etching, an inclined surface 9 is formed on the inner wall of the opening of the shape stabilizing layer 8. Here, the shape stabilizing layer 8 is made of a material different from that of the InGaAs contact layer 7, such as AlGaInP, InP, etc. Therefore, the shape stabilizing layer 8 is selectively wet-etched relative to the InGaAs contact layer 7. Thereafter, the mask 14 is removed.
[0028] Next, if Figure 7 As shown, by using SiO 2 The ridge structure is formed by dry etching through an insulating film hard mask, etc. The width of the ridge structure is set to a desired width required for the characteristics. At this stage, a part of the InP ridge upper layer 6 is left without etching to the InGaAsP layer 4.
[0029] Next, if Figure 8 As shown, the remaining InP ridge upper layer 6 is wet-etched to expose the InGaAsP layer 4. If a wet etchant having a sufficiently large etching selectivity between the InGaAsP layer 4 and the InP ridge upper layer 6 is used as the wet etchant, the accuracy of the ridge processing becomes high.
[0030] Next, if Fig. 9 As shown, the InGaAsP layer 4 and the InP ridge lower layer 3 are dry-etched. Fig.10 As shown, by utilizing the side etching effect of wet etching, the InP ridge lower layer 3 is etched from the side until the width W3 of the InP ridge lower layer 3 becomes a desired value relative to the width W1 of the InP ridge upper layer 6 and the width W2 of the InGaAsP layer 4. If an etching liquid having a sufficiently large etching selectivity ratio of the InP ridge lower layer 3 to the InGaAsP layer 4 is used as a wet etching liquid, the accuracy of the ridge processing becomes higher. However, the wet etching of the shape stabilizing layer 8 described above can also be performed after the ridge structure is formed.
[0031] Next, an insulating film 10 is formed by a film forming method such as a plasma CVD method so as to cover the InGaAs contact layer 7 and the shape stabilizing layer 8 and the side surfaces of the ridge structure. The insulating film 10 above the central portion of the InGaAs contact layer 7 is removed to form an opening 11. A base metal 12 is formed by sputtering or evaporation, and the base metal 12 covers the entire ridge structure including the upper surface of the InGaAs contact layer 7 exposed at the opening 11 and the inclined surface 9. However, the base metal 12 may also be formed on the entire surface of the insulating film 10.
[0032] Next, if the entire device is immersed in a plating solution for electrolytic plating, Au is deposited on the base metal 12 by an electrochemical reaction. Thus, an Au plating layer 13 is formed on the base metal 12. Figure 1 The semiconductor device shown.
[0033] Fig.11 1 is a cross-sectional view showing the state of the semiconductor device involved in the comparative example before plating. In the comparative example, there is no shape stabilizing layer 8, and the inner wall of the opening 11 of the insulating film 10 is perpendicular to the upper surface of the InGaAs contact layer 7. Therefore, the coverage of the base metal 12 is insufficient, and sometimes the coating is interrupted at the periphery of the opening 11 of the insulating film 10, leaving a gap 15. When the Au plating layer 13 is formed, the plating liquid intrudes from the gap 15. Moreover, in the periphery of the opening 11 where the current locally becomes too large, an electrochemical reaction occurs and the InGaAs contact layer 7 is etched. As a result, the shape of the contact portion is unstable.
[0034] In contrast, in the present embodiment, the shape stabilizing layer 8 having the inclined surface 9 is formed on the InGaAs contact layer 7 at the periphery of the opening 11. Furthermore, the base metal 12 covers the upper surface of the InGaAs contact layer 7 and the inclined surface 9 exposed at the opening 11. The inclined surface 9 improves the coverage of the base metal 12, so that the coating is not interrupted at the periphery of the opening 11 of the insulating film 10. Therefore, when the Au plating layer 13 is formed, the etching of the InGaAs contact layer 7 due to the plating solution does not occur, so that a semiconductor device with a stable contact shape can be obtained.
[0035] In addition, the shape stabilizing layer 8 may also be made of SiN or SiO 2 Insulators such as the above. In this case, the inclined surface 9 can be formed by adjusting the etching conditions when processing the insulator. Specifically, when processing the insulator by RIE (Reactive Ion Etching) or ICP (Inductively Coupled Plasma), the processing is performed based on the balance between chemical reaction etching of the reaction gas and the adhesion of the reaction product. The inclined surface 9 of the shape-stabilizing layer 8 can be formed by adjusting the bias conditions and the flow rate of the etching gas in such a way that the adhesion of the reaction product to the side wall of the processing portion becomes more.
[0036] However, even if the etching conditions, film species, and film formation conditions are adjusted, the etching selectivity between the insulating film 10 and the insulator of the shape stabilizing layer 8 cannot be 1:0. Therefore, the insulator of the shape stabilizing layer 8 is also slightly etched when the opening 11 of the insulating film 10 is formed.
[0037] Fig.12 This is a cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Figure 1 In the embodiment, the base metal 12 is also formed on the insulating film 10, but Fig.12 In this embodiment, the base metal 12 is not formed on the insulating film 10. In this case as well, a semiconductor device having a stable contact portion shape can be obtained.
[0038] However, the structure disclosed in the present invention is not limited to ridge-type laser diodes, but can also be applied to buried-type laser diodes, and can also be applied to ridge-type laser diodes having a structure combining these.
[0039] Implementation Method 2
[0040] Fig.13 2 is a cross-sectional view showing a semiconductor device according to Embodiment 2. In this embodiment, the following heat treatment is performed: the shape-stabilizing layer 8 composed of AlGaInP, InP, etc. is placed near the crystal growth temperature of MOCVD, etc., at 600°C to 650°C for about 10 minutes to 30 minutes. As a result, the inclined surface 9 is curved by mass transport that changes the shape in a manner that reduces the surface energy. In this case, a semiconductor device with a stable contact portion can be obtained in the same manner as in Embodiment 1.
[0041] Description of Reference Numerals
[0042] 7...InGaAs contact layer; 8...shape stabilizing layer; 9...inclined surface; 10...insulating film; 11...opening; 12...base metal; 13...Au plating layer.
Claims
1. A semiconductor device, characterized in that: have: contact layer; an insulating film formed on the contact layer and having an opening; a shape stabilizing layer having an inclined surface, formed on the contact layer at an outer peripheral portion of the opening; A base metal covering the upper surface of the contact layer and the inclined surface exposed at the opening; as well as a plating layer formed on the base metal, The material of the shape-stabilizing layer is different from the material of the contact layer, The material of the shape stabilizing layer is semiconductor.
2. The semiconductor device according to claim 1, wherein: The contact layer is an InGaAs layer.
3. The semiconductor device according to claim 1 or 2, characterized in that: The inclined surface is a curved surface.
4. A method for manufacturing a semiconductor device, characterized in that: have: forming a shape stabilizing layer on the contact layer; A step of etching the shape stabilizing layer to form an inclined surface and exposing a portion of the upper surface of the contact layer; forming an insulating film on the shape stabilizing layer; forming an opening in the insulating film; forming a base metal, the base metal covering the upper surface of the contact layer and the inclined surface exposed at the opening; as well as a step of forming a plated layer on the base metal by electrolytic plating, The inclined surface is formed on the outer periphery of the opening, The material of the shape-stabilizing layer is different from the material of the contact layer, selectively etching the shape stabilizing layer relative to the contact layer when forming the inclined surface, The material of the shape-stabilizing layer is a semiconductor, The shape stabilizing layer is wet-etched to form the inclined surface.
5. The method for manufacturing a semiconductor device according to claim 4, wherein: The contact layer is an InGaAs layer.
6. The method for manufacturing a semiconductor device according to claim 4 or 5, characterized in that: The method further comprises: forming the inclined surface into a curved surface by mass transfer.
Citation Information
Patent Citations
Semiconductor laser and its manufacture
JP2000091700A
Production of semiconductor device
JP2000208628A