A phototransistor based on platinum diselenide and SOI, preparation method and application thereof

By introducing a phototransistor with a platinum diselenide/silicon/silicon dioxide/silicon structure, and utilizing a back gate structure and heterojunction, the problem of low photoresponsivity and specific detectivity of existing PtSe2/GaAs heterojunction photodetectors under near-infrared light is solved, achieving photoelectric detection effects with high responsivity, high detectivity and wide spectral response.

CN115084309BActive Publication Date: 2025-01-07ZHEJIANG UNIV
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Patent Information

Application Number
CN202210713084.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-22
Publication Date
2025-01-07
Estimated Expiration
2042-06-22

AI Technical Summary

Technical Problem

Existing PtSe2/GaAs heterojunction-based photodetectors have low photoresponsivity and specific detectivity in the near-infrared region, making them difficult to apply to high-sensitivity optical detection.

Method used

A phototransistor with a platinum diselenide/silicon/silicon dioxide/silicon structure is introduced, and a back gate structure is introduced. A heterojunction is formed using an SOI substrate and a platinum diselenide layer, combined with a metal electrode. The fabrication methods include thermally assisted conversion, etc., to form a high-quality platinum diselenide thin film.

Benefits of technology

This achievement enables the photodetector to achieve high responsivity, high detectivity, and wide spectral response under zero bias voltage, thereby improving photoelectric detection performance and significantly enhancing responsivity and specific detectivity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a phototransistor based on platinum diselenide and SOI, a preparation method and its application. The vertical heterostructure and type II energy band arrangement of the PtSe2 / SOI phototransistor enable it to exhibit excellent photodetection performance in a wide spectral range from ultraviolet to near infrared, and the design of the back-gate structure effectively promotes the separation and transmission of photogenerated carriers, thereby improving the light response performance of the photodetector. The preparation method of the phototransistor is simple, low-cost and compatible with silicon processes. The photodetector composed of the phototransistor has excellent characteristics such as zero-bias drive, high response rate, high detection rate, high stability, and wide spectral response, paving the way for a new generation of silicon-based photodetectors.
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Description

Technical Field

[0001] The invention relates to the technical field of heterojunction and phototransistor based on heterojunction, and in particular to a phototransistor based on platinum diselenide and SOI, a preparation method and application thereof. Background Art

[0002] Photodetectors (PDs), as key optoelectronic devices that capture light signals and convert them into electrical energy, are essential components for many civil and military applications, such as imaging, optical communications, environmental monitoring, night vision, and security inspection. In the past few decades, the development of photodetectors based on new functional materials and structures has received extensive attention because of its great potential in achieving high-performance light detection and overcoming the shortcomings of traditional photodetectors. The developed new functional materials include zero-dimensional quantum dots, one-dimensional nanostructures, two-dimensional layered materials, organic semiconductors, hybrid perovskite materials, etc.

[0003] As a member of the two-dimensional transition metal dihalides, platinum diselenide (PtSe2) has excellent properties common to many two-dimensional materials, such as high carrier mobility, good air stability, and outstanding mechanical flexibility. In addition, platinum diselenide also has its own unique properties. For example, PtSe2 has a strong layer-related band structure. For example, a single layer of PtSe2 is a semiconductor (bandgap width is about 1.2eV). As the thickness continues to increase, the properties of PtSe2 will change from the semiconductor properties of thinner thickness (such as single layer, a few layers) to the semi-metallic properties of thicker thickness materials. These characteristics make PtSe2 widely used in the field of high-performance light detection. At present, the preparation process of PtSe2 thin films is relatively mature. Common preparation methods include chemical vapor deposition (CVD), molecular beam epitaxy (MBE) and thermal assisted conversion (TAC). Among them, TAC has low preparation cost and can achieve large-scale preparation of high-quality two-dimensional PtSe2 thin films at a relatively low temperature (400°C), and is compatible with traditional silicon processes.

[0004] Due to the excellent properties of PtSe2 and its simple preparation, there are many reports on the construction of heterojunction photodetectors based on PtSe2 (Longhui Zeng et al., Advanced Functional Materials, Vol. 28, 2018, 1705970). PtSe2 / GaAs heterojunctions have good rectification characteristics and photovoltaic effects, which enable them to be used as self-driven photodetectors working under zero bias. However, their photoresponsivity under near-infrared light (808nm) is only 262mA / W. Photodetectors based on two-terminal structures have low photoresponsivity and specific detection rate, making them difficult to be used in high-sensitivity light detection. Summary of the invention

[0005] In view of the shortcomings in the art, the present invention provides a phototransistor with a platinum diselenide / silicon / silicon dioxide / silicon structure. The introduction of the back-gate structure can effectively improve the performance of the photodetector. The phototransistor composed of this structure has excellent characteristics such as zero bias drive, high response rate, high detection rate, high stability, and wide spectral response, which paves the way for a new generation of photodetectors. The present invention adopts the following technical solutions:

[0006] A phototransistor based on platinum diselenide and SOI (silicon-on-insulator), wherein the phototransistor is a platinum diselenide / silicon / silicon dioxide / silicon structure, comprising:

[0007] SOI substrate;

[0008] A platinum diselenide layer is disposed on the SOI substrate to form a heterojunction structure with a portion of the top silicon layer of the SOI;

[0009] An electrode is disposed on the platinum diselenide layer and the top silicon layer of the SOI;

[0010] The heavily doped silicon in the bottom layer of the SOI is used as the back gate of the transistor, and the silicon dioxide layer in the SOI is used as the gate dielectric layer.

[0011] Optionally, the platinum diselenide layer has a thickness of 0.7 nm-25.0 nm. Experimental absorption spectrum test shows that the platinum diselenide film prepared by the present invention has semiconductor properties.

[0012] Optionally, the electrode is a metal material, preferably Ag or Al, and the electrode can be prepared by an appropriate preparation method according to the characteristics of the electrode material, such as thermal evaporation, electron beam deposition, sputtering, solution method, etc.

[0013] The present invention also provides a method for preparing a phototransistor based on platinum diselenide and SOI, comprising the following steps:

[0014] S1. forming a platinum diselenide thin film on an SOI substrate to form a platinum diselenide / silicon heterojunction structure;

[0015] S2, preparing the source and drain electrodes of the phototransistor on the platinum diselenide layer and the SOI top silicon to form a structure of electrode / platinum diselenide / silicon / electrode;

[0016] S3. The heavily doped silicon in the bottom layer of SOI is used as the back gate of the transistor, and the silicon dioxide layer in the SOI is used as the gate dielectric layer to form a platinum diselenide / silicon / silicon dioxide / silicon phototransistor.

[0017] Optionally, the step S1 specifically includes:

[0018] S1-1, setting a working area on an SOI substrate, wherein the working area is used to construct a platinum diselenide / silicon heterojunction;

[0019] S1-2, preparing an insulating layer outside the working area to isolate the working area, and there is no insulating layer in the working area and the silicon is exposed;

[0020] S1-3. Prepare a platinum diselenide film on a part of the working area to form a platinum diselenide / silicon heterojunction structure.

[0021] Optionally, the insulating layer material is one or a composite of more than one of SiO2, Al2O3, graphene oxide, boron nitride, and insulating polymer materials.

[0022] Specifically, a phototransistor based on platinum diselenide and SOI is prepared by using heavily doped silicon in the bottom layer of SOI as the back gate and the silicon dioxide layer in SOI as the gate dielectric layer. The phototransistor prepared by the present invention is:

[0023] The working area setting in step S1-1 is to transfer the defined working area pattern to the SOI substrate through the steps of coating, pre-baking, exposure, development, and hardening in a clean room;

[0024] The preparation of the insulating layer in step S1-2 can be carried out by different preparation methods according to different insulating layer materials. For example, insulating polymer materials can be prepared by solution methods such as spin coating. For boron nitride (h-BN), a transfer method or existing technology can be used to prepare it directly on Si. For oxides such as Al2O3 and SiO2, magnetron sputtering, atomic layer deposition (ALD) and other methods can be used for preparation.

[0025] In step S1-3, a platinum diselenide thin film is prepared in a part of the working area to form a platinum diselenide / silicon heterojunction structure;

[0026] In step S2, the source and drain electrodes of the phototransistor are prepared on the platinum diselenide layer and the top silicon layer of the SOI by a patterning process,

[0027] In step S3, the bottom heavily doped silicon in the SOI substrate is used as the back gate of the transistor, and the silicon dioxide layer is used as the gate dielectric layer.

[0028] The present invention can prepare the platinum diselenide thin film by conventional preparation methods, such as the aforementioned chemical vapor deposition (CVD), thermal assisted conversion (TAC), molecular beam epitaxy (MBE) and chemical vapor transport (CVT). Among them, the precursors that can be selected by the thermal assisted conversion method are platinum thin film and selenium powder, and the precursor reaction temperature is lower than 400° C., and the reaction is carried out in an inert atmosphere to form a PtSe2 thin film. This process is compatible with silicon-based CMOS technology.

[0029] The present invention also provides the application of the phototransistor based on platinum diselenide and SOI in the field of photodetectors. Since PtSe2 is a p-type semiconductor, the top layer Si of SOI is an n-type semiconductor, and the Fermi levels of the two are inconsistent, when p-PtSe2 and n-Si contact in the dark to form a heterojunction, the electrons in the n-type semiconductor will diffuse toward the p-type semiconductor, and the holes in the p-type semiconductor will diffuse toward the n-type semiconductor; due to the diffusion of electrons and holes, uncompensated, fixed donor ions (positive ions) and acceptor ions (negative ions) appear on the n-side and p-side close to each other, respectively, and the space charge establishes an electric field, namely the space charge region electric field, and the direction of the electric field is from the n-type semiconductor to the p-type semiconductor; and the existence of the space charge region electric field can enable the photodetector to quickly separate the photogenerated carriers generated by the incident light under zero bias to form a photocurrent;

[0030] When a voltage greater than the threshold voltage (V TH ) of the gate voltage (V G ), the depletion region of the PtSe2 / Si interface will be expanded, and the increase in the built-in electric field strength can promote the separation and transmission of photogenerated carriers, resulting in a significant increase in the photocurrent. Therefore, the PtSe2 / Si phototransistor has a good performance under the appropriate V G Under this effect, it will show even better light detection performance.

[0031] Compared with the prior art, the present invention has the following main advantages:

[0032] (1) Compared with the PtSe2 / Si heterojunction structure in the prior art, the present invention proposes for the first time a phototransistor based on the PtSe2 / Si heterojunction structure, which can significantly improve the photoelectric detection performance of the photodetector;

[0033] (2) The preparation method of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of the present invention is simple, and can obtain high-quality phototransistors at low temperature (400° C.) in a short time using relatively simple equipment. Its preparation process is compatible with silicon-based CMOS process, which improves preparation efficiency and output, and has low preparation cost;

[0034] (3) The platinum diselenide / silicon / silicon dioxide / silicon phototransistor of the present invention has excellent stability;

[0035] (4) The photodetector prepared by using the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of the present invention has excellent characteristics such as zero bias drive, high response rate, high detection rate, high stability, and wide spectral response. For example, when a gate voltage of 5V is applied, the response rate and specific detection rate under a light source of 808nm can reach 13.85A / W and 1.90×10 10Jones, and has excellent photoresponse in a wide spectral range from ultraviolet to near infrared (375nm to 940nm). BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a schematic structural diagram of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of the present invention;

[0037] Figure 2 The present invention is a flow chart for preparing a platinum diselenide / silicon / silicon dioxide / silicon phototransistor and an array thereof;

[0038] Figure 3 This is the characterization result of the platinum diselenide film prepared by the present invention; Figure 3 (a) is a scanning electron microscope photo; Figure 3 (b) is the Raman characterization spectrum of the platinum diselenide film, indicating that a PtSe2 film is obtained;

[0039] Figure 4 This is a diagram of electrical characteristics of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor prepared in Example 1; Figure 4 (a) is the device at V G = -2V to V G =Output characteristic curve within 4V range; Figure 4 (b) shows the device at V DS = -2V to V DS =1V range of transfer characteristic curves, where the inset is V DS =Transfer characteristic curve at 0V; Figure 4 (c) is the rectification ratio of the device; Figure 4 (d) is the dynamic photoresponse current of the device corresponding to different gate voltages applied under 532nm light source;

[0040] Figure 5 This is a characterization diagram of the photoelectric performance of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 when a gate voltage of 5V is applied; Figure 5 (a) shows the IT diagram of the device under 375nm light source of different intensities; Figure 5 (b) is the IT diagram of the device under 532nm light source of different intensities; Figure 5 (c) shows the IT diagram of the device under 808nm light source of different intensities; Figure 5 (d) is the IT diagram of the device under 940nm light source of different intensities;

[0041] Figure 6 This is a photoelectric performance characterization diagram of the platinum diselenide / silicon heterojunction photodetector prepared in Comparative Example 1; Figure 6(a) shows the IT diagram of the device under 375nm light source of different intensities; Figure 6 (b) is the IT diagram of the device under 532nm light source of different intensities; Figure 6 (c) shows the IT diagram of the device under 808nm light source of different intensities; Figure 6 (d) is the IT diagram of the device under 940nm light source of different intensities;

[0042] Figure 7 This is a comparison diagram of the photoelectric performance of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 and the platinum diselenide / silicon heterojunction photodetector of Comparative Example 1; Figure 7 (a) shows the relationship between the light intensity and responsivity of the two devices under 808nm light source; Figure 7 (b) shows the relationship between the light source intensity and the specific detectivity of the two devices under 808nm light source; Figure 7 (c) shows the change curves of the responsivity and specific detection rate of the two devices under the illumination of light sources of different wavelengths; DETAILED DESCRIPTION

[0043] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be understood that these embodiments and comparative examples are only described using the heavily doped silicon of the SOI bottom layer as the back gate of the transistor, which is only used to illustrate the present invention and is not used to limit the scope of the present invention. The experimental methods in the following embodiments where specific conditions are not specified are usually carried out under conventional conditions or under conditions recommended by the manufacturer.

[0044] The schematic diagram of the preparation process of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor and the photodetector based on the phototransistor of the present invention is as follows Figure 2 shown.

[0045] Example 1

[0046] Refer to the attached Figure 1-2 The structure and preparation steps of the phototransistor based on platinum diselenide and SOI of the present invention are as follows:

[0047] S1. Prepare a clean SOI substrate with a 1.5μm top silicon layer and a 1.0μm SiO2 insulating layer. Use a cutting pen to cut the SOI sheet into 15×15mm 2 The square substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning, and finally taken out and dried with nitrogen;

[0048] S2, using conventional micro-nano processing technology, i.e., photolithography, including coating, exposure, and development steps to define a working area on the SOI substrate;

[0049] S3, preparing an insulating layer: depositing a layer of SiO2 thin film by magnetron sputtering on the SOI substrate with a set working area (pattern);

[0050] S4, degumming: put the SOI substrate after SiO2 deposition into photoresist etching solution for degumming, then rinse the SOI substrate in deionized water, and finally blow dry with nitrogen. That is, for the whole SOI substrate, there is no SiO2 insulating layer grown in the working area, and SiO2 / SOI is outside the working area;

[0051] S5. Depositing a Pt film: using a patterning process technology to deposit a Pt film in a part of the working area; in this embodiment, the sputtering power and time of the magnetron sputtering system are controlled to prepare Pt films of different thicknesses, that is, Pt / SOI is formed in a part of the working area;

[0052] S6, selenized Pt film: Through a heat-assisted conversion process, the deposited Pt film is synthesized into a high-quality platinum diselenide film through a selenization process, thereby forming a platinum diselenide / silicon / silicon dioxide / silicon phototransistor, namely PtSe2 / SOI; through this step, a PtSe2 film is prepared on an SOI substrate, and its characterization results are as follows Figure 3 As shown;

[0053] S7. Prepare electrodes: Use a patterning process to prepare electrodes that form electrical contact with the platinum diselenide layer and electrodes that form electrical contact with the silicon layer as source and drain electrodes of the phototransistor, and use the heavily doped silicon at the bottom of the SOI as the back gate of the transistor, and the silicon dioxide layer in the SOI as the gate dielectric layer to obtain the attached Figure 1 The phototransistor in the

[0054] The insulating layer material of the present invention can be one or a composite of more than one of SiO2, Al2O3, graphene oxide, boron nitride, insulating polymers, etc. In this embodiment, SiO2 is used as the insulating layer; compared with other insulating layer materials, forming a SiO2 layer on SOI is a very simple and mature technology, and the preparation of different insulating layers can adopt different preparation methods according to different specific materials, including magnetron sputtering, solution method, atomic layer deposition, transfer and other technical methods.

[0055] In this embodiment, conventional techniques such as sputtering, electron beam deposition, etc. may be used to deposit the Pt thin film.

[0056] In this embodiment, conventional techniques such as sputtering, electron beam deposition, spin coating, etc. can be used to prepare electrodes to complete the preparation of phototransistors ( Figure 1 ).

[0057] The present invention can prepare the platinum diselenide thin film by conventional preparation methods, such as chemical vapor deposition (CVD), thermal assisted conversion (TAC), molecular beam epitaxy (MBE) and chemical vapor transport (CVT). Among them, the precursors that can be selected by the thermal assisted conversion method are platinum thin film and selenium powder, and the precursor reaction temperature is lower than 400° C. and the reaction is carried out in an inert atmosphere to form a PtSe2 thin film. This process is compatible with silicon-based CMOS technology.

[0058] In this embodiment, the present invention characterizes the performance of the prepared platinum diselenide / silicon / silicon dioxide / silicon phototransistor. The characterization results are as follows: Figure 4 , Figure 5 and Figure 7 shown.

[0059] Figure 4 This is a diagram of electrical characteristics of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor prepared in Example 1; Figure 4 (a) is the device at V G = -2V to V G =Output characteristic curve within 4V range; Figure 4 (b) shows the device at V DS = -2V to V DS =1V range of transfer characteristic curves, where the inset is V DS =Transfer characteristic curve at 0V; Figure 4 (c) is the rectification ratio of the device; Figure 4 (d) is the dynamic photoresponse current of the device corresponding to different gate voltages applied under 532nm light source;

[0060] Figure 5 This is a characterization diagram of the photoelectric performance of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 when a gate voltage of 5V is applied; Figure 5 (a) shows the IT diagram of the device under 375nm light source of different intensities; Figure 5 (b) is the IT diagram of the device under 532nm light source of different intensities; Figure 5 (c) shows the IT diagram of the device under 808nm light source of different intensities; Figure 5 (d) is the IT diagram of the device under 940nm light source of different intensities;

[0061] Figure 7 This is a comparison diagram of the photoelectric performance of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 and the platinum diselenide / silicon heterojunction photodetector of Comparative Example 1; Figure 7 (a) shows the relationship between the light intensity and responsivity of the two devices under 808nm light source; Figure 7(b) shows the relationship between the light source intensity and the specific detectivity of the two devices under 808nm light source; Figure 7 (c) shows the change curves of the responsivity and specific detection rate of the two devices under the illumination of light sources of different wavelengths;

[0062] Among them, responsivity is a physical quantity that describes the photoelectric conversion capability of the device. The responsivity is related to the device material and the wavelength of light. Specific detection rate is the ratio of the detector per unit surface area (1cm 2 ) and the spectral detection rate per unit bandwidth (1Hz), which is a parameter that characterizes the detector's ability to detect weak light signals. The calculation formula is as follows:

[0063]

[0064]

[0065] Where:

[0066] R—responsivity (A / W);

[0067] I p —Photocurrent (A);

[0068] I d —Dark current (A);

[0069] P—light intensity (W);

[0070] D*—Specific detection rate (cmHz 1 / 2 / W -1 ,Jones);

[0071] A—Device effective area (cm 2 );

[0072] B—Measurement circuit bandwidth (Hz);

[0073] NEP—Noise Equivalent Power (WHz 11 / 2 );

[0074] e—elementary charge (1.602×10 -19 C).

[0075] Comparative Example 1

[0076] S1. Prepare a clean SOI substrate with a 1.5μm top silicon layer and a 1.0μm SiO2 insulating layer. Use a cutting pen to cut the SOI sheet into 15×15mm 2 The square substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning, and finally taken out and dried with nitrogen;

[0077] S2, using conventional micro-nano processing technology, i.e., photolithography, including coating, exposure, and development steps to define a working area on the SOI substrate;

[0078] S3, preparing an insulating layer: depositing a layer of SiO2 thin film by magnetron sputtering on the SOI substrate with a set working area (pattern);

[0079] S4, degumming: put the SOI substrate after SiO2 deposition into photoresist etching solution for degumming, then rinse the SOI substrate in deionized water, and finally blow dry with nitrogen. That is, for the whole SOI substrate, there is no SiO2 insulating layer grown in the working area, and SiO2 / SOI is outside the working area;

[0080] S5. Depositing a Pt film: using a patterning process technology to deposit a Pt film in a part of the working area; in this embodiment, the sputtering power and time of the magnetron sputtering system are controlled to prepare Pt films of different thicknesses, that is, Pt / SOI is formed in a part of the working area;

[0081] S6 Pt selenide film: Through a heat-assisted conversion process, the deposited Pt film is synthesized into a high-quality platinum diselenide film through a selenization process, thereby forming a platinum diselenide / silicon heterojunction structure, namely PtSe2 / Si;

[0082] S7. Prepare electrodes: Use a patterning process to prepare electrodes that form electrical contact with the platinum diselenide layer and electrodes that form electrical contact with the silicon layer.

[0083] In this comparative example, conventional techniques such as sputtering, electron beam deposition, etc. can be used to deposit the Pt thin film.

[0084] In this comparative example, conventional techniques such as sputtering, electron beam deposition, spin coating, etc. can be used to prepare electrodes to complete the preparation of the photodetector.

[0085] For Comparative Example 1, the present invention characterized the performance of the prepared platinum diselenide / silicon heterogeneous photodetector, and the characterization results are as follows: Figure 6 and Figure 7 shown.

[0086] Figure 6 This is a photoelectric performance characterization diagram of the platinum diselenide / silicon heterojunction photodetector prepared in Comparative Example 1; Figure 6 (a) shows the IT diagram of the device under 375nm light source of different intensities; Figure 6 (b) is the IT diagram of the device under 532nm light source of different intensities; Figure 6 (c) shows the IT diagram of the device under 808nm light source of different intensities; Figure 6 (d) is the IT diagram of the device under 940nm light source of different intensities;

[0087] Figure 7 This is a comparison diagram of the photoelectric performance of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 and the platinum diselenide / silicon heterojunction photodetector of Comparative Example 1; Figure 7 (a) shows the relationship between the light intensity and responsivity of the two devices under 808nm light source; Figure 7 (b) shows the relationship between the light source intensity and the specific detectivity of the two devices under 808nm light source; Figure 7 (c) shows the change curves of the responsivity and specific detection rate of the two devices under the illumination of light sources of different wavelengths;

[0088] By comparing Example 1 with Comparative Example 1, it can be seen that the introduction of the back gate structure can greatly improve the photoelectric response performance of the photodetector. In Example 1, applying a gate voltage of 5V can increase the built-in electric field of the PtSe2 / Si interface to promote the separation and transmission of photogenerated carriers, thereby achieving the purpose of improving the responsivity and specific detection rate.

[0089] The present invention compares the performance of related photodetectors, as summarized in Table 1. Table 1 summarizes the device performance of Example 1 and Comparative Example 1 and the performance parameters of other reported photodetectors with similar device structures.

[0090] Table 1

[0091]

[0092] Note: The references in Table 1 are as follows:

[0093] [1]Ma, M.; Chen, H.; Zhou, K.; Xie, C.; Liang, Y.; Wang, L.; Wu, C.; Yang, W.; Guo, J.; Luo, L. Applications.J.Mater.Chem.C 2021,9,2823-2832.

[0094] [2] Xiao, H.; Liang, T.; Xu, J.;

[0095] [3]Zeng,L.;Lin,S.;Lou,Z.;Yuan,H.;Tsang,YHUltrafast and SensitivePhotodetector based on a PtSe2 / silicon Nanowire Array Heterojunction with aMultiband Spectral Response from 200 to 1550nm.NPG Asia Mater.2018,10,352.

[0096] [4]Xu,Y.;Shen,H.;Wu,D.;Zhao,Q.;Wang,Z.;Ge,J.;Zhang,W.Self-PoweredNear-Infrared MoS2 / n-Si Photodetectors with Al2O3InterfacePassivation.J.Alloys Compd.2022,902,163878.

[0097] [5] Zhang, Y.; Yu, Y.; Mi, L.; Wang, H.; Zhu, Z.; Wu, Q.; Zhang, Y.; Jiang, Y. In SituFabrication of Vertical Multilayered MoS2 / Si Homotype Heterojunction for High-Speed ​​Visible-Near-Infrared Photodetectors.Small 2016,12,1062-1071.

[0098] By Example 1 Figure 4 (a) It can be obtained that the output curve of the device is regulated by the gate voltage; Figure 4 (b) It can be obtained that when V DS =0V, the threshold voltage of the device is -1.8V; Figure 4(c) It can be seen that the device has good rectification characteristics. When V DS = ±2V, the rectification ratio is 9.78(V G =4V) to 3230(V G =-4V); through Figure 4 (d) It can be obtained that applying a positive gate voltage can effectively increase the photocurrent of the device, indicating that applying a positive gate voltage can effectively enhance the built-in electric field of the phototransistor and promote the separation of photogenerated carriers.

[0099] By Example 1 Figure 5 It can be seen that under the irradiation of the same wavelength light source, the greater the incident light power density, the greater the photocurrent of the device. This shows that under the irradiation of higher power density incident light, more photogenerated carriers are generated at the PtSe2 / Si interface and separated by the built-in electric field, thereby generating a higher photocurrent.

[0100] pass Figure 5 Example 1 and Figure 6 Compared with the comparative example 1, when the wavelength and power of the incident light are the same, the photocurrent of the device when a gate voltage of 5V is applied is significantly higher than that of the device without a gate voltage, which indicates that the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of Example 1 has better photoelectric detection performance than the platinum diselenide / silicon heterojunction photodetector of comparative example 1.

[0101] pass Figure 7 By comparing Example 1 of (a) and (b) with Comparative Example 1, it can be seen that under the irradiation of 808nm light source, the responsivity of the device is greatly improved from 1.07A / W to 13.85A / W; the specific detection rate is increased from 6.60×10 9 Jones has significantly improved to 1.90×10 10 Jones. Figure 7 (c) It can be obtained that the device also responds well to light sources with wavelengths of 375nm, 532nm, and 940nm, so the response range of the device can cover wavelengths from 375nm to 940nm, among which it has the best photoelectric performance under the irradiation of 808nm light source.

[0102] By comparing the prior art with Table 1, it can be obtained that the comprehensive performance (responsiveness, specific detection rate, etc.) of the phototransistor based on platinum diselenide / silicon / silicon dioxide / silicon of the present invention is better than that of the photodetector based on PtSe2 / pyramid-Si, MoS2 / Si, PbI2 / CH3NH3PbI3.

[0103] Due to the limitation of test conditions, the present invention uses 375nm, 532nm, 808nm and 940nm lasers to test the photoelectric response of the platinum diselenide / silicon / silicon dioxide / silicon phototransistor, but does not exclude the response of the phototransistor of the present invention in other spectral ranges.

[0104] The excellent parameters obtained by the above characterization indicate that the platinum diselenide / silicon / silicon dioxide / silicon phototransistor of the present invention has high responsivity and specific detection rate, and a wide response range, and can meet the needs of practical applications.

[0105] In the embodiment of the present invention, the thickness of platinum diselenide is in the range of 0.7-25.0 nm. Films with different thicknesses have different semiconductor properties (band structures), resulting in different responses to light of different wavelengths.

[0106] It should be noted that the present invention only focuses on the two-dimensional PtSe2 and silicon phototransistor, but in the two-dimensional material system, there are other two-dimensional semiconductor materials with narrow band gaps when the thickness is less than a certain value, such as PtS2, PdS2, PdSe2, etc. The concept or structure of the present invention is also applicable to the phototransistors formed by these two-dimensional materials and silicon, and their application as photodetectors.

[0107] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the invention technical solution formed by a specific combination of the above technical features, but also should cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the novel concept of the invention.

Claims

1. A phototransistor based on platinum diselenide and SOI, characterized in that the phototransistor is a platinum diselenide / silicon / silicon dioxide / silicon structure, comprising: SOI substrate; A platinum diselenide layer is disposed on the SOI substrate to form a heterojunction structure with a portion of the top silicon layer of the SOI; Electrodes are respectively arranged on the platinum diselenide layer and the top silicon layer of the SOI to form a structure of electrode / platinum diselenide / silicon / electrode; Among them, the heavily doped silicon at the bottom of SOI serves as the back gate of the transistor, and the silicon dioxide layer in SOI serves as the gate dielectric layer.

2. The phototransistor based on platinum diselenide and SOI according to claim 1, characterized in that: The thickness of the platinum diselenide layer is 0.7nm-25.0nm.

3. The phototransistor based on platinum diselenide and SOI according to claim 1, characterized in that: The electrode is a metal material electrode.

4. A method for preparing a phototransistor based on platinum diselenide and SOI, characterized in that: The steps include: S1. forming a platinum diselenide thin film on an SOI substrate to form a platinum diselenide / silicon heterojunction structure; S2, preparing the source and drain electrodes of the phototransistor on the platinum diselenide layer and the SOI top silicon to form a structure of electrode / platinum diselenide / silicon / electrode; S3. The heavily doped silicon at the bottom layer of SOI is used as the back gate of the transistor, and the silicon dioxide layer in SOI is used as the gate dielectric layer to form a platinum diselenide / silicon / silicon dioxide / silicon phototransistor.

5. The method for preparing a phototransistor based on platinum diselenide and SOI according to claim 4, characterized in that: The step S1 specifically includes: S1-1, setting a working area on an SOI substrate, wherein the working area is used to construct a platinum diselenide / silicon heterojunction; S1-2, preparing an insulating layer outside the working area to isolate the working area, and there is no insulating layer in the working area and the silicon is exposed; S1-3. Prepare a platinum diselenide film on a part of the working area to form a platinum diselenide / silicon heterojunction structure.

6. The method for preparing a phototransistor based on platinum diselenide and SOI according to claim 5, characterized in that: The insulating layer material is one or a composite of more than one of SiO2, Al2O3, graphene oxide, boron nitride, and insulating polymer materials.

7. Application of the phototransistor based on platinum diselenide and SOI according to any one of claims 1 to 3 in the field of photodetectors.

Citation Information

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