Circuit board connecting structure and manufacturing method thereof
By staggering the stacking of circuit substrates and electroplating conductive parts in the through holes to connect the conductive circuit layers, the problem of the high height of the circuit board connection structure is solved, the compact design of the electronic device is achieved, and the signal transmission and heat dissipation performance are improved.
Patent Information
- Application Number
- CN202110310329.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-03-23
- Publication Date
- 2025-10-14
- Estimated Expiration
- 2041-03-23
AI Technical Summary
The existing circuit board connection structure easily leads to a large product height when connected to electronic devices, which makes it difficult to meet the compact design requirements of modern electronic equipment.
By staggering the first and second circuit substrates and setting a glue layer between them to form a step structure, the two conductive circuit layers are connected by electroplating conductive parts in the through holes, the height of the electronic device is reduced, and the conductive parts are formed by etching and electroplating to achieve electrical connection.
It effectively reduces the height of electronic devices, improves the flatness and heat dissipation performance of the circuit board connection structure, reduces signal radiation energy, and enhances high-frequency signal transmission capabilities.
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Figure CN115119422B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of circuit board connecting structure, and particularly relates to a circuit board connecting structure and a manufacturing method thereof. BACKGROUND
[0002] At present, the manufacturing method of the circuit board connecting structure generally comprises a series of processes such as drilling, black shadow, plating hole copper and etching of a double-sided copper-clad substrate, and combining with a cover film. When the circuit board connecting structure is connected with an electronic device, it is easy to cause the height of the final product to be large. SUMMARY
[0003] Therefore, the present application provides a manufacturing method of a circuit board connecting structure, which can reduce the height of an electronic device.
[0004] The present application also provides a circuit board connecting structure manufactured by the manufacturing method.
[0005] The present application provides a manufacturing method of a circuit board connecting structure, comprising the following steps:
[0006] A first circuit substrate is provided, comprising a first dielectric layer and a first conductive circuit layer located on the first dielectric layer;
[0007] A second circuit substrate is provided, comprising a second dielectric layer and a second conductive circuit layer located on the second dielectric layer;
[0008] The first circuit substrate, the adhesive layer and the second circuit substrate are sequentially laminated and compressed to make the first circuit substrate and the second circuit substrate mutually staggered along the lamination direction to form a first step, so that an intermediate body is obtained, wherein the first conductive circuit layer located at the first step forms a first solder pad;
[0009] A through hole is formed in the intermediate body; and
[0010] Electroplating is performed in the through hole to form a conductive part, so that the conductive part electrically connects the first conductive circuit layer and the second conductive circuit layer, thereby obtaining the circuit board connecting structure.
[0011] The present application also provides a circuit board connecting structure, comprising:
[0012] A first circuit substrate, comprising a first dielectric layer and a first conductive circuit layer located on the first dielectric layer;
[0013] A second circuit substrate, comprising a second dielectric layer and a second conductive circuit layer located on the second dielectric layer; and
[0014] an adhesive layer, the adhesive layer being disposed between the first circuit substrate and the second circuit substrate, wherein the first circuit substrate and the second circuit substrate are offset from each other along a stacking direction to form a first step, and the first conductive circuit layer located at the first step forming a first solder pad;
[0015] A through hole is provided in the circuit board connection structure, a conductive portion is provided in the through hole, and the conductive portion electrically connects the first conductive circuit layer and the second conductive circuit layer.
[0016] In the present invention, the first circuit substrate and the second circuit substrate are offset to form the first step, and the electronic device is arranged on the first step, thereby reducing the height of the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 1 is a schematic structural diagram of a first single-sided copper-clad substrate provided in some embodiments of the present invention.
[0018] Figure 2 Schematic diagram of the structure of a second single-sided copper clad substrate provided in some embodiments of the present invention.
[0019] Figure 3 It will Figure 1 The diagram shows the structure of the first copper foil layer in the first single-sided copper clad substrate after etching.
[0020] Figure 4 It will Figure 2 The diagram shows the structure of the second copper foil layer in the second single-sided copper clad substrate after etching.
[0021] Figure 5 Schematic diagram of the structure of the adhesive layer provided in some embodiments of the present invention.
[0022] Figure 6 It will Figure 3 The first circuit substrate shown, Figure 5 The glue layer shown and Figure 4 The diagram shows a schematic diagram of the structure of the second circuit substrate after being stacked and pressed in sequence.
[0023] Figure 7 is Figure 6 Schematic diagram of the structure after a through hole is opened in the intermediate body shown.
[0024] Figure 8 is Figure 7 The schematic diagram shows a structure in which a first dry film is formed on the surface of the first pad and on two opposite sides of the first conductive circuit layer, and a second dry film is formed on the surface of the second pad and on two opposite sides of the second conductive circuit layer.
[0025] Figure 9 isFigure 8 Schematic diagram of the structure after a conductor is formed in the through hole shown.
[0026] Figures 9A to 9I is Figure 8 Diagram showing the mechanism of conductor formation in through-holes.
[0027] Figure 10 It will Figure 9 Schematic diagram of the structure after the conductor is partially etched.
[0028] Figure 11 is Figure 10 The diagram shows a structure after a first solder mask layer is formed on the first surface and a second solder mask layer is formed on the second surface.
[0029] Figure 12 It will Figure 11 The schematic diagram of the structure of the circuit board connection structure obtained after the first dry film and the second dry film are removed is shown.
[0030] Description of main component symbols
[0031] Circuit board connection structure 100
[0032] First single-sided copper clad substrate 10
[0033] First dielectric layer 101
[0034] First copper foil layer 102
[0035] First conductive circuit layer 103
[0036] First pad 1031
[0037] Second single-sided copper clad substrate 20
[0038] Second dielectric layer 201
[0039] Second copper foil layer 202
[0040] Second conductive circuit layer 203
[0041] Second pad 2031
[0042] First circuit substrate 30
[0043] Second circuit substrate 40
[0044] Adhesive layer 50
[0045] Intermediate 60
[0046] First step 61
[0047] Second step 62
[0048] Through hole 63
[0049] First dry film 70
[0050] Second dry film 71
[0051] Conductor 80
[0052] Potion 81
[0053] Copper particles 82
[0054] Conductive portion 83
[0055] First surface 831
[0056] Second surface 832
[0057] First solder resist layer 90
[0058] Second solder resist layer 91
[0059] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0060] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0061] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.
[0062] In order to further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the present invention is described in detail below in conjunction with the accompanying drawings and preferred embodiments.
[0063] Some embodiments of the present invention provide a method for manufacturing a circuit board connection structure, comprising the following steps:
[0064] Step S11, please refer to Figure 1 , providing a first single-sided copper clad substrate 10.
[0065] The first single-sided copper clad substrate 10 includes a first dielectric layer 101 and a first copper foil layer 102 located on the first dielectric layer 101 .
[0066] The material of the first dielectric layer 101 can be selected from one of epoxy resin, polypropylene (PP), BT resin, polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and the like. In this embodiment, the material of the first dielectric layer 101 is polyimide.
[0067] At step S12, referring to Figure 2 , a second single-sided copper-clad substrate 20 is provided.
[0068] The second single-sided copper-clad substrate 20 includes a second dielectric layer 201 and a second copper foil layer 202 on the second dielectric layer 201.
[0069] The material of the second dielectric layer 201 can be selected from one of epoxy resin, polypropylene (PP), BT resin, polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and the like. In this embodiment, the material of the second dielectric layer 201 is polyimide.
[0070] At step S13, referring to Figure 3 , the first copper foil layer 102 is etched to form a first conductive circuit layer 103, thereby obtaining a first circuit substrate 30.
[0071] The first conductive circuit layer 103 can be formed by exposure and development.
[0072] At step S14, referring to Figure 4 , the second copper foil layer 202 is etched to form a second conductive circuit layer 203, thereby obtaining a second circuit substrate 40.
[0073] The second conductive circuit layer 203 can be formed by exposure and development.
[0074] At step S15, referring to Figure 5 , a glue layer 50 is provided.
[0075] The material of the adhesive layer 50 can be epoxy resin or glass fiber. The adhesive layer 50 has a low dielectric constant, which is beneficial to the transmission of high-frequency signals in the circuit board connection structure.
[0076] Step S16, referring to Figure 6 , the first circuit substrate 30, the adhesive layer 50 and the second circuit substrate 40 are sequentially laminated and pressed to obtain an intermediate body 60.
[0077] Specifically, the adhesive layer 50 is filled into the first conductive circuit layer 103 and the second conductive circuit layer 203.
[0078] The first circuit substrate 30 and the second circuit substrate 40 are staggered in the lamination direction to form a first step 61 and a second step 62. The first step 61 and the second step 62 are located at two ends of the intermediate body 60, respectively.
[0079] The first conductive circuit layer 103 at the first step 61 forms a first solder pad 1031, and the second conductive circuit layer 203 at the second step 62 forms a second solder pad 2031. The first solder pad 1031 is used to electrically connect an external electronic device (not shown), and the second solder pad 2031 is used to electrically connect another external electronic device (not shown). The first solder pad 1031 and the second solder pad 2031 are opposite in direction. The first step 61 and the second step 62 can reduce the height of the electronic device.
[0080] Step S17, referring to Figure 7 , a through hole 63 is formed in the intermediate body 60.
[0081] The through hole 63 sequentially penetrates the first dielectric layer 101, the first conductive circuit layer 103, the adhesive layer 50, the second conductive circuit layer 203 and the second dielectric layer 201.
[0082] In this embodiment, the through hole 63 can be formed by laser drilling.
[0083] Step S18, referring to Figure 8 , a first dry film 70 is formed on the surface of the first solder pad 1031 and the two opposite sides of the first conductive circuit layer 103, and a second dry film 71 is formed on the surface of the second solder pad 2031 and the two opposite sides of the second conductive circuit layer 203.
[0084] The first dry film 70 is used to protect the first pad 1031 and the first conductive circuit layer 103 during subsequent electroplating, and the second dry film 71 is used to protect the second pad 2031 and the second conductive circuit layer 203 during subsequent electroplating.
[0085] Step S19, please refer to Figure 9 The through hole 63 is electroplated to form a conductor 80.
[0086] Specifically, please refer to Figures 9A to 9I The through hole 63 is filled with a plating solution 81, and the concentration of the plating solution 81, the electroplating current and the electroplating time are set. Under the action of the current ions, the copper ions in the plating solution 81 first gather from the hole wall of the through hole 63 adjacent to the first conductive circuit layer 103 and the second conductive circuit layer 203 to form copper particles 82. The copper particles 82 gradually accumulate between the upper and lower copper particles 82, and gradually connect in the middle. Further, the copper particles 82 are accumulated outward, and finally the conductor 80 is formed.
[0087] The upper surface and the lower surface of the conductor 80 are concave. The conductor 80 can fill the through hole 63, and the surface of the through hole 63 has no convex points, which is beneficial to improve the flatness of the subsequent circuit board connection structure.
[0088] Step S20, please refer to Figure 10 The conductor 80 in the through hole 63 corresponding to the first dielectric layer 101 and the second dielectric layer 201 is etched to form a conductive part 83.
[0089] After etching, the thickness of the conductive part 83 can be reduced.
[0090] The conductive part 83 includes a first surface 831 and a second surface 832 opposite to the first surface 831. The first surface 831 is substantially lower than the surface of the first dielectric layer 101 adjacent to the first conductive circuit layer 103, and the second surface 832 is substantially lower than the surface of the second dielectric layer 201 adjacent to the second conductive circuit layer 203.
[0091] The conductive part 83 is used to electrically connect the first conductive circuit layer 103 and the second conductive circuit layer 203.
[0092] The conductive part 83 is prepared by the electroplating method of the present application, which can reduce the process of hole baking compared with the method of filling conductive paste in the hole and then baking in the prior art.
[0093] Step S21, please refer to Figure 11 A first solder mask layer 90 is formed on the first surface 831, and a second solder mask layer 91 is formed on the second surface 832.
[0094] The first solder resist layer 90 and the second solder resist layer 91 may be made of solder resist ink, such as green ink, and are used to protect the conductive portion 83 .
[0095] In this embodiment, the first solder mask layer 90 protrudes from the first dielectric layer 101 away from the surface of the first conductive circuit layer 103 , and the second solder mask layer 91 protrudes from the second dielectric layer 201 away from the surface of the second conductive circuit layer 203 .
[0096] The present invention reduces the thickness of the conductive portion 83 through etching, forms a first solder mask 90 on the first surface 831, and forms a second solder mask 91 on the second surface 832, thereby enhancing the insulation effect of the conductive portion 83. Furthermore, the conductive portion 83 is a copper pillar without a through hole (i.e., there is no void within the through hole 63), which facilitates heat dissipation and signal aggregation within the circuit board connection structure 100 and reduces external radiation energy from the hole.
[0097] Step S22, see Figure 12 , removing the first dry film 70 and the second dry film 71 to obtain the circuit board connection structure 100.
[0098] See also Figure 12 Some embodiments of the present invention further provide a circuit board connection structure 100 , which includes a first circuit substrate 30 , a second circuit substrate 40 , an adhesive layer 50 , a first solder mask layer 90 , and a second solder mask layer 91 .
[0099] The first circuit substrate 30 includes a first dielectric layer 101 and a first conductive circuit layer 103 located on the first dielectric layer 101 .
[0100] The material of the first dielectric layer 101 can be selected from epoxy resin, polypropylene (PP), BT resin, polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In this embodiment, the material of the first dielectric layer 101 is polyimide.
[0101] The second circuit substrate 40 includes a second dielectric layer 201 and a second conductive circuit layer 203 located on the second dielectric layer 201 .
[0102] The material of the second dielectric layer 201 can be selected from epoxy resin, polypropylene (PP), BT resin, polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In this embodiment, the material of the second dielectric layer 201 is polyimide.
[0103] The adhesive layer 50 is disposed between the first circuit substrate 30 and the second circuit substrate 40, and the adhesive layer 50 fills the first conductive circuit layer 103 and the second conductive circuit layer 203. The first circuit substrate 30 and the second circuit substrate 40 are offset from each other along the stacking direction to form a first step 61 and a second step 62. The first step 61 and the second step 62 are located at opposite ends of the circuit board connection structure 100.
[0104] The adhesive layer 50 may be made of epoxy resin or glass fiber. The adhesive layer 50 has a relatively low dielectric constant, thereby facilitating the transmission of high-frequency signals in the circuit board connection structure 100 .
[0105] The first conductive circuit layer 103 located at the first step 61 forms a first solder pad 1031, and the second conductive circuit layer 203 located at the second step 62 forms a second solder pad 2031. The first solder pad 1031 is used to electrically connect to an external electronic device (not shown), and the second solder pad 2031 is used to electrically connect to another external electronic device (not shown). The first solder pad 1031 and the second solder pad 2031 are oriented in opposite directions. The first step 61 and the second step 62 can reduce the height of the electronic device.
[0106] The circuit board connection structure 100 is provided with a through hole 63 , wherein the through hole 63 sequentially passes through the first dielectric layer 101 , the first conductive circuit layer 103 , the adhesive layer 50 , the second conductive circuit layer 203 , and the second dielectric layer 201 .
[0107] A conductive portion 83 is disposed within the through hole 63. The conductive portion 83 includes a first surface 831 and a second surface 832 opposite the first surface 831. The first surface 831 is substantially lower than the surface of the first dielectric layer 101 adjacent to the first conductive circuit layer 103, and the second surface 832 is substantially lower than the surface of the second dielectric layer 201 adjacent to the second conductive circuit layer 203.
[0108] The conductive portion 83 is used to electrically connect the first conductive circuit layer 103 and the second conductive circuit layer 203 .
[0109] The conductive portion 83 is a copper column without a through hole (ie, there is no gap in the through hole 63 ), which is beneficial to the heat dissipation and signal aggregation of the circuit board connection structure 100 and can reduce the external radiation energy of the hole.
[0110] In addition, the conductive portion 83 can fill the through hole 63 , and the surface of the through hole 63 has no bumps, which is beneficial for improving the flatness of the circuit board connection structure 100 .
[0111] The first solder mask layer 90 is disposed on the first surface 831, and the second solder mask layer 91 is disposed on the second surface 832. Both the first solder mask layer 90 and the second solder mask layer 91 may be made of solder mask ink, such as green ink. Both the first solder mask layer 90 and the second solder mask layer 91 are used to protect the conductive portion 83.
[0112] In this embodiment, the first solder mask layer 90 protrudes from the first dielectric layer 101 away from the surface of the first conductive circuit layer 103 , and the second solder mask layer 91 protrudes from the second dielectric layer 201 away from the surface of the second conductive circuit layer 203 .
[0113] In the present invention, the first circuit substrate 30 and the second circuit substrate 40 are staggered to form the first step 61 and the second step 62 . Electronic components are disposed on the first step 61 and the second step 62 , thereby reducing the height of the electronic components.
[0114] The adhesive layer 50 in the present invention has a relatively low dielectric constant, which is beneficial for the transmission of high-frequency signals in the circuit board connection structure 100 .
[0115] In addition, the conductive portion 83 is a copper column without a through hole, which is beneficial to the heat dissipation and signal aggregation of the circuit board connection structure 100 and can reduce the external radiation energy of the hole.
[0116] The above description is only an optimized specific embodiment of the present invention, but it is not limited to this embodiment in actual application. For those skilled in the art, other variations and changes made based on the technical concept of the present invention should fall within the scope of protection of the present invention.
Claims
1. A method for manufacturing a circuit board connection structure, characterized in that: The following steps are involved: Providing a first circuit substrate, comprising a first dielectric layer and a first conductive circuit layer located on the first dielectric layer; Providing a second circuit substrate, comprising a second dielectric layer and a second conductive circuit layer located on the second dielectric layer; stacking and pressing the first circuit substrate, the adhesive layer, and the second circuit substrate in sequence, so that the first circuit substrate and the second circuit substrate are offset from each other along the stacking direction to form a first step, thereby obtaining an intermediate body, wherein the first conductive circuit layer located at the first step forms a first solder pad; opening a through hole in the intermediate body; as well as Electroplating is performed in the through hole to form a conductive portion, wherein the conductive portion is a copper column, and the conductive portion is electrically connected to the first conductive circuit layer and the second conductive circuit layer, thereby obtaining the circuit board connection structure.
2. The method for manufacturing a circuit board connection structure according to claim 1, wherein: The first circuit substrate and the second circuit substrate are offset from each other along the stacking direction to form a second step. The second step and the first step are respectively located at two ends of the intermediate body. The second conductive circuit layer located at the second step forms a second solder pad.
3. The method for manufacturing a circuit board connection structure according to claim 1, wherein: The electroplating comprises: forming a conductor in the through hole, wherein the upper and lower surfaces of the conductor are concave; and The conductive body in the through hole corresponding to the first dielectric layer and the second dielectric layer is etched to form the conductive portion.
4. The method for manufacturing a circuit board connection structure according to claim 2, wherein: The conductive portion includes a first surface and a second surface opposite to the first surface, the first surface being lower than a surface of the first dielectric layer adjacent to the first conductive circuit layer, and the second surface being lower than a surface of the second dielectric layer adjacent to the second conductive circuit layer. The manufacturing method further includes: forming a first solder resist layer on the first surface; and A second solder resist layer is formed on the second surface.
5. The method for manufacturing a circuit board connection structure according to claim 4, wherein: After the through hole is formed, the method further comprises: forming a first dry film on a surface of the first pad and two opposite surfaces of the first conductive circuit layer; and forming a second dry film on the surface of the second bonding pad and on two opposite sides of the second conductive circuit layer; After forming the first solder resist layer and the second solder resist layer, the method further includes: removing the first dry film; and The second dry film is removed.
6. A circuit board connection structure, characterized in that: include: A first circuit substrate, comprising a first dielectric layer and a first conductive circuit layer located on the first dielectric layer; A second circuit substrate, comprising a second dielectric layer and a second conductive circuit layer located on the second dielectric layer; an adhesive layer, the adhesive layer being disposed between the first circuit substrate and the second circuit substrate, wherein the first circuit substrate and the second circuit substrate are offset from each other along a stacking direction to form a first step, and the first conductive circuit layer located at the first step forming a first solder pad; The circuit board connection structure has a through hole, a conductive portion is provided in the through hole, the conductive portion is a copper column, the conductive portion electrically connects the first conductive circuit layer and the second conductive circuit layer, and the conductive portion includes a first surface and a second surface opposite to the first surface; a first solder resist layer disposed on the first surface; and A second solder resist layer is disposed on the second surface.
7. The circuit board connection structure according to claim 6, wherein: The first circuit substrate and the second circuit substrate are offset from each other along the stacking direction to form a second step. The second step and the first step are respectively located at two ends of the circuit board connection structure. The second conductive circuit layer located at the second step forms a second solder pad.
8. The circuit board connection structure according to claim 6, wherein: The first surface is lower than a surface of the first dielectric layer adjacent to the first conductive circuit layer, and the second surface is lower than a surface of the second dielectric layer adjacent to the second conductive circuit layer.
9. The circuit board connection structure according to claim 6, wherein: The adhesive layer is made of epoxy resin or glass fiber.
Citation Information
Patent Citations
Stepped multilayer PCB structure and preparation method thereof
CN110785003A