Integrated circuit products and their chip layout

Abstract

The present invention proposes an integrated circuit product and a chip arrangement thereof, wherein the integrated circuit product comprises: a first chip to a twelfth chip. The first chip to the fourth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and the first chip is adjacent to the second chip and the fourth chip. The fifth chip to the eighth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the fifth chip to the eighth chip are not adjacent. The ninth chip to the twelfth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the ninth chip to the twelfth chip are not adjacent. The integrated circuit product of the present invention can make full use of the substrate area, avoid chip pin waste, and facilitate communication between logic chips.

Description

Technical Field

[0001] The present invention relates to integrated circuit (IC) packaging, and more particularly to the floor plan arrangement of chips and / or chiplets (hereinafter collectively referred to as chips) of the integrated circuit packaging. Background Art

[0002] Advanced packaging is the current trend of integrated circuits. However, poor chip layout may have the following disadvantages: wasted area (resulting in finished products that are too large and lack competitiveness), poor chip heat dissipation (reducing chip performance), difficult output and / or input routing (increasing packaging difficulty) and / or unsatisfactory relative position of the chip (causing waste of chip pins). Therefore, a chip layout is needed to solve at least one of the above problems. Summary of the invention

[0003] In view of this, how to alleviate or eliminate the deficiencies in chip arrangement in the above-mentioned related fields is indeed a problem to be solved.

[0004] The present invention provides an embodiment of an integrated circuit product, which includes: a first chip; a second chip; a third chip; a fourth chip; a fifth chip; a sixth chip; a seventh chip; an eighth chip; a ninth chip; a tenth chip; an eleventh chip; and a twelfth chip. The first chip, the second chip, the third chip, and the fourth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and the first chip is adjacent to the second chip and the fourth chip. The fifth chip, the sixth chip, the seventh chip, and the eighth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the fifth chip, the sixth chip, the seventh chip, and the eighth chip are not adjacent. The ninth chip, the tenth chip, the eleventh chip, and the twelfth chip are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the ninth chip, the tenth chip, the eleventh chip, and the twelfth chip are not adjacent.

[0005] The present invention also provides an embodiment of an integrated circuit product, which includes: a first chip; a second chip; a third chip; a fourth chip; a fifth chip; a sixth chip; a seventh chip; an eighth chip; a ninth chip; a tenth chip; an eleventh chip; and a twelfth chip. The first chip, the second chip, the third chip, the fourth chip, the fifth chip, the sixth chip, the seventh chip, the eighth chip, the ninth chip, the tenth chip, the eleventh chip, and the twelfth chip are substantially located on a plane. If the first chip is rotated ninety degrees relative to the center of the integrated circuit product on the plane, the first chip substantially overlaps with the second chip or the fourth chip, and if the first chip is rotated one hundred and eighty degrees relative to the center on the plane, the first chip substantially overlaps with the third chip. If the fifth chip is rotated ninety degrees relative to the center on the plane, the fifth chip substantially overlaps with the sixth chip or the eighth chip, and if the fifth chip is rotated one hundred and eighty degrees relative to the center on the plane, the fifth chip substantially overlaps with the seventh chip. If the ninth chip is rotated ninety degrees relative to the center on the plane, the ninth chip substantially overlaps with the tenth chip or the twelfth chip, and if the ninth chip is rotated one hundred and eighty degrees relative to the center on the plane, the ninth chip substantially overlaps with the eleventh chip.

[0006] One of the advantages of the above embodiment is that the substrate area can be fully utilized, chip pin waste can be avoided, and communication between logic chips is facilitated.

[0007] Another advantage of the above embodiment is that it can fully utilize the substrate area, simplify the complexity of the mask, and improve the competitiveness of integrated circuit products.

[0008] Other advantages of the present invention will be described in more detail with reference to the following description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The drawings described herein are used to provide further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute improper limitations on the present application.

[0010] Figure 1 FIG. 4 is a schematic diagram of a simplified chip layout of an integrated circuit product according to an embodiment of the present invention.

[0011] Figure 2 A simplified side view of an integrated circuit product is shown in accordance with an embodiment of the present invention.

[0012] Figure 3 A simplified side view of an integrated circuit product is shown in accordance with another embodiment of the present invention.

[0013] Figure 4 The center point and quadrant distribution of the integrated circuit product of the present invention are shown.

[0014] Figure 5 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0015] Figure 6 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0016] Figure 7 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0017] Figure 8 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0018] Fig. 9 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0019] Fig.10 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0020] Fig.11 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0021] Fig.12 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0022] Fig.13 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0023] Fig.14 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0024] Fig.15 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention.

[0025] Description of reference numerals:

[0026] 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200 integrated circuit products

[0027] 112, 312, 412 First Logic Chip

[0028] 114, 314, 414 Second logic chip

[0029] 116, 316, 416 Third logic chip

[0030] 118, 318, 418 Fourth logic chip

[0031] 122, 322, 422, 722, 922, 1022 First memory chip

[0032] 124, 332, 432, 724, 932, 1032 Second memory chip

[0033] 126, 324, 424, 726, 924, 1024 Third memory chip

[0034] 128, 334, 434, 728, 934, 1034 Fourth memory chip

[0035] 132, 442 First Other Chip

[0036] 134, 444 Second other chips

[0037] 136, 446 Third other chips

[0038] 138, 448 Fourth other chips

[0039] 150 substrates

[0040] PL plane

[0041] 152 Microbumps

[0042] 154 Bump

[0043] 140 Intermediary Layer

[0044] 102 First Side

[0045] 104 Second Side

[0046] 106 The Third Side

[0047] 108 The Fourth Side

[0048] 101, 301, 401 Center

[0049] Q1 Quadrant 1

[0050] Q4 Quadrant 4

[0051] Q3 Quadrant 3

[0052] Q2 Quadrant 2

[0053] 326, 426, 926, 1026 Fifth memory chip

[0054] 336, 436, 936, 1036 Sixth memory chip

[0055] 328, 428, 928, 1028 seventh memory chip

[0056] 338, 438, 938, 1038 Eighth Memory Chip

[0057] W1, W2, W3, W4 Width

[0058] L1, L2, L3, L4 Length DETAILED DESCRIPTION

[0059] The embodiments of the present invention will be described below with reference to the accompanying drawings. In these drawings, the same reference numerals represent the same or similar elements or method flows.

[0060] Figure 1 The schematic diagram of a simplified chip arrangement of an integrated circuit product according to an embodiment of the present invention is shown in FIG. The integrated circuit product 100 includes a first logic chip 112 , a second logic chip 114 , a third logic chip 116 , a fourth logic chip 118 , a first memory chip 122 , a second memory chip 124 , a third memory chip 126 , a fourth memory chip 128 , a first other chip 132 , a second other chip 134 , a third other chip 136 , and a fourth other chip 138 . Figure 1 A top view of the integrated circuit product 100 is shown. Figure 2 and Figure 3 Simplified side views of an integrated circuit product according to an embodiment of the present invention are shown respectively (along the Figure 1 A-A' cross section). Figure 2 In the embodiment of the present invention, the integrated circuit product 100 includes a substrate 150, Figure 1 The logic chips, memory chips, and other chips are shown to be located on the same plane PL above the substrate 150. There are a plurality of micro bumps 152 between the substrate 150 and the logic chips, memory chips, and other chips, and a plurality of bumps 154 below the substrate 150. Figure 3 In the embodiment of the present invention, the integrated circuit product 100 includes an interposer 140, Figure 1The logic chips, memory chips, and other chips are shown to be located above the interposer 140. There are a plurality of micro bumps 152 between the interposer 140 and the substrate 150, and a plurality of bumps 154 below the substrate 150. The first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 can be logic circuits with computing capabilities, such as a system on a chip (SoC). The logic chip can access the memory chip to implement a specific function, for example, the logic chip implements the function by reading and executing a program code or program instruction stored in the memory chip.

[0061] Back to Figure 1 The integrated circuit product 100 has a first side 102, a second side 104, a third side 106, and a fourth side 108. The four sides of the integrated circuit product 100 may be four sides of the substrate 150. The integrated circuit product 100 also has a center 101. A side of the first logic chip 112 substantially overlaps with the second side 104 (i.e., a side of the first logic chip 112 is substantially aligned with the second side 104), that is, the first logic chip 112 is adjacent to the second side 104. Similarly, a side of the second logic chip 114 substantially overlaps with the third side 106, a side of the third logic chip 116 substantially overlaps with the fourth side 108, and a side of the fourth logic chip 118 substantially overlaps with the first side 102.

[0062] Similarly, one side of each of the first other chip 132 , the second other chip 134 , the third other chip 136 , and the fourth other chip 138 substantially overlaps with the first side 102 , the second side 104 , the third side 106 , and the fourth side 108 , respectively.

[0063] Similarly, one side of each of the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 substantially overlaps with the first side 102, the second side 104, the third side 106, and the fourth side 108. In addition, because the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 are arranged at four corners of the integrated circuit product 100, the other side of each of the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 substantially overlaps with the second side 104, the third side 106, the fourth side 108, and the first side 102.

[0064] like Figure 1As shown, the first logic chip 112 is adjacent to the second logic chip 114 and the fourth logic chip 118, the second logic chip 114 is adjacent to the first logic chip 112 and the third logic chip 116, the third logic chip 116 is adjacent to the second logic chip 114 and the fourth logic chip 118, and the fourth logic chip 118 is adjacent to the first logic chip 112 and the third logic chip 116. In some embodiments, the vertices of the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 touch each other at the center 101. However, the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 are not adjacent to each other, and the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are not adjacent to each other.

[0065] In some embodiments, the areas of the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 are substantially the same, the areas of the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 are substantially the same, and the areas of the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are substantially the same.

[0066] In some embodiments, the components of the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 are substantially the same, the components of the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 are substantially the same, and the components of the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are substantially the same. The aforementioned components include but are not limited to transistors, resistors, capacitors, and / or inductors. In other embodiments, the components of the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 are the same in type and quantity, the components of the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128 are the same in type and quantity, and the components of the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are the same in type and quantity.

[0067] In some embodiments, the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are input / output chips, including input / output circuits, and the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 use the input / output circuits to transmit or receive signals. In other embodiments, the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are silicon chips that do not include any circuits.

[0068] See also Figure 1 and Figure 4 The integrated circuit product 100 is divided into four quadrants by mutually perpendicular X-axis and Y-axis, and the X-axis and Y-axis intersect at the center 101. The first chip group (including the first logic chip 112, the first memory chip 122, and the first other chip 132) is located in the first quadrant Q1; the second chip group (including the second logic chip 114, the second memory chip 124, and the second other chip 134) is located in the fourth quadrant Q4; the third chip group (including the third logic chip 116, the third memory chip 126, and the third other chip 136) is located in the third quadrant Q3; the fourth chip group (including the fourth logic chip 118, the fourth memory chip 128, and the fourth other chip 138) is located in the second quadrant Q2. The relative position of the first logic chip 112 and the first memory chip 122 is equal to the relative position of the second logic chip 114 (the third logic chip 116, or the fourth logic chip 118) and the second memory chip 124 (the third memory chip 126, or the fourth memory chip 128); the relative position of the first logic chip 112 and the first other chip 132 is equal to the relative position of the second logic chip 114 (the third logic chip 116, or the fourth logic chip 118) and the second other chip 134 (the third other chip 136, or the fourth other chip 138); the relative position of the first memory chip 122 and the first other chip 132 is equal to the relative position of the second memory chip 124 (the third memory chip 126, or the fourth memory chip 128) and the second other chip 134 (the third other chip 136, or the fourth other chip 138).

[0069] If the first chip group is rotated 90 degrees clockwise relative to the center 101 on the plane PL, the first chip group and the second chip group substantially overlap (that is, the first logic chip 112 and the second logic chip 114 are rotationally symmetric, the first memory chip 122 and the second memory chip 124 are rotationally symmetric, and the first other chip 132 and the second other chip 134 are rotationally symmetric, wherein the rotational symmetry center is the center 101 and the rotation angle is 90 degrees). Similarly, if the first chip group is rotated 90 degrees counterclockwise or 270 degrees clockwise relative to the center 101 on the plane PL, the first chip group and the fourth chip group substantially overlap.

[0070] If the first chip group is rotated 180 degrees on the plane PL relative to the center 101, the first chip group and the third chip group substantially overlap. In other words, the first chip group and the third chip group present point symmetry relative to the center 101 (i.e., the first logic chip 112 and the third logic chip 116 are point symmetric, the first memory chip 122 and the third memory chip 126 are point symmetric, and the first other chip 132 and the third other chip 136 are point symmetric, with the center of symmetry being the center 101). Similarly, the second chip group and the fourth chip group present point symmetry relative to the center 101.

[0071] In other words, in some embodiments, the first chipset group, the second chipset group, the third chipset group, and the fourth chipset group are each a component unit of the integrated circuit product 100, that is, the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 can access or couple to the first memory chip 122, the second memory chip 124, the third memory chip 126, and the fourth memory chip 128, respectively, and the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 can be coupled to the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138, respectively. One advantage of such an arrangement is that the external (i.e., external) pins of the first logic chip 112 (the second logic chip 114, the third logic chip 116, or the fourth logic chip 118) can be arranged on the second side 104 (the third side 106, the fourth side 108, or the first side 102), while the internal pins (e.g., the pins communicating with the first memory chip 122, the second memory chip 124, the third memory chip 126, the fourth memory chip 128, the first other chip 132, the second other chip 134, the third other chip 136, or the fourth other chip 138) can be arranged on the side adjacent to the memory chip or other chips. In this way, because the chip arrangement of the integrated circuit product 100 is simple (only the first chip group needs to be rotated 90 degrees, 180 degrees, and 270 degrees), different regions of the integrated circuit product 100 can be manufactured using the same mask, thereby greatly simplifying the process and not wasting pins.

[0072] In some embodiments, the heat dissipation performance of the integrated circuit product 100 can be improved by arranging the heat-prone parts of the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 close to the edge of the integrated circuit product 100. In addition, because the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 are adjacent to each other, it is easier to implement the connection between the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 (for example, through the interposer 140 and / or the substrate 150). In other words, the communication (for example, exchanging data) and cooperative processing between the first logic chip 112, the second logic chip 114, the third logic chip 116, and the fourth logic chip 118 become easier to achieve.

[0073] In some other embodiments, the first chip group, the second chip group, the third chip group, and the fourth chip group are each a square; more specifically, Figure 1For example, W1+W2=L1+L2, where W1 is the width of the first memory chip 122 and the first other chip 132, W2 is the width of the first logic chip 112, L1 is the length of the first memory chip 122, L2 is the length of the first other chip 132, and the length of the first logic chip 112 is L1+L2. In addition, because the first chip group, the second chip group, the third chip group, and the fourth chip group are all square, the integrated circuit product 100 is also a square.

[0074] Figure 5 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention. Figure 5 2 shows a top view of the integrated circuit product 200. The integrated circuit product 200 is similar to the integrated circuit product 100, except that the first memory chip 122 is swapped with the first other chip 132, the second memory chip 124 is swapped with the second other chip 134, the third memory chip 126 is swapped with the third other chip 136, and the fourth memory chip 128 is swapped with the fourth other chip 138. Figure 2 In the embodiment, the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 are arranged at the four corners of the integrated circuit product 200; therefore, one side of each of the first other chip 132, the second other chip 134, the third other chip 136, and the fourth other chip 138 substantially overlaps with the first side 102, the second side 104, the third side 106, and the fourth side 108, respectively, and the other side of each substantially overlaps with the second side 104, the third side 106, the fourth side 108, and the first side 102, respectively.

[0075] Figure 6 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention. Figure 6 1 shows a top view of an integrated circuit product 300. The integrated circuit product 300 includes a first logic chip 312, a second logic chip 314, a third logic chip 316, a fourth logic chip 318, a first memory chip 322, a second memory chip 332, a third memory chip 324, a fourth memory chip 334, a fifth memory chip 326, a sixth memory chip 336, a seventh memory chip 328, and an eighth memory chip 338. The chip arrangement and features of the integrated circuit product 300 are similar to those of the integrated circuit product 100 and the integrated circuit product 200, except that one chip group of the integrated circuit product 300 includes one logic chip and two memory chips, but does not include other chips.

[0076] In some embodiments, the first chipset group (including the first logic chip 312, the first memory chip 322, and the second memory chip 332), the second chipset group (including the second logic chip 314, the third memory chip 324, and the fourth memory chip 334), the third chipset group (including the third logic chip 316, the fifth memory chip 326, and the sixth memory chip 336), and the fourth chipset group (including the fourth logic chip 318, the seventh memory chip 328, and the eighth memory chip 338) are each a square. Taking the first chipset group as an example, W1+W3=L1+L3, where W1 is the width of the first memory chip 322 and the second memory chip 332, W3 is the width of the first logic chip 312, L1 is the length of the first memory chip 322, L3 is the length of the second memory chip 332, and the length of the first logic chip 312 is L1+L3. If the first chipset group is rotated 90 degrees, 180 degrees, and 270 degrees clockwise relative to the center 301, the chips of the rotated first chipset group will substantially overlap with the corresponding chips in the second chipset group, the third chipset group, and the fourth chipset group (the first logic chip 312, the second logic chip 314, the third logic chip 316, and the fourth logic chip 318 correspond to each other, the first memory chip 322, the third memory chip 324, the fifth memory chip 326, and the seventh memory chip 328 correspond to each other, and the second memory chip 332, the fourth memory chip 334, the sixth memory chip 336, and the eighth memory chip 338 correspond to each other). In addition, because the first chipset group, the second chipset group, the third chipset group, and the fourth chipset group are all square, the integrated circuit product 300 is also a square.

[0077] For the first chipset group, the first logic chip 312 can access the first memory chip 322 and the second memory chip 332. The same is true for other chipsets, so they will not be described in detail.

[0078] In some embodiments, the components of the first logic chip 312, the second logic chip 314, the third logic chip 316, and the fourth logic chip 318 are substantially the same, the components of the first memory chip 322, the third memory chip 324, the fifth memory chip 326, and the seventh memory chip 328 are substantially the same, and the components of the second memory chip 332, the fourth memory chip 334, the sixth memory chip 336, and the eighth memory chip 338 are substantially the same. The aforementioned components include but are not limited to transistors, resistors, capacitors, and / or inductors. In other embodiments, the components of the first logic chip 312, the second logic chip 314, the third logic chip 316, and the fourth logic chip 318 are the same in type and quantity, the components of the first memory chip 322, the third memory chip 324, the fifth memory chip 326, and the seventh memory chip 328 are the same in type and quantity, and the components of the second memory chip 332, the fourth memory chip 334, the sixth memory chip 336, and the eighth memory chip 338 are the same in type and quantity.

[0079] In some embodiments, Figure 6 The 8 memory chips in are exactly the same; in other words, L1=L3.

[0080] In other embodiments, Figure 6 The eight memory chips are high bandwidth memory generation 3 (HBM3), and W1=L1=L3.

[0081] Figure 7 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention. Figure 7 4 shows a top view of an integrated circuit product 400. The integrated circuit product 400 includes a first logic chip 412, a second logic chip 414, a third logic chip 416, a fourth logic chip 418, a first memory chip 422, a second memory chip 432, a third memory chip 424, a fourth memory chip 434, a fifth memory chip 426, a sixth memory chip 436, a seventh memory chip 428, an eighth memory chip 438, a first other chip 442, a second other chip 444, a third other chip 446, and a fourth other chip 448. The chip arrangement and features of the integrated circuit product 400 are similar to those of the integrated circuit product 100 and the integrated circuit product 200, except that a chip group of the integrated circuit product 400 includes one logic chip, two memory chips, and one other chip.

[0082] In some embodiments, the first chip group (including the first logic chip 412, the first memory chip 422, the second memory chip 432, and the first other chip 442), the second chip group (including the second logic chip 414, the third memory chip 424, the fourth memory chip 434, and the second other chip 444), the third chip group (including the third logic chip 316, the fifth memory chip 326, the sixth memory chip 336, and the third other chip 446), and the fourth chip group (including the fourth logic chip 318, the seventh memory chip 328, the eighth memory chip 338, and the fourth other chip 448) are each a square. Taking the first chip group as an example, W1+W4=L1+L3+L4, wherein W1 is the width of the first memory chip 422, the second memory chip 432, and the first other chip 442, W4 is the width of the first logic chip 412, L1 is the length of the first memory chip 422, L3 is the length of the second memory chip 432, L4 is the length of the first other chip 442, and the length of the first logic chip 412 is L1+L3+L4. If the first chip group is rotated 90 degrees, 180 degrees, and 270 degrees clockwise relative to the center 401, the chips of the rotated first chip group will substantially overlap with the corresponding chips in the second chip group, the third chip group, and the fourth chip group (the first logic chip 412, the second logic chip 414, the third logic chip 416, and the fourth logic chip 418 correspond to each other, the first memory chip 422, the third memory chip 424, the fifth memory chip 426, and the seventh memory chip 428 correspond to each other, the second memory chip 432, the fourth memory chip 434, the sixth memory chip 436, and the eighth memory chip 438 correspond to each other, and the first other chip 442, the second other chip 444, the third other chip 446, and the fourth other chip 448 correspond to each other). In addition, because the first chip group, the second chip group, the third chip group, and the fourth chip group are all square, the integrated circuit product 400 is also a square.

[0083] For the first chipset group, the first logic chip 412 can access the first memory chip 422 and the second memory chip 432. The same is true for other chipsets, so they will not be described in detail.

[0084] In some embodiments, the components of the first logic chip 412, the second logic chip 414, the third logic chip 416, and the fourth logic chip 418 are substantially the same, the components of the first memory chip 422, the third memory chip 424, the fifth memory chip 426, and the seventh memory chip 428 are substantially the same, the components of the second memory chip 432, the fourth memory chip 434, the sixth memory chip 436, and the eighth memory chip 438 are substantially the same, and the components of the first other chip 442, the second other chip 444, the third other chip 446, and the fourth other chip 448 are substantially the same. The aforementioned components include but are not limited to transistors, resistors, capacitors, and / or inductors. In other embodiments, the components of the first logic chip 412, the second logic chip 414, the third logic chip 416, and the fourth logic chip 418 are the same in type and quantity, the components of the first memory chip 422, the third memory chip 424, the fifth memory chip 426, and the seventh memory chip 428 are the same in type and quantity, the components of the second memory chip 432, the fourth memory chip 434, the sixth memory chip 436, and the eighth memory chip 438 are the same in type and quantity, and the components of the first other chip 442, the second other chip 444, the third other chip 446, and the fourth other chip 448 are the same in type and quantity.

[0085] In some embodiments, Figure 7 The 8 memory chips in are exactly the same; in other words, L1=L3.

[0086] exist Figure 7 In the embodiment, the second memory chip 432, the fourth memory chip 434, the sixth memory chip 436, and the eighth memory chip 438 are arranged at the four corners of the integrated circuit product 400, and the first memory chip 422 (the third memory chip 424, the fifth memory chip 426, or the seventh memory chip 428) is arranged between the second memory chip 432 (the fourth memory chip 434, the sixth memory chip 436, or the eighth memory chip 438) and the first other chip 442 (the second other chip 444, the third other chip 446, or the fourth other chip 448).

[0087] Figure 8 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention. Figure 81 shows a top view of the integrated circuit product 500. The integrated circuit product 500 is similar to the integrated circuit product 400, except that the first other chip 442, the second other chip 444, the third other chip 446, and the fourth other chip 448 are arranged at the four corners of the integrated circuit product 500, and the second memory chip 432 (the fourth memory chip 434, the sixth memory chip 436, or the eighth memory chip 438) is arranged between the first memory chip 422 (the third memory chip 424, the fifth memory chip 426, or the seventh memory chip 428) and the first other chip 442 (the second other chip 444, the third other chip 446, or the fourth other chip 448).

[0088] Fig. 9 It is a schematic diagram of a simplified chip layout of an integrated circuit product according to another embodiment of the present invention. Fig. 9 1 shows a top view of the integrated circuit product 600. The integrated circuit product 600 is similar to the integrated circuit product 400, except that the first other chip 442 (the second other chip 444, the third other chip 446, or the fourth other chip 448) is arranged between the first memory chip 422 (the third memory chip 424, the fifth memory chip 426, or the seventh memory chip 428) and the second memory chip 432 (the fourth memory chip 434, the sixth memory chip 436, or the eighth memory chip 438).

[0089] Figure 1 and Figure 5-9 The memory chip in the embodiment is a third generation high bandwidth memory (HBM3), which is square in shape. However, the memory chip may also be a second generation high bandwidth memory (HBM2), such as Figure 10-15 (corresponding to Figure 1 and Figure 5-9). The first memory chip 722, the second memory chip 724, the third memory chip 726, the fourth memory chip 728 of the integrated circuit products 700 and 800, the first memory chip 922, the second memory chip 932, the third memory chip 924, the fourth memory chip 934, the fifth memory chip 926, the sixth memory chip 936, the seventh memory chip 928, the eighth memory chip 938 of the integrated circuit product 900, the first memory chip 1022, the second memory chip 1032, the third memory chip 1024, the fourth memory chip 1034, the fifth memory chip 1026, the sixth memory chip 1036, the seventh memory chip 1028, and the eighth memory chip 1038 of the integrated circuit products 1000, 1100, and 1200 are second generation high bandwidth memories. Figure 10-15 The descriptions can correspond to Figure 1 and Figure 5-9 , so I won’t repeat it here.

[0090] Furthermore, in other embodiments, Figure 5-9 The memory chip in the memory may be an enhanced high bandwidth memory generation 2.

[0091] In summary, the chip arrangement proposed by the present invention can make the chips arranged closely in the integrated circuit product, so as to make full use of the substrate area to improve the competitiveness of the integrated circuit product. In addition, arranging the chips on the integrated circuit product in a rotationally symmetrical and / or point-symmetrical manner can not only avoid pin waste, but also facilitate the use of the same mask to manufacture different parts of the integrated circuit product, thereby simplifying the mask complexity.

[0092] From another perspective, by arranging the chips on the integrated circuit product in the aforementioned rotational symmetry and / or point symmetry, semiconductor manufacturers can use the same set of masks to manufacture integrated circuit products with an area nearly four times the size, thereby significantly reducing the manufacturing cost of the integrated circuit products.

[0093] Please note that the arrangement of the chips on the aforementioned integrated circuit product is only an exemplary embodiment and does not limit the actual implementation of the present invention. For example, in some embodiments, the aforementioned logic chip, memory chip, and / or other chip may be modified to be arranged in four quadrants of the integrated circuit product in a linearly symmetrical manner relative to the central axis of the integrated circuit product (through the center and perpendicular to any side).

[0094] Certain words are used in the specification and claims to refer to specific components, while technicians in the field may use different terms to refer to the same components. This specification and claims do not use differences in names as a way to distinguish components, but use differences in the functions of components as the basis for distinction. The term "including" mentioned in the specification and claims is an open-ended term and should be interpreted as "including but not limited to". In addition, the term "coupling" herein includes any direct and indirect connection means. Therefore, if the text describes a first component coupled to a second component, it means that the first component can be directly connected to the second component through electrical connection or signal connection methods such as wireless transmission, optical transmission, etc., or indirectly electrically or signal connected to the second component through other components or connection means.

[0095] The description method of "and / or" used in the specification includes any combination of one or more of the listed items. In addition, unless otherwise specified in the specification, any singular term also includes the meaning of the plural term.

[0096] The dimensions and relative sizes of some components in the drawings may be exaggerated, or the shapes of some components may be simplified, so as to more clearly express the content of the embodiments. Therefore, unless otherwise specified by the applicant, the shapes, dimensions, relative sizes and relative positions of the components in the drawings are only for the convenience of explanation and should not be used to limit the scope of the invention. In addition, the invention can be embodied in many different forms, and when explaining the invention, it should not be limited to the embodiments proposed in this specification.

[0097] For the convenience of explanation, the specification may use some descriptions related to relative positions in space to describe the function of a component in the drawings or the relative spatial relationship between the component and other components. For example, "on...", "above...", "below...", "below...", "higher than...", "lower than...", "upward", "downward", etc. A person skilled in the art should understand that these descriptions related to relative positions in space include not only the orientation of the components described in the drawings, but also the various orientations of the components described when they are used, operated, or assembled. For example, if the drawings are turned upside down, the components originally described as "on..." will become "below...". Therefore, the description method of "on..." used in the specification includes two different orientations of "below..." and "on..." in terms of interpretation. Similarly, the word "upward" used here includes two different orientations of "upward" and "downward".

[0098] In the specification and claims, if a first component is described as being located on, above, connected, joined, coupled to, or connected to a second component, it means that the first component may be directly located on, directly connected, directly joined, or directly coupled to the second component, or it may mean that there are other components between the first component and the second component. Conversely, if a first component is described as being directly located on, directly connected, directly joined, directly coupled, or directly connected to a second component, it means that there are no other components between the first component and the second component.

[0099] The above are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should be included in the scope of the present invention.

Claims

1. An integrated circuit product (100; 200; 300; 400; 500; 600), comprising: A first chip (112; 312; 412); A second chip (114; 314; 414); A third chip (116; 316; 416); A fourth chip (118; 318; 418); A fifth chip (122; 322; 422); The sixth chip (124; 324; 424); The seventh chip (126; 326; 426); The eighth chip (128; 328; 428); The ninth chip (132; 332; 432); The tenth chip (134; 334; 434); an eleventh chip (136; 336; 436); and 12th chip (138; 338; 438); in, The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), and the fourth chip (118; 318; 418) are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and the first chip (112; 312; 412) is adjacent to the second chip (114; 314; 414) and the fourth chip (118; 318; 418); The fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are not adjacent; and The ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant of the integrated circuit product, and any two of the ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are not adjacent.

2. The integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 1, wherein: The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), and the fourth chip (118; 318; 418) are logic chips, and the areas and components of these logic chips are substantially the same; and the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are memory chips, and the areas and components of these memory chips are substantially the same.

3. The integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 2, wherein: The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), the fourth chip (118; 318; 418), the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), the eighth chip (128; 328; 428), the ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are substantially located on the same plane, and the first chip (112; 312; 412) and the third chip (116; 316; 416) are located relative to the center (101; 301; 302) of the integrated circuit product (100; 200; 300; 400; 500; 600) ; 401) are point symmetrical, the second chip (114; 314; 414) and the fourth chip (118; 318; 418) are point symmetrical relative to the center (101; 301; 401), the fifth chip (122; 322; 422) and the seventh chip (126; 326; 426) are point symmetrical relative to the center (101; 301; 401), the sixth chip (124; 324; 424) and the eighth chip (12 8; 328; 428) are point symmetrical with respect to the center (101; 301; 401), the ninth chip (132; 332; 432) and the eleventh chip (136; 336; 436) are point symmetrical with respect to the center (101; 301; 401), and the tenth chip (134; 334; 434) and the twelfth chip (138; 338; 438) are point symmetrical with respect to the center (101; 301; 401).

4. The integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 2, wherein: The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), and the fourth chip (118; 318; 418) are respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (100; 200; 300; 400; 500; 600).

5. The integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 4, wherein: The fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are respectively adjacent to the first side (102), the second side (104), the third side (106), and the fourth side (108) of the integrated circuit product (100; 200; 300; 400; 500; 600).

6. The integrated circuit product (100) of claim 5, wherein: The fifth chip (122), the sixth chip (124), the seventh chip (126), and the eighth chip (128) are also respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (100).

7. An integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 4, wherein: The ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are respectively adjacent to the first side (102), the second side (104), the third side (106), and the fourth side (108) of the integrated circuit product (100; 200; 300; 400; 500; 600).

8. An integrated circuit product (200; 300; 400; 600) as claimed in claim 7, wherein: The ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are also respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (200; 300; 400; 600).

9. The integrated circuit product (300; 400; 500; 600) of claim 2, wherein: The ninth chip (332; 432), the tenth chip (334; 434), the eleventh chip (336; 436), and the twelfth chip (338; 438) are memory chips.

10. The integrated circuit product (400; 500; 600) of claim 9, further comprising: 13th chip (442); Fourteenth chip (444); a fifteenth chip (446); and sixteenth chip (448); in, The thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) are respectively located in the first quadrant, the fourth quadrant, the third quadrant, and the second quadrant; and The fifth chip (422), the sixth chip (424), the seventh chip (426), and the eighth chip (428), the ninth chip (432), the tenth chip (434), the eleventh chip (436), the twelfth chip (438), the thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) have the same width (W1).

11. The integrated circuit product (400; 500) of claim 10, wherein: The fifth chip (422) is located between the ninth chip (432) and the thirteenth chip (442), the sixth chip (424) is located between the tenth chip (434) and the fourteenth chip (444), the seventh chip (426) is located between the eleventh chip (436) and the fifteenth chip (446), and the eighth chip (428) is located between the twelfth chip (438) and the sixteenth chip (448).

12. The integrated circuit product (400) of claim 11, wherein: The ninth chip (432), the tenth chip (434), the eleventh chip (436), and the twelfth chip (438) are respectively located at four corners of the integrated circuit product (400).

13. The integrated circuit product (500) of claim 11, wherein: The thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) are respectively located at four corners of the integrated circuit product (500).

14. The integrated circuit product (600) of claim 10, wherein: The thirteenth chip (442) is located between the fifth chip (422) and the ninth chip (432), the fourteenth chip (444) is located between the sixth chip (424) and the tenth chip (434), the fifteenth chip (446) is located between the seventh chip (426) and the eleventh chip (436), and the sixteenth chip (448) is located between the eighth chip (428) and the twelfth chip (438).

15. An integrated circuit product (100; 200; 300; 400; 500; 600), comprising: A first chip (112; 312; 412); A second chip (114; 314; 414); A third chip (116; 316; 416); A fourth chip (118; 318; 418); A fifth chip (122; 322; 422); The sixth chip (124; 324; 424); The seventh chip (126; 326; 426); The eighth chip (128; 328; 428); The ninth chip (132; 332; 432); The tenth chip (134; 334; 434); an eleventh chip (136; 336; 436); and 12th chip (138; 338; 438); in, The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), the fourth chip (118; 318; 418), the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), the eighth chip (128; 328; 428), the ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are substantially located on a plane (PL); If the first chip (112; 312; 412) is rotated ninety degrees on the plane relative to the center (101; 301; 401) of the integrated circuit product (100; 200; 300; 400; 500; 600), the first chip (112; 312; 412) substantially overlaps with the second chip (114; 314; 414) or the fourth chip (118; 318; 418), and if the first chip (112; 312; 412) is rotated one hundred and eighty degrees on the plane relative to the center (101; 301; 401), the first chip (112; 312; 412) substantially overlaps with the third chip (116; 316; 416); If the fifth chip (122; 322; 422) is rotated ninety degrees on the plane relative to the center (101; 301; 401), the fifth chip (122; 322; 422) substantially overlaps with the sixth chip (124; 324; 424) or the eighth chip (128; 328; 428), and if the fifth chip (122; 322; 422) is rotated one hundred and eighty degrees on the plane relative to the center (101; 301; 401), the fifth chip (122; 322; 422) substantially overlaps with the seventh chip (126; 326; 426); and If the ninth chip (132; 332; 432) is rotated ninety degrees on the plane relative to the center (101; 301; 401), the ninth chip (132; 332; 432) substantially overlaps with the tenth chip (134; 334; 434) or the twelfth chip (138; 338; 438), and if the ninth chip (132; 332; 432) is rotated one hundred and eighty degrees on the plane relative to the center (101; 301; 401), the ninth chip (132; 332; 432) substantially overlaps with the eleventh chip (136; 336; 436).

16. An integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 15, wherein The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), and the fourth chip (118; 318; 418) are logic chips, and the areas and components of these logic chips are substantially the same; and the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are memory chips, and the areas and components of these memory chips are substantially the same.

17. An integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 16, wherein The first chip (112; 312; 412) is adjacent to the second chip and the fourth chip (118; 318; 418), and the second chip (114; 314; 414) is adjacent to the first chip and the third chip (116; 316; 416).

18. An integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 16, wherein Any two of the fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are not adjacent, and any two of the ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are not adjacent.

19. The integrated circuit product (100; 200; 300; 400; 500; 600) of claim 16, wherein: The first chip (112; 312; 412), the second chip (114; 314; 414), the third chip (116; 316; 416), and the fourth chip (118; 318; 418) are respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (100; 200; 300; 400; 500; 600).

20. An integrated circuit product (100; 200; 300; 400; 500; 600) as claimed in claim 19, wherein The fifth chip (122; 322; 422), the sixth chip (124; 324; 424), the seventh chip (126; 326; 426), and the eighth chip (128; 328; 428) are respectively adjacent to the first side (102), the second side (104), the third side (106), and the fourth side (108) of the integrated circuit product (100; 200; 300; 400; 500; 600).

21. The integrated circuit product (100) of claim 20, wherein: The fifth chip (122), the sixth chip (124), the seventh chip (126), and the eighth chip (128) are also respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (100).

22. The integrated circuit product (100; 200; 300; 400; 500; 600) of claim 19, wherein: The ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are respectively adjacent to the first side (102), the second side (104), the third side (106), and the fourth side (108) of the integrated circuit product (100; 200; 300; 400; 500; 600).

23. An integrated circuit product (200; 300; 400; 600) as claimed in claim 22, wherein: The ninth chip (132; 332; 432), the tenth chip (134; 334; 434), the eleventh chip (136; 336; 436), and the twelfth chip (138; 338; 438) are also respectively adjacent to the second side (104), the third side (106), the fourth side (108), and the first side (102) of the integrated circuit product (200; 300; 400; 600).

24. The integrated circuit product (300; 400; 500; 600) of claim 16, wherein: The ninth chip (332; 432), the tenth chip (334; 434), the eleventh chip (336; 436), and the twelfth chip (338; 438) are memory chips.

25. The integrated circuit product (400; 500; 600) of claim 24, further comprising: 13th chip (442); Fourteenth chip (444); a fifteenth chip (446); and sixteenth chip (448); in, The thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) are substantially located on the plane (PL); and The fifth chip (422), the sixth chip (424), the seventh chip (426), and the eighth chip (428), the ninth chip (432), the tenth chip (434), the eleventh chip (436), the twelfth chip (438), the thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) have the same width (W1).

26. An integrated circuit product (400; 500) as claimed in claim 25, wherein The fifth chip (422) is located between the ninth chip (432) and the thirteenth chip (442), the sixth chip (424) is located between the tenth chip (434) and the fourteenth chip (444), the seventh chip (426) is located between the eleventh chip (436) and the fifteenth chip (446), and the eighth chip (428) is located between the twelfth chip (438) and the sixteenth chip (448).

27. The integrated circuit product (400) of claim 26, wherein: The ninth chip (432), the tenth chip (434), the eleventh chip (436), and the twelfth chip (438) are respectively located at four corners of the integrated circuit product (400).

28. The integrated circuit product (500) of claim 26, wherein: The thirteenth chip (442), the fourteenth chip (444), the fifteenth chip (446), and the sixteenth chip (448) are respectively located at four corners of the integrated circuit product (500).

29. The integrated circuit product (600) of claim 25, wherein: The thirteenth chip (442) is located between the fifth chip (422) and the ninth chip (432), the fourteenth chip (444) is located between the sixth chip (424) and the tenth chip (434), the fifteenth chip (446) is located between the seventh chip (426) and the eleventh chip (436), and the sixteenth chip (448) is located between the eighth chip (428) and the twelfth chip (438).

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