Semiconductor failure analysis device and semiconductor failure analysis method

Abstract

The semiconductor failure analysis device (1) of the present application is provided with: an analysis section (10) that analyzes a failure site of a semiconductor device (D); a marking section (20) that irradiates laser light toward the semiconductor device (D); a device arrangement section (30) that relatively moves a wafer chuck (32) that holds the semiconductor device (D) and is provided with an alignment target (50) with respect to the analysis section (10) and the marking section (20); and a control section (41b) that outputs a command to the analysis section (10), the marking section (20), and the device arrangement section (30). The control section (41b) outputs an alignment command that aligns the marking section (20) with the analysis section (10) using the alignment target (50) as a reference after moving the wafer chuck (32) to a position at which the analysis section (10) can photograph the alignment target (50), and irradiates laser light toward the semiconductor device (D) while maintaining the positional relationship of the marking section (20) and the analysis section (10).

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor fault analysis device and a semiconductor fault analysis method. BACKGROUND

[0002] As a technique for analyzing a semiconductor device, there is known a technique in which, in a case where a fault site is determined, marks are given by irradiation of laser light at a plurality of sites around the fault site. In a process after fault analysis, the fault site can be easily grasped on the basis of the marks. Therefore, this technique is extremely effective.

[0003] Patent Literature 1 describes a semiconductor device analysis device. The analysis device disclosed in Patent Literature 1 has a configuration for analyzing a fault site of a semiconductor device and a configuration for giving marks around the fault site. The analysis device first performs positioning of the configuration for detecting the fault site and the configuration for giving the marks. Next, the analysis device analyzes the fault site while moving the configuration for detecting the fault site with respect to the semiconductor device. When the configuration for detecting the fault site determines the position of the fault site, the analysis device moves the configuration for giving the marks to the position of the fault site.

[0004] [Related Art Documents]

[0005] [Patent Literature]

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2016-148550 SUMMARY

[0007] [Problems to be Solved by the Invention]

[0008] In a process after fault analysis, the position of the fault site is determined on the basis of the marks. Therefore, it is desirable that the marks correctly indicate the position of the fault site. On the other hand, even if a moving mechanism such as an XY stage that moves a configuration element of a device is high in precision, a slight error occurs between a position indicated by a moving instruction value and an actual position. Even if the error is slight, it is possible that the position of the fault site indicated by the marks is shifted from the actual position of the fault site. That is, the shift of the actual position of the fault site from the position of the fault site indicated by the marks depends on the precision of the moving mechanism.

[0009] An object of the present application is to provide a semiconductor fault analysis device and a semiconductor fault analysis method that can reduce the shift of the position of the fault site from the position of the fault site indicated by the marks.

[0010] [Technical Means for Solving the Problems]

[0011] A semiconductor failure analysis device according to one aspect of the present application includes: an analysis section that receives first light from a semiconductor device via a first optical system, the first optical system being relatively moved with respect to the semiconductor device by a first drive section; a marking section that receives second light from the semiconductor device via a second optical system, and irradiates laser light to the semiconductor device via the second optical system, the second optical system being relatively moved with respect to the semiconductor device by a second drive section; a device arrangement section that is arranged between the analysis section and the marking section, has a chuck that holds the semiconductor device, and is provided with a target for positioning of an optical axis of the first optical system and an optical axis of the second optical system, the chuck being relatively moved with respect to the analysis section and the marking section by a third drive section; and a control section that outputs a command to the analysis section, the marking section, and the device arrangement section. The target is detectable from one side of the target by the first light detection section, and is detectable from the other side of the target by the second light detection section. The control section outputs, after moving the chuck to a position at which the target is detectable by the first light detection section, an alignment command to align the optical axis of the second optical system with the optical axis of the first optical system with reference to the target to the marking section and the device arrangement section, and outputs, in a state in which a positional relationship between the optical axis of the first optical system and the optical axis of the second optical system is maintained, a marking command to irradiate laser light to a mark position set in the semiconductor device to the marking section and the device arrangement section.

[0012] Another aspect of the present application is a semiconductor failure analysis method for analyzing a semiconductor device using a semiconductor failure analysis device. The semiconductor failure analysis device includes: an analysis section that receives first light from a semiconductor device via a first optical system, the first optical system being relatively moved with respect to the semiconductor device by a first drive section; a marking section that receives second light from the semiconductor device via a second optical system, and irradiates laser light to the semiconductor device via the second optical system, the second optical system being relatively moved with respect to the semiconductor device by a second drive section; a device arrangement section that is arranged between the analysis section and the marking section, has a chuck that holds the semiconductor device, and is provided with a target for positioning of an optical axis of the first optical system and an optical axis of the second optical system, the chuck being relatively moved with respect to the analysis section and the marking section by a third drive section; and a control section that outputs a command to the analysis section, the marking section, and the device arrangement section. The target is detectable from one side of the target by the first light detection section, and is detectable from the other side of the target by the second light detection section. The semiconductor failure analysis method includes: an alignment process of aligning the optical axis of the second optical system with the optical axis of the first optical system with reference to the target after moving the chuck to a position at which the target is detectable by the first light detection section; and a marking process of irradiating laser light to a mark position set in the semiconductor device in a state in which a positional relationship between the optical axis of the first optical system and the optical axis of the second optical system is maintained.

[0013] In a semiconductor failure analysis device and a semiconductor failure analysis method, first, an optical axis of a second optical system possessed by a marker is aligned with an optical axis of a first optical system possessed by an alignment analysis section based on a target provided to a chuck. Then, in a state where a positional relationship between the optical axis of the first optical system and the optical axis of the second optical system is maintained, laser light is irradiated toward a marker position provided to a semiconductor device. That is, after the optical axis of the first optical system and the optical axis of the second optical system are aligned, one of the first optical system and the second optical system does not relatively move with respect to the other. Therefore, a shift between a position indicated by a movement instruction value that can be generated due to the movement and an actual position is not generated. As a result, a shift of a position of a failure site indicated by a marker can be reduced with respect to a position of a failure site indicated by an analysis section.

[0014] In a semiconductor failure analysis device of one aspect, a control section can output, before outputting an alignment command, an analysis command for analyzing a failure site of a semiconductor device by an analysis section. Similarly, a semiconductor failure analysis method of another aspect can further include, before the alignment process, an analysis process for analyzing a failure site of a semiconductor device by an analysis section. According to this configuration, a marker that indicates a position of a failure site with high precision can be provided.

[0015] In a semiconductor failure analysis device of one aspect, a marker command can irradiate laser light toward a semiconductor device after a chuck is moved to a marker position by a third driving section. Similarly, in a semiconductor failure analysis method of another aspect, a marker process can irradiate laser light toward a semiconductor device after a chuck is moved to a marker position by a third driving section. According to this configuration, laser light can be irradiated toward a desired position of a semiconductor device after an optical axis of a second optical system is aligned with an optical axis of a first optical system, and in addition to maintaining a relative position of the first optical system and the second optical system, an absolute position is also maintained. As a result, a shift of a position of a failure site indicated by a marker provided by a marker section can be further reduced.

[0016] In a semiconductor failure analysis device of one aspect, an alignment command can cause a first light detection section to acquire a first image from a target on one side, cause a second light detection section to acquire a second image from a target on the other side, and cause a second optical system to move in a manner that aligns an optical axis of the second optical system with an optical axis of a first optical system based on the first image and the second image. Similarly, in a semiconductor failure analysis method of another aspect, an alignment process can cause a first light detection section to acquire a first image from a target on one side, cause a second light detection section to acquire a second image from a target on the other side, and cause a second driving section to move in a manner that aligns an optical axis of the second optical system with an optical axis of a first optical system based on the first image and the second image. According to this configuration, an operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can be reliably performed.

[0017] In one type of semiconductor fault analysis apparatus, the target can be positioned in a chuck at a location different from the device holding section that holds the semiconductor device. With this configuration, regardless of the type of semiconductor device, the optical axis of the second optical system can be aligned with the optical axis of the first optical system.

[0018] In one type of semiconductor fault analysis apparatus, a first optical detection unit can acquire a first image of a target observed from one side. A second optical detection unit can acquire a second image of a target observed from the other side. With this configuration, the operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can also be reliably performed.

[0019] In one type of semiconductor fault analysis apparatus, the target may include a light-transmitting section through which light detectable by a first light detection unit and a second light detection unit passes. With this configuration, the operation of aligning the optical axis of the second optical system with the optical axis of the first optical system can be reliably performed.

[0020] [The effects of the invention]

[0021] The present invention provides a semiconductor fault analysis apparatus and a semiconductor fault analysis method that can reduce the offset between the location of the faulty part and the location indicated by the marking. Attached Figure Description

[0022] Figure 1 This is a configuration diagram of a semiconductor fault analysis apparatus according to an embodiment.

[0023] Figure 2 This is a diagram used to illustrate the laser marking image applied to a semiconductor device. Figure 2 (a) is a view showing the back of a laser-marked semiconductor device. Figure 2 (b) A diagram showing the surface of a laser-marked semiconductor device. Figure 2 (c) is along Figure 2 (b) Sectional view of II(c)-II(c).

[0024] Figure 3 For illustrative purposes Figure 1 The diagram showing the label control of the analytical device.

[0025] Figure 4 This is a top-down view of the target.

[0026] Figure 5 To demonstrate the use Figure 1 The flowchart shows the main steps of the semiconductor fault analysis method of the analysis device.

[0027] Figure 6 (a) is a diagram showing the analytical process. Figure 6 (b) A diagram showing one of the steps that constitutes the alignment process.

[0028] Figure 7 (a) To display the continuation of Figure 6 (b) is a diagram of the process of aligning the process. Figure 7 (b) To display the continuation of Figure 7 (a) is a diagram of the process of aligning the process.

[0029] Figure 8 To show the continuation of Figure 7 (b) is a diagram of the process of aligning the process. Detailed Implementation

[0030] Hereinafter, the configurations for implementing the invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are used for the same elements, and repeated descriptions are omitted.

[0031] like Figure 1 As shown, the semiconductor fault analysis apparatus of this embodiment analyzes the device under test (DUT), i.e., semiconductor device D. In the following description, the semiconductor fault analysis apparatus of this embodiment will be simply referred to as "analysis apparatus 1". Furthermore, the analysis of semiconductor device D may include, for example, determining the location of faulty parts contained in semiconductor device D. However, the analysis of semiconductor device D is not limited to determining the location of faulty parts. The analysis of semiconductor device D includes other analyses and inspections related to semiconductor device D. Hereinafter, the analysis apparatus 1 of this embodiment will be described as an apparatus for determining the location of faulty parts contained in semiconductor device D.

[0032] Next, the analysis device 1 determines the location of the fault and assigns a symbol (marker) to the area around the fault location. The act of assigning this symbol is called "marking". The marking is used to facilitate the identification of the fault location determined by the analysis device 1 in subsequent fault analysis processes.

[0033] Examples of semiconductor devices D include integrated circuits (ICs) with PN junctions such as transistors, logic devices, memory devices, analog devices, and mixed-signal devices composed of large-scale integrated circuits (LSIs), as well as power semiconductor devices (power devices) such as high-current / high-voltage MOS transistors, bipolar transistors, and IGBTs. Semiconductor device D has a multilayer structure including a substrate and metal layers. For example, a silicon substrate is used as the substrate of semiconductor device D.

[0034] The analysis device 1 includes an analysis section 10, a marking section 20, a device arrangement section 30, and a computer 40. The analysis section 10 determines a failure site of the semiconductor device D. The marking section 20 gives a mark indicating the position of the failure site. The device arrangement section 30 arranges the semiconductor device D. The analysis device 1 can be, for example, an inverted emission microscope having a function of laser marking.

[0035] <Analysis section>

[0036] The analysis section 10 has a test unit 11, a light source 12 (first light source), an observation optical system 13 (first optical system), an XYZ stage 14 (first driving section), and a two-dimensional camera 15 (first light detecting section).

[0037] The test unit 11 is electrically connected to the semiconductor device D via a cable. The test unit 11 is a stimulus signal applying section that applies a stimulus signal to the semiconductor device D. The test unit 11 operates by a power source not shown. The test unit 11 repeatedly applies a stimulus signal of a determined test pattern or the like to the semiconductor device D. The stimulus signal output from the test unit 11 can be a modulated current signal or a CW (continuous wave) current signal.

[0038] The test unit 11 is electrically connected to the computer 40 via a cable. The test unit 11 applies a stimulus signal specified by the computer 40 to the semiconductor device D. The test unit 11 is not necessarily electrically connected to the computer 40. The test unit 11 determines a stimulus signal of a test pattern or the like as a single body in a case where it is not connected to the computer 40. Furthermore, the test unit 11 can be realized by a power source or a pulse generator or the like.

[0039] The light source 12 outputs light toward the semiconductor device D. The light source 12 can be, for example, an LED (Light Emitting Diode) or an SLD (Super Luminescent Diode). Furthermore, the light source 12 can be a non-coherent light source such as a lamp light source or a coherent light source such as a laser light source. The light output from the light source 12 transmits through a substrate of the semiconductor device D. For example, in a case where the substrate of the semiconductor device D is silicon, the wavelength of the light output from the light source 12 is preferably 1064 nm or more. The light output from the light source 12 is supplied to the observation optical system 13.

[0040] The observation optical system 13 outputs the light output from the light source 12 to the semiconductor device D. For example, the light source 12 irradiates light toward the back surface D1 side of the semiconductor device D in a marking process. The observation optical system 13 has an objective lens 13a and a beam splitter 13b. The objective lens 13a condenses light to an observation region.

[0041] The observation optical system 13 guides light reflected in the semiconductor device D to the two-dimensional camera 15. Specifically, light irradiated from the observation optical system 13 transmits through the substrate SiE of the semiconductor device D (refer to Figure 2 (c)). Next, the light that has transmitted through the substrate SiE is reflected by the metal layer ME (refer to Figure 2 (c)). Next, the light reflected by the metal layer ME transmits through the substrate SiE again. Thereafter, the light that has transmitted through the substrate SiE is input to the two-dimensional camera 15 via the objective lens 13a and the beam splitter 13b of the observation optical system 13. In addition, the observation optical system 13 guides light emitted in the semiconductor device D due to application of the stimulus signal to the two-dimensional camera 15. Specifically, the metal layer ME of the semiconductor device D has a case where light such as emission light is emitted due to application of the stimulus signal. The light emitted from the metal layer ME is input to the two-dimensional camera 15 via the objective lens 13a and the beam splitter 13b of the observation optical system 13 after transmitting through the substrate SiE.

[0042] The observation optical system 13 is placed on the XYZ stage 14. The Z-axis direction is the optical axis direction of the objective lens 13a. The XYZ stage 14 is movable in the Z-axis direction. Furthermore, the XYZ stage 14 is also movable in the X-axis direction and the Y-axis direction orthogonal to the Z-axis direction. The XYZ stage 14 is controlled by the control section 41b of the computer 40 described later. The observation region is determined in accordance with the position of the XYZ stage 14. The observation optical system 13 guides reflected light from the semiconductor device D corresponding to the irradiated light to the two-dimensional camera 15 as light from the semiconductor device D.

[0043] The two-dimensional camera 15 receives light (first light) from the semiconductor device D. The two-dimensional camera 15 outputs image data based on the received light. The light from the semiconductor device D referred to in this specification can be reflected light corresponding to reflected light in the semiconductor device D. In addition, the light from the semiconductor device D referred to in this specification can be emission light generated in accordance with a stimulus signal. For example, the two-dimensional camera 15 photographs the semiconductor device D from the substrate SiE side of the semiconductor device D in the mark processing. In other words, the two-dimensional camera 15 photographs the semiconductor device D from the back surface D1 side of the semiconductor device D in the mark processing.

[0044] The two-dimensional camera 15 receives light reflected in the semiconductor device D. Furthermore, the two-dimensional camera 15 outputs image data for creating a pattern image to the computer 40 based on the received light. From the pattern image, the mark position can be grasped. In addition, the two-dimensional camera 15 receives emission light generated in accordance with a stimulus signal. The two-dimensional camera 15 outputs image data for creating a light emission image to the computer 40 based on the received light. From the light emission image, the light emission site of the semiconductor device D can be determined. By determining the light emission site, the failure site of the semiconductor device D can be determined.

[0045] As the two-dimensional camera 15, an imaging device that can detect light of a wavelength that passes through the substrate SiE of the semiconductor device D can be used. As the two-dimensional camera 15, a camera in which a CCD (Charge Coupled Device) image sensor or a CMOS (Complementary Metal Oxide Semiconductor) image sensor is mounted can be used. As the two-dimensional camera 15, an InGaAs camera or an MCT camera or the like can be used. Further, in the luminescence measurement, the illumination light from the light source 12 is not necessary. That is, in the luminescence measurement, the light source 12 does not need to be operated.

[0046] <marking section>

[0047] Next, the marking section 20 will be described. The marking section 20 imparts a mark indicating a failure site. The marking section 20 has a laser light source 21, a laser marking optical system 22 (second optical system), an XYZ stage 23 (second driving section), a probe camera 24 (second light detecting section), and an illumination light source 25.

[0048] The marking section 20 imparts a mark around the failure site determined in the analysis section 10. As Figure 2 (a) and Figure 2 (b) show, a marking site mp is set around the failure site fp. In Figure 2 (a) and Figure 2 (b), four marks are set as the marking sites mp. In a state where the laser marking is completed, as Figure 2 (c) shows, a through-hole that penetrates the metal layer ME of the semiconductor device D is formed. The laser marking is performed to the extent that the boundary surface ss between the metal layer ME and the substrate SiE is exposed through the through-hole. That is, the "mark" referred to in the present specification can mean the through-hole formed in the metal layer ME. In addition, the "mark" referred to in the present specification can also mean the substrate SiE exposed from the through-hole.

[0049] The marking section 20, as Figure 3 shown in (a) and (b), irradiates laser light output from the laser light source 21 toward the marking site mp of the semiconductor device D via the laser marking optical system 22. The marking section 20 irradiates laser light toward the marking site mp from the metal layer ME side of the semiconductor device D. Details of the marking section 20 will be described below.

[0050] As Figure 1The laser light source 21 outputs laser light to be irradiated toward the semiconductor device D. The laser light forms a through-hole in the metal layer ME. The laser light source 21 starts to output the laser light when an output start command is input from the computer 40. The laser light source 21 can employ, for example, a solid laser light source and a semiconductor laser light source. The wavelength of the light output from the laser light source 21 is 250 nm or more and 2000 nm or less.

[0051] The laser marking optical system 22 irradiates laser light toward the mark site mp of the semiconductor device D. Specifically, the laser marking optical system 22 irradiates laser light toward the semiconductor device D from the metal layer ME side of the semiconductor device D. In other words, the laser marking optical system 22 irradiates laser light toward the semiconductor device D from the surface D2 side of the semiconductor device D. The laser marking optical system 22 has an objective lens 22a and a switching section 22b. The switching section 22b switches the optical paths of the laser light source 21 and the detection camera 24. The objective lens 22a condenses laser light to the mark site mp. The objective lens 22a guides light from the surface of the semiconductor device D to the detection camera 24.

[0052] The laser marking optical system 22 is placed on the XYZ stage 23. The Z-axis direction of the XYZ stage 23 is the optical axis direction of the objective lens 22a. The XYZ stage 23 receives a control command from the computer 40. The XYZ stage 23 moves the laser marking optical system 22 in the Z-axis direction in response to the control command. In addition, the XYZ stage 23 moves the laser marking optical system 22 in the X-axis direction and the Y-axis direction orthogonal to the Z-axis direction in response to the control command. Furthermore, the laser marking optical system 22 can have a light scanning section instead of the XYZ stage 23, and condenses laser light to the mark site mp on the surface D2 of the semiconductor device D. As the light scanning section, a light scanning element such as a galvano-mirror or a MEMS mirror can be used. In addition, the laser marking optical system 22 can be provided with a shutter. According to this configuration, the laser light from the laser light source 21 is passed or blocked by the shutter in accordance with the control from the control section 41b. As a result, the output of the laser light can be controlled.

[0053] The detection camera 24 photographs the metal layer ME of the semiconductor device D from the surface D2 side of the semiconductor device D. The detection camera 24 outputs the photographed image to the computer 40. The user can grasp the state of the laser marking observed from the surface D2 side of the semiconductor device D by confirming the image. The illumination light source 25 illuminates illumination light toward the semiconductor device D when the detection camera 24 photographs.

[0054] <Device configuration section>

[0055] The device arrangement section 30 holds the semiconductor device D. Further, the device arrangement section 30 changes the position of the semiconductor device D with respect to the observation optical system 13. Likewise, the device arrangement section 30 changes the position of the semiconductor device D with respect to the laser marking optical system 22. The device arrangement section 30 has a sample stage 31, a wafer chuck 32, and an XY drive section 33 (a third drive section).

[0056] Therefore, each of the observation optical system 13, the laser marking optical system 22, and the device arrangement section 30 of the analysis apparatus 1 has a drive mechanism. That is, the analysis apparatus 1 has three degrees of freedom. According to the configuration having three degrees of freedom, for example, the laser marking optical system 22 and the device arrangement section 30 can be moved in a state where the observation optical system 13 is fixed. Further, the device arrangement section 30 can also be moved in a state where the observation optical system 13 and the laser marking optical system 22 are fixed. "Fixed" means that the position is not changed. For example, "a state where the observation optical system 13 and the laser marking optical system 22 are fixed" means a state where the relative position of the laser marking optical system 22 with respect to the observation optical system 13 is maintained.

[0057] The wafer chuck 32 is slidably placed on the sample stage 31. The wafer chuck 32 has a device holding section 32a that holds the semiconductor device D. The device holding section 32a includes a through-hole provided in the wafer chuck 32 and a glass plate that physically covers the through-hole.

[0058] The wafer chuck 32 has an alignment target 50. The alignment target 50 (refer to Figure 4 ) is a glass plate. On one face of the glass plate, a pattern that extends radially with a reference point bp as the center is provided. The pattern is, for example, a metal film. As an example, the pattern is made by a thin film of aluminum. Therefore, the pattern constitutes an opaque portion 50b. The glass plate transmits light of a wavelength that passes through the substrate SiE of the semiconductor device D. As a result, the glass plate also transmits light output from the illumination light source 25 and the light source 12. Therefore, a region where the pattern is not provided constitutes a light-transmitting portion 50a. The wafer chuck 32 has a target hole 32b in which the alignment target 50 is arranged. The alignment target 50 is arranged so as to close the target hole 32b. According to this arrangement, the probe camera 24 and the two-dimensional camera 15 can acquire an image of the pattern provided on one face of the glass plate.

[0059] The alignment target 50 is provided to the wafer chuck 32. That is, in the wafer chuck 32, the position at which the device holding section 32a is provided is different from the position at which the alignment target 50 is provided. In a case where the position of the wafer chuck 32 is changed by the XY drive section 33, the position of the semiconductor device D and the position of the alignment target 50 are simultaneously changed. That is, the position of the alignment target 50 with respect to the semiconductor device D mounted to the wafer chuck 32 is not changed.

[0060] The XY drive section 33 moves the wafer chuck 32 in the X-axis direction or the Y-axis direction in response to a control command from the computer 40. As a result, the observation region can be changed without moving the observation optical system 13. Similarly, the irradiation position of the laser light can be changed without moving the laser marking optical system 22.

[0061] Further, the specific configuration of the device arrangement section 30 is not limited to the above-described configuration. The device arrangement section 30 can employ a configuration that functions to hold the semiconductor device D and to move the semiconductor device D in at least one of the X-axis direction and the Y-axis direction. For example, instead of the sample stage 31 and the XY drive section 33, an XY stage that moves the wafer chuck 32 in at least one of the X-axis direction and the Y-axis direction can be provided.

[0062] <Computer>

[0063] The computer 40 is a computer such as a personal computer. The computer 40 is physically configured with a memory such as a RAM, a ROM, a processor (arithmetic circuit) such as a CPU, a communication interface, and a storage section such as a hard disk. The computer 40 can be exemplified by a personal computer, a cloud server, and a smart device (a smart phone, a tablet terminal, and the like). The computer 40 functions by executing a program stored in the memory with the CPU of the computer system. The computer 40 has a condition setting section 41a, a control section 41b, and an image processing section 41c as functional elements.

[0064] <Condition Setting Section>

[0065] The condition setting section 41a sets the mark positions mp based on information indicating the failure position fp input from the input section 41e. A plurality of positions around the determined failure position fp are set as the mark positions mp. The plurality of positions are, for example, four positions. The condition setting section 41a automatically sets the mark positions mp at four positions around the failure position fp with the failure position fp as the center, for example, in a case where information indicating the failure position fp is input. Specifically, the condition setting section 41a sets the mark positions mp as a cross shape with the failure position fp as the center in, for example, a plan view (see FIG. 6). The condition setting section 41a can set the mark positions mp at four positions around the failure position fp with the failure position fp as the center in a case where the failure position fp is determined, for example, in a plan view. Figure 2 (a) and Figure 2(b)). In addition, the marker site mp can be set by the input section 41e accepting input of information indicating the marker site mp from a user who observes the analysis image displayed by the observation display section 41d. In this case, the condition setting section 41a does not automatically set the marker site mp. The condition setting section 41a sets the marker site mp based on the information indicating the marker site mp input from the input section 41e. The condition setting section 41a generates a reference image. The reference image gives the analysis image a mark indicating the failure site fp and a mark indicating the marker site mp. The condition setting section 41a saves the reference image in the memory of the computer 40.

[0066] <Control section>

[0067] The control section 41b controls the XYZ stage 14 of the analysis section 10 in such a manner that the observation area of the failure site falls within the field of view of the two-dimensional camera 15. The control section 41b controls the XYZ stage 23 of the marker 20 in such a manner that the optical axis of the laser marker optical system 22 coincides with the optical axis of the observation optical system 13. The control section 41b controls the XY drive section 33 of the device arrangement section 30 in such a manner that the optical axis of the laser marker optical system 22 overlaps the marker site mp.

[0068] The control section 41b also controls the laser light source 21. The control section 41b outputs an output stop signal to the laser light source 21 when it is determined by the image processing section 41c that the marker image has appeared. The laser light source 21 stops outputting laser light when the output stop signal is input. Thus, the laser light source 21 continuously outputs laser light during the period from when the output start signal is input by the control section 41b until the output stop signal is input. According to the foregoing, the control section 41b controls the laser light source 21 in such a manner that laser marking is performed until the marker image formed by laser marking appears in the pattern image. In addition, since the laser penetration threshold has been set, the control section 41b controls the laser light source 21 in such a manner that laser marking is performed until the laser penetrates the metal layer ME.

[0069] <Image processing section>

[0070] The computer 40 is electrically connected to the two-dimensional camera 15 via a cable. The computer 40 creates a pattern image and an emission image using image data input from the two-dimensional camera 15. Here, it is difficult to determine the emission position in the pattern of the semiconductor device D only from the emission image described above. For this reason, the computer 40 generates an overlap image in which the pattern image based on reflected light from the semiconductor device D and the emission image based on emission from the semiconductor device D are overlapped, as an analysis image.

[0071] The image processing section 41c creates a marker image. The marker image is superimposed with the pattern image including the marker image and the emission image. The created marker image is stored in the memory of the computer 40. In addition, the image processing section 41c displays the marker image on the display section 41d. According to the marker image, the user can correctly grasp the marker position with respect to the position of the failure site in a later process. In addition, the image processing section 41c acquires marker information. The marker information is information necessary to grasp the marker position with respect to the position of the failure site. As the marker information, for example, the distance from the marker position to the position of the failure site, and the orientation of the marker position with the position of the failure site as a reference, and the like can be cited. The acquired marker information can be displayed in a list. In addition, the marker information can be displayed attached to the marker image. In addition, the marker information can be output on a paper medium.

[0072] The computer 40 outputs the analysis image to the display section 41d. The display section 41d is a display device such as a display for displaying the analysis image and the like to the user. The user can confirm the position of the failure site from the analysis image displayed on the display section 41d. In addition, the user inputs information indicating the failure site using the input section 41e. The input section 41e is an input device such as a keyboard and a mouse that accepts input from the user. The input section 41e outputs the information indicating the failure site to the computer 40. Further, the computer 40, the display section 41d, and the input section 41e can be a tablet terminal.

[0073] Further, the image processing section 41c can output a control command to stop irradiation of the laser to the control section 41b. The control command to stop irradiation of the laser is generated using the marker image visualized on the pattern image. Specifically, the image processing section 41c generates the pattern image sequentially in parallel with the laser marker formed by the laser output from the laser light source 21. A hole is formed in the metal layer ME at the marker site mp by the laser marker. When the hole in the metal layer ME is shallow, the intensity of the reflected light at the marker position changes little, and the change in the optical reflection image is also small. In other words, when the hole formed by the laser marker is formed only in the metal layer ME and does not reach the substrate SiE, the intensity of the reflected light at the marker position changes little. Therefore, the change in the optical reflection image is also small. As a result, the influence of the laser marker is not visualized in the pattern image. On the other hand, if the hole in the metal layer ME becomes deep, at least any one of the refractive index, the transmittance, and the reflectance of the light on the back surface D1 side changes greatly. Specifically, if the hole becomes deep to the extent of reaching the boundary surface ss of the metal layer ME and the substrate SiE, at least any one of the refractive index, the transmittance, and the reflectance of the light on the back surface D1 side changes greatly. Due to these changes, the intensity of the reflected light at the marker position changes greatly. As a result, the marker image indicating the marker site is visualized in the pattern image.

[0074] The image processing unit 41c compares the aforementioned reference image with the pattern image. If the comparison results in a difference between the images exceeding a predetermined value, the image processing unit 41c determines that a marker image has appeared. By presetting the predetermined value, the timing of determining that a marker image has appeared can be determined.

[0075] Furthermore, the image processing unit 41c can determine whether a marker image has been displayed based on input from the user. Additionally, if it is determined that a marker image has been displayed, the image processing unit 41c compares a reference image with a pattern image. Moreover, if the marker formation area in the pattern image is offset from the marker area mp in the reference image, the image processing unit 41c can determine that the marker's position has shifted. In this case, laser marking can be performed again to form a marker at the correct marker area mp.

[0076] Secondly, regarding the marking processing of the parsing device 1, using Figures 5 to 8 Please provide an explanation. Figure 5 This is a flowchart showing the main steps of the marking process of the parsing device 1.

[0077] <Analysis Process S10>

[0078] First, the fault location of semiconductor device D is determined (S10). Control unit 41b outputs a parsing command for process S10 to parsing unit 10. Specifically, as follows... Figure 6 As shown in (a), the XYZ stage 14 controls the X-axis and Y-axis directions to move the observation optical system 13, thereby capturing the area to be observed within the field of view of the observation optical system 13. Next, the Z-axis direction of the XYZ stage 14 is controlled to move the observation optical system 13, with the focal position of the objective lens 13a aligned with the area to be observed. Next, the light source 12 illuminates the semiconductor device D. Furthermore, the two-dimensional camera 15 receives the reflected light from the semiconductor device D. The two-dimensional camera 15 generates an optical reflection image based on the reflected light. Furthermore, the two-dimensional camera 15 outputs the optical reflection image to the computer 40. After outputting the optical reflection image, the light source 12 stops illuminating the semiconductor device D. Then, the test unit 11 applies a stimulus signal to the semiconductor device D. Furthermore, the two-dimensional camera 15 receives the light generated by the stimulus signal. The two-dimensional camera 15 generates a emission image based on the light generated by the stimulus signal. Then, the two-dimensional camera 15 outputs the emission image to the computer 40. The image processing unit 41c generates a resolved image formed by superimposing the optical reflection image and the emission image. Secondly, the faulty part fp is determined by analyzing the image.

[0079] As described above, during the analysis process, the positional relationship of the observation optical system 13 relative to the semiconductor device D includes the observation area within the field of view of the observation optical system 13. Furthermore, the positional relationship of the observation optical system 13 relative to the semiconductor device D is maintained during the analysis process. On the other hand, the position of the laser marking optical system 22 relative to the semiconductor device D is not particularly restricted during the analysis process. For example, the optical axis of the laser marking optical system 22 may or may not be aligned with the optical axis of the observation optical system 13. Generally, unless optical axis positioning is performed, the optical axis of the laser marking optical system 22 will not be aligned with the optical axis of the observation optical system 13. In the analysis method of this embodiment, optical axis positioning can be performed before the analysis process, but it is not mandatory. In the analysis method of this embodiment, optical axis positioning is performed after the analysis process is completed.

[0080] <Alignment process S20>

[0081] Next, the observation optical system 13 and the laser marking optical system 22 are positioned (S20). The control unit 41b outputs the alignment command for process S20 to the marking unit 20 and the device placement unit 30. In the following description, the state in which the optical axis of the observation optical system 13 intersects with the fault location of the semiconductor device D is illustrated just before the alignment process is performed. First, as Figure 6 As shown in (b), the XY drive unit 33 controls the X-axis and Y-axis directions to move the wafer chuck 32 so as to capture the aligned target 50 in the field of view of the observation optical system 13 (S21). This movement is also referred to as "retreat of the semiconductor device D". At this time, the control unit 41b stores the amount of movement of the semiconductor device D (wafer chuck 32).

[0082] Secondly, such as Figure 7(a) shown, the XYZ stage 23 controls the X-axis direction and the Y-axis direction to move the laser marking optical system 22 to capture the alignment target 50 in the field of view of the laser marking optical system 22 (S22). Next, the illumination light source 25 outputs illumination light toward the alignment target 50. The illumination light transmits through the light-transmitting portion 50a of the alignment target 50 and is incident on the observation optical system 13. The incident illumination light is captured by the detection camera 24. The detection camera 24 outputs a transmission image to the computer 40. In addition, the illumination light is reflected by the non-transparent portion 50b of the alignment target 50. The reflected light is incident on the laser marking optical system 22 again. Then, the incident reflected light is captured by the detection camera 24. The detection camera 24 outputs a reflection image to the computer 40. The image processing portion 41c calculates the shift of the optical axis of the laser marking optical system 22 with respect to the optical axis of the observation optical system 13 using the transmission image and the reflection image. The movement of the laser marking optical system 22 and the confirmation of the shift amount are repeated until the shift falls within an allowable range. When it is determined that the shift falls within the allowable range, the positioning of the optical axes is completed.

[0083] After the positioning of the optical axes is completed, as shown in Figure 7 (b) shown, the XY drive portion 33 controls the X-axis direction and the Y-axis direction to move the wafer chuck 32 to capture the failure position of the semiconductor device D in the field of view of the observation optical system 13 (S23). At this time, the control portion 41b can control the XY drive portion 33 based on the movement amount stored at the retreat of the semiconductor device D. In addition, the relative position of the laser marking optical system 22 and the semiconductor device D can be controlled using the image data output from the two-dimensional camera 15 and the detection camera 24. In this case, the object of movement is only the semiconductor device D. Also, the movement of the semiconductor device D in this process is referred to as "resetting of the semiconductor device D". That is, since the semiconductor device D is immediately retreated after the positioning of the optical axes is completed, the semiconductor device D is not present in the fields of view of the observation optical system 13 and the laser marking optical system 22. For this reason, the semiconductor device D falls within the fields of view of the observation optical system 13 and the laser marking optical system 22 after the positioning of the optical axes is completed. In more detail, the failure portion of the semiconductor device D is made to coincide with the optical axis of the observation optical system 13 and the optical axis of the laser marking optical system 22. That is, the semiconductor device D is moved after the positioning is completed. In other words, the observation optical system 13 and the laser marking optical system 22 are not moved after the positioning is completed. As a result, the relative positional relationship of the observation optical system 13 and the laser marking optical system 22 is maintained as a result of the positioning.

[0084] <Marking Process S30>

[0085] As Figure 8As shown, laser marking to the mark site mp is executed (S30). The control section 41b outputs a mark command for the process S30 to the mark section 20 and the device arrangement section 30. Specifically, the laser light source 21 outputs laser light. The laser marking is executed for all of the set mark sites mp. Further, in the output operation of the laser light to each mark site mp, the image processing section 41c can determine whether or not a mark image has appeared on the pattern image. In the case where it is determined that the mark image has not appeared on the pattern image, the irradiation of the laser light is executed again. In parallel with the irradiation operation of the laser light, the image processing section 41c generates a pattern image.

[0086] Hereinafter, the effect of the semiconductor failure analysis device 1 of the present embodiment will be described.

[0087] In the semiconductor failure analysis device 1 and the semiconductor failure analysis method, first, the optical axis of the laser marking optical system 22 possessed by the mark section 20 is aligned with the optical axis of the observation optical system 13 possessed by the analysis section 10 based on the alignment target 50 provided to the wafer chuck 32. Thereafter, in a state where the positional relationship between the optical axis of the observation optical system 13 and the optical axis of the laser marking optical system 22 is maintained, laser light is irradiated toward the mark position set to the semiconductor device D. That is, after the optical axis of the observation optical system 13 and the optical axis of the laser marking optical system 22 are aligned, one of the observation optical system 13 and the laser marking optical system 22 is not relatively moved with respect to the other. Therefore, a shift between the position indicated by the movement instruction value and the actual position, which can be caused by the movement, is not generated. As a result, it is possible to reduce the shift of the position indicated by the mark given by the mark section 20 with respect to the position of the failure site indicated by the analysis section 10.

[0088] The control section 41b outputs, before outputting the alignment command, an analysis command for analyzing the failure site of the semiconductor device D by the analysis section 10 to the analysis section 10. According to this configuration, it is possible to give a mark indicating the position of the failure site with high precision.

[0089] The mark command can irradiate laser light toward the semiconductor device D after the wafer chuck 32 is moved to the mark position by the XY drive section 33. According to this configuration, it is possible to irradiate laser light toward the desired position of the semiconductor device D after the optical axis of the laser marking optical system 22 is aligned with the optical axis of the observation optical system 13, and to maintain the absolute position in addition to maintaining the relative position of the observation optical system 13 and the laser marking optical system 22. As a result, it is possible to further reduce the shift of the position indicated by the mark given by the mark section 20.

[0090] The alignment command causes the two-dimensional camera 15 to acquire a first image of the alignment target 50 from one side, causes the detection camera 24 to acquire a second image of the alignment target 50 from the other side, and causes the second drive section to move in such a manner that the optical axis of the laser mark optical system 22 is aligned with the optical axis of the observation optical system 13 based on the first and second images. According to this configuration, the operation of aligning the optical axis of the laser mark optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0091] The alignment target 50 is provided in the wafer chuck 32 at a position different from the device holding section 32a that holds the semiconductor device D. According to this configuration, the optical axis of the laser mark optical system 22 can be aligned with the optical axis of the observation optical system 13 regardless of the type of the semiconductor device D.

[0092] The two-dimensional camera 15 acquires a first image of the alignment target 50 from one side. The detection camera 24 acquires a second image of the alignment target from the other side. According to this configuration, the operation of aligning the optical axis of the laser mark optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0093] The alignment target 50 includes a light-transmitting section 50a through which light can be transmitted and detected by the two-dimensional camera 15 and the detection camera 24. According to this configuration, the operation of aligning the optical axis of the laser mark optical system 22 with the optical axis of the observation optical system 13 can be reliably performed.

[0094] Hereinafter, embodiments of the present application will be described, but the present application is not limited to the above-described embodiments.

[0095] For example, a case where laser marking is performed until the surface of the substrate SiE that is in contact with the metal layer ME is exposed by perforating the metal layer ME with laser light is described. However, the present application is not limited to this mode. The depth of the hole formed by laser marking can be as long as the mark image appears in the pattern image. Specifically, for example, laser marking can be further performed after the metal layer ME is perforated and the surface of the substrate SiE that is in contact with the metal layer ME is exposed. In the case where, for example, the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm, the hole formed by laser marking can be formed by further perforating the metal layer ME by about 1 μm from the surface of the substrate SiE that is in contact with the metal layer ME. In addition, laser marking can not necessarily be performed in such a manner as to perforate the metal layer ME. For example, in the case where the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm, the thickness of the metal layer ME at the site where the hole formed by laser marking is formed can be about 50 nm. That is, the hole can not reach the surface of the substrate SiE that is in contact with the metal layer ME.

[0096] The generation of the pattern image is explained in a case where it is performed during the laser marking. However, it is not limited to this mode. For example, the pattern image can be generated when the output of the laser is stopped. In this case, the output of the laser and the stop of the laser, that is, the generation of the pattern image can be alternately performed at a certain interval.

[0097] In a case where the wavelength of the laser output from the laser light source 21 is 1000 nm or more, the observation optical system 13 can have an optical filter that blocks only the laser having a wavelength of 1000 nm or more. Thus, even in a case where the laser output from the laser light source 21 transmits through the substrate SiE of the semiconductor device D, the laser is blocked in the observation optical system 13. As a result, it is possible to suppress the damage of the light detector by the laser.

[0098] The wavelength of the laser output from the laser light source 21 can also be less than 1000 nm. In this case, in a case where, for example, the semiconductor device D is configured by a substrate such as a silicon substrate, the laser is absorbed by the substrate. As a result, it is possible to suppress the damage of the light detector of the two-dimensional camera 15 or the like by the laser without providing an optical filter or the like.

[0099] The element that applies the stimulus signal to the semiconductor device D is not limited to the test unit 11. As the element that applies the stimulus signal to the semiconductor device D, that is, the stimulus signal application unit, a device that applies a voltage or a current to the semiconductor device D can be used. Furthermore, the device can be used to apply the stimulus signal to the semiconductor device D.

[0100] [SYMBOL EXPLANATION]

[0101] 1: semiconductor failure analysis device

[0102] 10: analysis unit

[0103] 11: test unit

[0104] 12: light source

[0105] 13: observation optical system (first optical system)

[0106] 14: XYZ stage (first driving unit)

[0107] 15: two-dimensional camera (first light detection unit)

[0108] 20: marking unit

[0109] 21: laser light source

[0110] 22: laser marking optical system (second optical system)

[0111] 23: XYZ stage (second driving unit)

[0112] 24: probe camera (2nd light detecting section)

[0113] 25: illumination light source

[0114] 30: device arrangement section

[0115] 31: sample stage

[0116] 32: wafer chuck

[0117] 33: XY drive section (3rd drive section)

[0118] 32a: device holding section

[0119] 32b: target hole

[0120] 40: computer

[0121] 41a: condition setting section

[0122] 41b: control section

[0123] 41c: image processing section

[0124] 41e: input section

[0125] 41d: display section

[0126] 50: alignment target

[0127] 50a: light transmitting section

[0128] 50b: non-transparent section

[0129] D: semiconductor device

[0130] ME: metal layer

[0131] fp: failure site

[0132] mp: mark site

Claims

1. A semiconductor failure analysis apparatus comprising: an analysis section that receives first light from a semiconductor device via a first optical system by a first light detection section, the first optical system being relatively moved with respect to the semiconductor device by a first drive section; a marking section that receives second light from the semiconductor device via a second optical system by a second light detection section, and that irradiates laser light to the semiconductor device via the second optical system, the second optical system being relatively moved with respect to the semiconductor device by a second drive section; a device arrangement section arranged between the analysis section and the marking section, having a chuck that holds the semiconductor device, and provided with a target for positioning of an optical axis of the first optical system and an optical axis of the second optical system, the chuck being relatively moved with respect to the analysis section and the marking section by a third drive section; and a control section that outputs a command to the analysis section, the marking section, and the device arrangement section, the target being detectable from one side of the target by the first light detection section, and being detectable from the other side of the target by the second light detection section, the control section, after moving the chuck to a position where the first light detection section can detect the target, outputting an alignment command to align the optical axis of the second optical system with the optical axis of the first optical system with reference to the target to the marking section and the device arrangement section, outputting a marking command to irradiate the laser light toward a mark position set on the semiconductor device to the marking section and the device arrangement section while maintaining a positional relationship of the optical axis of the first optical system and the optical axis of the second optical system.

2. The semiconductor failure analysis apparatus according to claim 1, wherein the control section outputs an analysis command to analyze a failure site of the semiconductor device by the analysis section to the analysis section before outputting the alignment command.

3. The semiconductor failure analysis apparatus according to claim 1, wherein the marking command irradiates the laser light toward the semiconductor device after moving the chuck to the mark position by the third drive section.

4. The semiconductor failure analysis apparatus according to claim 2, wherein the marking command irradiates the laser light toward the semiconductor device after moving the chuck to the mark position by the third drive section.

5. The semiconductor failure analysis apparatus according to claim 1, wherein the alignment command causes the first light detection section to acquire a first image of the target from one side, causes the second light detection section to acquire a second image of the target from the other side, and causes the second optical system to move in a manner to align the optical axis of the second optical system with the optical axis of the first optical system based on the first image and the second image.

6. The semiconductor failure analysis apparatus according to claim 2, wherein ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ The alignment command causes the first light detection section to acquire a first image of the target from one side, causes the second light detection section to acquire a second image of the target from the other side, and causes the second optical system to move in a manner that aligns the optical axis of the second optical system with the optical axis of the first optical system based on the first image and the second image.

7. The semiconductor failure analysis device according to claim 3, wherein The alignment command causes the first light detection section to acquire a first image of the target from one side, causes the second light detection section to acquire a second image of the target from the other side, and causes the second optical system to move in a manner that aligns the optical axis of the second optical system with the optical axis of the first optical system based on the first image and the second image.

8. The semiconductor failure analysis device according to claim 4, wherein The alignment command causes the first light detection section to acquire a first image of the target from one side, causes the second light detection section to acquire a second image of the target from the other side, and causes the second optical system to move in a manner that aligns the optical axis of the second optical system with the optical axis of the first optical system based on the first image and the second image.

9. The semiconductor failure analysis device according to any one of claims 1 to 8, wherein The target is disposed in the chuck at a position different from a device holding section that holds the semiconductor device.

10. The semiconductor failure analysis device according to any one of claims 1 to 8, wherein The first light detection section acquires a first image of the target viewed from one side, The second light detection section acquires a second image of the target viewed from the other side.

11. The semiconductor failure analysis device according to claim 9, wherein The first light detection section acquires a first image of the target viewed from one side, The second light detection section acquires a second image of the target viewed from the other side.

12. The semiconductor failure analysis device according to any one of claims 1 to 8, wherein The target includes a light transmission section through which light is transmitted and detected by the first light detection section and the second light detection section.

13. The semiconductor failure analysis device according to claim 9, wherein The target includes a light transmission section through which light is transmitted and detected by the first light detection section and the second light detection section.

14. The semiconductor failure analysis device according to claim 10, wherein The target includes a light transmission section through which light is transmitted and detected by the first light detection section and the second light detection section.

15. The semiconductor failure analysis device according to claim 11, wherein The target includes a light transmission section through which light is transmitted and detected by the first light detection section and the second light detection section.

16. A semiconductor failure analysis method for analyzing a semiconductor device using a semiconductor failure analysis device, wherein The semiconductor failure analysis device includes: an analyzing section that receives first light from a semiconductor device via a first optical system by a first light detecting section, the first optical system being relatively moved with respect to the semiconductor device by a first driving section; a marking section that receives second light from the semiconductor device via a second optical system by a second light detecting section, and irradiates the semiconductor device with laser light via the second optical system, the second optical system being relatively moved with respect to the semiconductor device by a second driving section; a device arranging section arranged between the analyzing section and the marking section, having a chuck that holds the semiconductor device, and provided with a target for positioning of an optical axis of the first optical system and an optical axis of the second optical system, the chuck being relatively moved with respect to the analyzing section and the marking section by a third driving section; and a control section that outputs a command to the analyzing section, the marking section, and the device arranging section, the target being detectable from one side of the target by the first light detecting section, and detectable from the other side of the target by the second light detecting section, the semiconductor fault analyzing method comprising: an alignment process of aligning an optical axis of the second optical system with an optical axis of the first optical system based on the target after moving the chuck to a position where the first light detecting section can detect the target; and a marking process of irradiating the semiconductor device with the laser light toward a mark position provided in the semiconductor device while maintaining a positional relationship of the optical axis of the first optical system and the optical axis of the second optical system.

17. The semiconductor fault analyzing method according to claim 16, wherein the marking process irradiates the semiconductor device with the laser light toward the mark position after moving the chuck to the mark position by the third driving section.

18. The semiconductor fault analyzing method according to claim 16, wherein the marking process irradiates the semiconductor device with the laser light toward the mark position after moving the chuck to the mark position by the third driving section.

19. The semiconductor fault analyzing method according to claim 17, wherein the marking process irradiates the semiconductor device with the laser light toward the mark position after moving the chuck to the mark position by the third driving section.

20. The semiconductor fault analyzing method according to any one of claims 16 to 19, wherein the alignment process causes the first light detecting section to acquire a first image of the target from one side, causes the second light detecting section to acquire a second image of the target from the other side, and causes the second driving section to move in a manner of aligning the optical axis of the second optical system with the optical axis of the first optical system based on the first image and the second image.

Images