Control circuit, control method for a multiphase switching circuit and multiphase switching circuit

Abstract

The application discloses a control circuit and method of a multi-phase switching circuit and the multi-phase switching circuit, wherein the multi-phase switching circuit comprises N-phase switching circuits; for each phase switching circuit, the inductor current is reconstructed during the rising process of the inductor current, and the inductor current is directly sampled during the falling process of the inductor current to obtain a sampled inductor current; an upper limit value is set as a preset value obtained according to a compensation signal, and a lower limit value is set as a superimposed value obtained according to the compensation signal and a ramp voltage signal; the reconstructed inductor current is compared with the upper limit value to control the main switch tube to be turned off, and the sampled inductor current is compared with the lower limit value to control the main switch tube to be turned on. The application can solve the jitter problem caused by the noise of the inductor current in the working process through the comparison of the inductor current and the control of the main switch tube, and the switching frequency remains stable to meet the frequency requirement of the multi-phase.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a control circuit, control method, and multiphase switching circuit. Background Technology

[0002] In multiphase switching circuits, increasingly stringent requirements are placed on the transient response of the power supply. For example, the central processing unit (CPU) needs to respond quickly to sudden load changes. Currently, a commonly used control method with relatively fast transient response is BANG-BANG control. Specifically, the control method involves generating a compensation signal through the feedback and reference signals of the switching power supply. Based on the compensation signal, the upper and lower limits of the inductor current are obtained. When the main switch of the switching power supply is turned on, the sampled inductor current value reaches the upper limit, and the main switch is turned off. When the sampled inductor current value reaches the lower limit, the main switch is turned on.

[0003] However, inductor current will have current noise during operation. According to the BANG-BANG control method, the rise or fall of inductor current will fluctuate, or the rise or fall will not start from the same voltage starting point in different operating cycles, thus causing the system operating current to jitter. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a control circuit, control method and multiphase switching circuit for a multiphase switching circuit, so as to solve the jitter problem caused by the fluctuation of inductor current in the prior art.

[0005] This invention discloses a control circuit for a multiphase switching circuit, comprising an N-phase switching circuit, N inductors, and N main switching transistors connected to the inductors. The control circuit includes an N-phase switching signal generation circuit for generating switching control signals to control the switching state of the main switching transistors of corresponding phases. Each phase switching signal generation circuit includes: an inductor current acquisition circuit, which acquires a reconstructed current signal based on the input voltage of the multiphase switching circuit and the inductance value of the inductor during the main switching transistor's on-time, and samples the current of the inductor to acquire a sampled current signal during the main switching transistor's off-time; a limit acquisition circuit, which acquires an upper limit value based on a compensation signal and a lower limit value based on the compensation signal and a ramp voltage signal; and a comparison circuit, which compares the reconstructed current signal with the upper limit value to control the off-time of the main switching transistor based on the comparison result, and compares the sampled current signal with the lower limit value to control the on-time of the main switching transistor based on the comparison result.

[0006] Furthermore, the slope of the reconstructed current signal is the input voltage of the multiphase switching circuit divided by the inductance value of the inductor.

[0007] Furthermore, the limit obtaining circuit sets the upper limit value to a preset value obtained based on the compensation signal, and sets the lower limit value to the superposition value obtained based on the compensation signal and the ramp voltage signal.

[0008] Furthermore, the limit value acquisition circuit uses the compensation signal as the upper limit value; the limit value acquisition circuit includes a lower limit value acquisition circuit, which further includes a subtraction circuit and an adder. The subtraction circuit subtracts the bias voltage from the compensation signal to obtain a second compensation signal, and the adder receives the second compensation signal and the ramp voltage signal to obtain the lower limit value of the phase.

[0009] Furthermore, the limit value acquisition circuit includes an upper limit value acquisition circuit and a lower limit value acquisition circuit. The upper limit value acquisition circuit subtracts the bias voltage value from the value of the compensation signal to obtain the upper limit value. The lower limit value acquisition circuit includes an adder that receives the compensation signal and the ramp voltage signal to obtain the lower limit value of the phase.

[0010] Furthermore, the lower limit value acquisition circuit includes a ramp voltage generation circuit, which receives a clock signal corresponding to a phase to generate the ramp voltage signal. The clock signal is used to control the switching cycle of the phase switching circuit. The starting value of the ramp voltage signal is the value of the compensation signal or the value of the compensation signal minus the value of the bias voltage.

[0011] Secondly, this application provides a control method for a multiphase switching circuit, the multiphase switching circuit including an N-phase switching circuit, the N-phase switching circuit including N inductors and N main switching transistors connected to the inductors, the control method including: for each phase switching circuit, during the conduction period of the main switching transistor of that phase, obtaining a reconstructed current signal based on the input voltage of the multiphase switching circuit and the inductance value of the phase inductor; during the turn-off period of the main switching transistor of that phase, sampling the current of the inductor to obtain a sampled current signal; obtaining an upper limit value of the phase based on a compensation signal, and obtaining a lower limit value of the phase based on the compensation signal and a ramp voltage signal; comparing the reconstructed current signal with the upper limit value to control the turn-off of the main switching transistor of the corresponding phase based on the comparison result; and comparing the sampled current signal with the lower limit value to control the conduction of the main switching transistor of the corresponding phase based on the comparison result.

[0012] Furthermore, the slope of the reconstructed current signal is the input voltage of the multiphase switching circuit divided by the inductance value of the inductor.

[0013] Furthermore, the upper limit value is set to a preset value obtained based on the compensation signal, and the lower limit value is set to the superposition value obtained based on the compensation signal and the ramp voltage signal.

[0014] Further, the compensation signal is used as the upper limit value of the phase; the bias voltage is subtracted from the compensation signal to obtain the second compensation signal, and the second compensation signal and the ramp voltage signal are added together to obtain the lower limit value of the phase.

[0015] Furthermore, a clock signal corresponding to one phase is received to generate the ramp voltage signal. The clock signal is used to control the switching cycle of the phase switching circuit. The initial value of the ramp voltage signal is the value of the compensation signal or the compensation signal minus the bias voltage.

[0016] Thirdly, a multiphase switching circuit is provided, the multiphase switching circuit including an N-phase switching circuit, the N-phase switching circuit including N inductors and N main switching transistors connected to the inductors, characterized in that it includes the above-mentioned control circuit and an N-phase drive circuit, the control circuit generating an N-phase switching control signal, and the N-phase drive circuit correspondingly receiving the N-phase switching control signal to drive the N main switching transistors to work.

[0017] The circuit control method of this invention reconstructs the inductor current during its rise, with the slope of the reconstructed inductor current being the input voltage divided by the inductance value. During the inductor current's fall, the inductor current is directly sampled to obtain the sampled inductor current. An upper limit value is set based on a preset value obtained from a compensation signal, and a lower limit value is set based on the superposition of the compensation signal and the ramp voltage signal. The reconstructed inductor current is compared with the upper limit value to control the main switch to turn off, and the sampled inductor current is compared with the lower limit value to control the main switch to turn on. This application, through the above method, achieves better stability with the upper limit value being a preset value obtained from the compensation signal. The comparison of the inductor current and the control of the main switch in this application can solve the jitter problem caused by current noise during inductor current operation, and the switching frequency remains stable to meet the frequency requirements of multi-phase operation. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of a multiphase switching circuit;

[0019] Figure 2 This is a schematic diagram of one embodiment of the control circuit of the present invention;

[0020] Figure 3 This is a waveform diagram of the working state of the present invention. Detailed Implementation

[0021] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the present invention.

[0022] To provide the public with a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the invention, but those skilled in the art can fully understand the invention without these details.

[0023] The invention is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0024] Please refer to Figure 1 The diagram shows a multiphase step-down switching circuit. The multiphase switching circuit includes N-phase step-down switching circuits. Each phase of the step-down switching circuit includes a main switch transistor, a freewheeling switch transistor, and an inductor. For example, the first phase includes a main switch transistor M01, a freewheeling switch transistor M11, and an inductor L01. The inductor L01 is connected to the common connection point of the main switch transistor M01 and the freewheeling switch transistor M11. The multiphase switching circuit also includes an input capacitor C01, output voltage feedback resistors R01 and R02, a control circuit 200, and N drive circuits 400.

[0025] For example, the control circuit includes an N-phase switch signal generation circuit for generating switch control signals to control the switching state of the main switch transistors of the corresponding phases. For example, each phase switch signal generation circuit includes an inductor current acquisition circuit, a limit acquisition circuit, and a comparison circuit, as shown in the reference. Figure 2 Taking the m-th phase switch signal generation circuit as an example, the inductor current acquisition circuit includes a current reconstruction circuit and a current sampling circuit. During the main switch's conduction period, the current reconstruction circuit obtains a reconstructed current signal based on the input voltage of the multi-phase switch circuit and the inductance value of the inductor. During the main switch's turn-off period, the current sampling circuit samples the inductor current to obtain a sampled current signal. Here, the slope of the reconstructed current signal is the input voltage Vin of the multi-phase switch circuit divided by the inductance value L. The current reconstruction circuit can be composed of a current source, a switch, a capacitor, and other components. The current magnitude of the current source is positively correlated with the input voltage of the multi-phase switch circuit divided by the inductance value of the inductor. By controlling the charging and discharging of the capacitor by the current source through the switch, the slope of the reconstructed current signal during the main switch's turn-off period can be obtained as Vin / L. The current sampling circuit can be implemented using devices such as sampling resistors. The reconstructed current method in this example can solve the problem of inaccurate sampling during the current rise process. Furthermore, the slope of the reconstructed current is only related to the input voltage and the inductance value, which simplifies the parameter relationship of the reconstructed current.

[0026] For example, the limit obtaining circuit obtains an upper limit value based on a compensation signal and a lower limit value based on the compensation signal and a ramp voltage signal. In this embodiment of the invention, the limit obtaining circuit sets the upper limit value to a preset value obtained based on the compensation signal and sets the lower limit value to a superimposed value obtained based on the compensation signal and the ramp voltage signal. Figure 2 In one example shown, the limit obtaining circuit uses the compensation signal Vc as the upper limit value. The limit obtaining circuit includes a lower limit obtaining circuit, which further includes a subtraction circuit and an adder. The subtraction circuit subtracts the bias voltage from the compensation signal to obtain a second compensation signal Vc'. Figure 2 The subtraction circuit is not shown. The adder receives the second compensation signal Vc' and the ramp voltage signal to obtain the lower limit value of the phase.

[0027] In this application, the ramp voltage signal is obtained through a ramp generation circuit. In one example, the lower limit value obtaining circuit further includes a ramp voltage generation circuit. The ramp voltage generation circuit receives a switching control signal PWMm corresponding to a phase and a clock signal CLK corresponding to a phase to generate the ramp voltage signal. The clock signal is used to control the switching cycle of the phase switching circuit. The initial value of the ramp voltage signal is the value of the compensation signal or the value of the compensation signal minus the value of the bias voltage. For example, in this example, the lower limit value is the sum of the second compensation signal Vc' and the ramp voltage signal. Therefore, the initial value of the ramp voltage signal is the value of the second compensation signal Vc', which is either the value of the compensation signal or the value of the compensation signal minus the value of the bias voltage. The ramp voltage signal is pulled down to the initial value before the next clock signal arrives. For example, the ramp voltage signal can be pulled down to the initial value when the PWM signal goes high. The ramp voltage generation circuit can be implemented as a circuit consisting of a current source and a capacitor.

[0028] In another embodiment, the limit value acquisition circuit includes an upper limit value acquisition circuit and a lower limit value acquisition circuit. The upper limit value acquisition circuit subtracts the bias voltage value from the value of the compensation signal to obtain the upper limit value. The lower limit value acquisition circuit includes an adder that receives the compensation signal and the ramp voltage signal to obtain a superimposed value as the lower limit value of the phase.

[0029] For example, the comparison circuit includes two comparators. The first comparator compares the reconstructed current signal with the upper limit value to control the turn-off of the main switch based on the comparison result. The second comparator compares the sampled current signal with the lower limit value to control the turn-on of the main switch based on the comparison result. Figure 2The comparators 220 and 240 are included. The control circuit 220 also includes an RS flip-flop, which receives the output results of the first comparator and the second comparator and generates a switching control signal PWMm to control the switching state of the main switch and the freewheeling switch of the corresponding phase.

[0030] The following is combined Figure 3 The waveform diagram shown illustrates Figure 2 The circuit operates as follows: CLK is the clock signal, iL is the inductor current of the m-th phase. At time t1, the switch control signal PWMm is high, the main switch is turned on, and the inductor current begins to rise. Here, the reconstructed current signal is used in the control loop. When the current reaches the upper limit Vc1, at time t2, the switch control signal PWMm becomes low, the main switch is turned off, and the inductor current is switched to a sampled current signal. At time t3, the inductor current drops to the lower limit, one switching cycle ends, and the next switching cycle begins. The switch control signal PWMm returns to a high level. If the inductor current experiences jitter noise, such as not starting to rise from the lowest point at time t3, the time to reach the upper limit Vc1 will be inconsistent with the previous switching cycle. However, because this application switches the inductor current to a sampled current signal after the main switch is turned off, the inductor current drops to the lower limit at time t6. Figure 3 It can be seen that the time from t3 to t6 in the second cycle is basically the same as the time from t1 to t3 in the first cycle, which does not affect the operating current of the system, thus eliminating the jitter caused by current noise.

[0031] In this application, the upper limit value is a preset value obtained based on the compensation signal, and the lower limit value is the superposition value obtained based on the compensation signal and the ramp voltage signal. This makes the upper limit value relatively stable. Since the compensation signal is a sensitive signal in the system, using the compensation signal as the upper limit value can reduce the instability caused by processing the compensation signal. Superimposing the ramp signal on the lower limit value can stabilize the system frequency. Therefore, it can effectively perform phase homogenization in multiphase switching circuits.

[0032] Finally, as Figure 2 As shown, the multiphase switching circuit of this application further includes an N-phase driving circuit. The control circuit generates an N-phase switching control signal, and the N-phase driving circuit receives the corresponding N-phase switching control signal to drive N main switching transistors to work.

[0033] It should be noted that the terms "valid" and "invalid" are mentioned in this article. In one embodiment, "valid" may correspond to a high level and "invalid" may correspond to a low level; in another embodiment, "valid" may correspond to a low level and "invalid" may correspond to a high level.

[0034] Although the embodiments are described and illustrated separately above, some common technologies are involved. Those skilled in the art can replace and integrate them between the embodiments. If there is any content not explicitly described in one embodiment, then another embodiment that is described can be referred to.

[0035] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.

Claims

1. A control circuit of a multiphase switching circuit, the multiphase switching circuit comprising an N-phase switching circuit, the N-phase switching circuit comprising N inductors and N main switching transistors connected to the inductors, characterized in that, The control circuit comprises N-phase switch signal generation circuits for generating switch control signals to control the switch states of the main switch tubes of the corresponding phases, wherein each phase switch signal generation circuit comprises: an inductor current obtaining circuit for obtaining a reconstructed current signal according to the input voltage of the multi-phase switch circuit and the inductance of the inductor during the conduction of the main switch tube, and obtaining a sampled current signal by sampling the current of the inductor during the non-conduction of the main switch tube, the slope of the reconstructed current signal being the input voltage of the multi-phase switch circuit divided by the inductance of the inductor; a limit value obtaining circuit for obtaining an upper limit value according to the compensation signal and a lower limit value according to the compensation signal and a ramp voltage signal, the limit value obtaining circuit setting the upper limit value as a preset value obtained according to the compensation signal or the value of the compensation signal minus a bias voltage value as the upper limit value; a comparison circuit for comparing the reconstructed current signal with the upper limit value to control the non-conduction of the main switch tube according to the comparison result, and comparing the sampled current signal with the lower limit value to control the conduction of the main switch tube according to the comparison result, wherein the compensation signal is generated according to the feedback signal and the reference signal of the multi-phase switch circuit.

2. The control circuit of claim 1, wherein, The lower limit value is set as a superimposed value obtained according to the compensation signal and the ramp voltage signal.

3. The control circuit of claim 2, wherein, The limit value obtaining circuit comprises a lower limit value obtaining circuit, the lower limit value obtaining circuit further comprising a subtraction circuit and an adder, the subtraction circuit obtaining a second compensation signal by subtracting the bias voltage from the compensation signal, and the adder receiving the second compensation signal and the ramp voltage signal to obtain the lower limit value of the phase.

4. The control circuit of claim 2, wherein, The limit value obtaining circuit comprises a lower limit value obtaining circuit, the lower limit value obtaining circuit comprising an adder, the adder receiving the compensation signal and the ramp voltage signal to obtain the lower limit value of the phase.

5. The control circuit of claim 2, wherein, The lower limit value obtaining circuit comprises a ramp voltage generation circuit, the ramp voltage generation circuit receiving a clock signal of a corresponding phase to generate the ramp voltage signal, the clock signal being used to control the switching period of the phase switch circuit, and the starting value of the ramp voltage signal being the value of the compensation signal or the value of the compensation signal minus the bias voltage value.

6. A control method of a multiphase switching circuit, the multiphase switching circuit comprising an N-phase switching circuit including N inductors and N main switching transistors connected to the inductors, characterized by, The control method comprises: for each phase switch circuit, obtaining a reconstructed current signal according to the input voltage of the multi-phase switch circuit and the inductance of the inductor during the conduction of the main switch tube of the phase, and obtaining a sampled current signal by sampling the current of the inductor during the non-conduction of the main switch tube, the slope of the reconstructed current signal being the input voltage of the multi-phase switch circuit divided by the inductance of the inductor; generating a compensation signal according to the feedback signal and the reference signal of the multi-phase switch circuit, obtaining an upper limit value of the phase according to the compensation signal, and obtaining a lower limit value of the phase according to the compensation signal and a ramp voltage signal, the upper limit value being set as a preset value obtained according to the compensation signal or the value of the compensation signal minus a bias voltage value as the upper limit value; The reconstructed current signal is compared with the upper limit value to control the turn-off of the main switch corresponding to the phase according to the comparison result, and the sampled current signal is compared with the lower limit value to control the turn-on of the main switch corresponding to the phase according to the comparison result.

7. The control method according to claim 6, characterized by The lower limit value is set as a superimposed value obtained according to a compensation signal and a ramp voltage signal.

8. The control method according to claim 7, characterized by The compensation signal is subtracted by a bias voltage to obtain a second compensation signal, and the second compensation signal and the ramp voltage signal are added to obtain the lower limit value of the phase.

9. The control method according to claim 7, characterized by, A clock signal corresponding to a phase is received to generate the ramp voltage signal, the clock signal is used to control the switching period of the switching circuit of the phase, and the starting value of the ramp voltage signal is the value of the compensation signal or the value of the compensation signal minus a bias voltage.

10. A multiphase switching circuit comprising an N-phase switching circuit comprising N inductors and N main switching transistors connected to the inductors, characterized in that, The control circuit comprises the control circuit according to any one of claims 1-5, and an N-phase driving circuit, the control circuit generates N-phase switching control signals, and the N-phase driving circuit receives the N-phase switching control signals correspondingly to drive the N main switches to work.

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