Coil device and semiconductor process chamber

Abstract

The present application discloses a coil device and a semiconductor process chamber, relating to the field of semiconductor process equipment. A coil device, applied to a semiconductor process chamber, comprises: a first dielectric layer, a second dielectric layer, a first coil layer, and a second coil layer; the first dielectric layer and the second dielectric layer are spaced apart, with an air layer formed therebetween; the first coil layer is disposed on the first dielectric layer, and the second coil layer is disposed on the second dielectric layer, with the first coil layer and the second coil layer being disposed correspondingly and connected in series. A semiconductor process chamber comprises the aforementioned coil device. The present application can at least resolve issues such as asymmetric angular distribution of coils.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor equipment technology, and specifically relates to a coil device and a semiconductor process chamber. Background Art

[0002] Deep silicon etching plays an important role in fields such as integrated circuits, micro-electromechanical systems, and advanced packaging, and is a crucial process in industrial production. Low-temperature plasma technology is a key foundation for etching, and inductively coupled plasma (ICP) is a commonly used plasma source for etching and thin film deposition in the semiconductor field. The plasma source of an ICP etcher generates source plasma by passing an RF power supply through a coil to excite a low-pressure gas in a reaction chamber. The coil distribution plays a key role in the etched surface morphology and uniformity.

[0003] In related art, the inner and outer coils are coplanar and each consists of two coil groups connected in parallel. The two coils in each group are axially symmetrically arranged 180° along the axis, and each coil is a 1.5-turn involute structure. However, this arrangement of the inner and outer coils and the structure of the individual coils exhibit significant angular asymmetry, leading to differences in the current distribution within the coils and, consequently, different magnetic field distributions coupled into the plasma, generating an asymmetric magnetic field. This ultimately leads to asymmetric distributions of free radical and ion densities, compromising process accuracy. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a coil device and a semiconductor process chamber that can at least solve problems such as asymmetric angular distribution of coils.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] An embodiment of the present application provides a coil device for use in a semiconductor process chamber, the coil device comprising: a first dielectric layer, a second dielectric layer, a first coil layer, and a second coil layer;

[0007] The first dielectric layer and the second dielectric layer are spaced apart, and an air layer is formed between the two;

[0008] The first coil layer is disposed on the first dielectric layer, the second coil layer is disposed on the second dielectric layer, and the first coil layer and the second coil layer are disposed correspondingly and connected in series.

[0009] An embodiment of the present application also provides a semiconductor process chamber, comprising: a cavity and a dielectric window, wherein the dielectric window is arranged on the top opening of the cavity; the semiconductor process chamber also comprises the above-mentioned coil device, wherein the coil device is arranged on the top of the dielectric window.

[0010] In the embodiment of the present application, the first dielectric layer and the second dielectric layer of the coil device are hollowed out, thereby forming an arrangement of the first dielectric layer, the air layer, and the second dielectric layer. Compared with the arrangement in which both double-layer coil layers are arranged in the dielectric layer, since the dielectric constant of the air layer is smaller than the dielectric constant of each of the first and second dielectric layers, the average dielectric constant between the first and second coil layers can be reduced to a certain extent, thereby reducing the parasitic capacitance of the double-layer coil layer, thereby shifting the resonance flip point upward. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 A first perspective view of a first semiconductor process chamber in the related art;

[0012] Figure 2 A second perspective view of a first semiconductor process chamber in the related art;

[0013] Figure 3 Schematic diagram of coil distribution of a first type of semiconductor process chamber in the related art;

[0014] Figure 4 Schematic diagram of a single coil and magnetic field distribution of the first semiconductor process chamber in the related art;

[0015] Figure 5 is a schematic diagram of a second semiconductor process chamber in the related art;

[0016] Figure 6 is a schematic diagram of a coil structure of a second semiconductor process chamber in the related art;

[0017] Figure 7 Schematic diagram of the resonant flipping caused by parasitic capacitance in the second semiconductor process chamber in the related art;

[0018] Figure 8 Schematic diagram of equivalent connection of parallel parasitic capacitance in an inductor coil in a second semiconductor process chamber in the related art;

[0019] Figure 9 This is a disassembled schematic diagram of the coil device disclosed in the embodiment of the present application;

[0020] Figure 10 This is a schematic diagram of the assembly of the coil device disclosed in the embodiment of the present application;

[0021] Figure 11 This is a schematic diagram of a first form of coil device disclosed in an embodiment of the present application;

[0022] Figure 12 This is a schematic diagram of a second type of coil device disclosed in an embodiment of the present application;

[0023] Figure 13This is a schematic diagram of a third type of coil device disclosed in an embodiment of the present application;

[0024] Figure 14 This is a schematic diagram of a fourth type of coil device disclosed in an embodiment of the present application;

[0025] Figure 15 This is a schematic diagram of a fifth type of coil device disclosed in an embodiment of the present application;

[0026] Figure 16 A schematic diagram of the non-coil surface of the first dielectric layer (or second dielectric layer) disclosed in an embodiment of the present application;

[0027] Figure 17 A schematic diagram of the coil surface of the first dielectric layer (or second dielectric layer) disclosed in an embodiment of the present application;

[0028] Figure 18 This is a schematic diagram of the effects of the first and second types of coil devices on the resonance flip point under the same coil distance conditions disclosed in an embodiment of the present application.

[0029] Description of reference numerals:

[0030] 1-dielectric window; 2-inner coil; 3-outer coil;

[0031] 10-dielectric window; 20-outer coil group; 30-inner coil group;

[0032] 100 - first dielectric layer; 110 - first through hole; 120 - first groove;

[0033] 200 - second dielectric layer; 210 - second through hole; 220 - second groove;

[0034] 300-first coil layer; 310-first coil;

[0035] 400-second coil layer; 410-second coil;

[0036] 500-air layer;

[0037] 600-coil limit frame;

[0038] 700-support column;

[0039] 800-Fasteners. DETAILED DESCRIPTION

[0040] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0041] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0042] The application of the first form of coil structure in the chamber is as follows: Figure 1 and Figure 2 As shown, the coil structure is located above the dielectric window 1 and consists of an inner coil 3 and an outer coil 2. The two coils are located on the same plane. The inner coil 3 is composed of two coil groups connected in parallel. The two coils in each group are symmetrically arranged 180° along the axial direction. Each coil has a 1.5-turn involute structure. The RF signal is fed in parallel from the outer ends of each coil group and fed out in parallel from the inner ends.

[0043] The above coil structure has obvious angular asymmetry, such as Figure 3 As shown in the figure, due to the increase of the radius as the angle changes, there are obvious differences between the first and third quadrants and the second and fourth quadrants, resulting in different current distributions in the coils. These different current distributions will directly lead to different magnetic field distributions coupled to the plasma, that is, the following appears: Figure 4 The asymmetric magnetic field is shown by the circle symbol in the middle. The asymmetry of the magnetic field will cause the asymmetry of the free radical and ion density distribution, and ultimately lead to the uneven distribution of ER.

[0044] In order to solve the above problems, a second type of coil structure is proposed in the related art, such as Figure 5As shown, a double-layer coil structure is located above the surface of the dielectric window 10. This double-layer coil structure is divided into an inner coil group 30 and an outer coil group 20. Each coil group 30 and the outer coil group 20 comprise two coil layers. Each coil layer is composed of multiple angularly rotated coils connected in parallel. The layers are connected in series via the inner edges of the coils. The individual coils are involute in form, but other forms such as polygons or squares are also possible. This compensates for the angular uniformity of the structure. The greater the number of coils in each coil layer, the better the angular uniformity compensation effect, thus resolving the angular and radial asymmetry issues of single-layer coil structures.

[0045] However, although the second form of coil structure can solve the problem of plasma source uniformity, in the actual engineering implementation process, such as Figure 6 As shown in the figure, the double-layer coil is embedded on both sides of the ceramic medium to achieve fixation, but the double-layer coil inductance has a coil impedance resonance flip problem at the working point (13.56MHz), as shown in the figure. Figure 7 As shown, the inductor coil is not inductive at the operating frequency point, which requires shifting the flip point frequency upward to ensure engineering application.

[0046] After analysis, the above phenomenon is mainly caused by the parallel parasitic capacitance in the inductor coil. The equivalent connection diagram of the parallel parasitic capacitance and the inductor coil is as follows: Figure 8 shown.

[0047] In the absence of parasitic capacitance, the impedance across the inductor is Z = jωL;

[0048] In the case of a parallel parasitic capacitance C p When there is, the impedance across the inductor coil Z=(jωL*1 / jωC p ) / (jωL+1 / jωC p )=jωL / (1-ω 2 LC p ), when the parasitic capacitance C p When it is large enough, there will be 1-ω 2 LC p <0, that is, the two ends of the inductor coil show capacitance characteristics, which leads to a resonance flip problem in the impedance, and thus cannot work normally within the operating frequency range of the etcher.

[0049] In order to solve the problem of resonant reversal of coil impedance during engineering implementation, an embodiment of the present application provides a coil device, through which the coil resonance reversal frequency point can be increased to ensure the engineering application of the coil device.

[0050] refer to Figures 9 to 18The embodiment of the present application discloses a coil device for use in a semiconductor process chamber. The disclosed coil device includes a first dielectric layer 100, a second dielectric layer 200, a first coil layer 300, and a second coil layer 400.

[0051] Among them, the first dielectric layer 100 and the second dielectric layer 200 are arranged at intervals, and an air layer 500 is formed between the two, the first coil layer 300 is arranged on the first dielectric layer 100, the second coil layer 400 is arranged on the second dielectric layer 200, and the first coil layer 300 and the second coil layer 400 are arranged correspondingly and connected in series. Based on this, the first dielectric layer 100 and the second dielectric layer 200 of the coil device in the embodiment of the present application are hollowed out, so that an arrangement form of the first dielectric layer 100, the air layer 500 and the second dielectric layer 200 can be formed. Compared with the form in which both double-layer coil layers are arranged in the dielectric layer, since the dielectric constant of the air layer 500 is smaller than the dielectric constant of each of the first dielectric layer 100 and the second dielectric layer 200, the average dielectric constant between the first coil layer 300 and the second coil layer 400 can be reduced to a certain extent, thereby reducing the parasitic capacitance of the double-layer coil layer, so that the resonance flip point is moved up. According to current engineering practice, the coil device in the embodiment of the present application can be used to move the resonant flip frequency of the double-layer coil up to greater than 15.5MHz, such as Figure 18 As shown, in this way, the problem of the coil resonating and flipping caused by the large parallel parasitic capacitance in the coil can be effectively alleviated.

[0052] In order to reduce the influence of parasitic capacitance, the embodiment of the present application improves the structure of the coil device to ensure that the inductor coil works inductively at the working frequency, that is, 1-ω 2 LC p >0.

[0053] Among them, the coil device of the first structural form is:

[0054] like Figure 11 As shown, the first coil layer 300 is disposed on the side of the first dielectric layer 100 facing the second dielectric layer 200, and the second coil layer 400 is disposed on the side of the second dielectric layer 200 facing the first dielectric layer 100. The first coil layer 300 and the second coil layer 400 are disposed opposite each other and separated by an air layer 500. In this structure, the first coil layer 300 and the second coil layer 400 are both located inside the first dielectric layer 100 and the second dielectric layer 200, and the air layer 500, which has a lower dielectric constant, separates the two coil layers. This reduces the average dielectric constant between the layers of the coil device, thereby reducing the parasitic capacitance of the two coil layers, thereby shifting the resonance flip point upward.

[0055] The second structural form of the coil device is:

[0056] like Figure 13 As shown, the first coil layer 300 is disposed on the side of the first dielectric layer 100 facing away from the second dielectric layer 200, and the second coil layer 400 is disposed on the side of the second dielectric layer 200 facing away from the first dielectric layer 100. The first coil layer 300 and the second coil layer 400 are disposed opposite each other and are separated by the first dielectric layer 100, the air layer 500, and the second dielectric layer 200. In this structure, the first coil layer 300 and the second coil layer 400 are both located outside the first dielectric layer 100 and the second dielectric layer 200. As a result, the average interlayer dielectric constant between the first coil layer 300 and the second coil layer 400 is lower than that of a single dielectric layer. This can reduce the parasitic capacitance of the double-layer coil to a certain extent, shifting the resonance flip point upward.

[0057] At the same time, compared with the coil device of the first structural form mentioned above, in the coil device of the second structural form, the average dielectric constant between the layers of the double-layer coil is relatively large, so that the effect of the coil device of the second structural form in shifting the resonance flip point upward is not as good as that achieved by the coil device of the first structural form.

[0058] The third structural form of the coil device is:

[0059] like Figure 12 As shown, the first coil layer 300 is disposed on the side of the first dielectric layer 100 facing away from the second dielectric layer 200, and the second coil layer 400 is disposed on the side of the second dielectric layer 200 facing the first dielectric layer 100. The first coil layer 300 and the second coil layer 400 are disposed opposite each other and separated by the first dielectric layer 100 and the air layer 500. In this structure, the first coil layer 300 is located outside the first dielectric layer 100 and the second dielectric layer 200, while the second coil layer 400 is located inside the first dielectric layer 100 and the second dielectric layer 200. As a result, the average interlayer dielectric constant between the first coil layer 300 and the second coil layer 400 is lower than that of a single dielectric layer. This can reduce the parasitic capacitance of the double-layer coil to a certain extent, shifting the resonance flip point upward.

[0060] At the same time, compared with the coil devices of the first and second structural forms mentioned above, the average interlayer dielectric constant of the double-layer coil in the coil device of the third structural form is greater than the average interlayer dielectric constant of the double-layer coil in the coil device of the first structural form, and smaller than the average interlayer dielectric constant of the double-layer coil in the coil device of the second structural form, so that the effect of the coil device of the third structural form in achieving the upward shift of the resonance flip point is better than the effect achieved by the coil device of the second structural form, but not as good as the effect achieved by the coil device of the first structural form.

[0061] The coil arrangement of the fourth structural form (the arrangement is opposite to the third structural form) is:

[0062] The first coil layer 300 is disposed on the side of the first dielectric layer 100 facing the second dielectric layer 200, while the second coil layer 400 is disposed on the side of the second dielectric layer 200 facing away from the first dielectric layer 100. The first coil layer 300 and the second coil layer 400 are disposed opposite each other and separated by the second dielectric layer 200 and the air layer 500. In this structure, the first coil layer 300 is located between the first and second dielectric layers 100, 200, while the second coil layer 400 is located outside of the first and second dielectric layers 100, 200. This reduces the average dielectric constant between the first and second coil layers 300, 400 compared to a single dielectric layer. This reduces the parasitic capacitance of the double-layer coil to a certain extent, shifting the resonant flip point upward.

[0063] At the same time, compared with the coil devices of the first and second structural forms mentioned above, the average interlayer dielectric constant of the double-layer coil in the coil device of the fourth structural form is greater than the average interlayer dielectric constant of the double-layer coil in the coil device of the first structural form, and smaller than the average interlayer dielectric constant of the double-layer coil in the coil device of the second structural form, so that the effect of the coil device of the fourth structural form in achieving the upward shift of the resonance flip point is better than the effect achieved by the coil device of the second structural form, but not as good as the effect achieved by the coil device of the first structural form.

[0064] In summary, the coil device with the first structure has the smallest average interlayer dielectric constant and achieves the best effect of shifting the resonance flip point upward. When the first dielectric layer 100 and the second dielectric layer 200 have the same thickness and material, the coil device with the third structure and the coil device with the fourth structure have the same distance between the first coil layer 300 and the second coil layer 400, resulting in the same average interlayer dielectric constant, thereby achieving the same effect of shifting the resonance flip point upward.

[0065] refer to Figure 14 and Figure 15In some embodiments, the first coil layer 300 may include multiple first coils 310 connected in parallel, with the multiple first coils 310 being staggered along the axial direction of the first coil layer 300. This can reduce the relative area between the multiple first coils 310 in the first coil layer 300, thereby reducing parasitic capacitance issues between the multiple first coils 310 in the first coil layer 300.

[0066] Similarly, the second coil layer 400 may include multiple second coils 410 arranged in parallel, with the multiple second coils 410 being staggered along the axial direction of the second coil layer 400. This can reduce the relative area between the multiple second coils 410 in the second coil layer 400, thereby reducing the parasitic capacitance problem between the multiple second coils 410 in the second coil layer 400.

[0067] Furthermore, the plurality of first coils 310 and the plurality of second coils 410 are provided in a one-to-one correspondence, and the distances between the plurality of pairs of corresponding first coils 310 and second coils 410 are equal. For example, the distance between each pair of corresponding first coils 310 and second coils 410 is H. Based on this, the average dielectric constants between the layers of the plurality of pairs of corresponding first coils 310 and second coils 410 can be ensured to be equal, thereby having the same impact on the resonance flip point.

[0068] To further reduce the parasitic capacitance of the double-layer coil in the coil device, in some embodiments, the dielectric constant of the first dielectric layer 100 is less than 6, and the temperature tolerance of the first dielectric layer 100 is greater than 180°C. Furthermore, the dielectric constant of the first dielectric layer 100 can be ε ≤ 5, specifically 5, 4, 3, etc., and other values ​​are also possible. The temperature tolerance of the first dielectric layer 100 can be greater than 200°C, specifically 200°C, 220°C, 250°C, etc., and other values ​​are also possible.

[0069] Similarly, the dielectric constant of the second dielectric layer 200 is less than 6, and the temperature tolerance of the second dielectric layer 200 is higher than 180°C. Furthermore, the dielectric constant of the second dielectric layer 200 can be ε≤5, specifically 5, 4, 3, etc., and other values ​​are also possible. The temperature tolerance of the second dielectric layer 200 can be higher than 200°C, specifically 200°C, 220°C, 250°C, etc., and other values ​​are also possible.

[0070] Furthermore, the first dielectric layer 100 and the second dielectric layer 200 can be ceramic layers or engineering plastic layers. Specifically, the first dielectric layer 100 and the second dielectric layer 200 can both be ceramic layers, or both can be engineering plastic layers, or one can be a ceramic layer and the other can be an engineering plastic layer.

[0071] Optionally, the ceramic material layer may include at least one of boron nitride or beryllium oxide; and the engineering plastic layer may include at least one of polytetrafluoroethylene (PTFE), polyetheretherketone (PEEK), or polyetherimide (ULTEM). Therefore, by selecting ceramic or engineering plastic materials with low dielectric constant and high thermal conductivity, the parasitic capacitance of the double-layer coil can be further reduced.

[0072] To dissipate heat from the coil assembly, in some embodiments, the first dielectric layer 100 is provided with a plurality of first through-holes 110 arranged circumferentially and extending through the first dielectric layer 100. Each first through-hole 110 is radially disposed along the radial direction of the first dielectric layer 100. This ensures the structural strength of the first dielectric layer 100 while radially hollowing out the first dielectric layer 100, allowing the surface of the first coil 310 to be more exposed to air, thereby improving heat dissipation. Furthermore, the dielectric between the coil layers becomes a dielectric-air combination, thereby reducing the average dielectric constant within the plane of the first coil 310 and, in turn, the parasitic capacitance within the plane of the first coil 310, further raising the resonance flip point.

[0073] Similarly, the second dielectric layer 200 is provided with a plurality of second through-holes 210 arranged circumferentially and extending through the second dielectric layer 200. Each second through-hole 210 is radially arranged along the radial direction of the second dielectric layer 200. This ensures the structural strength of the second dielectric layer 200 while radially hollowing out the second dielectric layer 200, allowing the surface of the second coil 410 to be more exposed to air, thereby improving heat dissipation. Furthermore, the dielectric between the coil layers becomes a dielectric-air combination, thereby reducing the average dielectric constant within the plane of the second coil 410, thereby reducing the parasitic capacitance within the plane of the second coil 410 and further improving the resonant flip point.

[0074] Furthermore, the projections of the multiple first through-holes 110 on the first plane at least partially overlap with the projections of the first coil layer 300 on the first plane. Consequently, the multiple first through-holes 110 can expose the first coil layer 300, minimizing obstruction of the first coil layer 300 and facilitating better heat dissipation from the first coil layer 300. The first plane is perpendicular to the axis of the coil assembly; that is, the first plane is parallel to the surface of the first dielectric layer 100.

[0075] Similarly, the projections of the plurality of second through holes 210 on the second plane at least partially overlap with the projections of the second coil layer 400 on the second plane. Consequently, the plurality of second through holes 210 can expose the second coil layer 400, minimizing obstruction of the second coil layer 400 and facilitating better heat dissipation from the second coil layer 400. The second plane is perpendicular to the axis of the coil assembly; that is, the second plane is parallel to the surface of the second dielectric layer 200.

[0076] To effectively secure the coils, in some embodiments, a first groove 120 is provided on the side of the first dielectric layer 100 facing or away from the second dielectric layer 200, extending along the circumference of the first dielectric layer 100. The first coil layer 300 is at least partially disposed within the first groove 120, and the projection of the first groove 120 on the first plane at least partially overlaps with the projection of the plurality of first through-holes 110 on the first plane. Consequently, the first groove 120 allows for the installation and positioning of the first coil layer 300, ensuring its stability and preventing it from separating from the first dielectric layer 100. Furthermore, the first through-holes 110 facilitate heat dissipation from the first coil layer 300.

[0077] Similarly, a second groove 220 is provided on the side of the second dielectric layer 200 facing or away from the first dielectric layer 100, extending along the circumference of the second dielectric layer 200. The second coil layer 400 is at least partially disposed within the second groove 220, and the projection of the circumferential path of the second groove 220 on the second plane at least partially overlaps with the projections of the plurality of second through-holes 210 on the second plane. Consequently, the second groove 220 can be used to mount and position the second coil layer 400, ensuring its installation stability and preventing it from separating from the second dielectric layer 200. Simultaneously, the first through-holes 110 facilitate heat dissipation from the first coil layer 300.

[0078] When the first coil layer 300 and the second coil layer 400 respectively include a plurality of coils, the first groove 120 and the second groove 220 may each include a plurality of groove units, so as to facilitate the installation and fixation of the plurality of coils.

[0079] Furthermore, the depth of the first groove 120 is half the height of the first coil layer 300. On the one hand, the first coil layer 300 can be fixedly installed through the first groove 120. On the other hand, the first coil layer 300 can be partially exposed, which can improve the heat dissipation effect of the first coil layer 300 to a certain extent.

[0080] Similarly, the depth of the second groove 220 is half the height of the second coil layer 400. On the one hand, the second coil layer 400 can be fixedly installed through the second groove 220. On the other hand, the second coil layer 400 can be partially exposed, which can improve the heat dissipation effect of the second coil layer 400 to a certain extent.

[0081] In order to prevent the coil layer from separating from the dielectric layer, the coil device may further include a coil limiting frame 600, which is connected to the first dielectric layer 100 or the second dielectric layer 200 to limit the first coil layer 300 to the first dielectric layer 100 or the second coil layer 400 to the second dielectric layer 200. Optionally, the coil limiting frame 600 may be a plate-like structure, a rod-like structure, a block-like structure, etc., which may be detachably mounted to the first dielectric layer 100 or the second dielectric layer 200 by means of fixing members such as screws. In addition, a plurality of coil limiting frames 600 may be arranged at circumferential intervals along the first dielectric layer 100 or the second dielectric layer 200 to increase the limiting area and improve the limiting stability and firmness. Based on the above arrangement, the coil layer may be fixed to the dielectric layer by the coil limiting frame 600 to prevent the coil layer from separating from the dielectric layer and affecting the normal application of the coil device.

[0082] In order to space the first dielectric layer 100 and the second dielectric layer 200 and form an air layer 500 therebetween, the coil device may further include a plurality of support columns 700. The plurality of support columns 700 are arranged between the first dielectric layer 100 and the second dielectric layer 200, with one end of each support column 700 abutting the first dielectric layer 100 and the other end abutting the second dielectric layer 200. Thus, the plurality of support columns 700 can support the first dielectric layer 100 and the second dielectric layer 200, thereby spaced apart from each other and forming the air layer 500 therebetween.

[0083] Furthermore, the support column 700 is fastened to the first dielectric layer 100 and the second dielectric layer 200 respectively via fasteners 800. In this way, the support column 700 can be fastened to the first dielectric layer 100 and the second dielectric layer 200 respectively, thereby providing a foundation for the coil installation and facilitating repair and maintenance of the coil assembly.

[0084] In a more specific embodiment, the first dielectric layer 100 and the second dielectric layer 200 are both dielectric layers made of polyetherimide (Ultem), and radial radiation holes (i.e., first through holes 110 or second through holes 210) are opened in the radial direction of each dielectric layer to facilitate heat dissipation of the coil; a dielectric groove (i.e., first groove 120 or second groove 220) with the same shape as the coil projection is engraved at the contact surface between each dielectric layer and the coil, and the depth of the dielectric groove is half of the coil diameter; the coil is embedded in the dielectric groove, and the coil is limited in the dielectric groove by a coil pressure strip (i.e., coil limiting frame 600); dielectric screws (i.e., fasteners 800) are used to install each dielectric layer and support column 700 to ensure the distance between the first dielectric layer 100 and the second dielectric layer 200 through the support column 700; finally, a connecting copper sheet is used to connect the first coil layer 300 and the second coil layer 400 in series. The assembled coil device is as follows Figure 10 shown.

[0085] Based on the aforementioned coil device, embodiments of the present application further disclose a semiconductor process chamber. The disclosed semiconductor process chamber includes a chamber body, a dielectric window, and the aforementioned coil device. The dielectric window is disposed on the top opening of the chamber body, and the coil device is disposed on top of the dielectric window. It should be noted that the specific structure and operating principle of the semiconductor process chamber can be referenced in related art and will not be elaborated on in detail here.

[0086] In summary, the present invention aims to improve the structure and electromagnetic parameters of the coil device to reduce the influence of parasitic capacitance and ensure that the inductor coil works in an inductive manner at the operating frequency (i.e., 1-ω 2 LC p >0), which solved the resonance flip problem that occurred during the engineering implementation process and increased the coil resonance flip frequency point in the existing structure by more than 2 times, ensuring the working application of the double-layer coil.

[0087] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A coil device, used in a semiconductor process chamber, characterized in that: The coil device comprises: a first dielectric layer (100), a second dielectric layer (200), a first coil layer (300), and a second coil layer (400); The first dielectric layer (100) and the second dielectric layer (200) are spaced apart, and an air layer (500) is formed between the two; The first coil layer (300) is arranged on the first dielectric layer (100), the second coil layer (400) is arranged on the second dielectric layer (200), and the first coil layer (300) and the second coil layer (400) are arranged correspondingly and connected in series; The first dielectric layer (100) is provided with a plurality of first through holes (110) arranged along the circumferential direction and penetrating the first dielectric layer (100), and each of the first through holes (110) is radially arranged along the radial direction of the first dielectric layer (100); and / or the second dielectric layer (200) is provided with a plurality of second through holes (210) arranged along the circumferential direction and penetrating the second dielectric layer (200), and each of the second through holes (210) is radially arranged along the radial direction of the second dielectric layer (200).

2. The coil device according to claim 1, wherein The first coil layer (300) is arranged on a side of the first dielectric layer (100) facing the second dielectric layer (200), and the second coil layer (400) is arranged on a side of the second dielectric layer (200) facing the first dielectric layer (100); The first coil layer (300) and the second coil layer (400) are arranged opposite to each other and are separated by the air layer (500).

3. The coil device according to claim 1, wherein The first coil layer (300) is arranged on a side of the first dielectric layer (100) facing away from the second dielectric layer (200), and the second coil layer (400) is arranged on a side of the second dielectric layer (200) facing away from the first dielectric layer (100); The first coil layer (300) and the second coil layer (400) are arranged opposite to each other and are separated by the first dielectric layer (100), the air layer (500) and the second dielectric layer (200).

4. The coil device according to claim 1, wherein The first coil layer (300) is arranged on a side of the first dielectric layer (100) facing away from the second dielectric layer (200), and the second coil layer (400) is arranged on a side of the second dielectric layer (200) facing the first dielectric layer (100). The first coil layer (300) and the second coil layer (400) are arranged opposite to each other and are separated by the first dielectric layer (100) and the air layer (500). Alternatively, the first coil layer (300) is arranged on a side of the first dielectric layer (100) facing the second dielectric layer (200), and the second coil layer (400) is arranged on a side of the second dielectric layer (200) facing away from the first dielectric layer (100), and the first coil layer (300) and the second coil layer (400) are arranged opposite to each other and separated by the second dielectric layer (200) and the air layer (500).

5. The coil device according to any one of claims 1 to 4, characterized in that The first coil layer (300) comprises a plurality of first coils (310) arranged in parallel, and the plurality of first coils (310) are staggered along the axial direction of the first coil layer (300); And / or, the second coil layer (400) comprises a plurality of second coils (410) arranged in parallel, and the plurality of second coils (410) are staggered along the axial direction of the second coil layer (400).

6. The coil device according to claim 5, characterized in that The plurality of first coils (310) and the plurality of second coils (410) are arranged in a one-to-one correspondence, and the distances between the plurality of pairs of correspondingly arranged first coils (310) and second coils (410) are all equal.

7. The coil device according to claim 1, wherein The dielectric constant of the first dielectric layer (100) is less than 6, and the temperature resistance of the first dielectric layer (100) is higher than 180°C; And / or, the dielectric constant of the second dielectric layer (200) is less than 6, and the temperature resistance of the second dielectric layer (200) is higher than 180°C.

8. The coil device according to claim 7, characterized in that The dielectric constant of the first dielectric layer (100) is less than 5, and the temperature resistance of the first dielectric layer (100) is higher than 200°C; The dielectric constant of the second dielectric layer (200) is less than 5, and the temperature resistance of the second dielectric layer (200) is higher than 200°C.

9. The coil device according to claim 8, characterized in that The first dielectric layer (100) and the second dielectric layer (200) are ceramic material layers or engineering plastic layers; Wherein, the material of the ceramic material layer includes at least one of boron nitride or beryllium oxide; The material of the engineering plastic layer includes at least one of polytetrafluoroethylene, polyetheretherketone or polyetherimide.

10. The coil device according to claim 1, wherein The projections of the plurality of first through holes (110) in the first plane at least partially overlap with the projection of the first coil layer (300) in the first plane; The projections of the plurality of second through holes (210) in the second plane at least partially overlap with the projection of the second coil layer (400) in the second plane; The first plane and the second plane are both perpendicular to the axis of the coil device.

11. The coil device according to claim 10, characterized in that A first groove (120) is provided on a side of the first dielectric layer (100) facing or away from the second dielectric layer (200) and arranged circumferentially along the circumference of the first dielectric layer (100); the first coil layer (300) is at least partially arranged in the first groove (120); and a projection of a circumferential path of the first groove (120) in the first plane at least partially overlaps with a projection of the plurality of first through holes (110) in the first plane; A second groove (220) is provided on a side of the second dielectric layer (200) facing toward or away from the first dielectric layer (100) and is arranged circumferentially along the second dielectric layer (200); the second coil layer (400) is at least partially arranged in the second groove (220); and a projection of a circumferential path of the second groove (220) in the second plane at least partially overlaps with a projection of the plurality of second through holes (210) in the second plane.

12. The coil device according to claim 11, characterized in that The depth of the first groove (120) is half the height of the first coil layer (300); The depth of the second groove (220) is half the height of the second coil layer (400).

13. The coil device according to any one of claims 1 to 4, characterized in that The coil device further comprises a coil limiting frame (600), wherein the coil limiting frame (600) is connected to the first dielectric layer (100) or the second dielectric layer (200) to limit the first coil layer (300) to the first dielectric layer (100) or to limit the second coil layer (400) to the second dielectric layer (200).

14. The coil device according to any one of claims 1 to 4, characterized in that The coil device further comprises a plurality of support columns (700); A plurality of support columns (700) are arranged between the first dielectric layer (100) and the second dielectric layer (200), one end of each support column (700) abuts against the first dielectric layer (100), and the other end abuts against the second dielectric layer (200), and the support columns (700) are fastened to the first dielectric layer (100) and the second dielectric layer (200) respectively via fasteners (800).

15. A semiconductor process chamber comprising: A cavity and a dielectric window, wherein the dielectric window is arranged on the top opening of the cavity, characterized in that the semiconductor process chamber further includes a coil device according to any one of claims 1 to 14, and the coil device is arranged on the top of the dielectric window.

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