Method of manufacturing an electronic device

Abstract

The present disclosure provides a manufacturing method of an electronic device, comprising the following steps: providing a substrate; forming a plurality of first bonding pads on the substrate; providing a plurality of electronic components, and each of the electronic components comprises at least one second bonding pad; and pressing a plurality of second bonding pads of the plurality of electronic components to at least one corresponding first bonding pad on the substrate, so that the plurality of electronic components are bonded to the substrate. The first bonding pad and the second bonding pad corresponding to each other have different bonding surfaces. The manufacturing method of the electronic device of the present disclosure can reduce the problem of short circuit during bonding or can improve the bonding yield.

Description

[0001] This disclosure is a divisional application of the invention patent application with application number 202110387357.X filed on April 9, 2021, and invention name “Manufacturing Method of Display Device”. Technical Field

[0002] The present disclosure relates to a method for manufacturing an electronic device, and more particularly to a method for manufacturing an electronic device that can reduce the problem of short circuits occurring during bonding or improve bonding yield. Background Art

[0003] As electronic devices become smaller, the spacing between the contacts of electronic components decreases, making the bonding between electronic components and carrier boards increasingly difficult. Therefore, improving the bonding yield has become a goal of the industry. Summary of the Invention

[0004] The present disclosure provides a method for manufacturing an electronic device, which can reduce the problem of short circuits occurring during bonding or improve the bonding yield.

[0005] According to an embodiment of the present disclosure, a method for manufacturing an electronic device includes the following steps: providing a substrate; forming a plurality of first bonding pads on the substrate; providing a plurality of electronic components, each of which includes at least one second bonding pad; and laminating the plurality of second bonding pads of the plurality of electronic components to the corresponding at least one first bonding pad on the substrate, thereby bonding the plurality of electronic components to the substrate. The corresponding first bonding pads and second bonding pads each have bonding surfaces with different surface topography. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure.

[0007] Figures 1A-1C is a schematic three-dimensional diagram of a method for manufacturing an electronic device according to an embodiment of the present disclosure;

[0008] Figures 2A-2C for Figures 1B-1C A cross-sectional schematic diagram of the second bonding pad being pressed onto the first bonding pad;

[0009] Figures 3A-3C A partial cross-sectional schematic diagram of a method for manufacturing an electronic device according to another embodiment of the present disclosure;

[0010] Figures 4A-4C FIG1 is a partial cross-sectional schematic diagram of a method for manufacturing an electronic device according to another embodiment of the present disclosure.

[0011] Explanation of Figure Numbers

[0012] 100, 100a, 100b: electronic device;

[0013] 110: electronic element;

[0014] 111, 112, 113: second bonding pad;

[0015] 111a, 112a, 113a, 141a, 142a, 143a: bonding surface;

[0016] 111b, 111b', 112b, 112b', 113b, 113b': local position;

[0017] 120: growth substrate;

[0018] 130: transfer substrate;

[0019] 140: substrate;

[0020] 141, 142, 143: first bonding pad;

[0021] 150, 160: oxide layer;

[0022] A1, A2: gap;

[0023] A3: recess;

[0024] L1, L2: width;

[0025] T1, T2: thickness;

[0026] Z: direction. DETAILED DESCRIPTION

[0027] The present disclosure can be understood with reference to the following detailed description and drawings, wherein it is noted that for the reader's ease of understanding and for brevity of the drawings, multiple drawings in the present disclosure only draw a part of an electronic device, and specific elements in the drawings are not drawn according to actual proportions. In addition, the number and size of each element in the drawings are only for illustration, and are not intended to limit the scope of the present disclosure.

[0028] In the following description and claims, the words "comprising" and "including" and the like are to be construed open-ended, thus including but not limited to...

[0029] It will be understood that when an element or film layer is referred to as being "on" or "connected to" another element or film layer, it can be directly on or connected to the other element or film layer or intervening elements or film layers can be present (indirectly on or connected to). In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or film layer, there are no intervening elements or film layers present.

[0030] Although the terms "first", "second", "third" etc. can be used herein to describe various elements, components, regions and / or sections, these elements, components, regions and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region and / or section from another element, component, region and / or section. The terms "first", "second", "third" etc. can not be used in the claims. The elements declared in the claims can be replaced by first, second, third etc. according to the order of declaration in the claims. Therefore, in the following description, a first element can be a second element in the claims.

[0031] In some embodiments of the present disclosure, the term "connected" or "interconnected" or the like with respect to a junction or connection can mean that two structures are in direct contact, or can mean that two structures are not in direct contact, with other structures disposed between the two structures. Also, the term "connected" or "interconnected" or the like with respect to a junction or connection can include cases where both of the two structures are movable, or cases where both of the two structures are fixed. In addition, the term "coupled" includes any direct and indirect electrical connection means.

[0032] In the present disclosure, the measurement of length, width or thickness can be by optical microscope or by cross-sectional image in an electron microscope, but is not limited thereto. In addition, there can be an error in any two values or directions used for comparison.

[0033] The electronic device can include a display device, a backlight device, an antenna device, a sensing device, or a splicing device, but is not limited thereto. The electronic device can be a foldable or flexible electronic device. The display device can be a non-self-emissive display device or a self-emissive display device. The antenna device can be a liquid crystal type antenna device or a non-liquid crystal type antenna device, and the sensing device can be a sensing device that senses capacitance, light, heat energy, or ultrasonic waves, but is not limited thereto. The electronic elements can include passive elements and active elements, such as a capacitor, a resistor, an inductor, a diode, a transistor, etc. The diode can include a light emitting diode or a photodiode. The light emitting diode can include, for example, an organic light emitting diode (OLED), a mini LED, a micro LED, or a quantum dot LED, but is not limited thereto. The splicing device can be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device can be any arrangement combination of the above, but is not limited thereto. Hereinafter, the display device will be described as the electronic device or the splicing device to explain the disclosure, but the disclosure is not limited thereto.

[0034] It should be understood that the following examples can be substituted, recombined, mixed to complete other examples without departing from the spirit of the disclosure. The features of each example can be arbitrarily mixed and used as long as they do not conflict with each other or deviate from the spirit of the invention.

[0035] Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and the description to refer to the same or like parts.

[0036] Figures 1A-1C A perspective view of a manufacturing method of an electronic device according to an embodiment of the disclosure. Figures 2A-2C A perspective view of a manufacturing method of an electronic device according to an embodiment of the disclosure. Figures 1B-1C A cross-sectional view of a second bonding pad in the electronic device being pressed to a first bonding pad. Hereinafter, a manufacturing method of the electronic device 100 according to the embodiment will be described.

[0037] First, refer to FIG. 1, which is a perspective view of an electronic device 100 according to an embodiment of the disclosure. Figure 1A, forming a plurality of electronic components 110 on a growth substrate 120. The size of the plurality of electronic components 110 is, for example, less than 100 micrometers (μm), but is not limited thereto. In some embodiments, the size may be, for example, length or width, but is not limited thereto. In some embodiments, at least one of the plurality of electronic components 110 is a light emitting diode, but is not limited thereto. In addition, in this embodiment, the growth substrate 120 may include a rigid substrate, a flexible substrate, or a combination thereof. For example, the material of the growth substrate 120 may include glass, quartz, sapphire, ceramic, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), other suitable substrate materials, or a combination thereof, but is not limited thereto.

[0038] Then, please also refer to Figure 1A and Figure 1B , using the transfer substrate 130 to pick up the multiple electronic components 110 on the growth substrate 120. In this embodiment, the picking method can be, for example, vacuum adsorption, adhesive adhesion, electrostatic adsorption positioning, magnetic adsorption positioning, or pre-made matching structures to embed the electronic components, but is not limited to this. Figure 1B As shown, the transfer substrate 130 has picked up a plurality of electronic components 110 disposed on the growth substrate 120 onto the transfer substrate 130. The transfer substrate 130 can pick up a plurality of electronic components 110 at a time.

[0039] Then, please refer to Figure 1B , providing a substrate 140, and forming a plurality of first bonding pads 141 on the substrate 140. A driving circuit (not shown) may be disposed on the substrate 140. The driving circuit (not shown) may be an active driving circuit or a passive driving circuit. In some embodiments, the active driving circuit may include a transistor. A plurality of first bonding pads 141 are disposed on the substrate 140 and electrically connected to the driving circuit (not shown) on the substrate 140. In this embodiment, the substrate 140 may include a rigid substrate, a flexible substrate, or a combination thereof. For example, the material of the substrate 140 may include glass, quartz, silicon wafer, silicon carbide wafer, sapphire, ceramic, polycarbonate, polymethyl methacrylate, siloxane, polyimide, polyethylene terephthalate, other suitable substrate materials, or a combination thereof, but is not limited thereto.

[0040] Then, please continue to refer to Figure 1B, a plurality of electronic elements 110 are provided, and each of the electronic elements 110 includes at least one second bonding pad 111. Specifically, after the transfer substrate 130 picks up the plurality of electronic elements 110 from the growth substrate 120, the transfer substrate 130 is moved to the substrate 140, so that the second bonding pads 111 of the electronic elements 110 on the transfer substrate 130 can correspond to the first bonding pads 141 on the substrate 140. Wherein, the materials of the first bonding pads 141 and the second bonding pads 111 corresponding to each other can both be copper, or the materials of the first bonding pads 141 and the second bonding pads 111 corresponding to each other can both be gold. The "corresponding" in the present disclosure may, for example, refer to the first bonding pads 141 and the second bonding pads 111 partially overlapping in the normal direction of the substrate 140, or the first bonding pads 141 and the second bonding pads 111 completely overlapping in the normal direction of the substrate 140.

[0041] Then, please refer to Figure 1C , the plurality of second bonding pads 111 of the plurality of electronic elements 110 are pressed onto the corresponding first bonding pads 141 on the substrate 140, so that the plurality of electronic elements 110 can be bonded to the substrate 140. Wherein, the first bonding pads 141 and the second bonding pads 111 corresponding to each other respectively have bonding surfaces 141a, 111a with different surface topographies. Specifically, please refer to Figures 2A-2C , the following will explain how to press the second bonding pads 111 of the electronic elements 110 to the corresponding first bonding pads 141 on the substrate 140:

[0042] First, please refer to Figure 2AThe second bonding pad 111 is brought into contact with the corresponding first bonding pad 141. In the present embodiment, the topography or profile of the bonding surface 141a of the first bonding pad 141 (i.e. the surface of the first bonding pad 141 used to bond the second bonding pad 111) can be concave, for example, and the topography or profile of the bonding surface 111a of the second bonding pad 111 (i.e. the surface of the second bonding pad 111 used to bond the first bonding pad 141) can be rectangular, but the disclosure is not limited thereto. Here, the concave and the rectangular do not match each other. For example, the topography of the bonding surface 141a of the first bonding pad 141 is a concave inverted trapezoid, and the topography of the bonding surface 111a of the second bonding pad 111 is a protruding rectangle, where the concave inverted trapezoid and the protruding rectangle do not match each other in shape, and the width L1 of the base of the inverted trapezoid is less than the width L2 of the rectangle. In some embodiments, the "width" can be a cross-sectional measurement of the first bonding pad 141 and the second bonding pad 111 in the same direction. In some embodiments, on a cross section in a direction, the width L2 of the rectangle can be defined as the width between two local positions 111b contacting the first bonding pad 141, in other words, the distance between the two local positions 111b when the two local positions 111b contact the first bonding pad 141. In some embodiments, the topography of the bonding surface 141a of the first bonding pad 141 can also be convex, and the topography of the bonding surface 111a of the second bonding pad 111 can also be concave, that is, the bonding surface of one of the first bonding pad 141 and the second bonding pad 111 corresponding to each other can be convex, and the bonding surface of the other can be concave. In some embodiments, as shown in FIGS. 1A and 1B, the topography of the bonding surface 141a of the first bonding pad 141 can be a protruding rectangle, and the topography of the bonding surface 111a of the second bonding pad 111 can be a concave inverted trapezoid. Figure 3A As shown in FIGS. 1A and 1B, the topography of the bonding surface 141a of the first bonding pad 141 can be a protruding rectangle, and the topography of the bonding surface 111a of the second bonding pad 111 can be a concave inverted trapezoid. Figure 4A As shown in FIGS. 1A and 1B, the topography of the bonding surface 141a of the first bonding pad 141 can be a protruding rectangle, and the topography of the bonding surface 111a of the second bonding pad 111 can be a concave inverted trapezoid.

[0043] In the present embodiment, the size of the concave can be greater than the size of the rectangle, for example, so that the bonding can be performed at the initial stage (e.g. the initial stage of the bonding process) as shown in FIG. 1A. Figure 2AWhen the second bonding pad 111 is pressed against the first bonding pad 141, the bonding surface 111a of the rectangular second bonding pad 111 can be aligned and clamped against the sidewall of the bonding surface 141a of the concave first bonding pad 141, and only the partial position 111b of the second bonding pad 111 can contact the first bonding pad 141. At this time, a gap A1 can be defined between the contacted second bonding pad 111 and the first bonding pad 141. In some embodiments, the size of the concave shape can be greater than the size of the convex shape, but is not limited thereto.

[0044] In addition, the manufacturing method of the electronic device of the present embodiment further includes forming an oxidation layer 150 on the first bonding pad 141 and forming an oxidation layer 160 on the second bonding pad 111 before pressing the plurality of second bonding pads 111 of the plurality of electronic elements 110 onto the corresponding first bonding pad 141 of the substrate 140. The oxidation layer 150 can contact the first bonding pad 141, and the oxidation layer 160 can contact the second bonding pad 111. The thickness T1 of the oxidation layer 150 and the thickness T2 of the oxidation layer 160 can be, for example, less than 10 nanometers (nm), but are not limited thereto. The thickness T1 can be, for example, the maximum thickness of the oxidation layer 150 measured in the normal direction of the substrate 140, and the thickness T2 can be, for example, the maximum thickness of the oxidation layer 160 measured at the second bonding surface 111a in the normal direction (direction Z) of the substrate 140. In some embodiments, the "thickness" can be the cross-sectional measurement of the oxidation layer 150 (or the oxidation layer 160) in the same direction.

[0045] Then, referring to Figure 2B , a diffusion reaction is performed so that the metal atoms of the second bonding pad 111 can diffuse in the direction of the first bonding pad 141 at the partial position 111b' and pass through the oxidation layer 150, and the metal atoms of the first bonding pad 141 can diffuse in the direction of the second bonding pad 111 at the partial position 111b' and pass through the oxidation layer 160. Specifically, because the thickness T1 of the oxidation layer 150 and the oxidation layer 160 is less than 10 nanometers and the oxidation layer 150 can contact the oxidation layer 160 at the partial position 111b', the metal atoms of the first bonding pad 141 and the metal atoms of the second bonding pad 111 can pass through the oxidation layer 150 and the oxidation layer 160 during the diffusion reaction.

[0046] Then, referring to Figure 2B and Figure 2CThe diffusion reaction is continuously performed to fill the gap Al between the second bonding pad 111 and the first bonding pad 141 with the metal atoms of the diffused second bonding pad 111 and the metal atoms of the diffused first bonding pad 141, and to bond the second bonding pad 111 of the electronic component 110 to the first bonding pad 141 on the substrate 140. In the present embodiment, the metal atoms of the diffused second bonding pad 111 and the metal atoms of the diffused first bonding pad 141 can fill the gap Al between the second bonding pad 111 and the first bonding pad 141. In some embodiments, the metal atoms of the diffused second bonding pad 111 and the metal atoms of the diffused first bonding pad 141 can also not fill the gap Al between the second bonding pad 111 and the first bonding pad 141, as long as the bonding strength of the second bonding pad 111 to the first bonding pad 141 can withstand subsequent processes and the second bonding pad 111 does not come off the first bonding pad 141. In addition, after the second bonding pad 111 is bonded to the first bonding pad 141, a method such as a light test can be used to confirm whether the bonding is complete.

[0047] In the present embodiment, since only the local position 111b of the second bonding pad 111 can contact the first bonding pad 141 at the initial stage of the bonding, the first bonding pad 141 can generate a higher pressure on the local position 111b during the pressure process of the subsequent diffusion reaction, so that the local position 111b can become the starting point of the diffusion reaction between the first bonding pad 141 and the second bonding pad 111. In the present embodiment, the local position 111b refers to the part of the second bonding pad 111 used to contact the first bonding pad 141, but is not limited thereto.

[0048] In the present embodiment, the conditions for performing the diffusion reaction can include at least the reaction time, the reaction temperature, and the reaction pressure. Although the values of the reaction time, the reaction temperature, and the reaction pressure can be adjusted according to requirements, when the diffusion reaction is performed to bond the metal in a solid state, the reaction pressure, the reaction temperature, and the reaction time can damage the structure or material of the electronic component or affect the production speed. In the manufacturing method of the electronic device of the present embodiment, the design of the bonding surfaces of the first bonding pad 141 and the second bonding pad 111 corresponding to each other, respectively, having different surface topographies, so that only the local position 111b of the second bonding pad 111 can contact the first bonding pad 141; therefore, compared with the complete contact of the two matching bonding surfaces for the diffusion reaction, the contact only at the local position 111b can occur at a lower reaction pressure. In this way, the manufacturing method of the electronic device of the present embodiment can bond the metal (i.e., the second bonding pad 111 and the first bonding pad 141) in a solid state at a lower reaction pressure.

[0049] In the present embodiment, when the diffusion reaction is performed, the first bonding pad 141, the oxide layer 150, the second bonding pad 111, and the oxide layer 160 are not melted, and the first bonding pad 141 and the second bonding pad 111 can be bonded by diffusion in a solid state, so that the second bonding pad 111 of the electronic element 110 can be bonded to the first bonding pad 141 on the substrate 140.

[0050] In addition, in the present embodiment, when the diffusion reaction is performed, if the heights of the second bonding pads 111 between different electronic elements 110 are different (for example, a height difference of 1 to 2 microns), the higher second bonding pad 111 will first contact the corresponding first bonding pad 141 and be deformed to fill the gap A1, and then the lower second bonding pad 111 can also contact the corresponding first bonding pad 141 and be bonded. Therefore, the manufacturing method of the electronic device of the present embodiment also reduces the problem of bonding yield caused by the height difference of the second bonding pad 111.

[0051] In the manufacturing method of the electronic device of some embodiments, before pressing the plurality of second bonding pads 111 of the plurality of electronic elements 110 to the corresponding first bonding pads 141 on the substrate 140, the manufacturing method can further include: forming a passivation layer on the bonding surface 141a of the first bonding pad 141, and forming a passivation layer on the bonding surface 111a of the second bonding pad 111. In this way, the second bonding pad 111 and the first bonding pad 141 can easily diffuse through the passivation layer in the subsequent diffusion reaction. The material of the passivation layer can include silver (Ag), gold (Au), chromium (Cr), hafnium (Hf), iridium (Ir), molybdenum (Mo), niobium (Nb), osmium (Os), palladium (Pd), platinum (Pt), rhenium (Re), rhodium (Rh), ruthenium (Ru), tantalum (Ta), titanium (Ti), vanadium (V), tungsten (W), or zirconium (Zr), or other metals or alloys that are not easily oxidized and have low activity, but the present disclosure is not limited thereto.

[0052] In short, in the manufacturing method of the electronic device 100 of the present embodiment, because the first bonding pad 141 and the second bonding pad 111 have different bonding surfaces, only the local position 111b of the second bonding pad 111 can contact the first bonding pad 141. Compared with the complete contact of two matching bonding surfaces for diffusion reaction, the diffusion reaction only occurs at the local position 111b under lower reaction pressure. In this way, the problem of damaging the structure of the electronic element itself due to excessive reaction pressure can be reduced, and the problem of short circuit during bonding or the bonding yield can be improved.

[0053] Other embodiments will be illustrated below as examples. It must be noted that the following embodiments use the same reference numbers and parts of the previous embodiments, in which the same or similar elements are represented by the same reference numbers, and the description of the same technical content is omitted. The description of the omitted parts can be referred to the previous embodiments, and the following embodiments will not be repeated.

[0054] Figures 3A-3C FIG. 10 is a partial cross-sectional schematic view of a manufacturing method of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 10 together with Figures 3A-3C and Figures 2A-2C The electronic device 100a of the present embodiment is substantially similar to the electronic device 100 of Figures 2A-2C , and thus the same and similar components in both embodiments will not be repeated. The electronic device 100a of the present embodiment is mainly different from the electronic device 100 in that the topography or profile of the bonding surface 142a of the first bonding pad 142 is planar, and the topography or profile of the bonding surface 112a of the second bonding pad 112 is jagged.

[0055] Specifically, please refer to Figure 3A , at the initial stage of bonding, only the partial positions 112b of the second bonding pad 112 can contact the first bonding pad 142, and a gap A2 can be defined between the contacted second bonding pad 112 and the first bonding pad 142. Although Figure 3A three gaps A2 are schematically shown, the number and / or shape of the gap A2 is not limited in the present disclosure. In the present embodiment, the partial positions 112b refer to the tooth tips of the jagged second bonding pad 112 for contacting the first bonding pad 142, but are not limited thereto.

[0056] Next, please refer to Figure 3B , a diffusion reaction is performed so that the metal atoms of the second bonding pad 112 can diffuse in the direction of the first bonding pad 142 at the partial positions 112b' and pass through the oxide layer 150 (or the passivation layer), and the metal atoms of the first bonding pad 142 can diffuse in the direction of the second bonding pad 112 at the partial positions 112b' and pass through the oxide layer 160 (or the passivation layer).

[0057] Finally, please refer to Figure 3C , the diffusion reaction is continuously performed so that the diffused metal atoms of the second bonding pad 112 and the diffused metal atoms of the first bonding pad 142 fill at least part of the gap A2 between the second bonding pad 112 and the first bonding pad 142, and the second bonding pad 112 is bonded to the first bonding pad 142.

[0058] In some embodiments, the topography or contour of the bonding surface of the first bonding pad may also be serrated, and the topography or contour of the bonding surface of the second bonding pad may also be planar (not shown).

[0059] Figures 4A-4C This is a partial cross-sectional diagram of a method for manufacturing an electronic device according to another embodiment of the present disclosure. Figures 4A-4C and Figures 2A-2C The electronic device 100b of this embodiment is substantially similar to Figures 2A-2C Therefore, the same or similar components between the two embodiments will not be repeated here. The electronic device 100b of this embodiment differs from the electronic device 100 mainly in that, in the electronic device 100b of this embodiment, the bonding surface 143a of the first bonding pad 143 has a planar shape, and the bonding surface 113a of the second bonding pad 113 has a conical shape.

[0060] Specifically, please refer to Figure 4A During the initial bonding process, only a local portion 113b of the second bonding pad 113 can contact the first bonding pad 143. After the contact, a recess A3 is defined between the second bonding pad 113 and the first bonding pad 143. In this embodiment, the local portion 113b is, for example, the tip of the cone-shaped second bonding pad 113 that contacts the first bonding pad 143, but the present invention is not limited thereto.

[0061] Next, please refer to Figure 4B , a diffusion reaction is performed so that the metal atoms of the second bonding pad 113 can diffuse in the direction of the local position 113b' toward the first bonding pad 143 and pass through the oxide layer 150 (or passivation layer), and the metal atoms of the first bonding pad 143 can diffuse in the direction of the local position 113b' toward the second bonding pad 113 and pass through the oxide layer 160 (or passivation layer).

[0062] Finally, please refer to Figure 4C The diffusion reaction continues so that the metal atoms of the diffused second bonding pad 113 and the metal atoms of the diffused first bonding pad 143 fill at least a portion of the groove A3 between the second bonding pad 112 and the first bonding pad 143 , and the second bonding pad 113 is bonded to the first bonding pad 143 .

[0063] In some embodiments, the shape or profile of the bonding surface of the first bonding pad may also be a pointed cone, and the shape or profile of the bonding surface of the second bonding pad may also be a flat surface (not shown).

[0064] In addition, in some embodiments, when the diffused metal atoms of the second bonding pad fill the gap between the second bonding pad and the first bonding pad, a residual of a local (discontinuous) oxide layer or passivation layer can still be found at the bonding between the second bonding pad and the first bonding pad. The residual of the oxide layer or the residual of the passivation layer can be observed by, but not limited to, a transmission electron microscope (TEM).

[0065] In summary, in the manufacturing method of the electronic device of the embodiments of the present disclosure, because the first bonding pad and the second bonding pad have different bonding surfaces with different surface topographies, only partial positions of the second bonding pad can contact the first bonding pad. Compared with the complete contact between two matching bonding surfaces for diffusion reaction, the diffusion reaction only occurs at partial positions under a lower reaction pressure. Thus, the problem of short circuit during bonding can be reduced or the bonding yield can be improved.

[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions recorded in the above embodiments can be combined, modified, or some or all of the technical features can be replaced by equivalents; and these combinations, modifications, or replacements do not make the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A manufacturing method of an electronic device, characterized by, Comprising: providing a substrate; forming a plurality of first bonding pads on the substrate; providing a plurality of electronic elements, and each of the plurality of electronic elements comprises at least one second bonding pad and an oxide layer, wherein the oxide layer is formed on the at least one second bonding pad; and bonding the at least one second bonding pad of the plurality of electronic elements to the corresponding one of the plurality of first bonding pads on the substrate, so as to bond the plurality of electronic elements to the substrate, wherein one of the plurality of first bonding pads and the at least one second bonding pad correspond to each other and have different bonding surfaces with different surface topographies, respectively, wherein the bonding surface of the at least one second bonding pad comprises a plurality of tines, the plurality of tines are spaced apart from each other by a distance, and the oxide layer exposes a portion of the plurality of tines towards the one of the plurality of first bonding pads, the bonding surface of the one of the plurality of first bonding pads is a concave inverted trapezoid, and the width of the base of the inverted trapezoid is less than the width of the bonding surface of the at least one second bonding pad. 2.The method of manufacturing an electronic device according to claim 1, wherein Further comprising: forming a passivation layer on each of the plurality of first bonding pads. 3.The method of manufacturing an electronic device according to claim 2, wherein The material of the passivation layer comprises silver, gold, chromium, hafnium, iridium, molybdenum, niobium, osmium, palladium, platinum, rhenium, rhodium, ruthenium, tantalum, titanium, vanadium, tungsten, or zirconium. 4.The method of manufacturing an electronic device according to claim 2, wherein The thickness of the passivation layer is less than 10 nanometers. 5.The method of manufacturing an electronic device according to claim 1, wherein Further comprising: forming an oxide layer on each of the plurality of first bonding pads. 6.The method of manufacturing an electronic device according to claim 5, wherein The thickness of the oxide layer is less than 10 nanometers. 7.The method of manufacturing an electronic device according to claim 1, wherein The materials of the first bonding pads and the second bonding pads corresponding to each other are copper, or the materials of the first bonding pads and the second bonding pads corresponding to each other are gold. 8.The method of manufacturing an electronic device according to claim 1, wherein At least one of the plurality of electronic elements is a light emitting diode. 9.The method of manufacturing an electronic device according to claim 1, wherein The size of the plurality of electronic elements is less than 100 μm. 10.The method of manufacturing an electronic device according to claim 1, wherein Comprising: forming the plurality of electronic elements on a growth substrate. 11.The method of manufacturing an electronic device according to claim 10, wherein Comprising: picking up the plurality of electronic elements on the growth substrate by using a transfer substrate.

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