Methods for reducing material surface roughness

Abstract

An exemplary deposition method may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may include providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor. The flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor may be greater than or approximately 2:1. The method may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The method may include depositing a silicon-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 62 / 933,012, filed November 8, 2019, the contents of which are incorporated herein by reference in their entirety for all purposes. Technical Field

[0003] The present technology relates to semiconductor deposition processes. More particularly, the present technology relates to methods of depositing materials with reduced surface roughness. Background Art

[0004] Integrated circuits are made possible by processes that create complex patterns of material layers on substrate surfaces. Creating patterned materials on substrates requires controlled methods for forming and removing exposed material. As device dimensions continue to shrink, material uniformity can impact subsequent operations. For example, the surface roughness of mask materials can affect subsequent etching uniformity.

[0005] Therefore, there is a need for improved systems and methods that can be used to produce high-quality devices and structures. These and other needs are addressed by the present technology. Summary of the Invention

[0006] An exemplary deposition method may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may include providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor. The flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor may be greater than or approximately 2:1. The method may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The method may include depositing a silicon-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

[0007] In some embodiments, the silicon boron material can be characterized by a deposited surface roughness of less than or about 2 nm. The plasma power density can be maintained at greater than or about 0.5 W / cm during formation of the plasma for all precursors within the processing region of the semiconductor processing chamber. 2 The substrate temperature may be maintained at greater than or about 400° C. during deposition of the silicon-boron material on the substrate. The pressure may be maintained at less than or about 10 Torr during deposition of the silicon-boron material on the substrate. The method may include providing an argon precursor along with the silicon-containing precursor and the boron-containing precursor. The method may include performing a thermal annealing of the silicon-boron material after deposition. The silicon-containing precursor may be or include silane, and the boron-containing precursor may be or include diborane.

[0008] Some embodiments of the present technology may include a deposition method. The method may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may include forming a plasma of the silicon-containing precursor and the boron-containing precursor within the processing region of the semiconductor processing chamber. The method may include depositing a silicon-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-boron material may be characterized by a deposited surface roughness of less than or approximately 1.5 nm.

[0009] In some embodiments, the method may include providing a hydrogen-containing precursor along with a silicon-containing precursor and a boron-containing precursor. The flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor may be greater than or approximately 2:1. The method may include providing an argon precursor along with the silicon-containing precursor and the boron-containing precursor. The flow rate ratio of the argon precursor to the hydrogen-containing precursor may be less than or approximately 1:1. The method may include thermally annealing the silicon-boron material for a first period of time after deposition. The substrate may be maintained at a first temperature during deposition. The substrate may be maintained at a second temperature while thermally annealing the silicon-boron material, and the second temperature may be greater than the first temperature. The second temperature may be greater than or approximately 500° C. The plasma power may be maintained at greater than or approximately 2.0 kW when forming the plasma of the silicon-containing precursor and the boron-containing precursor within a processing region of the semiconductor processing chamber.

[0010] Some embodiments of the present technology may include a deposition method. The method may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The plasma power may be maintained at greater than or approximately 1.0 kW during formation of the plasma of all precursors within the processing region of the semiconductor processing chamber. The method may include depositing a silicon-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

[0011] In some embodiments, the method may include providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor. The flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor may be greater than or approximately 2:1. The method may include providing an argon precursor along with the silicon-containing precursor and the boron-containing precursor. The flow rate ratio of the argon precursor to the hydrogen-containing precursor may be less than or approximately 1:1. The method may include, after depositing, performing a thermal annealing of the silicon-boron material for a first period of time. The substrate may be maintained at a first temperature during the deposition step. The substrate may be maintained at a second temperature during the thermal annealing of the silicon-boron material, and the second temperature may be greater than the first temperature.

[0012] The present technology can provide numerous benefits over conventional systems and techniques. For example, processing can produce films characterized by reduced surface roughness. Furthermore, operation of embodiments of the present technology can produce improved mask materials that can facilitate processing operations. These and other embodiments, as well as their numerous advantages and features, are described in greater detail in conjunction with the following description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the accompanying drawings.

[0014] Figure 1 A schematic cross-sectional view of an exemplary processing chamber is shown, in accordance with some embodiments of the present technology.

[0015] Figure 2 Exemplary operations in a deposition method according to some embodiments of the present technology are shown.

[0016] Figure 3 Shown is a schematic view of a substrate prior to deposition according to some embodiments of the present technology.

[0017] Figures 4A to 4B Shown is a schematic view of an exemplary substrate during deposition according to some embodiments of the present technology.

[0018] Figures 5A to 5B Shown is a schematic view of an exemplary substrate during deposition according to some embodiments of the present technology.

[0019] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustration purposes only and should not be considered to be drawn to scale unless specifically indicated as such. Furthermore, the drawings are provided as schematic diagrams to aid understanding and may not include all aspects or information compared to actual representations. The drawings may also include material that is exaggerated for illustrative purposes.

[0020] In the accompanying drawings, similar components and / or features may have the same reference number. Furthermore, various components of the same type may be distinguished by following the reference number with a letter that distinguishes between the similar components. If only the first reference number is used in the specification, the description applies to any of the similar components having the same first reference number, regardless of the letter. DETAILED DESCRIPTION

[0021] During semiconductor fabrication, various deposition and etching operations can be used to create structures on a substrate. Masking materials can be used to allow materials to be partially etched, or to be etched to create features across the substrate. As device dimensions continue to decrease, and improved selectivity between materials can simplify the formation of structures, the use of improved hard masks can facilitate manufacturing. For example, boron-doped silicon films can be characterized by improved hardness and other material properties compared to thermally produced amorphous silicon hard masks, thereby facilitating the use of the films as masking materials. However, while thermally produced silicon can be characterized by a substantially smooth surface, boron-doped silicon films can be characterized by increased surface roughness.

[0022] The present technology can overcome these limitations by adjusting deposition parameters and materials to perform surface treatments during deposition. For example, the present technology can include etching exposed features of a film layer during deposition. This can facilitate a more uniform surface profile, which can reduce or limit surface roughness during deposition. After describing the general aspects of a chamber according to embodiments of the present technology in which the plasma processing operations discussed below can be performed, specific methods and component configurations can be discussed. It should be understood that the present technology is not intended to be limited to the specific films and processes discussed, as the described techniques can be used to improve many film formation processes and are applicable to a variety of processing chambers and operations.

[0023] Figure 1 A cross-sectional view of an exemplary processing chamber 100 is shown in accordance with some embodiments of the present technology. The figure may illustrate an overview of a system incorporating one or more aspects of the present technology and / or that may perform one or more operations in accordance with embodiments of the present technology. Additional details of the chamber 100 or the methods performed therein may be further described below. In accordance with some embodiments of the present technology, the chamber 100 may be used to form a film layer, although it should be understood that the method may be similarly performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 in a processing volume 120. A substrate 103 may be provided to the processing volume 120 through an opening 126, which may be conventionally sealed for processing using a slit valve or door. During processing, the substrate 103 may be positioned on a surface 105 of the substrate support. As indicated by arrow 145, the substrate support 104 may be rotated along an axis 147, on which the shaft 144 of the substrate support 104 may be located. Alternatively, the substrate support 104 may be raised for rotation as needed during the deposition process.

[0024] A plasma profile modulator 111 may be disposed in the processing chamber 100 to control the distribution of plasma across a substrate 103 disposed on a substrate support 104. The plasma profile modulator 111 may include a first electrode 108, which may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106, or may be a separate sidewall electrode. The first electrode 108 may be an annular or ring-shaped member and may be a ring electrode. The first electrode 108 may be a continuous ring around the perimeter of the processing chamber 100, surrounding the processing volume 120, or may be discontinuous at selected locations if desired. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or may be a flat plate electrode, such as, for example, a secondary gas distributor.

[0025] One or more isolators 110a, 110b (which may be a dielectric material, such as a ceramic or a metal oxide, such as aluminum oxide and / or aluminum nitride) may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from a gas distributor 112 and from the chamber body 102. The gas distributor 112 may define an aperture 118 for distributing process precursors into the processing volume 120. The gas distributor 112 may be coupled to a first electrical power source 142 (e.g., an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that may be coupled to the processing chamber). In some embodiments, the first electrical power source 142 may be an RF power source.

[0026] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive while the panel of the gas distributor 112 can be non-conductive. The gas distributor 112 can be, for example, formed of Figure 1 The gas distributor 112 may be powered by a first electrical power source 142 as shown in FIG. 1 , or in some embodiments, the gas distributor 112 may be coupled to ground potential.

[0027] The first electrode 108 may be coupled to a first tuning circuit 128 that may control the ground path of the processing chamber 100. The first tuning circuit 128 may include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or include a variable capacitor or other circuit component. The first tuning circuit 128 may be or include one or more inductors 132. The first tuning circuit 128 may be any circuit that achieves a variable or controllable impedance under the plasma conditions present in the processing volume 120 during processing. In some illustrated embodiments, the first tuning circuit 128 may include a first circuit branch and a second circuit branch coupled in parallel between the ground and the first electronic sensor 130. The first circuit branch may include a first inductor 132A. The second circuit branch may include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node connecting both the first circuit branch and the second circuit branch to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to a first electronic controller 134 , which may provide a degree of closed-loop control of the plasma conditions within the processing volume 120 .

[0028] A second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire mesh, or any other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to a second tuning circuit 136 via a conduit 146, such as a cable having a selected resistance (e.g., 50 ohms) disposed within a shaft 144 of the substrate support 104. The second tuning circuit 136 may have a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to provide further control of plasma conditions in the processing volume 120.

[0029] The third electrode 124 (which may be a bias electrode and / or an electrostatic adsorption electrode) may be coupled to the substrate support 104. The third electrode may be coupled to a second electrical power source 150 via a filter 148, which may be an impedance matching circuit. The second electrical power source 150 may be DC power, pulsed DC power, RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second electrical power source 150 may be RF bias power.

[0030] Figure 1The lid assembly 106 and substrate support 104 can be used with any processing chamber used for plasma or thermal processing. In operation, the processing chamber 100 can provide real-time control of plasma conditions in the processing volume 120. The substrate 103 can be positioned on the substrate support 104, and process gases can be flowed through the lid assembly 106 using the inlet 114 according to any desired flow schedule. Gases can exit the processing chamber 100 through the outlet 152. Electrical power can be coupled to the gas distributor 112 to establish a plasma in the processing volume 120. In some embodiments, the substrate can be subjected to an electrical bias using the third electrode 124.

[0031] After energizing the plasma in the processing volume 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Electronic controllers 134, 140 can then be used to adjust the flow properties of the ground paths represented by the two tuning circuits 128 and 136. Set points can be delivered to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both electronic controllers can be variable capacitors, the electronic sensors can adjust the variable capacitors to independently maximize the deposition rate and minimize thickness non-uniformity.

[0032] Each of the tuning circuits 128 and 136 can have a variable impedance that can be adjusted using the respective electronic controllers 134 and 140. If the electronic controllers 134 and 140 are variable capacitors, the capacitance range of each variable capacitor and the inductance of the first and second inductors 132A and 132B can be selected to provide an impedance range. This range can depend on the frequency and voltage characteristics of the plasma and can have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at its minimum or maximum, the impedance of the first tuning circuit 128 can be high, resulting in a plasma shape with minimal aerial or lateral coverage on the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma can grow to its maximum, effectively covering the entire working area of ​​the substrate support 104. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape can shrink from the chamber walls and the aerial coverage of the substrate support can decrease. The second electronic controller 140 may have a similar effect, as the capacitance of the second electronic controller 140 may be varied to increase and decrease the plasma's air coverage on the substrate support.

[0033] Electronic sensors 130, 138 can be used to tune the respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a set point for current or voltage can be installed in each sensor, and the sensor can be equipped with control software to determine adjustments to each respective electronic controller 134, 140 to minimize deviations from the set point. Thus, the plasma shape can be selected and dynamically controlled during processing. It should be understood that although the above discussion is based on electronic controllers 134, 140 that can be variable capacitors, any electronic component with adjustable characteristics can be used to provide tuned circuits 128 and 136 with adjustable impedance.

[0034] Figure 2 1 shows exemplary operations in a deposition method 200 according to some embodiments of the present technology. The method may be performed in various process chambers, including the process chamber 100 described above. The method 200 may include a number of optional operations that may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many operations are described to provide a greater range of structure formation, but are not critical to the technology or may be performed by readily understood alternative methods. The method 200 may describe Figures 3 to 5B The operations schematically illustrated in FIG will be described in conjunction with the operations of method 200. It should be understood that the figures illustrate only partial schematic views, and that the substrate may contain any number of additional materials and features having various characteristics and aspects, as illustrated in the figures.

[0035] The method 200 may include additional operations before the listed operations are initiated. For example, the additional processing operations may include forming structures on the semiconductor substrate, which may include both forming and removing material. The previous processing operations may be performed in the chamber in which the method 200 may be performed, or the processing may be performed in one or more other processing chambers before the substrate is transported into the semiconductor processing chamber in which the method 200 may be performed. Regardless, the method 200 may optionally include transporting the semiconductor substrate to a processing region of a semiconductor processing chamber, such as the processing chamber 100 described above or another chamber that may include the components described above. The substrate may be deposited on a substrate support, which may be a susceptor, such as the substrate support 104, and which may reside in a processing region of the chamber, such as the processing volume 120 described above. In the Figure 3 An exemplary substrate 305 is illustrated in FIG. 3 before deposition begins.

[0036] The substrate 305 can be any number of materials on which materials can be deposited. The substrate can be or include silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metallic material, or any number of combinations of these materials, which can be the substrate 305 or a material formed on the substrate 305. In some embodiments, optional processing operations (e.g., pretreatment) can be performed to prepare the surface of the substrate 305 for deposition. For example, the pretreatment can be performed to provide certain ligand terminations on the surface of the substrate, and the ligand terminations can facilitate the nucleation of the film to be deposited. For example, as a non-limiting example, hydrogen, oxygen, carbon, nitrogen, or other molecular terminations, including any combination of these atoms or radicals, such as amide groups or other functional groups, can be adsorbed, reacted, or formed on the surface of the substrate 305. In addition, material removal, such as reducing native oxides or etching materials, or any other operation that can prepare one or more exposed surfaces of the substrate 305 for deposition can be performed.

[0037] At operation 205, one or more precursors may be delivered to a processing region of a chamber. For example, in an exemplary embodiment in which a boron-doped silicon film may be formed, a silicon-containing precursor and a boron-containing precursor may be delivered to a processing region of a processing chamber. Plasma-enhanced deposition may be performed in some embodiments of the present technology, which may facilitate material reaction and deposition. As described above, some embodiments of the present technology may include the formation or deposition of silicon-boron materials, which may be conventionally characterized by increased surface roughness, such as compared to thermally produced silicon films, for example. In some embodiments, nucleation of these silicon-boron materials may form islands 405a on substrate 305, such as Figure 4A These islands can be formed three-dimensionally to different heights during initial film formation and can be maintained during film growth.

[0038] Some embodiments of the present technology may additionally include providing a hydrogen-containing precursor at operation 210, along with the silicon-containing precursor and the boron-containing precursor. At operation 215, all of the delivered precursors may be used to form a plasma within a processing region of the semiconductor processing chamber. At operation 220, a silicon-boron material may be deposited on substrate 305. In some embodiments, the incorporation of the hydrogen-containing precursor may reduce or limit islands formed during nucleation.

[0039] For example, Figure 4BAs shown in FIG, island 405b can be formed to a lower or smaller extent than island 405a. By incorporating an additional hydrogen source, film modification or profile etching can be performed while the material is being deposited. For example, by reacting and / or physically interacting with features formed from silicon-boron material, hydrogen radicals can tailor the formation of the islands while producing a more uniform formation profile. As a result, the islands may not extend to their full extent relative to conventional processing. To provide sufficient hydrogen radicals during processing, a hydrogen-containing precursor can be included at a greater flow rate than either or both of the silicon-containing precursor and the boron-containing precursor. For example, in some embodiments, the flow rate ratio of the hydrogen-containing precursor to either or both of the silicon-containing precursor and / or the boron-containing precursor may be greater than or approximately 1:1, and in some embodiments may be greater than or approximately 2:1, greater than or approximately 3:1, greater than or approximately 4:1, greater than or approximately 5:1, greater than or approximately 6:1, greater than or approximately 8:1, greater than or approximately 10:1, greater than or approximately 15:1, greater than or approximately 20:1, greater than or approximately 25:1, greater than or approximately 30:1, greater than or approximately 35:1, greater than or approximately 40:1, greater than or approximately 45:1, greater than or approximately 50:1, or greater. As will be further described below, in some embodiments, further dilution may be performed wherein the ratio of hydrogen to silicon and / or boron precursor may be greater than or approximately 100:1, and may be greater than or approximately 500:1, greater than or approximately 1,000:1, greater than or approximately 1,500:1, greater than or approximately 2,000:1, greater than or approximately 2,500:1, or greater.

[0040] For example, depending on the precursor used, a silicon-containing precursor may be delivered at a flow rate of less than or about 500 sccm, and may be delivered at a flow rate of less than or about 400 sccm, less than or about 300 sccm, less than or about 200 sccm, less than or about 100 sccm, less than or about 90 sccm, less than or about 80 sccm, less than or about 70 sccm, less than or about 60 sccm, less than or about 50 sccm, or less. Similarly, a boron-containing precursor may be delivered at a flow rate of less than or about 1,000 sccm, and a boron-containing precursor may be delivered at a flow rate of less than or about 800 sccm, less than or about 600 sccm, less than or about 500 sccm, less than or about 450 sccm, less than or about 400 sccm, less than or about 350 sccm, less than or about 300 sccm, less than or about 250 sccm, less than or about 200 sccm, or less. Any additional range within these ranges, or as a combination of any stated or unstated numbers, may also be used.

[0041] The hydrogen-containing precursor may be delivered at a flow rate of greater than or about 1,000 sccm, and may be delivered at a flow rate of greater than or about 1,200 sccm, greater than or about 1,400 sccm, greater than or about 1,600 sccm, greater than or about 1,800 sccm, greater than or about 2,000 sccm, greater than or about 2,200 sccm, greater than or about 2,400 sccm, greater than or about 2,600 sccm, greater than or about 2,800 sccm, greater than or about 3,000 sccm, or greater. Increasing the hydrogen-containing precursor may further smooth the surface of the deposited film; however, increased hydrogen incorporation may occur within the deposited film. Thus, in some embodiments, the hydrogen-containing precursor may be delivered at a flow rate of less than or about 4,000 sccm, and may be delivered at a flow rate of less than or about 3,800 sccm, less than or about 3,600 sccm, less than or about 3,400 sccm, less than or about 3,200 sccm, less than or about 3,000 sccm, less than or about 2,800 sccm, less than or about 2,600 sccm, or less. Additionally, in some embodiments where higher dilutions may be performed, the hydrogen-containing precursor may be delivered at a flow rate of greater than or about 5,000 sccm, and may be delivered at a flow rate of greater than or about 10,000 sccm, greater than or about 15,000 sccm, greater than or about 20,000 sccm, greater than or about 25,000 sccm, or more. In some embodiments, the flow rate of the silicon or boron precursor can be further reduced, for example to less than or about 200 sccm, and can be reduced to less than or about 150 sccm, less than or about 100 sccm, less than or about 50 sccm, less than or about 30 sccm, less than or about 20 sccm, less than or about 10 sccm, or less.

[0042] The film may be deposited to any thickness on the substrate 305. As described above, the surface roughness of the resulting film may not be limited to issues during film nucleation. For example, in some aspects of the present technology, film growth and plasma termination may also affect surface roughness. For example, when sufficient film growth has occurred, the process may be stopped by extinguishing the plasma within the process chamber, such as, for example, by stopping power to the electrode generating the plasma. Plasma termination may also increase surface roughness by causing a certain amount of residual ion physical interaction after deposition is complete. Both the nucleation effect and the plasma termination effect may be evaluated as consistent regardless of the thickness of the film formed. However, testing has shown that the roughness of the deposited film increases with increasing film thickness. Therefore, roughness effects may also occur during film growth, and the roughness of the film may also increase further with increasing film thickness. As Figure 5AAs shown in FIG, the islands 405a formed during nucleation may not only persist, but may also grow or expand during deposition without one or more of the features described throughout this technology. As a result, the resulting film 505a may be characterized by increased roughness, which may affect the uniformity of subsequent etching.

[0043] For example, thermally produced silicon (e.g., polysilicon or other silicon materials) can be characterized by a relatively low average roughness, such as less than or about 0.5 nm, or less than or about 0.2 nm. The film can also be characterized by a relatively low roughness range, such as the difference between the highest peak and the lowest peak on the formed film. For example, the roughness range can be less than or about 1.5 nm, or less than or about 1 nm. However, for silicon boron films produced without one or more aspects of the present technology, for films of similar thickness, the average roughness can be greater than or about 2 nm, greater than or about 3 nm, or greater, although it is noted that the roughness may increase with increasing film thickness. In addition, again depending on the film thickness, the roughness range of the silicon boron material produced can be greater than or about 10 nm, and can be greater than or about 15 nm, or greater. During subsequent etching operations, these larger gaps across the film can challenge the uniformity of the etching operation and may require additional operations, such as additional chemical mechanical polishing operations.

[0044] However, the present technique can reduce or significantly reduce both the average roughness and the roughness range of the produced silicon boron film by performing a substantially simultaneous etch using an additional hydrogen-containing precursor, or by performing one or more additional adjustments described further below. Figure 5B As shown in FIG, the resulting film 505b can be characterized by an average roughness of less than or about 2 nm, and can be characterized by an average roughness of less than or about 1.5 nm, less than or about 1.0 nm, less than or about 0.9 nm, less than or about 0.8 nm, less than or about 0.7 nm, less than or about 0.6 nm, less than or about 0.5 nm, less than or about 0.4 nm, less than or about 0.3 nm, less than or about 0.2 nm, or less. Furthermore, in some embodiments, the roughness can be substantially controlled regardless of film thickness. This can allow for the avoidance of additional chemical mechanical polishing operations, as the deposited film can be characterized by any of the average roughness ranges shown. Furthermore, the range of roughness across the deposited film can be less than or about 10 nm, and can be less than or about 9 nm, less than or about 8 nm, less than or about 7 nm, less than or about 6 nm, less than or about 5 nm, less than or about 4 nm, less than or about 3 nm, less than or about 2 nm, less than or about 1 nm, or less. Thus, improved materials can be produced that may offer advantages over conventional materials and processed films and masks and may potentially reduce manufacturing operations by sequentially limiting or reducing the number of polishing operations.

[0045] With respect to silicon-containing precursors and boron-containing precursors, any number of precursors may be used with the present technology. For example, the silicon-containing precursor may include any silicon-containing material, such as an organosilane, which may include silane, disilane, and other materials. Additional silicon-containing materials may include silicon, carbon, oxygen, or nitrogen, such as trimethylsilylamine. Boron-containing materials may include boranes, such as borane, diborane, or other multi-center bonded boron materials, as well as any other boron-containing materials that can be used to produce silicon-boron-containing materials. Boron incorporation into the silicon film may be based on any percentage of incorporation. For example, the films produced may include greater than or about 5% boron incorporation, and in some embodiments, may include greater than or about 10% boron incorporation, greater than or about 15% boron incorporation, greater than or about 20% boron incorporation, greater than or about 25% boron incorporation, greater than or about 30% boron incorporation, greater than or about 35% boron incorporation, greater than or about 40% boron incorporation, greater than or about 45% boron incorporation, greater than or about 50% boron incorporation, greater than or about 55% boron incorporation, greater than or about 60% boron incorporation, greater than or about 65% boron incorporation, greater than or about 70% boron incorporation, greater than or about 75% boron incorporation, greater than or about 80% boron incorporation, greater than or about 85% boron incorporation, greater than or about 90% boron incorporation, greater than or about 95% boron incorporation, or greater.

[0046] One or more additional aspects of the deposition may also be tuned to improve aspects of the deposition performed. For example, plasma power may affect the extent of hydrogen dissociation. Any number of hydrogen-containing precursors may be used, and in some embodiments, may include diatomic hydrogen. For some silicon-boron-containing materials, the material is sufficiently reactive at a deposition temperature that may include minimal plasma enhancement. For example, some conventional techniques utilize plasma powers of less than or about 200 watts. The present technique may utilize higher or much higher plasma powers, which may facilitate hydrogen dissociation and may increase hydrogen radicals, which may reduce roughness, as previously described.

[0047] For example, in some embodiments, the plasma power may be maintained at greater than or about 1,000 watts, and may be maintained at greater than or about 1,200 watts, greater than or about 1,400 watts, greater than or about 1,600 watts, greater than or about 1,800 watts, greater than or about 2,000 watts, greater than or about 2,200 watts, greater than or about 2,400 watts, greater than or about 2,600 watts, greater than or about 2,800 watts, greater than or about 3,000 watts, or more. This enhanced plasma power may also improve the dissociation and activation of other precursors, and may also increase the deposition rate. Thus, despite the simultaneous etching of material during deposition, the film deposition rate may be comparable, if not improved, compared to conventional deposition. Deposition and simultaneous etching for profile modification may then be maintained continuously or sequentially until the target film thickness has been achieved. Depending on the plasma process being performed, the plasma power density may also be maintained, which may allow for modulation of frequency and power. For example, in some embodiments, the plasma power density may be maintained at greater than or about 0.25 W / cm 2 , and can be maintained at greater than or about 0.5W / cm 2 , greater than or about 1.0W / cm 2 , greater than or about 1.5W / cm 2 , greater than or about 2.0W / cm 2 , greater than or about 2.5W / cm 2 or higher.

[0048] The temperature of the substrate can additionally affect the deposition. For example, in some embodiments, the substrate can be maintained at a temperature greater than or about 400°C, and can be maintained at a temperature greater than or about 420°C, greater than or about 440°C, greater than or about 460°C, greater than or about 480°C, greater than or about 500°C, or more. By performing deposition according to some embodiments of the present technology, a hydrogen etch can be performed during deposition to reduce the roughness of the formed film. However, the amount of hydrogen radicals produced, for example, by enhancing the plasma and hydrogen transport, can also increase the amount of hydrogen incorporated into the produced film. This can increase the compressive stress within the film. For example, the deposited film can be characterized by a compressive stress greater than or about -800 MPa, which can be based in part on the incorporation of hydrogen. Therefore, in some embodiments, method 200 can include an operation to reduce hydrogen incorporation into the film.

[0049] For example, in some embodiments, method 200 may include thermally annealing the formed silicon-boron-containing material at optional operation 225. While deposition may be performed at a first temperature, the thermal annealing may be performed at a second temperature greater than the first temperature. For example, the thermal annealing may be performed at a temperature greater than or about 480°C, and may be performed at a temperature greater than or about 500°C, greater than or about 510°C, greater than or about 520°C, greater than or about 530°C, greater than or about 540°C, greater than or about 550°C, greater than or about 560°C, greater than or about 570°C, greater than or about 580°C, greater than or about 590°C, greater than or about 600°C, or greater. The thermal annealing may be performed for a period of time that may be greater than or about 0.5 minutes, and may be greater than or about 1 minute, greater than or about 2 minutes, greater than or about 3 minutes, greater than or about 4 minutes, greater than or about 5 minutes, greater than or about 6 minutes, or longer.

[0050] By performing a thermal anneal, a certain amount of hydrogen incorporated into the film can be removed, which can relieve compressive stress. For example, in some embodiments, after thermal annealing, the compressive stress in the film can be maintained at less than or about -700 MPa, and can be less than or about -650 MPa, less than or about -600 MPa, less than or about -550 MPa, less than or about -500 MPa, less than or about -450 MPa, less than or about -400 MPa, less than or about -350 MPa, less than or about -300 MPa, less than or about -250 MPa, less than or about -200 MPa, less than or about -150 MPa, less than or about -100 MPa, or less.

[0051] The pressure within the process region can affect the amount of ionization and physical interactions performed during deposition. By reducing the process pressure, increased ion interactions can occur. Thus, in some embodiments, the process pressure during deposition can be maintained at less than or about 50 Torr, and can be maintained at less than or about 40 Torr, less than or about 30 Torr, less than or about 20 Torr, less than or about 15 Torr, less than or about 10 Torr, less than or about 9 Torr, less than or about 8 Torr, less than or about 7 Torr, less than or about 6 Torr, less than or about 5 Torr, less than or about 4 Torr, less than or about 3 Torr, less than or about 2 Torr, or less.

[0052] Testing has shown that incorporation of argon can increase roughness, so limiting or excluding argon can improve film roughness. However, when argon is excluded from process precursors, testing has shown that film flaking may increase. Therefore, in some embodiments, argon may still be included in the silicon-containing precursor and the boron-containing precursor. To limit the impact on roughness, the flow rate ratio of the argon precursor to the hydrogen-containing precursor can be maintained at less than or about 2:1, and may be maintained at less than or about 1:1, less than or about 0.8:1, less than or about 0.7:1, less than or about 0.6:1, less than or about 0.5:1, less than or about 0.4:1, less than or about 0.3:1, less than or about 0.2:1, less than or about 0.1:1, or less.

[0053] Combinations or further adjustments of processing parameters may also affect and improve additional aspects of the films produced. Incorporating boron into the hard mask film may improve selectivity for many films. Since the film stack includes a greater amount of material, both associated with the hard mask open operation and the subsequent film etching, providing improved selectivity may further reduce the number of additional operations performed. Increasing film crystallinity may also increase etch selectivity, however, conventional techniques have reduced or worsened line edge roughness and line width roughness as film crystallinity increases. Therefore, many techniques have attempted to maintain the film as amorphous silicon. The present technique may at least partially increase the crystallinity of the formed film, which may increase etch selectivity, although by limiting the crystallinity, the present technique may maintain line edge roughness and line width roughness.

[0054] When utilizing an increased hydrogen flow rate ratio relative to silicon and boron precursors according to embodiments of the present technology, crystallinity can be increased. However, by utilizing the processing parameters as previously described, crystallinity can be maintained at less than or about and can be maintained at less than or about Less than or approximately Less than or approximately Less than or approximately Less than or approximately Less than or approximately Less than or approximately Less than or approximately or less, although when the crystallinity increases to greater than or about or higher, can provide improved etch selectivity.

[0055] However, as the hydrogen content in the plasma increases, hydrogen incorporation within the film may also increase. As previously discussed, this can affect film stress and can additionally affect other film characteristics. For example, a hard mask film can be characterized by an extinction coefficient for light of different wavelengths, which can affect photolithographic operations. Amorphous silicon materials can be characterized by an extinction coefficient at specific parameters of about 0.2, which, based on lower reflectivity, can allow photolithography at film thicknesses up to about 800 nm, which can affect vision through the mask. Silicon and boron films can be characterized by an increasing extinction coefficient for similar parameters, although the extinction coefficient can at least partially decrease with increasing hydrogen incorporation. For example, as boron incorporation increases, the extinction coefficient can increase to greater than or about 0.3, greater than or about 0.35, greater than or about 0.4, greater than or about 0.45, or more.

[0056] The effect of a higher extinction coefficient for light is that lithography can be challenging and may require additional processing. For example, these increased extinction coefficients can limit lithographic visibility to film thicknesses less than or about 400 nm, less than or about 300 nm, or even lower. However, by increasing hydrogen incorporation, utilizing increased plasma density, the extinction coefficient can be reduced to less than or about 0.35, and can be reduced to less than or about 0.33, less than or about 0.30, less than or about 0.28, less than or about 0.25, or even less. This can allow lithography to be extended to thicknesses greater than or about 400 nm, greater than or about 450 nm, greater than or about 500 nm, or even greater, without requiring additional alignment key-open operations. By increasing the temperature and plasma characteristics, even with increased hydrogen incorporation, film structures can be formed to improve characteristics such as extinction coefficient and etch selectivity. Hydrogen incorporation can also be increased by processing at lower temperatures (e.g., less than 400°C or less than about 350°C). However, as described above, variations in film properties of the resulting films can lead to additional hydrogen escape during subsequent processing. The film doped with increased hydrogen formed as described above may provide increased thermal stability by performing processing at higher temperatures.

[0057] In some embodiments, both power and frequency can be used to adjust plasma characteristics. For example, at lower frequencies, such as less than or approximately 20 MHz, including 13.56 MHz, plasma powers of, for example, greater than or approximately 2000 W or greater than or approximately 2500 W can produce the described film characteristics. It should be understood that other plasma characteristics can also be used. For example, by adjusting the plasma frequency, the plasma power can also be adjusted. As the plasma frequency increases, for example, to greater than or approximately 40 MHz, greater than or approximately 60 MHz, or even into the microwave frequency range, the plasma power can be reduced, which can improve chamber stability and resilience. FTIR analysis indicates that under these plasma characteristics, peaks associated with boron and hydrogen may have increased transmission and be slightly shifted to higher wavelengths. This can indicate improved structural stability, which can provide increased thermal stability of the film during subsequent processing. Consequently, in some embodiments, by increasing crystallinity, a lower extinction coefficient and improved thermal stability can also be provided. Deposition according to embodiments of the present technology can provide reduced roughness of silicon-boron-containing films, which can improve hardmask effectiveness. During the subsequent etching of optional operation 230, the use of the present technique can maintain the etched critical dimensions more uniformly than when the present technique is not implemented. By reducing surface roughness, improved etching and structure development can be provided.

[0058] In the previous description, for the purpose of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0059] Several embodiments have been disclosed, and those skilled in the art will recognize that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. In addition, many well-known processes and components have not been described to avoid unnecessarily obscuring the present technology. Therefore, the above description should not be taken as limiting the scope of the present technology. In addition, methods or processes may be described as sequential or step-by-step, but it should be understood that the operations may be performed simultaneously or in an order different from that listed.

[0060] Where a numerical range is provided, it is understood that, unless the context clearly indicates otherwise, each intervening value between the upper and lower limits of the range, down to the smallest fraction of the unit of the lower limit, is also specifically disclosed. Any narrower range between any stated value or unstated intervening value and any other stated or intervening value in the stated range is encompassed. The upper and lower limits of these smaller ranges may independently be included in or excluded from the range, and, subject to any explicitly excluded limits in the stated range, each range that includes either, neither, or both of these smaller ranges is also encompassed by the present technology. Where a stated range includes one or both limits, ranges that exclude one or both of those included limits are also encompassed.

[0061] As used herein and in the appended claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors and reference to "a layer" includes reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0062] Furthermore, the words “comprise,” “comprising,” “contain,” “containing,” “include,” and “including,” when used in this specification and the following claims, are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. A deposition method comprising: delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber; providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor is greater than or equal to 2:1; forming a plasma of the silicon-containing precursor, the boron-containing precursor, and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber; as well as A silicon boron material is deposited on a substrate disposed within the processing region of the semiconductor processing chamber.

2. The deposition method of claim 1, wherein the silicon boron material is characterized by a deposited surface roughness less than or equal to 2 nm.

3. The deposition method of claim 1 , wherein a plasma power density is maintained at or greater than 0.5 W / cm 2 during formation of the plasma of the silicon-containing precursor, the boron-containing precursor, and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. 2 . 4 . The deposition method of claim 1 , wherein a substrate temperature is maintained at greater than or equal to 400° C. during the deposition of the silicon boron material on the substrate. The deposition method of claim 1 , wherein a pressure is maintained at less than or equal to 10 Torr during the deposition of the silicon boron material on the substrate.

6. The deposition method of claim 1 , further comprising: An argon precursor is provided along with the silicon-containing precursor and the boron-containing precursor.

7. The deposition method of claim 1 , further comprising: After the deposition, a thermal annealing of the silicon boron material is performed.

8. The deposition method of claim 1, wherein the silicon-containing precursor comprises silane, and wherein the boron-containing precursor comprises diborane.

9. A deposition method comprising: delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber; forming a plasma of the silicon-containing precursor and the boron-containing precursor within the processing region of the semiconductor processing chamber; and A silicon boron material is deposited on a substrate disposed within the processing region of the semiconductor processing chamber, wherein the silicon boron material is characterized by a deposited surface roughness of less than or equal to 1.5 nm.

10. The deposition method of claim 9, further comprising: providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor is greater than or equal to 2:1; and An argon precursor is provided along with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the argon precursor to the hydrogen-containing precursor is less than or equal to 1:

1.

11. The deposition method of claim 9, further comprising: After the depositing, the silicon boron material is thermally annealed for a first period of time, wherein the substrate is maintained at a first temperature during the depositing, wherein the substrate is maintained at a second temperature while the silicon boron material is thermally annealed, the second temperature being greater than 500° C., and wherein the second temperature is greater than the first temperature.

12. The deposition method of claim 9, wherein a plasma power is maintained at greater than or equal to 2.0 kW during formation of the plasma of the silicon-containing precursor and the boron-containing precursor within the processing region of the semiconductor processing chamber.

13. A deposition method comprising: delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber; forming a plasma of the silicon-containing precursor and the boron-containing precursor within the processing region of the semiconductor processing chamber, wherein a plasma power is maintained at greater than or equal to 1.0 kW during formation of the plasma of the silicon-containing precursor and the boron-containing precursor within the processing region of the semiconductor processing chamber; and A silicon boron material is deposited on a substrate disposed within the processing region of the semiconductor processing chamber.

14. The deposition method of claim 13, further comprising: providing a hydrogen-containing precursor along with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the hydrogen-containing precursor to either the silicon-containing precursor or the boron-containing precursor is greater than or equal to 2:1; and An argon precursor is provided along with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the argon precursor to the hydrogen-containing precursor is less than or equal to 1:

1.

15. The deposition method of claim 13, further comprising: After the depositing, a thermal annealing of the silicon boron material is performed for a first period of time, wherein the substrate is maintained at a first temperature during the depositing, wherein the substrate is maintained at a second temperature during the thermal annealing of the silicon boron material, and wherein the second temperature is greater than the first temperature.

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