GaAs-based flip Mini LED chip and preparation method thereof

Abstract

This invention relates to a GaAs-based flip-chip Mini LED and its fabrication method. The chip comprises, from bottom to top, a transparent substrate, a bonding layer, a P-current spreading layer, and a P-ohm layer. A mesa is disposed on the P-ohm layer. The mesa, from bottom to top, comprises a P-waveguide layer, a light-emitting layer, an N-waveguide layer, an N-current spreading layer, an N-buffer layer, and an N-ohm layer. A P-electrode is disposed on the P-ohm layer below the mesa; an N-electrode is disposed on the N-ohm layer above the mesa. Electrode pads are disposed directly above both the P-electrode and the N-electrode. By setting electrode pads, the soldering required in packaging production is combined with the electrode structure, eliminating the need for solder paste application on the substrate, thus achieving chip-substrate interconnection and facilitating modular production of the packaged chip. This effectively improves the problems of weak chip-substrate bonding strength, high coefficient of thermal expansion, cumbersome manufacturing, and high production costs in chip packaging.

Description

Technical Field

[0001] This invention relates to a GaAs-based flip-chip Mini LED and its fabrication method, belonging to the field of LED chip manufacturing technology. Background Technology

[0002] Mini LED devices, as a new type of display device, have been widely used in the display industry due to their advantages such as low power consumption, high resolution, high contrast, high reliability, and wide color gamut. However, the low substrate replacement yield and low warehousing yield in the GaAs-based flip-chip Mini LED manufacturing process have resulted in high prices, severely restricting the rapid popularization of GaAs-based Mini LED products. Therefore, improving product yield and enhancing luminous efficiency have always been topics actively explored by industry professionals. At the same time, there are also many problems in the packaging technology in the midstream of the industry chain, such as chip soldering. Currently, the mainstream chip soldering technology for miniature flip-chip Mini LEDs is solder paste reflow soldering. Its principle and characteristics are as follows: first, solder paste with a thickness of 30-60μm is applied to the substrate, and the chip's pads are bonded to the substrate through the solder paste. Then, reflow soldering is used to solidify the solder paste, realizing chip-substrate interconnection. However, current solder paste reflow soldering has problems such as high void ratio leading to weak soldering force, high coefficient of thermal expansion, and complicated preparation. Researchers have been trying to improve the reflow soldering process and solder paste composition to solve this problem.

[0003] Chinese patent document CN112242477A discloses an easy-to-solder flip-chip Mini / Micro-LED and its fabrication and packaging methods. The chip includes a substrate, a light-emitting structure disposed on the substrate, electrodes disposed on the light-emitting structure, and a solder layer disposed on the electrodes. The Mini / Micro-LED chip of this invention is easy to solder and package, with high packaging efficiency, high yield, and low cost. However, this patent has a drawback: the solder tin easily diffuses and forms a common Sn alloy with the electrode layer, leading to a rapid decrease in the push force of the chip electrodes during reflow soldering, and even detachment.

[0004] Chinese patent document CN112467007A discloses a Mini LED chip and its fabrication method. In this chip, no auxiliary extension electrode connects the first type of semiconductor layer and the first bonding electrode. Specifically, no auxiliary extension electrode is fabricated on the exposed surface of the first type of semiconductor layer at the electrode contact cutout. This avoids the problem of increased electrode contact cutout area caused by the presence of an auxiliary extension electrode, ensuring a large light-emitting area and improving the luminous efficiency of the Mini LED chip. However, this patent suffers from poor current spreading, poor electrode coverage, and susceptibility to delamination, affecting reliability during subsequent use.

[0005] In addition, due to problems such as lattice mismatch and excessive dislocation defects, GaAs-based LEDs cannot be directly grown on sapphire substrates. They need to go through wafer bonding to complete the substrate replacement process. The low yield of substrate replacement has always been a major problem faced by the industry. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides a GaAs-based flip-chip Mini LED chip and its fabrication method. This invention addresses the problems in the midstream packaging process, such as cumbersome solder paste bonding, difficulties in achieving high-precision chip-solder paste-substrate bonding, weak chip-substrate welding force, and high coefficient of thermal expansion. By fabricating electrode pads on the Mini LED, this invention provides a novel method for effectively solving these packaging problems.

[0007] The technical solution of the present invention is as follows:

[0008] A GaAs-based flip-chip Mini LED chip includes, from bottom to top, a transparent substrate, a bonding layer, a P-current spreading layer, and a P-ohm layer; a mesa is disposed on the P-ohm layer; the mesa includes, from bottom to top, a P-waveguide layer, a light-emitting layer, an N-waveguide layer, an N-current spreading layer, an N-buffer layer, and an N-ohm layer; a P-electrode is disposed on the P-ohm layer below the mesa; an N-electrode is disposed on the N-ohm layer above the mesa; electrode pads are disposed directly above both the P-electrode and the N-electrode.

[0009] The electrode pad structure is Ti / Al / Ni / Pt / Sn or Ti / Al / Ti / Pt / Ni / Pt / Sn. (1-x-y) Ag x Cu y Or Ti / Al / Ti / Pt / Ni / Pt / Sn / In, 0.5<X<2, 0.1<Y<1.

[0010] According to a preferred embodiment of the present invention, the P electrode structure is Au / AuBe / Au, and the N electrode structure is Au / AuGeNi / Au / Pt / Au.

[0011] According to a preferred embodiment of the present invention, the Ti / Al structures in the electrode pads have N pairs, where N is a positive integer.

[0012] According to a preferred embodiment of the present invention, the thickness of the Ti layer in the Ti / Al / Ni / Pt / Sn structure of the electrode pad is 50-200 nm, the thickness of the Al layer is 200-800 nm, the thickness of the Ni layer is 300-1000 nm, and the thickness of the Sn layer is 6-10 μm.

[0013] According to a preferred embodiment of the present invention, the electrode pads are Ti / Al / Ti / Pt / Ni / Pt / Sn. (1-x-y) Ag xCu y The Ti layer in the structure has a thickness of 50-200 nm, the Al layer has a thickness of 200-800 nm, the Ni layer has a thickness of 300-1000 nm, and the Sn layer has a thickness of... (1-x-y) Ag x Cu y The thickness of the layer is 6-10 μm.

[0014] According to a preferred embodiment of the present invention, the thickness of the Ti layer in the Ti / Al / Ti / Pt / Ni / Pt / Sn / In structure of the electrode pad is 50-200 nm, the thickness of the Al layer is 200-800 nm, the thickness of the Ni layer is 300-1000 nm, the thickness of the Sn layer is 2-4 μm, and the thickness of the In layer is 3-6 μm.

[0015] A method for fabricating a GaAs-based flip-chip Mini LED includes the following steps:

[0016] (1) Using the MOCVD method, an epitaxial wafer is obtained by sequentially growing an etching stop layer, an N-ohm layer, an N-buffer layer, an N-current spreading layer, an N-waveguide layer, a light-emitting layer, a P-waveguide layer, a P-ohm layer and a P-current spreading layer on a temporary substrate.

[0017] (2) Roughen the P current extension layer to obtain the roughened surface of the P current extension layer;

[0018] (3) A bonding layer is deposited on the roughened surface of the P current extension layer, and then the surface of the bonding layer is polished to obtain a polished surface of the bonding layer.

[0019] (4) After activating the polished surface of the transparent substrate and the bonding layer, bonding treatment is performed to obtain an epitaxial wafer with a bonded transparent substrate.

[0020] (5) Remove the temporary substrate and etching stop layer from the epitaxial wafer obtained in step (4);

[0021] (6) The photolithographic mask on the surface of the epitaxial wafer obtained in step (5) is etched by ICP dry etching until the P-ohm layer is exposed to form a mesa;

[0022] (7) Fabricate a P electrode on the P-ohm layer under the mesa; fabricate an N electrode on the N-ohm layer on the mesa;

[0023] (8) ICP etching is used to etch the cleavage between the epitaxial wafer mesa obtained in step (7), and then a protective layer is deposited on the surface of the epitaxial wafer;

[0024] (9) Etch the protective layer directly above the P electrode and N electrode to form P conductive holes and N conductive holes;

[0025] (10) Fabricate P electrode pads and N electrode pads above P conductive holes and N conductive holes respectively.

[0026] (11) After thinning, stealth cutting, splitting, testing, optical inspection and sorting of the epitaxial wafer obtained in step (10), GaAs-based flip-chip Mini LED chips can be obtained.

[0027] According to a preferred embodiment of the present invention, in step (1), the temporary substrate is a GaAs temporary substrate, the etch stop layer is a GalnP etch stop layer, the N-ohm layer is an N-GaAs ohm layer, the N-buffer layer is an N-GalnP buffer layer, the N-current spreading layer is an N-AlGaInP current spreading layer, the N-waveguide layer is an N-AlInP-Si waveguide layer, the light-emitting layer is an MQW, the P-waveguide layer is a P-AlInP-Si waveguide layer, the P-ohm layer is a P-GaP-C ohm layer, and the P-current spreading layer is a P-GaP-Mg current spreading layer.

[0028] According to a preferred embodiment of the present invention, in step (2), the roughening treatment is a wet etching method, the roughening time is 30-90s, and the roughening temperature is 20-30℃. The roughening treatment can improve the adhesion between the P current extension layer and the bonding layer, avoid delamination after bonding, and at the same time, the roughening of the P current extension layer reduces the total internal reflection of emitted light, thereby improving the luminous efficiency.

[0029] According to a preferred embodiment of the present invention, in step (2), a mixed solution of sulfuric acid, water, iodine and hydrofluoric acid is used for roughening treatment. The mixed solution contains 2000-3000 mL of sulfuric acid, 3000-4000 mL of water, 80-100 g of iodine and 1500-2000 mL of hydrofluoric acid.

[0030] According to a preferred embodiment of the present invention, in step (3), the bonding layer is a silicon dioxide layer with a thickness of 2-4 μm, and the polishing is chemical mechanical polishing (CMP) treatment, after which the silicon dioxide layer is 0.8-1 μm thick. A clean and smooth polished surface of the bonding layer can improve the bonding yield.

[0031] According to a preferred embodiment of the present invention, in step (4), the activation is carried out using an alkaline solution or an acidic solution; more preferably, the activation is carried out using a mixed solution of hydrochloric acid and hydrogen peroxide, wherein the mixed solution contains 4000-5000 mL of hydrochloric acid and 2000-3000 mL of hydrogen peroxide.

[0032] According to a preferred embodiment of the present invention, in step (4), the bonding temperature is 360-450℃, the bonding pressure is 8000-12000kg, and the bonding time is 900-1200s.

[0033] According to a preferred embodiment of the present invention, in step (4), the transparent substrate is a sapphire substrate.

[0034] According to a preferred embodiment of the present invention, in step (5), a mixed solution of ammonia, hydrogen peroxide and water is used to remove the temporary substrate and etching stop layer of the bonded wafer. The volume ratio of ammonia, hydrogen peroxide and water in the mixed solution is 1:4:5.

[0035] According to a preferred embodiment of the present invention, in step (9), the protective layer is a silicon dioxide layer.

[0036] In the areas not covered in this invention, such as etching, PECVD deposition, photolithography masking, ICP etching, electrode fabrication, electrode pad fabrication, thinning, stealth cutting, dicing, testing, optical inspection, and sorting, these are all existing technologies in the field.

[0037] Technical features of the present invention:

[0038] To address the high manufacturing costs in chip packaging and the poor temperature resistance of solder paste reflow soldering processes, as well as the poor wettability, low solder strength, high void ratio, easy electrode detachment, and easy epitaxial delamination issues associated with gold-plated, silver-plated, and nickel-plated devices, this invention designs the following three novel flip-chip Mini LED electrode pad structures:

[0039] a. Ti / Al / Ni / Pt / Sn;

[0040] b、Ti / Al / Ti / Pt / Ni / Pt / Sn (1-x-y) Ag x Cu y ;

[0041] c. Ti / Al / Ti / Pt / Ni / Pt / Sn / In;

[0042] Among them, the Ti layer has good ductility, plasticity and good mechanical properties as a structural material, and it is selected as the first metal layer of the electrode to enhance the adhesion of the electrode; the Al layer is a reflective layer; the Ni layer can increase the welding strength of the electrode.

[0043] To achieve the purpose of the invention, the electrode needs a metal barrier layer to reduce the diffusion rate of solder Sn, and a metal buffer layer to reduce the stress between the electrode and the epitaxial layer and the packaging substrate during high-temperature use of the chip; therefore, preferably, the barrier layer and buffer layer in electrode pad a are designed as Ni / Pt structure, electrode pad b is a Ti / Pt / Ni / Pt structure, and electrode pad c is a Ti / Pt / Ni / Pt structure.

[0044] When producing the Mini LED chip package, there is no need to apply solder paste to the substrate. Simply attach the chip's pads to the substrate and then perform reflow soldering. At the soldering temperature, the solder on the electrodes melts and solidifies, thus achieving chip-substrate interconnection.

[0045] The beneficial effects of this invention are as follows:

[0046] 1. This invention provides a GaAs-based flip-chip Mini LED chip. By setting electrode pads, the solder required in the packaging process is combined with the pads as the electrode structure. There is no need to apply solder paste on the substrate. The electrode pads of the chip are simply attached to the substrate, and then reflow soldering is performed. At the soldering temperature, the solder on the electrode pads melts and solidifies, thereby realizing the chip-substrate interconnection. This facilitates the modular production of packaged chips and effectively improves the problems of weak chip-substrate bonding force, high coefficient of thermal expansion, manufacturing trouble, and high production cost in chip packaging.

[0047] 2. This invention improves the adhesion between the P-current extension layer and the bonding layer by using a specially formulated roughening solution to roughen the current extension layer, thus preventing delamination after bonding. Simultaneously, the roughening of the P-current extension layer reduces total internal reflection of emitted light, improving luminous efficiency. Furthermore, through CMP of the bonding layer and a special surface activation method, combined with unique bonding conditions, the adhesion between the bonding layer and the sapphire substrate is enhanced. Using these methods, the substrate replacement yield can reach over 95%, which is more than 30% higher than current processes, and the luminous efficiency is increased by more than 4%.

[0048] 3. The electrode structure of this invention is novel and diverse, possessing relatively ideal physical properties. It not only has a low melting point and good electrode viscosity, making it less prone to detachment and exhibiting good wettability, but also demonstrates good fusion with most metals (Au, Cu, Ag, Ni, etc.), thus improving chip packaging performance and optimizing the industrial chain technology of GaAs-based flip-chip Mini LED chips. Furthermore, through the structural design of the electrode pads, this invention effectively avoids the problem of solder easily diffusing and forming a eutectic Sn alloy with the electrode layer, which leads to a rapid decrease in chip electrode push force during reflow soldering, or even detachment. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of the structure of the GaAs-based flip-chip Mini LED chip of the present invention.

[0050] Figure 2 This is a schematic diagram of an epitaxial wafer structure.

[0051] Figure 3 This is a schematic diagram of the roughened epitaxial wafer structure.

[0052] Figure 4 This is a schematic diagram of the structure of the bonded epitaxial wafer.

[0053] Figure 5 This is a schematic diagram of the epitaxial wafer structure after the polishing bonding layer.

[0054] Figure 6 This is a schematic diagram of the structure of the transparent substrate and the epitaxial wafer after activation.

[0055] Figure 7 This is a schematic diagram of the structure after the transparent substrate and the epitaxial wafer are combined.

[0056] Figure 8 This is a schematic diagram of the structure of the epitaxial wafer after the temporary substrate and etch stop layer have been removed and bonded together.

[0057] Figure 9 This is a schematic diagram of the epitaxial wafer structure after the ohmic layer is exposed.

[0058] Figure 10 This is a schematic diagram of the epitaxial wafer structure after the P1 and N1 electrodes are fabricated.

[0059] Figure 11 This is a schematic diagram of the structure of the epitaxial wafer after etching the ohmic layer and the current spreading layer.

[0060] Figure 12 This is a schematic diagram of the epitaxial wafer structure after the deposition of the protective silicon oxide layer.

[0061] Figure 13 This is a schematic diagram of the epitaxial wafer structure after etching the conductive vias.

[0062] Figure 14 This is a schematic diagram of the epitaxial wafer structure after the P and N pads are fabricated.

[0063] Figure 15 This is a schematic diagram of the chip structure after thinning and scratching.

[0064] Figure 16 This is a schematic diagram of the chip and substrate assembly.

[0065] In the figure, 1. Temporary substrate; 2. Etching stop layer; 3. N-ohm layer; 4. N-buffer layer; 5. N-current spread layer; 6. N-waveguide layer; 7. Light-emitting layer; 8. P-waveguide layer; 9. P-ohm layer; 10. P-current spread layer; 11. Roughened surface of P-current spread layer; 12. Bonding layer; 13. Polished surface of bonding layer; 14. Transparent substrate; 15. P-electrode; 16. N-electrode; 17. Protective layer; 18. P-electrode conductive via; 19. N-electrode conductive via; 20. P-electrode pad; 21. N-electrode pad; 22. Substrate. Figure 15 and Figure 16 The middle arrow indicates the direction of light emission from the chip. Detailed implementation method:

[0066] The present invention will be further described below with reference to the embodiments and accompanying drawings, but is not limited thereto.

[0067] This invention selects a wafer bonding machine manufactured by Yuzhu Electronics.

[0068] Example 1:

[0069] like Figure 1As shown, a GaAs-based flip-chip Mini LED chip includes, from bottom to top, a transparent substrate 14, a SiO2 bonding layer 12, a P-GaP-Mg current spreading layer 10, and a P-GaP-C ohmic layer 9; a mesa is disposed on the P-GaP-C ohmic layer 9; the mesa includes, from bottom to top, a P-AlInP-Si waveguide layer 8, an MQW light-emitting layer 7, an N-AlInP-Si waveguide layer 6, an N-AlGaInP current spreading layer 5, an N-GaInP buffer layer 4, and an N-GaAs ohmic layer 3; a P-electrode 15 is disposed on the P-GaP-C ohmic layer 9 below the mesa; an N-electrode 16 is disposed on the N-ohmic layer 3 above the mesa; and P-electrode pads 20 and N-electrode pads 21 are disposed directly above both the P-electrode 15 and the N-electrode 16.

[0070] The structure of the P-electrode pad 20 and N-electrode pad 21 is Ti / Al / Ni / Pt / Sn.

[0071] The P electrode 16 has an Au / AuBe / Au structure, and the N electrode 15 has an Au / AuGeNi / Au / Pt / Au structure.

[0072] The thickness of the Ti layer in the P-electrode pad 20 and N-electrode pad 21 Ti / Al / Ni / Pt / Sn structure is 100 nm, the thickness of the Al layer is 400 nm, the thickness of the Ni layer is 500 nm, and the thickness of the Sn layer is 8 μm.

[0073] There are two pairs of Ti / Al structures in the P-electrode pad 20 and N-electrode pad 21.

[0074] Example 2

[0075] A GaAs-based flip-chip Mini LED chip, with the structure described in Example 1, differs in that the P-electrode pad 20 and N-electrode pad 21 are Ti / Al / Ti / Pt / Ni / Pt / Sn. 0.5 Ag1Cu 0.5 The structure consists of a Ti layer with a thickness of 100 nm, an Al layer with a thickness of 400 nm, a Ni layer with a thickness of 500 nm, and a Sn layer with a thickness of 100 nm. 0.5 Ag1Cu 0.5 The thickness of the layer is 8 μm.

[0076] Example 3

[0077] A GaAs-based flip-chip Mini LED chip, with the structure described in Example 1, differs in that the P-electrode pad 20 and N-electrode pad 21 are Ti / Al / Ti / Pt / Ni / Pt / Sn / In structures, wherein the Ti layer has a thickness of 100nm, the Al layer has a thickness of 400nm, the Ni layer has a thickness of 500nm, the Sn layer has a thickness of 3μm, and the In layer has a thickness of 3μm.

[0078] Example 4

[0079] A method for fabricating a GaAs-based flip-chip Mini LED includes the following steps:

[0080] (1) Using the MOCVD method, an epitaxial wafer was obtained by sequentially growing a GalnP etch stop layer, an N-GaAs ohmic layer, an N-GalnP buffer layer, an N-AlGaInP current spreading layer, an N-AlInP-Si waveguide layer, an MQW light-emitting layer, a P-AlInP-Si waveguide layer, a P-GaP-C ohmic layer, and a P-GaP-Mg current spreading layer on a GaAs temporary substrate, as shown below. Figure 2 As shown;

[0081] (2) The P-GaP-Mg current-spreading layer is roughened to obtain the roughened surface of the P-GaP-Mg current-spreading layer, such as... Figure 3 As shown;

[0082] (3) A bonding layer is deposited on the roughened surface of the P-GaP-Mg current-spreading layer, and then the surface of the bonding layer is polished to obtain a polished bonding layer surface, such as... Figure 4 , 5 As shown;

[0083] (4) After activating the polished surfaces of the transparent substrate and bonding layer, bonding treatment is performed to obtain an epitaxial wafer with a bonded transparent substrate, such as... Figure 6 , 7 As shown;

[0084] (5) Remove the temporary substrate and etching stop layer from the epitaxial wafer obtained in step (4), such as Figure 8 As shown;

[0085] (6) The photolithographic mask on the surface of the epitaxial wafer obtained in step (5) is etched by ICP dry etching until the P-ohm layer is exposed to form a mesa, as shown in Figure 9.

[0086] (7) Fabricate a P electrode on the P-ohm layer below the mesa; fabricate an N electrode on the N-ohm layer above the mesa, such as... Figure 10 As shown; where the P electrode structure is Au / AuBe / Au, and the N electrode structure is Au / AuGeNi / Au / Pt / Au;

[0087] (8) ICP etching is used to etch cut paths between the epitaxial wafer mesa obtained in step (7), and then a protective layer is deposited on the surface of the epitaxial wafer, such as... Figure 11 , 12 As shown;

[0088] (9) Etch the protective layer directly above the P and N electrodes to form P-conductive holes and N-conductive holes, such as... Figure 13 As shown;

[0089] (10) Fabricate P-electrode pads and N-electrode pads above the P-conductive via and the N-conductive via, respectively, as follows: Figure 14 As shown; wherein, the electrode pad structure is as described in Example 1;

[0090] (11) After thinning and cleaving the epitaxial wafer obtained in step (10), a GaAs-based flip-chip Mini LED is obtained, such as... Figure 15 As shown.

[0091] In step (2), the roughening treatment is a wet etching method, with a roughening time of 60s and a roughening temperature of 25℃. The roughening treatment can reduce the total internal reflection of the emitted light, improve the light emission efficiency, and enhance the adhesion between the epitaxial layer and the bonding layer.

[0092] In step (2), a mixed solution of sulfuric acid, water, iodine and hydrofluoric acid is used for roughening treatment. The mixed solution contains 2000 mL of sulfuric acid, 3000 mL of water, 80 g of iodine and 1500 mL of hydrofluoric acid.

[0093] In step (3), the bonding layer is a silicon dioxide layer with a thickness of 3 μm. Polishing is performed by chemical mechanical polishing (CMP), and the silicon dioxide layer after the treatment is 1 μm thick. A clean and smooth polished surface of the bonding layer can improve the bonding yield.

[0094] In step (4), the activation is performed using an alkaline or acidic solution; more preferably, a mixed solution of hydrochloric acid and hydrogen peroxide is used for activation, wherein the mixed solution contains 4000 mL of hydrochloric acid and 2000 mL of hydrogen peroxide.

[0095] In step (4), the bonding temperature is 400℃, the bonding pressure is 10000kg, and the bonding time is 1000s.

[0096] In step (4), the transparent substrate is a sapphire substrate.

[0097] In step (5), a mixed solution of ammonia, hydrogen peroxide and water is used to remove the temporary substrate and etching stop layer of the bonded wafer. The volume ratio of ammonia, hydrogen peroxide and water in the mixed solution is 1:4:5.

[0098] In step (9), the protective layer is a silicon dioxide layer.

[0099] like Figure 16 As shown, the chip is bonded to the substrate 22. During packaging, the solder Sn in the electrode pad structure melts to achieve chip-substrate interconnection.

[0100] In this embodiment, the substrate replacement yield is 96%.

[0101] Example 4

[0102] A method for fabricating a GaAs-based flip-chip Mini LED chip, the steps of which are as described in Example 3, with the difference being that...

[0103] In step (2), the roughening treatment is a wet corrosion method, the roughening time is 30s, and the roughening temperature is 20℃.

[0104] In step (2), a mixed solution of sulfuric acid, water, iodine and hydrofluoric acid is used for roughening treatment. The mixed solution contains 3000 mL of sulfuric acid, 4000 mL of water, 100 g of iodine and 2000 mL of hydrofluoric acid.

[0105] The bonding layer is a silicon dioxide layer with a thickness of 2 μm. The polishing is performed by chemical mechanical polishing (CMP), and the silicon dioxide layer after the treatment is 1 μm thick.

[0106] In step (4), the activation is performed using an alkaline or acidic solution; more preferably, a mixed solution of hydrochloric acid and hydrogen peroxide is used for activation, wherein the mixed solution contains 5000 mL of hydrochloric acid and 3000 mL of hydrogen peroxide.

[0107] In step (4), the bonding temperature is 360°C, the bonding pressure is 8000 kg, and the bonding time is 900 s.

[0108] The substrate replacement yield in this embodiment is 97%.

[0109] Example 5

[0110] A method for fabricating a GaAs-based flip-chip Mini LED chip, the steps of which are as described in Example 3, with the difference being that...

[0111] In step (2), the roughening treatment is a wet corrosion method, the roughening time is 90s, and the roughening temperature is 30℃.

[0112] In step (2), a mixed solution of sulfuric acid, water, iodine and hydrofluoric acid is used for roughening treatment. The mixed solution contains 2500 mL of sulfuric acid, 3500 mL of water, 90 g of iodine and 1800 mL of hydrofluoric acid.

[0113] The bonding layer is a silicon dioxide layer with a thickness of 4 μm. The polishing is performed by chemical mechanical polishing (CMP), and the silicon dioxide layer after the treatment is 1 μm thick.

[0114] In step (4), the activation is performed using an alkaline or acidic solution; more preferably, a mixed solution of hydrochloric acid and hydrogen peroxide is used for activation, wherein the mixed solution contains 4500 mL of hydrochloric acid and 3500 mL of hydrogen peroxide.

[0115] In step (4), the bonding temperature is 360°C, the bonding pressure is 8000 kg, and the bonding time is 1200 s.

[0116] In this embodiment, the substrate replacement yield is 95%.

[0117] Comparative Example

[0118] A method for substrate replacement in a Mini LED chip comprises the following process route: epitaxial wafer preparation – GaP roughening – bonding layer deposition – polishing – activation – bonding – substrate removal. Roughening is performed using ASK225 roughening solution, bonding layer thinning is performed using polishing, and activation is performed using an alkaline solution.

[0119] The substrate replacement yield in this comparative example is 65%.

[0120] In summary, roughening the P-current extension layer with a mixed solution of sulfuric acid, water, iodine, and hydrofluoric acid improves the adhesion between the roughened P-current extension layer and the SiO2 bonding layer, preventing delamination of the P-current extension layer from the SiO2 after bonding. Roughening also reduces total internal reflection of emitted light, thus improving luminous efficiency. Furthermore, CMP polishing, which offers better grinding results, and activation of the SiO2 bonding layer with a mixed solution of hydrochloric acid and hydrogen peroxide further enhance the adhesion between the SiO2 bonding layer and the sapphire substrate. The above methods enable the flip-chip Mini LED chips provided in Examples 1-3 to eliminate the step of printing solder paste on the substrate during packaging. Instead, the chip's pads are simply attached to the substrate for reflow soldering. At the soldering temperature, the solder on the electrodes melts and solidifies, achieving chip-substrate interconnection. This facilitates modular production of packaged chips and effectively improves the problems of rapid tin diffusion between the electrodes, weak chip-substrate bonding force, high thermal expansion coefficient, and manufacturing difficulties during chip packaging. Compared with the comparative examples, the preparation methods provided in Examples 4-6 improve the substrate replacement yield by more than 30% and the luminous efficiency by more than 4%.

Claims

1. A GaAs-based flip-chip Mini LED chip, characterized in that, The chip includes, from bottom to top, a transparent substrate, a bonding layer, a P-current spreading layer, and a P-ohm layer; a mesa is disposed on the P-ohm layer; the mesa includes, from bottom to top, a P-waveguide layer, a light-emitting layer, an N-waveguide layer, an N-current spreading layer, an N-buffer layer, and an N-ohm layer; a P-electrode is disposed on the P-ohm layer below the mesa; an N-electrode is disposed on the N-ohm layer above the mesa; electrode pads are disposed directly above both the P-electrode and the N-electrode. The electrode pad structure is Ti / Al / Ni / Pt / Sn or Ti / Al / Ti / Pt / Ni / Pt / Sn. (1-x-y) Ag x Cu y Or Ti / Al / Ti / Pt / Ni / Pt / Sn / In, 0.5<X<2, 0.1<Y<1; The P electrode structure is Au / AuBe / Au, the N electrode structure is Au / AuGeNi / Au / Pt / Au, and there are N pairs of Ti / Al structures in the electrode pads, where N is a positive integer. The Ti / Al / Ni / Pt / Sn structure of the electrode pad has a Ti layer thickness of 50-200 nm, an Al layer thickness of 200-800 nm, a Ni layer thickness of 300-1000 nm, and a Sn layer thickness of 6-10 μm. (1-x-y) Ag x Cu y The Ti layer in the structure has a thickness of 50-200 nm, the Al layer has a thickness of 200-800 nm, the Ni layer has a thickness of 300-1000 nm, and the Sn layer has a thickness of... (1-x-y) Ag x Cu y The thickness of the layer is 6-10 μm; in the Ti / Al / Ti / Pt / Ni / Pt / Sn / In structure of the electrode pad, the thickness of the Ti layer is 50-200 nm, the thickness of the Al layer is 200-800 nm, the thickness of the Ni layer is 300-1000 nm, the thickness of the Sn layer is 2-4 μm, and the thickness of the In layer is 3-6 μm. The method for fabricating the GaAs-based flip-chip Mini LED includes the following steps: (1) Using the MOCVD method, an epitaxial wafer is obtained by sequentially growing an etching stop layer, an N-ohm layer, an N-buffer layer, an N-current spreading layer, an N-waveguide layer, a light-emitting layer, a P-waveguide layer, a P-ohm layer and a P-current spreading layer on a temporary substrate. (2) The P current extension layer is roughened to obtain the roughened surface of the P current extension layer; (3) Deposit a bonding layer on the roughened surface of the P current extension layer, and then polish the surface of the bonding layer to obtain a polished surface of the bonding layer; (4) After activating the polished surface of the transparent substrate and the bonding layer, a bonding process is performed to obtain an epitaxial wafer with a bonded transparent substrate; (5) Remove the temporary substrate and etching stop layer from the epitaxial wafer obtained in step (4); (6) The photolithographic mask on the surface of the epitaxial wafer obtained in step (5) is etched by ICP dry etching until the P-ohm layer is exposed to form a mesa; (7) Fabricate a P electrode on the P-ohm layer under the mesa; fabricate an N electrode on the N-ohm layer on the mesa; (8) ICP etching is used to etch the dicing channels between the epitaxial wafer mesa obtained in step (7), and then a protective layer is deposited on the surface of the epitaxial wafer; (9) Etch the protective layer directly above the P electrode and N electrode to form P conductive holes and N conductive holes; (10) Fabricate P electrode pads and N electrode pads above the P conductive holes and N conductive holes, respectively. (11) After thinning, stealth cutting, splitting, testing, optical inspection and sorting of the epitaxial wafer obtained in step (10), GaAs-based flip-chip Mini LED chips can be obtained.

2. The GaAs-based flip-chip Mini LED chip as described in claim 1, characterized in that, In step (2), the roughening treatment is a wet corrosion method, the roughening time is 30-90s, and the roughening temperature is 20-30℃.

3. The GaAs-based flip-chip Mini LED chip as described in claim 1, characterized in that, In step (2), a mixed solution of sulfuric acid, water, iodine and hydrofluoric acid is used for roughening treatment. The mixed solution contains 2000-3000 mL of sulfuric acid, 3000-4000 mL of water, 80-100 g of iodine and 1500-2000 mL of hydrofluoric acid.

4. The GaAs-based flip-chip Mini LED chip as described in claim 1, characterized in that, In step (3), the bonding layer is a silicon dioxide layer with a thickness of 2-4 μm, and the polishing is chemical mechanical polishing (CMP) treatment, after which the silicon dioxide layer is 0.8-1 μm thick.

5. The GaAs-based flip-chip Mini LED chip as described in claim 1, characterized in that, In step (4), the activation is carried out using an alkaline or acidic solution; the bonding temperature is 360-450℃, the bonding pressure is 8000-12000kg, and the bonding time is 900-1200s; the transparent substrate is a sapphire substrate.

6. The GaAs-based flip-chip Mini LED chip as described in claim 5, characterized in that, Activation is performed using a mixed solution of hydrochloric acid and hydrogen peroxide, with 4000-5000 mL of hydrochloric acid and 2000-3000 mL of hydrogen peroxide in the mixed solution.

7. The GaAs-based flip-chip Mini LED chip according to claim 1, characterized in that, In step (5), a mixed solution of ammonia, hydrogen peroxide and water is used to remove the temporary substrate and etching stop layer of the bonded wafer. The volume ratio of ammonia, hydrogen peroxide and water in the mixed solution is 1:4:

5.

8. The GaAs-based flip-chip Mini LED chip as described in claim 1, characterized in that, In step (9), the protective layer is a silicon dioxide layer.

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