An anti-jamming communication device and method

Abstract

This invention discloses an anti-interference communication device and method. A constant current circuit is set between the master and slave devices. This circuit converts voltage or digital signals into a constant current signal, which is transmitted between the master and slave devices via a communication line. Utilizing constant current for transmission between the master and slave devices overcomes the problems of poor anti-interference capability, impedance mismatch, and signal instability in existing data transmission methods, thus reducing interference in the communication circuit. The current control scheme proposed in this invention uses inexpensive components, and the effective stabilization of the current in the communication circuit through circuit structure construction achieves stable signal transmission between the master and slave devices.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to an anti-interference communication device and method. Background Technology

[0002] With societal development and increasing informatization, data transmission volumes are growing larger and increasingly trending towards high-speed, long-distance transmission, placing higher demands on the anti-interference capabilities of data transmission. During signal transmission, impedance mismatch in transmission lines, leading to changes in the current signal, is one of the main causes of interference. Current data transmission suffers from poor anti-interference capabilities, impedance mismatch, and signal instability. Ensuring stable current signals during transmission would significantly improve anti-interference capabilities. Summary of the Invention

[0003] The purpose of this invention is to provide an anti-interference communication device and method that can solve one of the problems of poor anti-interference capability, impedance mismatch, and unstable signal in the prior art.

[0004] In a first aspect, an anti-interference communication device includes a host and a slave. The host includes a host circuit, and the slave includes a slave circuit. The host circuit and the slave circuit are connected by a communication line. The host circuit and the slave circuit have independent or isolated constant current circuits that convert voltage signals or digital signals into constant current signals for transmission between the host and the slave.

[0005] Optionally, the master circuit and the slave circuit have independent or isolated constant current circuits. This means that the master circuit has multiple sets of independent or isolated transmitting and receiving circuits. For example, the master circuit has one set of transmitting circuits and one set of receiving circuits, and the slave circuit has one set of receiving circuits and one set of transmitting circuits. The transmitting circuit of the master and the receiving circuit of the slave constitute a constant current circuit. Alternatively, the master circuit and the slave circuit each have multiple sets of transmitting and receiving circuits. The constant current circuit refers to the circuit between the transmitting circuit and the receiving circuit that converts the voltage signal or digital signal into a constant current for transmission on the communication line.

[0006] Furthermore, when the transmitting circuit of the master circuit receives a voltage signal or a digital signal, the transmitting circuit of the master circuit and the receiving circuit of the slave circuit convert the received voltage signal or digital signal into a constant current signal and transmit it to the slave receiving circuit through the communication line. Then, the slave receiving circuit converts the current signal into a voltage signal or a digital signal. By transmitting the constant current signal, the interference or instability caused by impedance mismatch is overcome.

[0007] Optionally, the constant current circuit converts the voltage signal into a constant current signal using analog electronic devices or power devices, such as transistor circuits, MOSFET circuits, or IGBT circuits.

[0008] Optionally, an anti-interference communication device includes a host and a slave. The host includes a host circuit, and the slave includes a slave circuit. The host circuit and the slave circuit are connected through a communication line, and the host circuit and the slave circuit have independent or isolated constant current circuits.

[0009] Optionally, an anti-interference communication device is provided, comprising a master unit and a slave unit. The master unit includes a master circuit, and the slave unit includes a slave circuit. The master circuit and the slave circuit are connected through a communication line. The master circuit and the slave circuit have at least 2N sets of independent or isolated constant current circuits, where N is a positive integer.

[0010] Optionally, an anti-interference communication device includes a master unit and a slave unit. The master unit includes a master circuit, and the slave unit includes a slave circuit. The master circuit and the slave circuit are connected through a communication line. The master circuit and the slave circuit have at least one set of independent or isolated constant current circuits. Alternatively, one master unit can be used to connect to N sets of master units, where N is an integer greater than or equal to 2.

[0011] Further optionally, a first constant current circuit is provided between the host transmitting port and the slave receiving port; and a second constant current circuit is provided between the slave transmitting port and the host receiving port.

[0012] Alternatively, the communication lines may contain 3n or 3n+1 lines, where n is a positive integer.

[0013] Optionally, the first constant current circuit master circuit includes a PNP transistor Q1 and an NPN transistor Q2. The base of transistor Q1 is connected to the master transmitter port, and the collector of transistor Q1 is connected to the base of transistor Q2. The collector and emitter of transistor Q2 are respectively connected to pins 2 and 4 of the master-side communication connection terminal. The first constant current circuit slave circuit includes an NPN transistor Q5, an NPN transistor Q6, and an optocoupler U1. The emitter of transistor Q6 is connected to pin 2 of the slave-side communication connection terminal, and the base of transistor Q6 is connected to the PNP transistor Q5. The emitter and collector of transistor Q5 are connected to the primary side of optocoupler U1. The collector of the secondary side of optocoupler U1 is connected to the slave receiver port. The emitter of the secondary side of optocoupler U1 is connected to pin 4 of the slave-side communication connection terminal via a ground terminal. When the master transmitter port is high, there is no current in pins 2 and 4. When the master transmitter port is low, the current in pins 2 and 4 is Vbe6 / R12, where Vbe6 is the voltage between the base and emitter of transistor Q6, and R12 is the parallel resistor between the base and emitter of transistor Q6.

[0014] Optionally, the slave circuit of the second constant current circuit includes an optocoupler U2, the primary side of which is connected to the slave transmitting port, the emitter pin 4 of the secondary side of the optocoupler U1, and the collector of the secondary side of the optocoupler U1 connected to pin 3 of the slave-side communication connection terminal; the master circuit of the second constant current circuit includes an NPN transistor Q3 and an NPN transistor Q4, the emitter of transistor Q4 connected to pin 3 of the master-side communication connection terminal, and one end of the base of transistor Q4 connected to pin 4 of the master-side communication connection terminal via resistor R9. The base of transistor Q4 is connected in parallel to the emitter of transistor Q3. The collector of transistor Q3 is connected to the host receiver port. The base of transistor Q3 is connected to the collector of transistor Q4. When the slave transmitter port is high, there is no current in pins 2 and 4. When the slave transmitter port is low, the current in pins 3 and 4 is Vbe4 / R9, where Vbe4 is the voltage between the base and emitter of transistor Q4, R9 is the parallel resistor between the base and emitter of transistor Q4, and Vbe6 / R12 = Vbe4 / R9.

[0015] Further optionally, the host circuit includes a host-side communication connection terminal, the slave circuit includes a slave-side communication connection terminal, and the connection line between pin 1 of the host-side communication connection terminal and pin 1 of the slave-side communication connection terminal is set as a shielded line, with a low-pass filter, a high-pass filter, or a band-pass filter circuit connected in series in the shielded line.

[0016] Further optionally, the host circuit includes a host-side communication connection terminal, the slave circuit includes a slave-side communication connection terminal, and the connection line between pin 1 of the host-side communication connection terminal and pin 1 of the slave-side communication connection terminal is set as a shielded line, and at least one or two of the following devices, namely capacitor, reactance and resistor, are connected in series in the shielded line.

[0017] Another aspect of the present invention is an anti-interference communication method, comprising:

[0018] Step 1: Transmit the voltage signal between the master and slave devices to the constant current circuit;

[0019] Step 2: The constant current circuit converts the voltage signal into a constant current signal for transmission in the communication line.

[0020] Further optionally, the master circuit includes a master circuit, the slave circuit includes a slave circuit, the master circuit and the slave circuit are connected by a communication line, and the master circuit and the slave circuit have at least 2N sets of independent or isolated constant current circuits, where N is a positive integer.

[0021] Further optionally, a first constant current circuit is provided between the host transmitting port and the slave receiving port; and a second constant current circuit is provided between the slave transmitting port and the host receiving port.

[0022] Alternatively, the communication lines may contain 3n or 3n+1 lines, where n is a positive integer.

[0023] Optionally, the first constant current circuit master circuit includes a PNP transistor Q1 and an NPN transistor Q2. The base of Q1 is connected to the master transmitter port, and the collector of Q1 is connected to the base of Q2. The collector and emitter of Q2 are respectively connected to pins 2 and 4 of the master-side communication connection terminal. The first constant current circuit slave circuit includes an NPN transistor Q5, an NPN transistor Q6, and an optocoupler U1. The emitter of Q6 is connected to pin 2 of the slave-side communication connection terminal, and the base of Q6 is connected to pin 4 of Q5. The emitter and collector of Q5 are connected to the primary side of optocoupler U1. The collector of the secondary side of optocoupler U1 is connected to the slave receiver port. The emitter of the secondary side of optocoupler U1 is connected to pin 4 of the slave-side communication connection terminal via the ground terminal. When the master transmitter port is high, there is no current in pins 2 and 4. When the master transmitter port is low, the current in pins 2 and 4 is Vbe6 / R12, where Vbe6 is the voltage between the base and emitter of Q6, and R12 is the parallel resistor between the base and emitter of Q6.

[0024] Optionally, the slave circuit of the second constant current circuit includes an optocoupler U2, the primary side of which is connected to the slave transmitting port, the emitter pin 4 of the secondary side of the optocoupler U1, and the collector of the secondary side of the optocoupler U1 connected to pin 3 of the slave-side communication connection terminal; the master circuit of the second constant current circuit includes an NPN transistor Q3 and an NPN transistor Q4, the emitter of Q4 connected to pin 3 of the master-side communication connection terminal, one end of the base of R4 connected to pin 4 of the master-side communication connection terminal via resistor R9, and the base of R4 connected in parallel to the emitter of Q3, the collector of Q3 connected to the master receiving port, and the base of Q3 connected to the collector of Q4; when the slave transmitting port is high, there is no current in pins 2 and 4; when the slave transmitting port is low, the current in pins 3 and 4 is Vbe4 / R9, where Vbe4 is the voltage between the base and emitter of Q4, and R9 is the resistor connected in parallel between the base and emitter of Q4.

[0025] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0026] Alternatively, at least two of the following components—a capacitor, a reactance, and a resistor—can be connected in series in the shielding wire to facilitate the attenuation of reflected interference and electrical noise.

[0027] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0028] Alternatively, an inductor can be connected in series in the shielding wire to absorb reflected interference and electrical noise.

[0029] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0030] Alternatively, a low-pass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 1-5 kHz.

[0031] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0032] Alternatively, a low-pass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 1-10kHz.

[0033] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0034] Alternatively, a low-pass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 5-20kHz.

[0035] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0036] Alternatively, a high-pass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 0-1MHz.

[0037] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0038] Alternatively, a high-pass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 1-10MHz.

[0039] Alternatively, CN1 and CN2 are connected via a communication line, and the connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0040] Alternatively, a bandpass filter circuit can be connected in series in the shielding wire to filter out stray electromagnetic waves of 2-20kHz.

[0041] Alternatively, the optocoupler can be replaced with an isolation device, such as an isolation transformer; or a common transistor can be used instead of the optocoupler.

[0042] Alternatively, the corresponding NPN transistor can be replaced with a PNP transistor.

[0043] In another aspect, the present invention provides an anti-interference communication method, characterized by comprising the following anti-interference steps:

[0044] Step 1: Transmit the voltage signal between the master and slave devices to the constant current circuit;

[0045] Step 2: The constant current circuit converts the voltage signal into a constant current signal for transmission in the communication circuit.

[0046] Alternatively, the constant current circuit utilizes the fact that when the transistor is saturated and conducting, the voltage between the emitter and collector remains constant to maintain a constant current.

[0047] Further optionally, the constant current circuit converts the voltage signal into a constant current signal for transmission in the communication circuit by: ensuring that there is no current in the communication circuit when the host sends a high level, and that the current in the communication circuit is a constant current I when the host sends a low level, thereby converting the transmission of the voltage signal into the transmission of the constant current signal.

[0048] Beneficial technical effects:

[0049] The anti-interference communication implementation scheme proposed in this invention is to convert voltage signals into current signals for transmission by controlling the constant current in the communication line, thereby avoiding interference problems caused by impedance imbalance in the communication circuit. The current control scheme proposed in this invention uses low-cost components and effectively achieves the stability of the communication circuit current through the construction of the circuit structure. It is cost-effective and efficient, solving the problems of poor anti-interference ability, impedance mismatch, and signal instability in data transmission. Attached Figure Description

[0050] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0051] Figure 1 A circuit diagram of the host circuit of an embodiment of the communication device of the present invention is shown;

[0052] Figure 2 A slave circuit diagram of an embodiment of the communication device of the present invention is shown;

[0053] Figure 3 A diagram of the shielding wires for the communication line in an embodiment of the communication device of the present invention is shown. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0055] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0056] Example 1

[0057] TX is the host's transmit port;

[0058] RX is the host receive port;

[0059] TXS is the slave device's transmit port;

[0060] RXS is the slave receive port;

[0061] CN1 is the host-side communication connection terminal, with pins 1, 2, 3 and 4;

[0062] CN2 is a slave-side communication connection terminal with pins 1, 2, 3 and 4;

[0063] CN1 and CN2 are connected via a communication line. Pin 1 of CN1 corresponds to pin 1 of CN2; pin 2 of CN1 corresponds to pin 2 of CN2; pin 3 of CN1 corresponds to pin 3 of CN2; and pin 4 of CN1 corresponds to pin 4 of CN2.

[0064] The anti-interference communication device shown in this invention includes a master unit and a slave unit. The master unit includes master circuitry, and the slave unit includes slave circuitry. Figure 1In the host circuit shown, TX and RX represent the host's transmit and receive signals, respectively. The communication process is as follows: when TX sends a high level, PNP transistor Q1 is not conducting. At this time, the base of NPN transistor Q2 is low, also in a non-conducting state. Meanwhile, the base and emitter of NPN transistor Q5 are both high, so Q5 is not conducting. Similarly, the base and emitter of NPN transistor Q6 are also high, meaning they are not conducting. Because transistors Q5 and Q6 are off, the primary diode of optocoupler U1 cannot conduct, and the secondary side of optocoupler U1 is also not conducting. Since the slave circuit's receiver port RXD is connected to a pull-up resistor R13, the received level is high. That is, when the host sends a high level (TX), the slave receives a high level (RXD), and there is no current signal in the communication line at this time.

[0065] When the host TX sends a low-level signal, the base of PNP transistor Q1 is low and in a conducting state. Due to the conduction of PNP transistor Q1, the base of NPN transistor Q2 is high and the NPN transistor is conducting. The collector of NPN transistor Q2 is low, and the voltage is the transistor voltage drop of NPN transistor Q2. When NPN transistor Q2 is in a saturated conducting state, the voltage at the collector of Q2 is a constant value Vbe2, which is relatively small. At this time, pin 1 of terminal CN1 is high and pin 2 is low. Terminal CN2 is connected to terminal CN1, and pins 1 and 2 of terminal CN2 are high and low, respectively. This causes the base of NPN transistor Q5 to be high and the emitter to be low, turning NPN transistor Q5 on. Due to the conduction of NPN transistor Q5, the base of NPN transistor Q6 becomes high and the emitter becomes low. With transistor Q6 conducting, the voltage across R12 is the transistor voltage drop across Q6, which is also the voltage difference between the emitter and base of Q6, a constant value Vbe6. Therefore, the current is I = Vbe6 / R12. In this current loop, the current flowing through resistor R12 is the total current. Consequently, the current flowing through the communication line is also a constant I = Vbe6 / R12.

[0066] When the host sends a high level, there is no current in the communication circuit. When the host sends a low level, the current in the communication circuit is a constant current I. Therefore, the transmission of voltage signals can be cleverly converted into the transmission of constant current signals, thereby avoiding communication interference caused by current changes due to impedance mismatch.

[0067] Based on the communication principle described above, we analyze the data transmission situation when the slave circuit is in the transmitting state. When the slave transmits the signal TXS at a high level, both ends of the primary diode of optocoupler U2 are at a high level, so the secondary side of the optocoupler is not conducting. At this time, NPN transistors Q3 and Q4 are not conducting. Since the master receives the signal RX, which is connected to the pull-up resistor R6, the signal received by the master's receiving port RX is at a high level.

[0068] When the slave device transmits a low level via the TXS port, the diode on the primary side of optocoupler U2 is at a high level and the diode at a low level, respectively. The primary side of optocoupler U2 is turned on, and the transistor on the secondary side of optocoupler U2 also turns on. At this time, NPN transistor Q4 is turned on. Due to the conduction of NPN transistor Q4, the base of NPN transistor Q3 is at a low level, and NPN transistor Q3 is also turned on. The master device receives a low-level signal RX due to the conduction of transistor Q3. After NPN transistor Q4 is turned on, the voltage across resistor R9 is the voltage drop across NPN transistor Q4, which is the voltage difference between the emitter and base of NPN transistor Q4, a constant value Vbe4. Therefore, the current is I_slave = Vbe4 / R9. In this current loop, the current flowing through resistor R9 is the total current. Therefore, the current flowing through the communication line is also a constant current I = Vbe4 / R9.

[0069] As described above, this invention utilizes the fact that when a transistor is in a saturated conduction state, the voltage drop between the emitter and base of the transistor is a constant value. By using this constant voltage value to connect a resistor with a fixed resistance value in parallel, the current can be kept constant, thereby controlling the current to remain constant during communication data transmission. This prevents the current signal from changing due to impedance changes, thus reducing interference during communication.

[0070] The aforementioned NPN transistor can be equivalently replaced by a PNP transistor; alternatively, the aforementioned NPN transistor and PNP transistor can be replaced by an N-channel MOSFET and a P-channel MOSFET.

[0071] The current of the communication connection terminal pins when the master TX and slave TXS terminals send different levels is shown in Table 1.

[0072] Table 1. Current Distribution of Communication Connection Terminal Pins

[0073]

[0074] As shown in Table 1, when the host TX terminal is low, a constant current is generated between the corresponding communication connection terminal pins 2 and 4; when the host TX terminal is high, there is no current between the corresponding communication connection terminal pins 2 and 4; when the slave TXS terminal is high, there is no current between the corresponding communication connection terminal pins 3 and 4; when the slave TXS terminal is low, a constant current is generated between the corresponding communication connection terminal pins 3 and 4; constant current refers to a constant current.

[0075] As shown in Table 1, no current is generated in pin 1, so the communication line can contain 3n or 3n+1 lines, where n is a positive integer.

[0076] Example 2

[0077] As shown in Table 1 of Example 1, pin 4 has a constant current; from Figure 1-2 As shown, the direction of the constant current generated by Q6 in pin 4 is opposite to the direction of the constant current generated by Q4 in pin 4. When Vbe6 / R12 = Vbe4 / R9 is set, the currents in pin 4 of the host-side communication connection terminal and the slave-side communication connection terminal cancel each other out, further reducing reflection interference and electrical noise caused by impedance mismatch.

[0078] Example 3

[0079] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0080] Example 4

[0081] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0082] A capacitor is connected in series in the shielded wire to absorb reflected interference and electrical noise.

[0083] Example 5

[0084] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0085] An inductor is connected in series in the shielded wire to absorb reflected interference and electrical noise.

[0086] Example 6

[0087] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0088] A low-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 1-5kHz.

[0089] Example 7

[0090] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0091] A low-pass filter circuit is connected in series in the shielded wire to filter stray electromagnetic waves of 1-10kHz.

[0092] Example 8

[0093] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0094] A low-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 5-20kHz.

[0095] Example 9

[0096] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0097] A high-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 0-1MHz.

[0098] Example 10

[0099] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0100] A high-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 1-10MHz.

[0101] Example 11

[0102] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0103] A bandpass filter circuit is connected in series in the shielded wire to filter stray electromagnetic waves of 2-20kHz.

[0104] Example 12

[0105] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0106] Connect at least two of the following components—capacitor, reactance, and resistor—in series in the shielding wire to attenuate reflected interference and electrical noise.

[0107] Example 12

[0108] An anti-interference communication method, comprising:

[0109] Step 1: Transmit the voltage signal between the master and slave devices to the constant current circuit;

[0110] Step 2: The constant current circuit converts the voltage signal into a constant current signal for transmission in the communication line.

[0111] The master circuit contains a master circuit, the slave circuit contains a slave circuit, the master circuit and the slave circuit are connected by a communication line, and there are at least 2N sets of independent or isolated constant current circuits between the master circuit and the slave circuit, where N is a positive integer.

[0112] A first constant current circuit is provided between the master transmitting port and the slave receiving port; a second constant current circuit is provided between the slave transmitting port and the master receiving port.

[0113] The communication lines contain 3n or 3n+1 lines, where n is a positive integer.

[0114] The first constant current circuit, the host circuit, includes a PNP transistor Q1 and an NPN transistor Q2. The base of Q1 is connected to the host's transmit port, and the collector of Q1 is connected to the base of Q2. The collector and emitter of Q2 are connected to pins 2 and 4 of the host-side communication connection terminal, respectively. The first constant current circuit, the slave circuit, includes NPN transistors Q5 and Q6 and an optocoupler U1. The emitter of Q6 is connected to pin 2 of the slave-side communication connection terminal, and the base of Q6 is connected to the emitter of Q5. The collector of Q5 is connected to the primary side of optocoupler U1, and the collector of the secondary side of optocoupler U1 is connected to the slave receiver port. The emitter of the secondary side of optocoupler U1 is connected to pin 4 of the slave-side communication connection terminal via the ground terminal. When the master transmitter port is high, there is no current in pins 2 and 4. When the master transmitter port is low, the current in pins 2 and 4 is Vbe6 / R12, where Vbe6 is the voltage between the base and emitter of Q6, and R12 is the parallel resistor between the base and emitter of Q6.

[0115] The second constant current circuit slave circuit includes optocoupler U2. The primary side of optocoupler U2 is connected to the slave transmitting port. The emitter pin 4 of the secondary side of optocoupler U1 is connected to the collector pin 3 of the slave-side communication connection terminal. The second constant current circuit master circuit includes NPN transistors Q3 and Q4. The emitter of Q4 is connected to the pin 3 of the master-side communication connection terminal. One end of the base of R4 is connected to the pin 4 of the master-side communication connection terminal via resistor R9. At the same time, the base of R4 is connected in parallel to the emitter of Q3. The collector of Q3 is connected to the master receiving port. The base of Q3 is connected to the collector of Q4. When the slave transmitting port is high, there is no current in pins 2 and 4. When the slave transmitting port is low, the current in pins 3 and 4 is Vbe4 / R9, where Vbe4 is the voltage between the base and emitter of Q4, and R9 is the resistor connected in parallel between the base and emitter of Q4.

[0116] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0117] Connect at least two of the following components—capacitor, reactance, and resistor—in series in the shielding wire to attenuate reflected interference and electrical noise.

[0118] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0119] An inductor is connected in series in the shielded wire to absorb reflected interference and electrical noise.

[0120] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0121] A low-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 1-5kHz.

[0122] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0123] A low-pass filter circuit is connected in series in the shielded wire to filter stray electromagnetic waves of 1-10kHz.

[0124] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0125] A low-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 5-20kHz.

[0126] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0127] A high-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 0-1MHz.

[0128] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0129] A high-pass filter circuit is connected in series in the shielded wire to filter out stray electromagnetic waves of 1-10MHz.

[0130] CN1 and CN2 are connected via a communication line. The connection line between pin 1 of CN1 and pin 1 of CN2 is set as a shielded line to reduce reflection interference and electrical noise caused by impedance mismatch.

[0131] A bandpass filter circuit is connected in series in the shielded wire to filter stray electromagnetic waves of 2-20kHz.

[0132] It should be noted that the sequence numbers of the embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0133] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0134] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. An anti-interference communication device, comprising a master unit and a slave unit, characterized in that, The master circuit includes a master circuit, the slave circuit includes a slave circuit, the master circuit and the slave circuit are connected by a communication line, and the master circuit and the slave circuit have independent or isolated constant current circuits. The constant current circuit converts voltage signals or digital signals into constant current signals for transmission between the master and the slave. A first constant current circuit is provided between the host circuit's host transmitting port and the slave circuit's slave receiving port; a second constant current circuit is provided between the slave circuit's slave transmitting port and the host circuit's host receiving port. The first constant current circuit slave circuit includes NPN transistors Q5 and Q6 and optocoupler U1. The emitter of transistor Q6 is connected to pin 2 of the slave-side communication connection terminal, the base of transistor Q6 is connected to the emitter of transistor Q5, the collector of transistor Q5 is connected to the primary side of optocoupler U1, the collector of the secondary side of optocoupler U1 is connected to the slave receiving port, and the emitter of the secondary side of optocoupler U1 is connected to pin 4 of the slave-side communication connection terminal via a ground terminal. When the master transmitting port is at a high level, there is no current in pins 2 and 4; when the master transmitting port is at a low level, the current in pins 2 and 4 is Vbe6 / R12, where Vbe6 is the voltage between the base and emitter of transistor Q6, and R12 is the parallel resistor between the base and emitter of transistor Q6. The second constant current circuit master circuit includes NPN transistors Q3 and Q4. The emitter of transistor Q4 is connected to pin 3 of the master-side communication connection terminal, and one end of the base of transistor Q4 is connected to pin 4 of the master-side communication connection terminal via resistor R9. At the same time, the base of transistor Q4 is connected in parallel to the emitter of transistor Q3, and the collector of transistor Q3 is connected to the master-side receiving port. The base of transistor Q3 is connected to the collector of transistor Q4. When the slave transmitting port is high, there is no current in pins 2 and 4. When the slave transmitting port is low, the current in pins 3 and 4 is Vbe4 / R9, where Vbe4 is the voltage between the base and emitter of transistor Q4, and R9 is the parallel resistor between the base and emitter of transistor Q4. Vbe6 / R12 = Vbe4 / R9.

2. The anti-interference communication device as described in claim 1, characterized in that, The communication lines contain 3n or 3n+1 lines, where n is a positive integer.

3. The anti-interference communication device as described in claim 1, characterized in that, The first constant current circuit host circuit includes a PNP transistor Q1 and an NPN transistor Q2. The base of transistor Q1 is connected to the host transmission port, the collector of transistor Q1 is connected to the base of transistor Q2, and the collector and emitter of transistor Q2 are respectively connected to pin 2 and pin 4 of the host-side communication connection terminal.

4. The anti-interference communication device as described in claim 1 or 3, characterized in that, The second constant current circuit slave circuit includes an optocoupler U2. The primary side of the optocoupler U2 is connected to the slave transmitter port, the emitter pin 4 of the secondary side of the optocoupler U1 is connected to the collector pin 3 of the slave side communication connection terminal.

5. The anti-interference communication device according to any one of claims 1-3, characterized in that, The host circuit includes a host-side communication connection terminal, and the slave circuit includes a slave-side communication connection terminal. The connection line between pin 1 of the host-side communication connection terminal and pin 1 of the slave-side communication connection terminal is set as a shielded line, and a low-pass filter, high-pass filter, or band-pass filter circuit is connected in series in the shielded line.

6. The anti-interference communication device according to any one of claims 1-3, characterized in that, The host circuit includes a host-side communication connection terminal, and the slave circuit includes a slave-side communication connection terminal. The connection line between pin 1 of the host-side communication connection terminal and pin 1 of the slave-side communication connection terminal is set as a shielded line, and at least one or two of the following components, namely a capacitor, a reactance, and a resistor, are connected in series in the shielded line.

7. An anti-interference communication method applied to the anti-interference communication device according to any one of claims 1-6, characterized in that, The anti-interference steps include the following: Step 1: Transmit the voltage signal between the master and slave devices to the constant current circuit; Step 2: The constant current circuit converts the voltage signal into a constant current signal for transmission in the communication line.

8. The anti-interference communication method as described in claim 7, characterized in that, The constant current circuit utilizes the fact that when the transistor is saturated and conducting, the voltage between the emitter and collector remains constant, thus maintaining a constant current.

9. The anti-interference communication method as described in claim 8, characterized in that, The constant current circuit converts the voltage signal into a constant current signal for transmission in the communication line by: ensuring that there is no current in the communication circuit when the host sends a high level, and that the current in the communication circuit is constant when the host sends a low level, thereby converting the transmission of the voltage signal into the transmission of the constant current signal.

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