Image sensor ramp signal generation circuit and formation method

Abstract

The present invention provides a generation circuit and a formation method of a ramp signal of an image sensor, wherein the generation circuit of the ramp signal of the image sensor includes: a coefficient control unit, a plurality of ramp signal current generating units and a resistive load; the coefficient control unit is suitable for providing a plurality of different ramp signal coefficients according to application requirements; the plurality of different ramp signal coefficients are respectively transmitted to the plurality of ramp signal current generating units, so that the plurality of ramp signal current generating units provide ramp signal currents of different weights to flow through the resistive load, thereby obtaining the required ramp signal. The design scheme of the nonlinear ramp signal generation circuit provided by the technical solution of the present invention can provide a nonlinear ramp signal, and the slope of the generated ramp signal can be adjusted by adjusting the coefficient.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a generation circuit and a formation method of a ramp signal of an image sensor. Background Art

[0002] In image sensors, as the size of pixel unit arrays continues to expand, traditional chip-level analog-to-digital converters can no longer meet the requirements of high frame rates, so high-frame-rate image sensors use column-level analog-to-digital converters. Among them, column-level analog-to-digital converters have the characteristics of achieving high precision with only a small area and power consumption, and are widely used in high-pixel and high-frame-rate image sensors.

[0003] The column-level analog-to-digital converter is mainly composed of a comparator and a storage unit or a counting unit. In the analog-to-digital converter (ADC), a ramp (VRAMP) signal is required as the comparison level of the comparator. The accuracy of the ramp signal directly affects the output accuracy of the SS ADC. In addition, the application scenario of high-frame rate image sensors requires a corresponding high-speed ramp signal, so how to generate a high-speed and high-precision ramp signal is a very important research topic.

[0004] refer to Figure 1 As shown, in the prior art, the ramp signal generating circuit is usually composed of a control circuit 11, a current source array 22, a switch array 33 and a resistive load R; the differential switch array 33 determines whether the current of the current source array 22 flows to the positive or negative output terminal according to the output signal of the control circuit 11, and a series of currents passing through the switch array 33 are summed up at the output terminal to finally obtain the required current, which generates the required ramp signal after flowing through the resistive load R.

[0005] In the existing ramp signal generating circuit, the generated ramp signal is a linear ramp signal. When the image sensor array becomes larger and larger and the frame rate requirement becomes higher and higher, the linear ramp signal often becomes the bottleneck of the column-level analog-to-digital converter, and it is difficult to consume less time and achieve higher accuracy at the same time. In addition, the application scenarios of image sensors are becoming more and more extensive and varied, and a single linear ramp signal is also difficult to adapt to different application requirements. Summary of the invention

[0006] The object of the present invention is to provide a circuit for generating a ramp signal of an image sensor and a method for generating the same, so as to solve the technical problem in the prior art that a single linear ramp signal is difficult to adapt to different application requirements.

[0007] In order to solve the above technical problem, the present invention provides a circuit for generating a ramp signal of an image sensor, comprising:

[0008] A coefficient control unit, a plurality of ramp signal current generating units and a resistive load;

[0009] The coefficient control unit is adapted to provide a plurality of different ramp signal coefficients according to application requirements;

[0010] The multiple different ramp signal coefficients are respectively transmitted to the multiple ramp signal current generating units, so that the multiple ramp signal current generating units provide ramp signal currents with different weights to flow through the resistance load, thereby obtaining the required ramp signal.

[0011] Preferably, the plurality of ramp signal current generating units include at least one nonlinear ramp signal current generating unit.

[0012] Preferably, when the voltage across the resistive load increases by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the voltage across the resistive load increases by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

[0013] Preferably, when the current flowing to the resistive load increases or decreases in magnitude by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the current flowing to the resistive load increases or decreases in magnitude by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

[0014] Preferably, the ramp signal current generating unit is a current steering structure digital-to-analog converter.

[0015] Preferably, the ramp signal current generating unit comprises:

[0016] at least one current source unit and at least one state storage unit;

[0017] The current source units are connected in parallel with each other;

[0018] The state storage unit corresponds to the current source unit one by one and is connected in cascade. The state storage unit is suitable for controlling the step-by-step transmission of the switch signal of the current source under the drive of the differential clock signal, thereby realizing the accumulation or decrease of the output current to generate a ramp signal.

[0019] Preferably, the ramp signal current generating unit comprises at least one current source unit, and the size of the current flowing to the resistance load is determined by the width-to-length ratio of the MOS transistor in the current source unit.

[0020] Preferably, when the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is larger, the current flowing from the ramp signal current generating unit to the resistance load is larger;

[0021] When the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is smaller, the current flowing from the ramp signal current generating unit to the resistance load is smaller.

[0022] Preferably, a differential switch group controlled by the state storage unit is arranged between the current source unit and the state storage unit, and the differential switch group is respectively connected to the output of the state storage unit and the inverted differential output thereof.

[0023] Preferably, adjacent state storage units are respectively input with differential clock signals, or the same clock signal; when the state storage unit is adapted to detect a change edge of the input differential clock signal, the input level is transmitted to the output end.

[0024] Preferably, the state storage unit is also suitable for being reset under the control of the state control signal, or for transmitting the output result step by step according to the inversion of the clock signal under the control of the state control signal.

[0025] Preferably, the level of the output terminal of the state storage unit is used to control the differential switch group to select to turn on or off the current source array in sequence, thereby generating a ramp signal.

[0026] Preferably, all the cascaded state storage units are divided into N groups, including 1 group of state storage units in an enabled state and N-1 groups of state storage units in a dormant state.

[0027] Preferably, each group of the state storage units comprises M state storage units in cascade, and when the state storage units of the group numbered N to N+M-1 are working, the state storage units of other groups output fixed values ​​without internal clock signals flipping; wherein M is greater than or equal to 2.

[0028] Preferably, the weights of the current source units are the same as or different from each other.

[0029] Preferably, when the weight of each current source unit in the current source array is the same, the generated ramp signal is a linear ramp signal; when the weight of each current source unit in the current source array is different, the generated ramp signal is a nonlinear ramp signal.

[0030] Preferably, the coefficient control unit controls the weight coefficients of different ramp signal current generating units by generating different bias voltages.

[0031] Preferably, the coefficient control unit comprises: current mirror transistors MN_1, MN_2, ..., MN_n for mirroring input current, and bias voltage generating transistors MP_1, MP_2, ..., MP_n;

[0032] The current flowing to the bias voltage generating tubes MP_1, MP_2, ..., MP_n is set by setting the width-to-length ratio of the current mirror transistors MN_1, MN_2, ..., MN_n to control the generated bias voltages Vbias_1, Vbias_2, ..., Vbias_n, thereby controlling the current generated by the ramp signal current generating unit;

[0033] Alternatively, the bias voltages Vbias_1 , Vbias_2 , . . . , Vbias_n are set by setting the width-to-length ratios of the bias voltage generating transistors MP_1 , MP_2 , . . . , MP_n, thereby controlling the current generated by the ramp signal current generating unit.

[0034] Preferably, the output current of the ramp signal current generating unit flows to a resistive load through an output node, the other end of the resistive load is connected to a fixed voltage or grounded, and a ramp signal is output between the output node and the resistive load.

[0035] Preferably, the current flowing to the resistive load in at least one circuit unit cycle time increases or decreases in magnitude at different levels, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

[0036] The technical solution of the present invention also provides a method for forming a ramp signal of an image sensor, and provides the image sensor ramp signal generating circuit as described above;

[0037] The ramp signal V ramp The expression is:

[0038] Among them, P[1], P[2], ..., P[n] are the ramp signal coefficients, I ramp_1 ,I ramp_2 ,……,I ramp_n is the ramp signal current, and R is the resistance value of the resistive load.

[0039] Preferably, the ramp signal current I ramp_1 ,I ramp_2 ,……,I ramp_n The same or different.

[0040] Preferably, the ramp signal V ramp It is suitable to adjust the slope by adjusting the ramp signal coefficients P[1], P[2], ..., P[n].

[0041] Preferably, in a scenario where the accuracy and speed requirements are relatively low, the ramp signal coefficients P[1], P[2], ..., P[n] are adjusted so that the ramp signal V ramp The curvature change is not obvious. In scenarios with high requirements for accuracy and speed, adjust P[1], P[2], ..., P[n] to make the curvature change of the ramp signal ramp more obvious.

[0042] Preferably, the current flowing to the resistive load in at least one circuit unit cycle time increases or decreases in magnitude at different levels, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

[0043] The technical solution of the present invention further provides a method for forming a ramp signal of an image sensor, and provides the image sensor ramp signal generating circuit as described above, wherein the nonlinear ramp signal is composed of two ramp signals:

[0044] Among them, P[1] and P[2] are the ramp signal coefficients, I ramp_1 and I ramp_2 is the ramp signal current.

[0045] Preferably, the I ramp_1 is a linear ramp signal, I ramp_2 is a nonlinear ramp signal.

[0046] Preferably, the amount of increase or decrease of the current flowing to the resistive load in at least one circuit unit cycle time is different, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

[0047] Preferably, one of the ramp signal currents flows to the same increment of the resistive load within a unit cycle time, and the other ramp signal current is divided into three stages. In the first stage, the current flows to the same increment of the resistive load within a unit time; in the second stage, the current flows to different increments of the resistive load within a unit time; and in the third stage, the current flows to the same increment of the resistive load within a unit time and is different from the current flows to the resistive load increment within a unit cycle time in the first stage.

[0048] Preferably, the current flowing to the resistive load within a unit cycle time of at least one ramp signal current generating unit increases or decreases in the same magnitude.

[0049] Preferably, I ramp_1 and I ramp_2 The respective function expressions are:

[0050]

[0051] Wherein, t is time, T is clock cycle, and ΔI is the normalized current increase or decrease per unit time.

[0052] Compared with the prior art, the image sensor ramp signal generation circuit and formation method provided by the technical solution of the present invention have the following beneficial effects:

[0053] The design of the nonlinear ramp signal generating circuit provided by the technical solution of the present invention can provide a nonlinear ramp signal, which can greatly shorten the time required for the ramp signal to cover the entire amplitude range; and when the consumed time is the same, compared with the linear ramp signal, the nonlinear ramp signal can meet higher accuracy requirements.

[0054] The slope of the ramp signal Vramp generated by the nonlinear ramp signal generating circuit provided by the technical solution of the present invention can be adjusted by adjusting the ramp signal coefficients P[1], P[2], ..., P[n] corresponding to different ramp signal currents. In scenarios where the requirements for accuracy and speed are relatively low, the ramp signal coefficients P[1], P[2], ..., P[n] can be adjusted to make the curvature change of the ramp signal Vramp not obvious, thereby forming a ramp signal close to the linear situation or directly a linear ramp signal; in scenarios where the requirements for accuracy and speed are relatively high, P[1], P[2], ..., P[n] can be adjusted to make the ramp signal Vramp a nonlinear ramp signal, thereby making the curvature change of the ramp signal Vramp more obvious. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 is a schematic diagram of a ramp signal generating circuit in the prior art;

[0056] Figures 2 to 5 is a schematic diagram of a ramp signal generating circuit in an embodiment of the present invention;

[0057] Figure 6 to Figure 7 is a waveform diagram of a ramp signal in an embodiment of the present invention;

[0058] Figure 8 Schematic diagram of the working principle of the basic module of the image sensor in an embodiment of the present invention. DETAILED DESCRIPTION

[0059] Many specific details are set forth in the following description to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present invention, so the present invention is not limited to the specific implementation disclosed below.

[0060] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the schematic diagrams are only examples and should not limit the scope of protection of the present invention.

[0061] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the image sensor ramp signal generating circuit of the present invention is described in detail below with reference to the accompanying drawings.

[0062] refer to Figure 2 As shown, an embodiment of the present invention provides a circuit for generating a ramp signal of an image sensor, comprising:

[0063] A coefficient control unit 100, a plurality of ramp signal current generating units 200 and a resistance load R;

[0064] The coefficient control unit 100 is adapted to provide a plurality of different ramp signal coefficients P[1], P[2], ..., P[n] according to application requirements;

[0065] The plurality of different ramp signal coefficients P[1], P[2], ..., P[n] are respectively transmitted to the plurality of ramp signal current generating units, so that the plurality of ramp signal current generating units provide ramp signal currents I with different weights. ramp_1 ,I ramp_2 ,……,I ramp_n flows through the resistive load R, thereby obtaining the required ramp signal V ramp .

[0066] in,

[0067] V ramp =(P[1]*I ramp_1 + P[2]*I ramp_2 + … + P[n]*I ramp_n ) * R

[0068] In a preferred implementation, the plurality of ramp signal current generating units include at least one nonlinear ramp signal current generating unit.

[0069] In a preferred implementation, when the voltage across the resistive load R increases by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the voltage across the resistive load R increases by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

[0070] In a preferred implementation, when the current flowing to the resistive load increases or decreases in magnitude by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the current flowing to the resistive load increases or decreases in magnitude by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

[0071] Combination Figure 2 ,refer to Figure 3 As shown, in a preferred embodiment, the ramp signal current generating unit 200 is a traditional CSDAC (current steering structure digital-to-analog converter).

[0072] The traditional CSDAC structure diagram is as follows Figure 3 As shown. CSDAC is usually composed of a group of current source arrays 20 and a corresponding switch array 30. The differential switch array 30 determines whether the current flows to the positive or negative output terminal according to the input digital code. A series of currents passing through the switch array 30 are summed up at the output terminal to finally obtain the required current, which generates the required voltage Vramp after flowing through the resistor R. The current source array 20 includes a plurality of current source units connected in parallel at one end, and the differential switch array 30 includes a differential switch group connected in series with each current source unit.

[0073] In a conventional CSDAC, the control end of the switch array 30 is a decoding and timing logic control circuit 10, which inputs a clock signal Dacclk and a digital code signal Din. <n:0>To generate a signal to control the switch. The higher the accuracy of the required ramp signal Vramp, the higher the input digital code signal Din <n:0>The more the required speed is, the faster the clock signal Dacclk and the digital code signal Din <n:0>The higher the frequency.

[0074] Combination Figure 2 ,refer to Figure 4 As shown, in another preferred embodiment, the ramp signal current generating unit 200 is in another form, which specifically includes:

[0075] At least one current source unit 201 and at least one state storage unit 401;

[0076] The current source units 201 are connected in parallel with each other;

[0077] The state storage unit 401 corresponds to the current source unit 201 one by one and is connected in cascade. The state storage unit 401 is suitable for controlling the step-by-step transmission of the switching signal of the current source unit under the drive of the differential clock signals dacclk and dacclkb, thereby realizing the accumulation or decrease of the output current to generate a ramp signal.

[0078] A differential switch group 301 controlled by the state storage unit 401 is disposed between the current source unit 201 and the state storage unit 401 , and the differential switch group 301 is respectively connected to the output of the state storage unit 401 and the inverted differential output thereof.

[0079] The adjacent state storage units 401 are respectively input with differential clock signals dacclk and dacclkb, or the same clock signal; when the state storage unit 401 is adapted to detect a change edge of the input differential clock signal, the input level is transmitted to the output end.

[0080] The state storage unit 401 is also adapted to be reset under the control of the state control signal, or to transmit the output result stage by stage according to the inversion of the clock signal dacclk under the control of the state control signal.

[0081] The level of the output terminal of the state storage unit 401 is used to control the differential switch group 301 to select to turn on or off the current source array in sequence, thereby generating a ramp signal Vramp1.

[0082] In this embodiment, all the cascaded state storage units 401 are divided into N groups, including 1 group of state storage units in an enabled state and N-1 groups of state storage units 401 in a dormant state.

[0083] In this embodiment, each group of the state storage units 401 includes M state storage units cascaded. When the state storage units 401 of the group numbered N to N+M-1 are working, the state storage units of other groups output fixed values ​​and there is no internal clock signal flipping; wherein M is greater than or equal to 2.

[0084] exist Figure 3 or Figure 4 In the illustrated embodiment, the weights of the current source units are the same as or different from each other.

[0085] When the weights of the current source units are the same, the generated ramp signal is a linear ramp signal; when the weights of the current source units are different, the generated ramp signal is a nonlinear ramp signal.

[0086] In summary Figure 3 and Figure 4 The implementation of the two ramp signal current generating units shown in the figure, in a preferred embodiment, the ramp signal current generating unit includes at least one current source unit, and the width-to-length ratio of the MOS transistor in the current source unit determines the magnitude of the current flowing to the resistive load.

[0087] Specifically, when the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is larger, the current flowing from the ramp signal current generating unit to the resistance load is larger;

[0088] When the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is smaller, the current flowing from the ramp signal current generating unit to the resistance load is smaller.

[0089] Combination Figure 2 ,refer to Figure 5 As shown, the coefficient control unit 100 controls the weight coefficients of different ramp signal current generating units by generating different bias voltages.

[0090] Specifically, in a preferred embodiment, the coefficient control unit 100 includes: current mirror transistors MN_1, MN_2, ..., MN_n (in other embodiments, not necessarily N transistors here) for mirroring input current, and bias voltage generating transistors MP_1, MP_2, ..., MP_n (in other embodiments, not necessarily N transistors here);

[0091] Among them, by setting the width-to-length ratio of the current mirror transistors MN_1, MN_2, ..., MN_n, the current flowing to the bias voltage generating tubes MP_1, MP_2, ..., MP_n is set to control the generated bias voltages Vbias_1, Vbias_2, ..., Vbias_n, which is equivalent to generating control coefficients P[1], P[2], ..., P[n] corresponding to different ramp current signal generating units, thereby controlling the current I generated by the ramp current generating signal ramp_1 ,I ramp_2 ,……,I ramp_n size;

[0092] Alternatively, the bias voltages Vbias_1, Vbias_2, ..., Vbias_n are set by setting the width-to-length ratio of the bias voltage generating transistors MP_1, MP_2, ..., MP_n, which is equivalent to generating control coefficients P[1], P[2], ..., P[n] corresponding to different ramp current signal generating units, thereby controlling the current I generated by the ramp signal current generating signal ramp_1 ,I ramp_2 ,……,I ramp_n size.

[0093] The nonlinear ramp signal generated by the ramp signal generating circuit of the image sensor can be divided into multiple stages, at least one of the stages is nonlinear, and the other stages can be linear stages or nonlinear stages.

[0094] The ramp signal V ramp The expression is:

[0095] Among them, P[1], P[2], ..., P[n] are the ramp signal coefficients, I ramp_1 ,I ramp_2 ,……,I ramp_n is the ramp signal current, and R is the resistance value of the resistive load.

[0096] The ramp signal current I ramp_1 ,I ramp_2 ,……,I ramp_n The same or different.

[0097] The ramp signal V ramp It is suitable for adjusting the slope by adjusting the ramp signal coefficients P[1], P[2], ..., P[n], wherein the ramp signal coefficients P[1], P[2], ..., P[n] are adjusted by adjusting the bias voltages Vbias_1, Vbias_2, ..., Vbias_n.

[0098] In scenarios where accuracy and speed requirements are relatively low, the ramp signal coefficients P[1], P[2], ..., P[n] are adjusted so that the ramp signal V ramp The curvature change is not obvious. In scenarios with high requirements for accuracy and speed, adjust P[1], P[2], ..., P[n] to make the curvature change of the ramp signal ramp more obvious.

[0099] The current flowing to the resistive load in at least one circuit unit cycle time increases or decreases in different magnitudes, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

[0100] In one implementation, the ramp signal is composed of two ramp signals:

[0101] Where V ramp is the final output nonlinear ramp signal, I ramp_1 and I ramp_2 Two ramp current signals are generated, in which one ramp current signal generating circuit has the same current increase or decrease in the current flowing to the resistive load per unit cycle time, and the other ramp current signal generating circuit is divided into three stages. In the first stage, the current increase or decrease in the current flowing to the resistive load per unit time is the same; in the second stage, the current increase or decrease in the current flowing to the resistive load per unit time is different; in the third stage, the current increase or decrease in the current flowing to the resistive load per unit time is the same, but different from the current increase or decrease in the current flowing to the resistive load per unit time in the first stage.

[0102] I ramp_1 and I ramp_2 The respective function expressions (but not limited to this function expression) are:

[0103]

[0104] Where t is time, T is the clock cycle, and ΔI is the normalized increase or decrease in current per unit time. ramp_1 and I ramp_2 The waveforms of ramp signal 1 and ramp signal 2 are as follows: Figure 6 shown.

[0105] The final output nonlinear ramp signal V ramp According to the ratio of weight coefficients P[1] and P[2], nonlinear ramp signals with different curvatures can be realized to adapt to different application scenarios. ramp Waveform Figure 7 As shown, there are multiple nonlinear ramp signals with different curvatures.

[0106] In scenarios where the requirements for accuracy and speed are relatively low, P[1] and P[2] can be adjusted to make the change in the curvature of the ramp signal ramp less obvious (close to the linear state or directly linear). In scenarios where the requirements for accuracy and speed are relatively high, P[1] and P[2] can be adjusted to make the change in the curvature of the ramp signal ramp more obvious.

[0107] In one embodiment, the ramp signal generating circuit and generating method are applied to Figure 8 The basic module of the image sensor shown in the figure is Figure 8 The basic module of the image sensor includes: a pixel array of multiple pixels, a row control circuit, an analog-to-digital converter, a ramp signal generating circuit and a digital processing circuit. The row control circuit provides a row control signal to control the pixel units of each row; the pixel units of each column are connected to the analog-to-digital converter of the corresponding column, and the ramp signal generating circuit provides the ramp signal of each column to the analog-to-digital converter of the corresponding column, and the output signal of the analog-to-digital converter is provided to the digital processing circuit.

[0108] The analog-to-digital converter is mainly composed of a comparator and a storage unit or a counting unit. In the analog-to-digital converter (ADC), a ramp (VRAMP) signal is used as the comparison level of the comparator. The accuracy of the ramp signal directly affects the output accuracy of the SS ADC. Therefore, the technical solution of the present invention can generate a high-speed and high-precision ramp signal and can be suitable for the application of high frame rate image sensors.

[0109] The design of the nonlinear ramp signal generating circuit provided by the technical solution of the present invention can provide a nonlinear ramp signal, which can greatly shorten the time required for the ramp signal to cover the entire amplitude range; and when the consumed time is the same, the nonlinear ramp signal can meet higher accuracy requirements.

[0110] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A circuit for generating a ramp signal of an image sensor, characterized in that: include: A coefficient control unit, a plurality of ramp signal current generating units and a resistive load; The coefficient control unit is adapted to provide a plurality of different ramp signal coefficients according to application requirements; The multiple different ramp signal coefficients are respectively transmitted to the multiple ramp signal current generating units, so that the multiple ramp signal current generating units provide ramp signal currents with different weights to flow through the resistance load, thereby obtaining the required ramp signal.

2. The image sensor ramp signal generating circuit according to claim 1, characterized in that: The plurality of ramp signal current generating units include at least one non-linear ramp signal current generating unit.

3. The image sensor ramp signal generating circuit according to claim 2, characterized in that: When the voltage across the resistive load increases by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the voltage across the resistive load increases by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

4. The image sensor ramp signal generating circuit according to claim 2, characterized in that: When the current flowing to the resistive load increases or decreases in magnitude by the same amount within a unit cycle time, the generated ramp signal is a linear ramp signal; when the current flowing to the resistive load increases or decreases in magnitude by different amounts within a unit cycle time, the generated ramp signal is a nonlinear ramp signal.

5. The image sensor ramp signal generating circuit according to claim 1, characterized in that: The ramp signal current generating unit is a current steering structure digital-to-analog converter.

6. The image sensor ramp signal generating circuit according to claim 1, characterized in that: The ramp signal current generating unit comprises: at least one current source unit and at least one state storage unit; The current source units are connected in parallel with each other; The state storage unit corresponds to the current source unit one by one and is connected in cascade. The state storage unit is suitable for controlling the step-by-step transmission of the switch signal of the current source under the drive of the differential clock signal, thereby realizing the accumulation or decrease of the output current to generate a ramp signal.

7. The image sensor ramp signal generating circuit according to claim 1, characterized in that: The ramp signal current generating unit includes at least one current source unit. The width-to-length ratio of the MOS transistor in the current source unit determines the magnitude of the current flowing to the resistance load.

8. The image sensor ramp signal generating circuit according to claim 7, characterized in that: When the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is larger, the current flowing from the ramp signal current generating unit to the resistance load is larger; When the width-to-length ratio of the MOS transistor corresponding to the current source unit in the ramp signal current generating unit is smaller, the current flowing from the ramp signal current generating unit to the resistance load is smaller.

9. The image sensor ramp signal generating circuit according to claim 6, characterized in that: A differential switch group controlled by the state storage unit is arranged between the current source unit and the state storage unit, and the differential switch group is respectively connected to the output of the state storage unit and the inverted differential output thereof.

10. The image sensor ramp signal generating circuit according to claim 9, characterized in that: The adjacent state storage units are respectively input with differential clock signals or the same clock signal; when the state storage unit is adapted to detect a change edge of the input differential clock signal, the input level is transmitted to the output end.

11. The image sensor ramp signal generating circuit according to claim 9, characterized in that: The state storage unit is also suitable for being reset under the control of the state control signal, or for transmitting the output result step by step according to the inversion of the clock signal under the control of the state control signal.

12. The image sensor ramp signal generating circuit according to claim 9, characterized in that: The level of the output terminal of the state storage unit is used to control the differential switch group to select to turn on or off the current source array in sequence, thereby generating a ramp signal.

13. The image sensor ramp signal generating circuit according to claim 6, characterized in that: All the cascaded state storage units are divided into N groups, including 1 group of state storage units in an enabled state and N-1 groups of state storage units in a dormant state.

14. The image sensor ramp signal generating circuit according to claim 13, characterized in that: Each group of state storage units includes M state storage units in cascade. When the state storage units in the group numbered N to N+M-1 are working, the state storage units in other groups output fixed values ​​without internal clock signals flipping; wherein M is greater than or equal to 2.

15. The image sensor ramp signal generating circuit according to claim 6, characterized in that: The weights of the current source units are the same as or different from each other.

16. The image sensor ramp signal generating circuit according to claim 6, characterized in that: When the weight of each current source unit in the current source array is the same, the generated ramp signal is a linear ramp signal; when the weight of each current source unit in the current source array is different, the generated ramp signal is a nonlinear ramp signal.

17. The image sensor ramp signal generating circuit according to claim 1, characterized in that: The coefficient control unit controls the weight coefficients of different ramp signal current generating units by generating different bias voltages.

18. The image sensor ramp signal generating circuit according to claim 1 or 17, characterized in that: The coefficient control unit includes: current mirror transistors MN_1, MN_2, ..., MN_n for mirroring input current, and bias voltage generating transistors MP_1, MP_2, ..., MP_n; The current flowing to the bias voltage generating tubes MP_1, MP_2, ..., MP_n is set by setting the width-to-length ratio of the current mirror transistors MN_1, MN_2, ..., MN_n to control the generated bias voltages Vbias_1, Vbias_2, ..., Vbias_n, thereby controlling the current generated by the ramp signal current generating unit; Alternatively, the bias voltages Vbias_1 , Vbias_2 , . . . , Vbias_n are set by setting the width-to-length ratios of the bias voltage generating transistors MP_1 , MP_2 , . . . , MP_n, thereby controlling the current generated by the ramp signal current generating unit.

19. The image sensor ramp signal generating circuit according to claim 18, characterized in that: The output current of the ramp signal current generating unit flows to the resistive load through the output node, the other end of the resistive load is connected to a fixed voltage or grounded, and a ramp signal is output between the output node and the resistive load.

20. The image sensor ramp signal generating circuit according to claim 18, characterized in that: The current flowing to the resistive load in at least one circuit unit cycle time increases or decreases in different magnitudes, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

21. A method for forming a ramp signal of an image sensor, characterized in that: Providing the image sensor ramp signal generating circuit as claimed in claim 1; The ramp signal V ramp The expression is: Among them, P[1], P[2], ..., P[n] are the ramp signal coefficients, I ramp_1 ,I ramp_2 ,......,I ramp_n is the ramp signal current, and R is the resistance value of the resistive load.

22. The method for forming a ramp signal of an image sensor according to claim 21, characterized in that: The ramp signal current I ramp_1 ,I ramp_2 ,......,I ramp_n The same or different.

23. The method for forming a ramp signal of an image sensor according to claim 21, characterized in that: The ramp signal V ramp It is suitable to adjust the slope by adjusting the ramp signal coefficients P[1], P[2], ..., P[n].

24. The method for forming a ramp signal of an image sensor according to claim 21, characterized in that: In the scenario where the accuracy and speed requirements are relatively low, the ramp signal coefficients P[1], P[2], ..., P[n] are adjusted so that the ramp signal V ramp The curvature change is not obvious. In scenarios with high requirements for accuracy and speed, adjust P[1], P[2], ..., P[n] to make the curvature change of the ramp signal ramp more obvious.

25. The method for forming a ramp signal of an image sensor according to claim 21, characterized in that: The current flowing to the resistive load in at least one circuit unit cycle time increases or decreases in different magnitudes, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

26. A method for forming a ramp signal of an image sensor, characterized in that: The image sensor ramp signal generating circuit as claimed in claim 1 is provided, wherein the nonlinear ramp signal is composed of two ramp signals: V ramp =(P[1]*I ramp_1 +P[2]*I ramp_2 )*R Among them, P[1] and P[2] are the ramp signal coefficients, I ramp_1 and I ramp_2 is the ramp signal current.

27. The method for forming a ramp signal of an image sensor according to claim 26, characterized in that: I ramp_1 is a linear ramp signal, I ramp_2 is a nonlinear ramp signal.

28. The method for forming a ramp signal of an image sensor according to claim 26, characterized in that: In at least one circuit, the amount of increase or decrease of the current flowing to the resistive load in a unit cycle time is different, so as to ensure that the generated ramp signal is a nonlinear ramp signal.

29. The method for forming a ramp signal of an image sensor according to claim 26, wherein: One of the ramp signal currents flows to the resistive load with the same increment per unit cycle time, and the other ramp signal current is divided into three stages, in the first stage, the current flows to the resistive load with the same increment per unit time; in the second stage, the current flows to the resistive load with different increments per unit time; The increment of the flow to the resistive load per unit time in the third stage is the same and different from the increment of the flow to the resistive load per unit cycle time in the first stage.

30. The method for forming a ramp signal of an image sensor according to claim 26, wherein: The at least one ramp signal current generating unit has the same current magnitude as that of the current flowing to the resistance load within a unit cycle time.

31. The method for forming a ramp signal of an image sensor according to claim 26, wherein: I ramp_1 and I ramp_2 The respective function expressions are: Wherein, t is time, T is clock cycle, and ΔI is the normalized current increase or decrease per unit time.

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