Electrical assembly comprising a heat dissipation layer

Abstract

According to one embodiment of the present application, an electronic assembly is provided, comprising: a circuit board comprising a plurality of connection portions having electrical conductivity; a plurality of spaced apart semiconductor integrated circuits mounted on the circuit board and electrically connected to the plurality of connection portions; a protective layer disposed on the plurality of semiconductor integrated circuits, substantially surrounding the semiconductor integrated circuits, and having a planar upper surface; and a heat spreading copper layer disposed on the protective layer, having an average thickness greater than or equal to about 3 microns, and an average grain size greater than about 0.15 microns, wherein the heat spreading copper layer can occupy substantially the same space (coextensive) in length and width as the circuit board, and the average thickness of the protective layer can be equal to or greater than the height of the plurality of spaced apart semiconductor integrated circuits.

Description

Background Technology

[0001] This invention relates to an electronic component including a heat dissipation layer.

[0002] In semiconductor device assemblies, integrated circuit dies (or alternatively, semiconductor chips, dies) may be mounted on a packaging substrate. Thermal management devices used to protect the semiconductor device assembly from the heat flowing through the integrated circuit die may include heat sinks, heat spreaders, etc.

[0003] However, in related technologies, sputtering or electroplating techniques have been used in heat dissipation layers to diffuse and dissipate the emitted heat. The problem with these techniques is that the metal layer delamination occurs due to the low contact force with the epoxy resin mold surface. The process cost for producing heat dissipation layers with large thicknesses (e.g., 5 micrometers or more) is expensive and the manufacturing time is long. Summary of the Invention

[0004] The embodiments of the present invention were invented in the context described above, and provide an electronic component including a heat dissipation layer that has superior heat dissipation performance compared to related technologies.

[0005] However, the objectives to be achieved in this invention are not limited to those described above, and other objectives not described above will be clearly understood by those skilled in the art based on the following description of the invention.

[0006] According to one embodiment of the present invention, an electronic component is provided, comprising: a circuit board including a plurality of conductive connection portions; a plurality of spaced-apart semiconductor integrated circuits mounted on the circuit board and electrically connected to the plurality of connection portions; a protective layer disposed on the plurality of semiconductor integrated circuits, substantially surrounding the semiconductor integrated circuits, and having a flat upper surface; and a heat-dissipating copper layer disposed on the protective layer, having an average thickness greater than or equal to about 3 micrometers and an average grain size greater than about 0.15 micrometers, wherein the heat-dissipating copper layer may occupy substantially the same space as the circuit board in length and width (extension together), and the average thickness of the protective layer may be equal to or greater than the height of the plurality of spaced-apart semiconductor integrated circuits.

[0007] According to another embodiment of the present invention, an electronic component is provided comprising: a circuit board including a plurality of conductive connection portions; a plurality of spaced-apart semiconductor integrated circuits mounted on the circuit board and electrically connected to the plurality of connection portions; a protective layer disposed on the semiconductor integrated circuits, substantially surrounding the semiconductor integrated circuits, and having a flat upper surface; and a heat-dissipating copper layer disposed on the protective layer and having an average thickness equal to or greater than about 3 micrometers, wherein the average thickness of the protective layer may be equal to or greater than the height of the plurality of spaced-apart semiconductor integrated circuits, the heat-dissipating copper layer may occupy substantially the same space as the circuit board in length and width, and the heat-dissipating copper layer may have a face-centered cubic structure with a lattice parameter of less than about 3.615 angstroms.

[0008] According to embodiments of the present invention, the cost of producing the adhesive layer can be reduced by using an epoxy resin adhesive layer to adhere the heat dissipation layer, and heat dissipation can be increased by attaching a heat dissipation layer with a larger thickness to the electronic components. Attached Figure Description

[0009] Figure 1 A schematic cross-sectional view of an electronic component according to one embodiment of the present invention is shown.

[0010] Figure 2 This is a schematic cross-sectional view of an electronic component according to another embodiment of the present invention.

[0011] Figure 3 This is a schematic cross-sectional view of an electronic component according to yet another embodiment of the present invention.

[0012] Figure 4 The average grain size of the heat dissipation layer in the related art is illustrated.

[0013] Figure 5 An example is given of the average grain size of a heat dissipation layer using an electrodeposition (ED) method according to an embodiment of the present invention.

[0014] Figure 6 An example is given of the average grain size of a heat dissipation layer using a rolling annealing (RA) method according to another embodiment of the invention.

[0015] Figure 7 illustrates the difference between the growth direction of a heat dissipation layer using sputtering in the related art and the growth direction of a heat dissipation layer according to an embodiment of the present invention.

[0016] Figure 8 Examples are given of the temperature at which heat is dissipated through a heat dissipation layer using a sputtering method according to related technologies, and the temperature at which heat is dissipated through a heat dissipation layer according to an embodiment of the present invention. Detailed Implementation

[0017] The advantages and features of the present invention, as well as the methods for implementing them, will become clearer from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, the invention is not limited to the embodiments set forth below and may be embodied in various different forms. These embodiments are provided merely to complete the disclosure of the invention and are intended to provide those skilled in the art with a full understanding of the scope of the invention, which will be limited only by the scope of the appended claims.

[0018] In describing embodiments of the present invention, detailed descriptions of known functions or structures will be omitted when it is determined that a detailed description thereto may unnecessarily obscure the gist of the invention. Furthermore, the terms to be described below, defined in consideration of the functions in embodiments of the present invention, may vary according to the intent of the user or operator or common practice. Therefore, these terms need to be defined based on the content throughout the specification.

[0019] Figure 1 A schematic cross-sectional view of an electronic component according to one embodiment of the present invention is shown.

[0020] refer to Figure 1 Electronic component 200 may include circuit board 10, connection portion 20, electronic device 30, protective layer 40, heat dissipation layer 50, and adhesive layer 60. According to this embodiment, electronic component 200 may include various components not selectively mentioned. That is, Figure 1 The cross-sectional view of electronic component 200 shown is illustrative only.

[0021] Circuit board 10 is a component configured to allow the mounting of various types of parts, and according to one embodiment, it can be considered as substrate 10. Circuit board 10 may include printed circuit board (PCB), etc.

[0022] The connection portion 20 is a conductive component. At least one connection portion 20 may be included or disposed inside the circuit board 10 or on the surface of the circuit board 10. Components disposed (mounted) on the circuit board 10 may exchange signals with each other through the connection portions 20 included or disposed in the circuit board 10.

[0023] When two or more connection portions 20 are included or disposed inside or on the surface of the circuit board 10, the connection portions 20 may be electrically isolated from or connected to each other.

[0024] Electronic device 30 is a component designed to perform various functions. Electronic device 30 may include a semiconductor integrated circuit (semiconductor IC) or a CMOS image sensor.

[0025] Electronic device 30 is electrically connected to connection portion 20 (21) and may be disposed (mounted) on circuit board 10 (upper surface of circuit board 10). When multiple electronic devices 30 are disposed on circuit board 10, each of the multiple electronic devices 30 may be disposed spatially spaced apart from each other.

[0026] When multiple electronic devices 30 are disposed on a circuit board 10 and two or more connection portions 20 are included or disposed inside or on the surface of the circuit board 10, each of the multiple electronic devices 30 may be electrically connected to different connection portions 20, and one or more of the multiple electronic devices 30 may be electrically connected to two or more connection portions 20.

[0027] According to this embodiment, the multiple electronic devices 30 disposed on the circuit board 10 may have different types, sizes and / or functions from each other.

[0028] A protective layer 40 may be disposed on the electronic device 30 to substantially encapsulate (i.e. cover) the electronic device 30, thereby protecting the electronic device 30 from external influences. Here, the fact that the protective layer 40 is "disposed to encapsulate" the electronic device 30 may mean that the protective layer 40 is disposed to surround part or all of the remaining surface of the electronic device 30 except for the surface that contacts the circuit board 10 (e.g., the lower surface 31 of the electronic device 30).

[0029] The upper surface of the protective layer 40 can be substantially flat. When multiple electronic devices 30 are mounted on the circuit board 10, the height of each electronic device 30 may differ from that of the others, depending on the type of electronic device 30. In this case, since the protective layer 40 is configured to substantially encapsulate the multiple electronic devices 30, the adhesive layer 60 has a flat surface (i.e., the upper surface of the flat protective layer 40) regardless of the height of the multiple electronic devices 30.

[0030] The protective layer 40 may include epoxy molding compound (EMC).

[0031] Adhesive layer 60 may be attached to the upper surface of protective layer 40. Adhesive layer 60 may be attached between the upper surface of protective layer 40 and the lower surface of heat dissipation layer 50 to adhere heat dissipation layer 50 and protective layer 40. To adhere heat dissipation layer 50 and protective layer 40 using adhesive layer 60, lamination and then curing of adhesive layer 60 may be performed.

[0032] The adhesive layer 60 may be an epoxy resin adhesive. The average thickness of the adhesive layer 60 may be about 15 micrometers. When the adhesive layer 60 includes an epoxy resin adhesive, the metal layer may be more firmly attached than a directly sputtered metal layer, and a heat dissipation layer 50 with a larger average thickness may adhere to the adhesive layer 60.

[0033] The heat dissipation layer 50 may be attached to the upper surface of the adhesive layer 60. The heat dissipation layer 50 may include copper foil.

[0034] According to one embodiment, the average thickness t1 of the heat dissipation layer 50 can be about 3 micrometers or more. More specifically, the average thickness t1 of the heat dissipation layer 50 can be about 6 micrometers or more and about 18 micrometers or less. More specifically, according to one embodiment, the average thickness t1 of the heat dissipation layer 50 can be 3 micrometers, 6 micrometers, 12 micrometers or 18 micrometers, and according to another embodiment, the average thickness t1 of the heat dissipation layer 50 can be 25 micrometers or 35 micrometers.

[0035] The heat dissipation layer 50 may have a face-centered cubic structure with a lattice parameter of less than about 3.615 angstroms or less than about 3.614 angstroms.

[0036] The average grain size of the heat dissipation layer 50 may be greater than about 0.1 micrometers. More specifically, the average grain size of the heat dissipation layer 50 may be greater than about 0.5 micrometers, or greater than about 1 micrometer. Alternatively, the average grain size of the heat dissipation layer 50 may be between about 0.1 micrometers and about 10 micrometers, between about 0.25 micrometers and about 10 micrometers, between about 1 micrometer and about 10 micrometers, or between about 0.15 micrometers and about 0.5 micrometers.

[0037] When viewed from the upper surface of the heat dissipation layer 50, the heat dissipation layer 50 occupies the same space as the circuit board 10 in length L and width W (extending together).

[0038] According to one embodiment, a black epoxy resin layer (not shown) may be additionally disposed on the heat dissipation layer 50. Because the black epoxy resin layer 70 is disposed on the heat dissipation layer 50, it facilitates laser marking of the electronic component 200.

[0039] Figure 2 This is a schematic cross-sectional view of an electronic component according to another embodiment of the present invention.

[0040] refer to Figure 2 The electronic component 200 includes a circuit board 10, a connection portion 20, an electronic device 30, a protective layer 40, a heat dissipation layer 50, and an adhesive layer 60.

[0041] Figure 2 The illustrated circuit board 10, connection portion 20, and heat dissipation layer 50 can perform operations with... Figure 1The illustrated circuit board 10, connection portion 20, and heat dissipation layer 50 have essentially the same function. Therefore, Figure 2 The descriptions of the illustrated circuit board 10, connection portion 20, and heat dissipation layer 50 will be applicable accordingly. Figure 1 Description of the illustrated circuit board 10, connection portion 20 and heat dissipation layer 50.

[0042] In addition, Figure 1 In the description of the illustrated electronic device 30, protective layer 40, and adhesive layer 60, the reference is... Figure 2 The content described without contradiction will apply accordingly. Figure 3 Description of the illustrated electronic device 30, protective layer 40' and adhesive layer 60.

[0043] A protective layer 40' may be disposed on the electronic device 30 to encapsulate (i.e. cover) at least some of the multiple electronic devices 30. In other words, the protective layer 40' may be disposed on the electronic device 30 to encapsulate the electronic device 30 other than some of the multiple electronic devices 30.

[0044] Here, the fact that the protective layer 40' is configured to encapsulate at least some of the electronic devices in the electronic device can mean that the protective layer 40' is configured to not surround at least a portion 32 of the remaining surface of one or more of the plurality of electronic devices 30a, excluding the surface that contacts the circuit board 10. (See from...) Figure 2 As can be seen, since the average thickness of the protective layer 40' and the height of the electronic device 30a with the highest height among the multiple electronic devices 30 are substantially the same, the protective layer 40' does not need to be configured to surround the upper surface 32 of the electronic device 30a. However, even in this case, the height of the electronic device 30a with the highest height among the multiple electronic devices 30 may not be greater than the average thickness of the protective layer 40'.

[0045] The adhesive layer 60 may be attached to the upper surface of the protective layer 40'. However, since the average thickness of the protective layer 40' and the height of the electronic device 30a with the highest height among the plurality of electronic devices 30 are substantially the same, the adhesive layer 60 may be attached to the upper surface of the protective layer 40' and the upper surface 32 of the electronic device 30a when the protective layer 40' is not configured to surround the upper surface 32 of the electronic device 30a.

[0046] According to one embodiment, a black epoxy resin layer (not shown) may be additionally disposed on the heat dissipation layer 50. Because the black epoxy resin layer 70 is disposed on the heat dissipation layer 50, it facilitates laser marking of the electronic component 200.

[0047] Figure 3 This is a schematic cross-sectional view of an electronic component according to yet another embodiment of the present invention.

[0048] refer to Figure 3 The electronic component 200 may include a circuit board 10, a connection portion 20, an electronic device 30, a protective layer 40, and a heat dissipation layer 50'.

[0049] Figure 3 The illustrated circuit board 10, connection portion 20, and electronic device 30 can perform operations with... Figure 1 The illustrated circuit board 10, connecting portion 20, and electronic device 30 have essentially the same function. Therefore, for Figure 3 The description of the illustrated circuit board 10, connection portion 20, and electronic device 30 will be correspondingly applicable to the following: Figure 1 Description of the illustrated circuit board 10, connection portion 20 and electronic device 30.

[0050] In addition, Figure 1 In the description of the illustrated protective layer 40 and heat dissipation layer 50, the reference is... Figure 3 The content described without contradiction will apply accordingly. Figure 3 Description of the illustrated protective layer 40 and heat dissipation layer 50'.

[0051] Figure 3 The electronic component 200 may not include the adhesive layer 60. Therefore, the heat dissipation layer 50' can be directly disposed on the protective layer 40.

[0052] According to an implementation plan, such as Figure 2 As shown, since the average thickness of the protective layer 40' and the height of the electronic device 30a with the highest height among the multiple electronic devices 30 are basically the same, when the protective layer 40' is not arranged to surround the upper surface 32 of the electronic device 30a, the heat dissipation layer 50' can be directly arranged on the upper surface of the protective layer 40' and the upper surface 32 of the electronic device 30a.

[0053] Figure 4 The average grain size of the heat dissipation layer in the related technology is illustrated. Figure 5 An example is illustrated of the average grain size of a heat dissipation layer using an electrodeposition (ED) method according to an embodiment of the present invention, and Figure 6 An example is given of the average grain size of a heat dissipation layer using a rolling annealing (RA) method according to another embodiment of the invention.

[0054] refer to Figure 4 and Figure 5 The average grain size of the heat dissipation layer can correspond to a value obtained by dividing the length of the dashed line by the number of grains included on the dashed line. That is, the average grain size can be calculated by indicating the dashed line on at least a portion of the cross-section of the heat dissipation layer and counting the number of grains included on the indicated dashed line.

[0055] refer to Figure 4 In order to calculate the average grain size of the heat dissipation layer using the sputtering method in the related art, three dashed lines with a length of 4 micrometers can be indicated in the cross-section of the heat dissipation layer using the sputtering method in the related art.

[0056] Since the number of grains included in the three dashed lines in the cross-section of the heat dissipation layer using sputtering in the related technology is 43, 49 and 42 respectively, the average grain size of the heat dissipation layer using sputtering in the related technology can be calculated to be about 0.09 micrometers (= 4 micrometers / about 44.67 grains).

[0057] On the other hand, reference Figure 5 In order to calculate the average grain size of the heat dissipation layers (50 and 50', typically 50) using the ED method according to one embodiment of the present invention, the ED method can be used to indicate three dashed lines with a length of 6 micrometers in the cross section of the heat dissipation layer 50.

[0058] Since the number of grains included in the three dashed lines indicated in the cross-section of the heat dissipation layer 50 using the ED method are 23, 25 and 21 respectively, the average grain size of the heat dissipation layer 50 using the ED method according to an embodiment of the present invention can be calculated to be about 0.26 micrometers (=6 micrometers / about 23 grains).

[0059] Further, refer to Figure 6 In order to calculate the average grain size of the heat dissipation layers (50 and 50', typically 50) using the RA method according to another embodiment of the invention, the RA method can be used to indicate two dashed lines with a length of 10 micrometers in the cross section of the heat dissipation layer 50.

[0060] However, as Figure 6 As shown, since the grain size of the heat dissipation layer 50 using the RA method is much larger than the grain size of the heat dissipation layer using the sputtering method and the heat dissipation layer using the ED method, it is evident that the RA method is insufficient to accurately calculate the average grain size of the heat dissipation layer 50. However, in Figure 6 In this case, the average grain size of the heat dissipation layer 50 using the RA method can be calculated to be approximately 2 to 5 micrometers (= 10 micrometers / 2 grains to 5 grains).

[0061] In other words, reference Figures 4 to 6 It is evident that the average grain size of the heat dissipation layer using the ED method and the heat dissipation layer using the RA method according to an embodiment of the present invention is much larger than the average grain size of the heat dissipation layer using the sputtering method in the related art. Therefore, the heat dissipation layer according to an embodiment of the present invention and the heat dissipation layer according to the related art can be distinguished by comparing the average grain size of the heat dissipation layers.

[0062] Figure 7 illustrates the difference between the growth direction of a heat dissipation layer using sputtering in the related art and the growth direction of a heat dissipation layer according to an embodiment of the present invention.

[0063] Refer to Figure 7. Figure 7A An example is shown of a cross-section of a heat dissipation layer using sputtering in related technologies, and Figure 7B A cross-section of a heat dissipation layer using an electrodeposition method according to an embodiment of the present invention is illustrated.

[0064] Referring to Figure 7, it can be seen that the heat dissipation layer using the sputtering method in the related art is formed from the bottom side to the top side, and the heat dissipation layer using the ED method according to an embodiment of the present invention is formed from the top side to the bottom side.

[0065] Here, "bottom side" and "top side" can be exemplified based on the direction in which the heat dissipation layer 50 is attached to the protective layer 40 or the adhesive layer 60. That is, the "bottom side" of the heat dissipation layer refers to the lower surface of the heat dissipation layer 50, that is, the surface on which the heat dissipation layer 50 is attached to the protective layer 40 or the adhesive layer 60. The "top side" of the heat dissipation layer refers to the upper surface of the heat dissipation layer 50, that is, the surface on which the electronic component 200 or the top surface of the heat dissipation layer 50 is attached to the black epoxy resin layer (not shown).

[0066] As shown in Figure 7, the growth direction of the heat dissipation layer using the sputtering method in the related art and the growth direction of the heat dissipation layer using the ED method according to an embodiment of the present invention are different from each other. Therefore, the heat dissipation layer according to an embodiment of the present invention and the heat dissipation layer according to the related art can be distinguished by comparing the growth directions of the heat dissipation layers.

[0067] Figure 8 Examples are given of the temperature at which heat is dissipated through a heat dissipation layer using a sputtering method according to related technologies, and the temperature at which heat is dissipated through a heat dissipation layer according to an embodiment of the present invention.

[0068] refer to Figure 8 , Figure 8 The graph shows the hourly temperature measured at a distance of 3 cm from the heat source (heat dissipation layer).

[0069] exist Figure 8 In this context, a reference example may represent a heat source excluding a heat dissipation layer, sputtering may represent a heat dissipation layer using sputtering in the related art, 6µm may represent a heat dissipation layer comprising a copper foil having an average thickness of 6µm according to one embodiment of the present invention, and 18µm may represent a heat dissipation layer comprising a copper foil having an average thickness of 18µm according to another embodiment of the present invention.

[0070] In addition, Figure 8In this context, "initial" can represent the initial state where external factors are not fixed, "85 / 85" can represent the state where the temperature is fixed at 85° and the humidity is fixed at 85%, and "TS" can represent the state after a thermal shock test from -40° to 85°.

[0071] refer to Figure 8 It can be seen that, compared with the heat dissipation layer using sputtering in related technologies, the heat dissipation layer including copper foil with an average thickness of 6µm has a generally high level of heat dissipation performance, and compared with the heat dissipation layer including copper foil with an average thickness of 6µm, the heat dissipation layer including copper foil with an average thickness of 18µm has a generally high level of heat dissipation performance.

[0072] Therefore, it can be confirmed that, compared with heat dissipation layers using sputtering in related technologies, the heat dissipation layer according to an embodiment of the present invention has superior heat dissipation performance, and the heat dissipation layer according to an embodiment of the present invention has superior heat dissipation performance as the average thickness of the copper foil increases.

[0073] The embodiments of the present invention are listed below.

[0074] Project 1 is an electronic component in which at least some of the plurality of connecting parts are electrically isolated from each other.

[0075] Project 2 is an electronic component in which each semiconductor integrated circuit in the semiconductor integrated circuit is electrically connected to different connection parts of each other.

[0076] Project 3 is an electronic component in which at least two or more of the plurality of connection portions are electrically connected to the same semiconductor integrated circuit.

[0077] Item 4 is an electronic component, in which the protective layer includes epoxy molding compound (EMC).

[0078] Project 5 is an electronic component in which the protective layer substantially surrounds each of the plurality of spaced-apart semiconductor integrated circuits.

[0079] Project 6 is an electronic component, in which the protective layer essentially encapsulates each semiconductor integrated circuit.

[0080] Item 7 is an electronic component in which the protective layer substantially encapsulates each semiconductor integrated circuit except for the lower surface of at least one semiconductor integrated circuit facing the circuit board.

[0081] Item 8 is an electronic component, wherein the upper surface of the protective layer is flush with the upper surface of at least one of the plurality of semiconductor integrated circuits, and the protective layer encapsulates the remaining semiconductor integrated circuits other than the at least one of the plurality of semiconductor integrated circuits.

[0082] Project 9 is an electronic component in which the average thickness of the heat-dissipating copper layer is greater than approximately 10 micrometers.

[0083] Item 10 is an electronic component in which the heat-dissipating copper layer is directly disposed on and attached to the protective layer.

[0084] Item 11 is an electronic component, further comprising an adhesive layer disposed between the heat-dissipating copper layer and the protective layer.

[0085] Project 12 is an electronic component in which the heat-dissipating copper layer has a face-centered cubic structure with a lattice parameter of less than about 3.615 angstroms or less than about 3.614 angstroms.

[0086] Project 13 is an electronic component in which the average grain size of the heat-dissipating copper layer is greater than about 0.5 micrometers.

[0087] Project 14 is an electronic component in which the average grain size of the heat-dissipating copper layer is greater than about 1 micrometer.

[0088] Item 15 is an electronic component in which the average grain size of the heat-dissipating copper layer is between about 0.25 micrometers and about 10 micrometers.

[0089] Item 16 is an electronic component in which the average grain size of the heat-dissipating copper layer is between about 1 micrometer and about 10 micrometers.

[0090] Item 17 is an electronic component in which the average grain size of the heat-dissipating copper layer is between about 0.15 micrometers and about 0.5 micrometers.

[0091] The combination of each block of the block diagram and each step of the flowchart accompanying the present invention can also be executed by computer program instructions. Since these computer program instructions can be mounted on a coding processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus, the instructions executed by the coding processor of the computer or other programmable data processing apparatus generate means for performing the functions described in each block of the block diagram or each step of the flowchart. Since these computer program instructions can also be stored in a computer-usable or computer-readable storage medium capable of directing the computer or other programmable data processing apparatus to implement functions by specific methods, the instructions stored in the computer-usable or computer-readable storage medium can produce a manufacturing project containing instruction means for performing the functions described in each block of the block diagram or each step of the flowchart. Since the computer program instructions can also be mounted on a computer or other programmable data processing apparatus, a series of operational steps are performed on the computer or other programmable data processing apparatus to generate a process executed by the computer, such that the instructions executing the computer or other programmable data processing apparatus provide steps for performing the functions described in each block of the block diagram and each step of the flowchart.

[0092] Additionally, each box or step may represent a module, segment, or portion of code comprising one or more executable instructions for performing a specific logical function. Alternatively, it should also be noted that in some alternative implementations, the functions mentioned in a box or step may not be generated in sequence. For example, two consecutively illustrated boxes or steps may actually be executed substantially simultaneously, or these boxes or steps may sometimes be executed in reverse order according to their corresponding functions.

[0093] The foregoing description merely illustrates the technical spirit of the invention, and those skilled in the art can make various changes and modifications without departing from the essence of the invention. Therefore, the embodiments disclosed herein are not intended to limit the technical spirit of the invention, but rather to describe it, and the scope of the technical spirit of the invention is not limited by these embodiments. The scope of protection of this invention should be interpreted based on the appended claims, and all technical spirit within its equivalent scope should be interpreted as falling within the scope of this invention.

[0094] Explanation of icon numbers

[0095] 200: Electronic Components

[0096] 10: Circuit board

[0097] 20: Connection part

[0098] 30: Electronic devices

[0099] 40: Protective layer

[0100] 50: Heat dissipation layer

[0101] 60: Adhesive layer

Claims

1. An electronic component, the electronic component comprising: A circuit board, the circuit board including a plurality of conductive connection portions; A plurality of spaced-apart semiconductor integrated circuits are mounted on the circuit board and electrically connected to the plurality of connection portions; A protective layer is disposed on the plurality of spaced-apart semiconductor integrated circuits, substantially surrounding the semiconductor integrated circuits, and having a flat upper surface; as well as A heat-dissipating copper layer is disposed on the protective layer, having an average thickness of 3 micrometers or more and an average grain size of 0.15 micrometers or more. The heat-dissipating copper layer occupies a space that is substantially the same in length and width as the circuit board. The average thickness of the protective layer is equal to or greater than the height of the plurality of spaced-apart semiconductor integrated circuits, and The protective layer substantially encapsulates each semiconductor integrated circuit, except for the lower surface of at least one semiconductor integrated circuit facing the circuit board.

2. The electronic component of claim 1, wherein at least some of the plurality of connection portions are electrically isolated from each other.

3. The electronic component of claim 1, wherein the protective layer substantially surrounds each of the plurality of spaced-apart semiconductor integrated circuits.

4. The electronic component of claim 1, wherein the upper surface of the protective layer is flush with the upper surface of at least one of the plurality of spaced-apart semiconductor integrated circuits, and The protective layer encapsulates the remaining semiconductor integrated circuits, excluding at least one of the plurality of spaced-apart semiconductor integrated circuits.

5. The electronic component according to claim 1, wherein the average thickness of the heat-dissipating copper layer is greater than 10 micrometers.

6. The electronic component of claim 1, wherein the heat-dissipating copper layer has a face-centered cubic structure with a lattice parameter of less than 3.615 angstroms.

7. The electronic component of claim 1, wherein the average grain size of the heat-dissipating copper layer is between 0.15 micrometers and 0.5 micrometers.

8. An electronic component, the electronic component comprising: A circuit board, the circuit board including a plurality of conductive connection portions; A plurality of spaced-apart semiconductor integrated circuits are mounted on the circuit board and electrically connected to the plurality of connection portions; A protective layer is disposed on the semiconductor integrated circuit, substantially surrounding the semiconductor integrated circuit, and having a flat upper surface; as well as A heat-dissipating copper layer is disposed on the protective layer and has an average thickness of 3 micrometers or greater. The average thickness of the protective layer is equal to or greater than the height of the plurality of spaced-apart semiconductor integrated circuits. The heat-dissipating copper layer occupies a space that is substantially the same as the circuit board in both length and width. The heat-dissipating copper layer has a face-centered cubic structure with a lattice parameter of less than 3.615 angstroms, and The protective layer substantially encapsulates each semiconductor integrated circuit, except for the lower surface of at least one semiconductor integrated circuit facing the circuit board.

9. The electronic component of claim 8, wherein the lattice parameter of the heat-dissipating copper layer is less than 3.614 angstroms, and wherein the average grain size of the heat-dissipating copper layer is greater than 0.15 micrometers.

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