Equalizer equalization method, device, electronic device and storage medium

Abstract

The present application discloses an equalization method, device, electronic device and storage medium for an equalizer. The method includes: step 1: obtaining a received first pilot signal sequence and a preset pilot signal sequence; step 2: determining the output value of the equalizer based on the first pilot signal sequence and the first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; step 3: determining the first error signal based on the preset pilot signal sequence and the output value of the equalizer; step 4: when the absolute value of the first error signal is greater than the first preset threshold, updating the first coefficient, and repeating steps 2 and 3 based on the updated first coefficient until the first error signal is less than the first preset threshold, stopping updating the first coefficient. The present application solves the technical problem in the related art that the equalizer adjusts the received pilot signal so that the convergence speed is slow and the system performance is reduced.

Description

Technical Field

[0001] The present application relates to the field of communications, and in particular to an equalization method, device, electronic device and storage medium for an equalizer. Background Art

[0002] Equalization technology is widely used in various communication systems. Usually, the communication environment is relatively complex. It is difficult to achieve distortion-free transmission in actual communication channels. In addition, the communication signal is affected by various interference sources at the receiving end. Equalization technology can improve the reliability of communication. Microwave and millimeter wave communication technologies are widely used in various scenarios due to their flexible and convenient use, large bandwidth, high speed, and low transmission delay.

[0003] In current microwave and millimeter wave communication systems, due to the device characteristics of high-frequency systems, the phase changes of the system are greater, which puts greater pressure on the tracking of the adaptive equalizer. Especially in the time division multiple access system, the signal received by the receiver is not continuous. The signal received this time is separated from the previous signal by a certain time. During this period, the channel may change, and the adaptive equalizer needs to re-converge to achieve the best performance. However, the equalizer in the related art adjusts the received pilot signal, which slows down the convergence speed and reduces the system performance.

[0004] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention

[0005] The embodiments of the present application provide an equalizer equalization method, device, electronic device and storage medium to at least solve the technical problem in the related art that the equalizer adjusts the received pilot signal so that the convergence speed is slow and the system performance is reduced.

[0006] According to one aspect of an embodiment of the present application, a method for equalizing an equalizer is provided, comprising: step 1: obtaining a received first preamble signal sequence and a preset preamble signal sequence; step 2: determining an output value of the equalizer based on the first preamble signal sequence and a first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; step 3: determining a first error signal based on the preset preamble signal sequence and the output value of the equalizer; step 4: when the absolute value of the first error signal is greater than a first preset threshold, updating the first coefficient, and repeating steps 2 and 3 based on the updated first coefficient until the first error signal is less than the first preset threshold, then stopping updating the first coefficient.

[0007] Optionally, when the absolute value of the first error signal is greater than a first preset threshold, the first coefficient is updated, including: when the absolute value of the first error signal is greater than the first preset threshold and the absolute value of the first error signal is less than a second preset threshold, the first coefficient is updated in a first manner, wherein the second preset threshold is greater than the first preset threshold; when the absolute value of the first error signal is greater than the second preset threshold, the first coefficient is updated in a second manner.

[0008] Optionally, updating the first coefficient in a first manner includes: performing phase compensation on a signal in a first preamble signal sequence to obtain a second preamble signal sequence; performing phase correction on the first coefficient to obtain a second coefficient; and updating the first coefficient based on the second coefficient, a first error signal, a second preamble signal sequence and a third coefficient, wherein the third coefficient is used to represent a step size for updating the second coefficient.

[0009] Optionally, updating the first coefficient in a second manner includes: determining a fourth coefficient, wherein the fourth coefficient is an acceleration coefficient of the third coefficient; and updating the first coefficient based on the second coefficient, the first error signal, the second preamble signal sequence, the third coefficient and the fourth coefficient.

[0010] Optionally, determining the fourth coefficient includes: determining the ratio of the absolute value of the first error signal to a first preset threshold as a first ratio; when the first ratio is less than a target value, determining the fourth coefficient at least based on the first ratio; when the first ratio is greater than the target value, determining the fourth coefficient as a fixed value.

[0011] Optionally, performing phase compensation on a signal in a first preamble signal sequence to obtain a second preamble signal sequence includes: determining phase compensation information, wherein the phase compensation information includes a length of the first preamble signal sequence, a phase compensation coefficient, a frequency offset of the signal in the first preamble signal sequence, and a sampling rate of the signal in the first preamble signal sequence; performing phase compensation on the signal in the first preamble signal sequence based on the phase compensation information and the first preamble signal sequence to obtain a second preamble signal sequence.

[0012] Optionally, performing phase correction on the first coefficient to obtain the second coefficient includes: determining phase compensation information; and performing phase correction on the first coefficient according to the phase compensation information and the first coefficient to obtain the second coefficient.

[0013] According to another aspect of an embodiment of the present application, an equalizer device is also provided, including: a first execution module, used to execute step 1: obtain a received first preamble signal sequence, and a preset preamble signal sequence; a second execution module, used to execute step 2: determine the output value of the equalizer based on the first preamble signal sequence and the first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; a third execution module, used to execute step 3: determine a first error signal based on the preset preamble signal sequence and the output value of the equalizer; a fourth execution module, used to execute step 4: when the absolute value of the first error signal is greater than a first preset threshold, update the first coefficient, and repeat steps 2 and 3 based on the updated first coefficient until the first error signal is less than the first preset threshold, and then stop updating the first coefficient.

[0014] According to another aspect of the embodiment of the present application, an electronic device is also provided, including: a memory for storing program instructions; a processor, connected to the memory, for executing program instructions or steps to implement the following functions: Step 1: Acquire a received first preamble signal sequence and a preset preamble signal sequence; Step 2: Determine an output value of an equalizer based on the first preamble signal sequence and a first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; Step 3: Determine a first error signal based on the preset preamble signal sequence and the output value of the equalizer; Step 4: When the absolute value of the first error signal is greater than a first preset threshold, update the first coefficient, and repeat steps 2 and 3 based on the updated first coefficient until the first error signal is less than the first preset threshold, and then stop updating the first coefficient.

[0015] According to another aspect of the embodiments of the present application, a non-volatile storage medium is provided, which includes a stored computer program, wherein the device where the non-volatile storage medium is located executes the equalization method of the equalizer by running the computer program.

[0016] In an embodiment of the present application, the output value of the equalizer is determined by acquiring the received first preamble signal sequence and the first coefficient of the equalizer, and the first error signal is determined according to the preset preamble signal sequence and the output value of the equalizer. When the absolute value of the first error signal is greater than the first preset threshold, the first coefficient of the equalizer is updated in different ways until the first error signal is less than the first preset threshold, and then the updating of the first coefficient of the equalizer is stopped, thereby achieving the purpose of increasing the convergence speed of the equalizer, thereby achieving the technical effect of improving the performance of the communication system, and further solving the technical problem in the related art that the equalizer adjusts the received preamble signal, resulting in slow convergence speed and reduced system performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1 It is a hardware structure block diagram of a computer terminal (or electronic device) for implementing an equalization method of an equalizer according to an embodiment of the present application;

[0019] Figure 2 is a flow chart of an equalization method of an equalizer according to an embodiment of the present application;

[0020] Figure 3 It is a structural diagram of an equalizing device of an equalizer according to an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0022] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0023] The equalization method embodiment of the equalizer provided in the embodiment of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Figure 1 FIG. 1 shows a hardware structure block diagram of a computer terminal (or electronic device) for implementing an equalization method of an equalizer. Figure 1As shown, the computer terminal 10 (or electronic device 10) may include one or more (102a, 102b, ..., 102n are used to illustrate) processors (the processor may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA), a memory 104 for storing data, and a transmission module 106 for communication functions. In addition, it may also include: a display, an input / output interface (I / O interface), a universal serial bus (USB) port (which may be included as one of the ports of the I / O interface), a network interface, a power supply and / or a camera. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above electronic device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.

[0024] It should be noted that the one or more processors and / or other data processing circuits described above may generally be referred to herein as "data processing circuits". The data processing circuits may be embodied in whole or in part as software, hardware, firmware, or any other combination thereof. In addition, the data processing circuit may be a single independent processing module, or may be incorporated in whole or in part into any of the other components in the computer terminal 10 (or electronic device). As described in the embodiments of the present application, the data processing circuit acts as a processor control (e.g., selection of a variable resistor terminal path connected to an interface).

[0025] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the equalization method of the equalizer in the embodiment of the present application. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory 104, that is, the equalization method of the equalizer described above is realized. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor, and these remote memories may be connected to the computer terminal 10 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0026] The transmission module 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission module 106 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission module 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0027] The display may be, for example, a touch screen liquid crystal display (LCD) that enables a user to interact with a user interface of the computer terminal 10 (or electronic device).

[0028] It should be noted that, in some optional embodiments, the above Figure 1 The computer device (or electronic device) shown may include hardware elements (including circuits), software elements (including computer code stored on a computer-readable medium), or a combination of hardware elements and software elements. It should be noted that Figure 1 This is merely one example of a particular embodiment and is intended to illustrate the types of components that may be present in the above-described computer device (or electronic device).

[0029] In the above-mentioned operating environment, an embodiment of the present application provides an embodiment of an equalization method of an equalizer. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0030] Figure 2 is a flow chart of an equalization method of an equalizer according to an embodiment of the present application, such as Figure 2 As shown, the method comprises the following steps:

[0031] Step S202, namely step 1: obtaining a received first preamble signal sequence and a preset preamble signal sequence.

[0032] The execution subject of the above-mentioned step S202 can be a receiver or an equalizer in the receiver. The above-mentioned preset preamble signal sequence is a preamble sequence pre-set locally. According to the above-mentioned first preamble signal sequence and the preset preamble signal sequence, the offset frequency Δf of the signal in the first preamble signal sequence can be determined. The offset frequency is the difference between the frequencies of the preset preamble signal sequence and the signal in the first preamble signal sequence.

[0033] Step S204, also known as step 2: determining an output value of the equalizer according to the first pilot signal sequence and the first coefficient, wherein the first coefficient is a preset coefficient of the equalizer.

[0034] In the above step S204, the received first pilot signal sequence is sent to a training module for training. The training module is used in a receiver or an equalizer to complete equalization of the first pilot signal sequence and update equalizer coefficients.

[0035] In the equalization filtering process, the output of the linear equalizer is y(n), which is determined by the first pilot signal sequence and the first coefficient. The first coefficient is the coefficient of the equalizer preset before training the first pilot signal sequence. y(n) can be expressed by the following formula (1):

[0036]

[0037] in, is a received first preamble signal sequence; It is the equalizer coefficient before training, that is, the first coefficient, y(n) is the output of the equalizer, n represents the sequence number of the pilot signal sequence, which can also be understood as the number of training times, and the initial value of n can be set to 0.

[0038] Step S206, also known as step 3: determining a first error signal according to a preset pilot signal sequence and an output value of the equalizer.

[0039] In the above step S206, the first error signal can be represented by e(n), and the pre-set pilot signal sequence is the expected response, which can be represented by d(n). Then, the first error signal can be represented by the following formula (2):

[0040] e(n)=d(n)-y(n)

[0041] Step S208, also known as step 4: when the absolute value of the first error signal is greater than the first preset threshold, update the first coefficient, and repeat steps 2 and 3 according to the updated first coefficient until the first error signal is less than the first preset threshold, then stop updating the first coefficient.

[0042] In the above step S208, each time the first coefficient is updated, formula (1) and formula (2) are executed again according to the updated first coefficient to calculate a new y(n) and a new e(n). Based on the relationship between the absolute value of the new e(n) and the first preset threshold, it is determined whether to continue updating the first coefficient.

[0043] It should be noted that the above step numbers 1-3 are only for convenience of reference and do not constitute a limitation on the order of step execution.

[0044] Through the above steps, the first preamble signal sequence received and the first coefficients of the equalizer are obtained, the output value of the equalizer is determined, and according to the preset preamble signal sequence and the output value of the equalizer, the first error signal is determined. Thus, when the absolute value of the first error signal is greater than the first preset threshold, different methods are used to update the first coefficients of the equalizer until the first error signal is less than the first preset threshold, at which point the update of the first coefficients of the equalizer is stopped, achieving the purpose of improving the convergence speed of the equalizer, thereby realizing the technical effect of improving the performance of the communication system, and further solving the technical problem in the related art that the adjustment of the received preamble signal by the equalizer results in a slow convergence speed and reduces the system performance.

[0045] In step S208 of the equalization method of the above equalizer, when the absolute value of the first error signal is greater than the first preset threshold, the first coefficients are updated, which specifically includes the following steps: when the absolute value of the first error signal is greater than the first preset threshold and less than the second preset threshold, the first coefficients are updated in the first way, where the second preset threshold is greater than the first preset threshold; when the absolute value of the first error signal is greater than the second preset threshold, the first coefficients are updated in the second way.

[0046] In the above step S208, the absolute value of the first error signal can be represented by abs(e(n)), and the above first preset threshold can be represented by the error threshold A. By judging the relationship between abs(e(n)) and A, when abs(e(n)) < A, it is considered that the equalizer has converged, and at this time, there is no need to update the first coefficients of the equalizer, and the equalization process of the user data can be normally entered subsequently; when abs(e(n)) > A, it is also necessary to judge the relationship between abs(e(n)) and the second preset threshold. In the embodiments of the present application, the second preset threshold can be, for example, 2A or any value greater than A, and the second preset threshold is preferably 2A. When the value of abs(e(n)) is between the first preset threshold and the second preset threshold, for example, when A < abs(e(n)) < 2A, the first coefficients are updated in the first way, and when the value of abs(e(n)) is greater than the second preset threshold, for example, when abs(e(n)) > 2A, the first coefficients are updated in the second way. The following details these two ways.

[0047] In the equalization method of the above equalizer, updating the first coefficients in the first way specifically includes the following steps: performing phase compensation on the signals in the first preamble signal sequence to obtain a second preamble signal sequence; performing phase correction on the first coefficients to obtain second coefficients; updating the first coefficients according to the second coefficients, the first error signal, the second preamble signal sequence, and the third coefficients, where the third coefficients are used to represent the step size of the update of the second coefficients.

[0048] In the equalization method of the above equalizer, phase compensation is performed on the signals in the first preamble signal sequence to obtain a second preamble signal sequence, which specifically includes the following steps: determining phase compensation information, where the phase compensation information includes the length of the first preamble signal sequence, the phase compensation coefficient, the offset frequency of the signals in the first preamble signal sequence, and the signal sampling rate of the signals in the first preamble signal sequence; performing phase compensation on the signals in the first preamble signal sequence according to the phase compensation information and the first preamble signal sequence to obtain a second preamble signal sequence.

[0049] In the equalization method of the above equalizer, phase correction is performed on the first coefficient to obtain a second coefficient, which specifically includes the following steps: determining phase compensation information; performing phase correction on the first coefficient according to the phase compensation information and the first coefficient to obtain a second coefficient.

[0050] In an embodiment of the present application, according to the condition for updating the first coefficient in the first manner, this condition can be, for example, A < abs(e(n)) < 2A. In this case, it is considered that the equalizer has not reached the optimal state, and equalizing the user data in this state will cause problems such as a poor error vector magnitude (EVM) or even bit errors. At this time, the received first preamble signal sequence is sent to the training module for training again. Since using repeated data for training will cause the phase of the signal to be discontinuous, it is necessary to perform phase compensation on the signals in the first preamble signal sequence that is sent to the training module for training again, so as to obtain a second preamble signal sequence. The second preamble signal sequence can be phase-compensated through the following formula (3):

[0051]

[0052] where the phase compensation information includes: Δf, f0, N, and j. In the above formula (3), represents the second preamble signal sequence, Δf represents the offset frequency of the signals in the first preamble signal sequence, f0 represents the signal sampling rate of the signals in the first preamble signal sequence, N represents the length of the first preamble signal sequence, and j represents the phase compensation coefficient.

[0053] In an embodiment of the present application, when updating the first coefficient in the first manner, since the second preamble signal sequence is introduced during the training process, it is necessary to perform phase correction on the first coefficient of the equalizer to obtain a second coefficient. The second coefficient can be calculated through the following formula (4):

[0054]

[0055] The second pilot signal sequence is obtained according to the above formula (3), and after obtaining the second coefficient according to the above formula (4), the first coefficient is updated according to the second coefficient, the first error signal, the second pilot signal sequence, and the third coefficient. For the convenience of description, the updated first coefficient is denoted as the target coefficient. Specifically, the target coefficient can be calculated by the following formula (5):

[0056]

[0057] where μ is the above-mentioned third coefficient, representing the second coefficient the update step size, e(n) represents the first error signal, represents the second pilot signal sequence, represents the second coefficient.

[0058] After updating the first coefficient according to the execution process of the above first method, the updated first coefficient (i.e., the target coefficient obtained in formula (5)) is used to replace the first coefficient, and the updated first pilot signal sequence (i.e., the second pilot signal sequence) is used to replace the first pilot signal sequence. Then, the above formulas (1) and (2) are executed again to calculate the new y(n) and the new e(n). According to the relationship between the absolute value of the new e(n) and the first preset threshold, it is determined whether to continue to update the first coefficient. When the value of abs(e(n)) is between the first preset threshold and the second preset threshold, for example, in the case of A < abs(e(n)) < 2A, the first coefficient is updated by the first method. When the value of abs(e(n)) is greater than the second preset threshold, for example, in the case of abs(e(n)) > 2A, the first coefficient is updated by the second method. When abs(e(n)) < A, the equalizer converges, and at this time, the first coefficient is no longer updated.

[0059] In the equalization method of the above equalizer, updating the first coefficient according to the second method specifically includes the following steps: determining a fourth coefficient, where the fourth coefficient is the acceleration coefficient of the third coefficient; updating the first coefficient according to the second coefficient, the first error signal, the second pilot signal sequence, the third coefficient, and the fourth coefficient.

[0060] In the equalization method of the above equalizer, determining the fourth coefficient specifically includes the following steps: determining the ratio of the absolute value of the first error signal to the first preset threshold as the first ratio; in the case where the first ratio is less than the target value, determining the fourth coefficient at least based on the first ratio; in the case where the first ratio is greater than the target value, determining the fourth coefficient as a fixed value.

[0061] In an embodiment of the present application, the condition for updating the first coefficient in the second manner may be, for example, abs(e(n))>2A. In this case, the equalizer has not yet reached the optimal state. Equalizing the user data in this state may lead to problems such as poor error vector amplitude (EVM) or even bit errors. Therefore, it is also necessary to send the received first preamble signal sequence to the training module again for training, and perform phase compensation on the signal in the first preamble signal sequence that is sent to the training module again for training using the above formula (3), thereby obtaining a second preamble signal sequence. At the same time, since the second preamble signal sequence is introduced during the training process, it is necessary to perform phase correction on the first coefficient of the equalizer to obtain a second coefficient, which can be calculated using the above formula (4). It should be noted that formulas (3) and (4) have been introduced in detail above, so they will not be repeated here.

[0062] The difference between the second method of updating the first coefficient and the first method is that the second method can use variable step size equalization to accelerate the convergence of the equalizer, that is, the first coefficient is updated according to the second coefficient, the first error signal, the second pilot signal sequence, the third coefficient and the fourth coefficient. Specifically, the target coefficient can be calculated by the following formula (6):

[0063]

[0064] Wherein, k represents the acceleration coefficient of the third coefficient μ, and k is obtained as shown in the following formula (7):

[0065]

[0066] In the above formula (7), 10 is the above target value, and 8 is the above fixed value. It should be noted that both the target value and the fixed value are configurable. The target value 10 and the fixed value 8 in the above formula (7) are only optional values ​​and do not represent limitations. In the embodiment of the present application, the step size of equalization is not the larger the better. Too large a step size will lead to unstable equalization convergence.

[0067] After updating the first coefficient according to the second method described above, replace the first coefficient with the updated first coefficient (i.e., the target coefficient obtained in formula (6)), and replace the first preamble signal sequence with the updated first preamble signal sequence (i.e., the second preamble signal sequence), and then execute the above formula (1) and formula (2) again, so as to calculate the new y(n) and the new e(n). Determine whether to continue updating the first coefficient according to the relationship between the absolute value of the new e(n) and the first preset threshold. When the value of abs(e(n)) is between the first preset threshold and the second preset threshold, for example, in the case of A < abs(e(n)) < 2A, update the first coefficient using the first method. When the value of abs(e(n)) is greater than the second preset threshold, for example, in the case of abs(e(n)) > 2A, update the first coefficient using the second method. When abs(e(n)) < A, the equalizer converges, and at this time, the first coefficient is no longer updated.

[0068] The equalization method of the equalizer provided by the embodiments of the present application can be applied to the equalization of a time division multiple access (TDMA) receiver, or to the time division multiple access receiver equalization in a point-to-multipoint microwave and millimeter wave communication system, and can achieve a better equalization convergence speed. Under the same equalization performance, using the equalization method in the embodiments of the present application can reduce the overhead of the preamble, so as to transmit more useful data and improve the performance of the system. This is illustrated by the following examples: Example 1, in a 10G 1-to-8 microwave system, with a crystal oscillator performance of 1 ppm, a signal sampling rate of 245.76Mhz, and a chip clock frequency of 491.52Mhz, in the equalization environment or equalization performance, the equalization algorithm in the related art requires a preamble sequence with a length of about 256 points, while using the equalization method in the present application only requires a preamble sequence with a length of 32 points, and when the preamble is repeatedly sent into the equalizer 10 times, the equalizer can converge. Although repeatedly processing the preamble sequence increases the system delay by about 0.7 microseconds, it can increase the useful data transmitted by the system, thereby improving the performance of the system. Example 2, in the same equalization environment as Example 1, the equalization algorithm in the related art requires a preamble sequence with a length of about 256 points, while using the equalization method in the present application only requires a preamble sequence with a length of 32 points, and the preamble is repeatedly sent into the equalizer 5 times, where the first two pilots are equalized with a 5-fold step size, the third is equalized with a 3-fold step size, and the last two are equalized with a 1-fold step size, and the equalizer can also converge. At this time, the system delay increase caused by repeatedly processing the preamble sequence is about 0.35 microseconds, but it can also increase the useful data transmitted by the system, thereby improving the performance of the system.

[0069] Figure 3 is a structural diagram of an equalization device of an equalizer according to an embodiment of the present application, as Figure 3 shown, the device includes:

[0070] The first execution module 302 is used to execute step 1: obtain a received first preamble signal sequence and a preset preamble signal sequence;

[0071] The second execution module 304 is used to execute step 2: determine the output value of the equalizer according to the first pilot signal sequence and the first coefficient, wherein the first coefficient is a preset coefficient of the equalizer;

[0072] The third execution module 306 is used to execute step 3: determine a first error signal according to a preset pilot signal sequence and an output value of the equalizer;

[0073] The fourth execution module 308 is used to execute step 4: when the absolute value of the first error signal is greater than the first preset threshold, update the first coefficient, and repeat steps 2 and 3 according to the updated first coefficient until the first error signal is less than the first preset threshold, then stop updating the first coefficient.

[0074] In the fourth execution module in the equalizing device of the above-mentioned equalizer, when the absolute value of the first error signal is greater than the first preset threshold, the first coefficient is updated, which specifically includes the following process: when the absolute value of the first error signal is greater than the first preset threshold and the absolute value of the first error signal is less than the second preset threshold, the first coefficient is updated in a first manner, wherein the second preset threshold is greater than the first preset threshold; when the absolute value of the first error signal is greater than the second preset threshold, the first coefficient is updated in a second manner.

[0075] In the fourth execution module in the equalization device of the above-mentioned equalizer, the first coefficient is updated according to the first method, which specifically includes the following processes: performing phase compensation on the signal in the first preamble signal sequence to obtain the second preamble signal sequence; performing phase correction on the first coefficient to obtain the second coefficient; updating the first coefficient based on the second coefficient, the first error signal, the second preamble signal sequence and the third coefficient, wherein the third coefficient is used to represent the step size of updating the second coefficient.

[0076] In the fourth execution module in the equalizing device of the above-mentioned equalizer, the first coefficient is updated according to the second method, which specifically includes the following processes: determining the fourth coefficient, wherein the fourth coefficient is an acceleration coefficient of the third coefficient; updating the first coefficient based on the second coefficient, the first error signal, the second preamble signal sequence, the third coefficient and the fourth coefficient.

[0077] In the fourth execution module in the equalizing device of the above-mentioned equalizer, the fourth coefficient is determined, which specifically includes the following process: determining the ratio of the absolute value of the first error signal to the first preset threshold as a first ratio; when the first ratio is less than the target value, determining the fourth coefficient at least based on the first ratio; when the first ratio is greater than the target value, determining the fourth coefficient as a fixed value.

[0078] In the fourth execution module in the equalization device of the above-mentioned equalizer, phase compensation is performed on the signal in the first preamble signal sequence to obtain the second preamble signal sequence, which specifically includes the following processes: determining phase compensation information, wherein the phase compensation information includes the length of the first preamble signal sequence, the phase compensation coefficient, the offset frequency of the signal in the first preamble signal sequence, and the sampling rate of the signal in the first preamble signal sequence; performing phase compensation on the signal in the first preamble signal sequence according to the phase compensation information and the first preamble signal sequence to obtain the second preamble signal sequence.

[0079] In the fourth execution module of the equalization device of the above-mentioned equalizer, the first coefficient is phase corrected to obtain the second coefficient, which specifically includes the following processes: determining phase compensation information; performing phase correction on the first coefficient according to the phase compensation information and the first coefficient to obtain the second coefficient.

[0080] It should be noted that Figure 3 The equalizer device shown is used to perform Figure 2 The equalizing method of the equalizer shown in the figure, therefore the relevant explanations in the above-mentioned equalizing method of the equalizer are also applicable to the equalizing device of the equalizer, and will not be repeated here.

[0081] An embodiment of the present application also provides a non-volatile storage medium, which includes a stored computer program, wherein the device where the non-volatile storage medium is located executes the following equalizer equalization method by running the computer program: Step 1: Acquire a received first preamble signal sequence and a preset preamble signal sequence; Step 2: Determine an output value of the equalizer based on the first preamble signal sequence and the first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; Step 3: Determine a first error signal based on the preset preamble signal sequence and the output value of the equalizer; Step 4: When the absolute value of the first error signal is greater than a first preset threshold, update the first coefficient, and repeat steps 2 and 3 based on the updated first coefficient until the first error signal is less than the first preset threshold, then stop updating the first coefficient.

[0082] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0083] In the above embodiments of the present application, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0084] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0085] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0086] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0087] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk and other media that can store program codes.

[0088] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. An equalizer equalization method, characterized in that: include: Step 1: Acquire a received first preamble signal sequence and a preset preamble signal sequence; Step 2: determining an output value of an equalizer according to the first pilot signal sequence and a first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; Step 3: Determine a first error signal according to the preset pilot signal sequence and the output value of the equalizer; Step 4: when the absolute value of the first error signal is greater than a first preset threshold, the first coefficient is updated, and steps 2 and 3 are repeatedly performed according to the updated first coefficient, until the first error signal is less than the first preset threshold, and the updating of the first coefficient is stopped; When the absolute value of the first error signal is greater than a first preset threshold, updating the first coefficient includes: when the absolute value of the first error signal is greater than the first preset threshold and the absolute value of the first error signal is less than a second preset threshold, updating the first coefficient in a first manner, wherein the second preset threshold is greater than the first preset threshold; when the absolute value of the first error signal is greater than the second preset threshold, updating the first coefficient in a second manner; Updating the first coefficient in a first manner includes: performing phase compensation on a signal in the first pilot signal sequence to obtain a second pilot signal sequence; performing phase correction on the first coefficient to obtain a second coefficient; and updating the first coefficient according to the second coefficient, the first error signal, the second pilot signal sequence, and a third coefficient, wherein the third coefficient is used to indicate a step size for updating the second coefficient; Updating the first coefficient in a second manner includes: determining a fourth coefficient, wherein the fourth coefficient is an acceleration coefficient of the third coefficient; and updating the first coefficient based on the second coefficient, the first error signal, the second preamble signal sequence, the third coefficient and the fourth coefficient.

2. The method according to claim 1, characterized in that Determine the fourth coefficient, including: determining a ratio of the absolute value of the first error signal to the first preset threshold as a first ratio; When the first ratio is less than a target value, determining the fourth coefficient at least according to the first ratio; When the first ratio is greater than the target value, the fourth coefficient is determined to be a fixed value.

3. The method according to claim 1, characterized in that Performing phase compensation on a signal in the first preamble signal sequence to obtain a second preamble signal sequence includes: Determine phase compensation information, wherein the phase compensation information includes the length of the first preamble signal sequence, a phase compensation coefficient, an offset frequency of a signal in the first preamble signal sequence, and a sampling rate of a signal in the first preamble signal sequence, wherein the offset frequency is a difference between a frequency of a preset preamble signal sequence and a frequency of a signal in the first preamble signal sequence; Phase compensation is performed on a signal in the first preamble signal sequence according to the phase compensation information and the first preamble signal sequence to obtain the second preamble signal sequence.

4. The method according to claim 3, characterized in that Performing phase correction on the first coefficient to obtain a second coefficient includes: determining the phase compensation information; The first coefficient is phase-corrected according to the phase compensation information and the first coefficient to obtain the second coefficient.

5. An equalizer device, characterized in that: include: A first execution module is used to execute step 1: obtain a received first preamble signal sequence and a preset preamble signal sequence; A second execution module is used to execute step 2: determine an output value of an equalizer according to the first pilot signal sequence and a first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; A third execution module is used to execute step 3: determine a first error signal according to the preset pilot signal sequence and the output value of the equalizer; a fourth execution module, configured to execute step 4: when the absolute value of the first error signal is greater than a first preset threshold, update the first coefficient, and repeatedly execute steps 2 and 3 according to the updated first coefficient until the first error signal is less than the first preset threshold, then stop updating the first coefficient; The fourth execution module is further configured to update the first coefficient in a first manner when the absolute value of the first error signal is greater than the first preset threshold and the absolute value of the first error signal is less than a second preset threshold, wherein the second preset threshold is greater than the first preset threshold; and update the first coefficient in a second manner when the absolute value of the first error signal is greater than the second preset threshold; The fourth execution module is further used to perform phase compensation on the signal in the first pilot signal sequence to obtain a second pilot signal sequence; perform phase correction on the first coefficient to obtain a second coefficient; and update the first coefficient according to the second coefficient, the first error signal, the second pilot signal sequence and a third coefficient, wherein the third coefficient is used to indicate a step size for updating the second coefficient; The fourth execution module is further used to determine a fourth coefficient, wherein the fourth coefficient is an acceleration coefficient of the third coefficient; and to update the first coefficient according to the second coefficient, the first error signal, the second preamble signal sequence, the third coefficient and the fourth coefficient.

6. An electronic device, characterized in that: include: A memory for storing program instructions; A processor, connected to the memory, for executing program instructions or steps to implement the following functions: Step 1: Acquire a received first pilot signal sequence and a preset pilot signal sequence; Step 2: Determine an output value of an equalizer according to the first pilot signal sequence and a first coefficient, wherein the first coefficient is a preset coefficient of the equalizer; Step 3: Determine a first error signal according to the preset pilot signal sequence and the output value of the equalizer; Step 4: When the absolute value of the first error signal is greater than a first preset threshold, update the first coefficient, and repeat steps 2 and 3 according to the updated first coefficient until the first error signal is less than the first preset threshold, then stop updating the first coefficient; When the absolute value of the first error signal is greater than the first preset threshold, update the first coefficient, including: when the absolute value of the first error signal is greater than the first preset threshold, and the absolute value of the first error signal is less than a second preset threshold When the absolute value of the first error signal is greater than the second preset threshold, the first coefficient is updated in a first manner, wherein the second preset threshold is greater than the first preset threshold; when the absolute value of the first error signal is greater than the second preset threshold, the first coefficient is updated in a second manner; updating the first coefficient in the first manner includes: performing phase compensation on the signal in the first pilot signal sequence to obtain the second pilot signal sequence; performing phase correction on the first coefficient to obtain the second coefficient; updating the first coefficient according to the second coefficient, the first error signal, the second pilot signal sequence and the third coefficient, wherein the third coefficient is used to represent the step size of the second coefficient update; updating the first coefficient in the second manner includes: determining a fourth coefficient, wherein the fourth coefficient is an acceleration coefficient of the third coefficient; updating the first coefficient according to the second coefficient, the first error signal, the second pilot signal sequence, the third coefficient and the fourth coefficient.

7. A non-volatile storage medium, characterized in that: The non-volatile storage medium includes a stored computer program, wherein the device where the non-volatile storage medium is located executes the equalization method of the equalizer according to any one of claims 1 to 4 by running the computer program.

Images