Display panel and manufacturing method thereof, and display device
By adjusting the proportion of the obscure part to the depth of the groove in the bottom -cut structure of the OLED panel, the bottom -cut structure in the OLED panel is not conducive to the problem of thin film packaging, and the better packaging effect and service life are achieved.
Patent Information
- Application Number
- CN202211063062.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-01
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2042-09-01
AI Technical Summary
The undercut structure in medium and large-size OLED panels is not conducive to the generation of thin film packaging layers, resulting in poor packaging effects, affecting flexibility characteristics and product reliability.
By strictly controlling the proportion of the depth of the blocking part and the depth of the second groove in the bottom -cut structure, the bottom -cut structure enables the second electrode layer and the luminous function layer, while ensuring the complete coverage of the packaging layer.
The pressure drop problem in the second electrode layer is solved, and the packaging effect of the packaging layer is ensured, and the service life of the display panel is improved.
Smart Images

Figure CN115472655B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display equipment, and in particular to a display panel and a preparation method thereof, and a display device. Background Art
[0002] Organic Light-Emitting Diode (OLED) is popular among the public and developers due to its advantages of self-luminescence, high contrast, wide color gamut, and low power consumption. OLED panels, especially flexible OLED panels, have overcapacity, and the penetration of flexible OLED from smartphones to medium-sized and even larger sizes such as laptops and tablets is inevitable for market development.
[0003] Compared with small-size OLEDs, medium-size OLEDs have larger panels. If the cathode is only electrically connected to the lower-layer connection wiring through the connection vias in the frame area, the internal impedance of the panel will increase, resulting in uneven display brightness distribution. Designing auxiliary electrodes on the panel is an effective way to reduce the in-plane impedance. However, the undercut structure formed by the current large-size auxiliary electrodes is not conducive to the formation of the thin film encapsulation (TFE) layer. The thin film encapsulation layer is prone to cracks at the undercut structure, which makes it impossible to isolate water and oxygen well, and the encapsulation effect is poor. Therefore, OLED panels often need to be paired with glass encapsulation, but glass encapsulation will affect the flexibility of flexible OLED panels, and the product reliability is poor and does not have mass production capabilities. Summary of the invention
[0004] The object of the present invention is to provide a display panel and a method for manufacturing the same, and a display device, so as to solve the technical problem that the undercut structure in existing medium and large-sized OLED panels is not conducive to generating a thin film encapsulation layer.
[0005] To achieve the above objectives, the present invention provides a display panel, which includes an array substrate, an auxiliary electrode layer, a first electrode layer, a pixel electrode layer, a first groove, an undercut structure, a light-emitting functional layer, a second electrode layer and an encapsulation layer.
[0006] The auxiliary electrode layer is arranged in the array substrate. The first electrode layer is arranged on the array substrate and is electrically connected to the array substrate. The pixel defining layer is arranged on the array substrate and covers the first electrode layer. The first groove penetrates the pixel defining layer to a surface of the first electrode layer. The undercut structure is arranged in the pixel defining layer and the array substrate and corresponds to the auxiliary electrode layer. The light-emitting functional layer is arranged in the first groove and extends from the first groove to the undercut structure. The second electrode layer is arranged on the light-emitting functional layer and extends from the light-emitting functional layer to cover the auxiliary electrode layer in the undercut structure. The encapsulation layer is arranged on the second electrode layer and covers the exposed surface in the undercut structure.
[0007] The undercut structure includes a second groove and a shielding layer. The second groove penetrates the pixel defining layer and a portion of the array substrate to a surface of the auxiliary electrode layer. The shielding layer is provided on the pixel electrode layer and shields a portion of the notch of the second groove. The shielding layer and the orthographic projection of the second groove on the array substrate overlap, and the width of the overlapping portion is one third to one half of the depth of the second groove.
[0008] Furthermore, the display panel has a display area and a frame area connected to the display area;
[0009] The array substrate comprises a substrate structure, an insulating structure and a thin film transistor structure. The substrate structure covers the display area and the frame area. The insulating structure is arranged on the substrate structure. The thin film transistor structure is arranged in the insulating structure and is located in the display area. The auxiliary electrode layer and the thin film transistor structure do not overlap in their orthographic projection on the substrate structure. The undercut structure and the first groove do not overlap in their orthographic projection on the substrate structure.
[0010] Further, the insulating structure includes a first flat layer and a second flat layer. The first flat layer is disposed on the substrate structure. The second flat layer is disposed on a surface of the second flat layer away from the first flat layer, and the pixel defining layer is disposed on a surface of the second flat layer away from the first flat layer.
[0011] The thin film transistor structure comprises a source-drain electrode layer, wherein the source-drain electrode layer is disposed between the first planar layer and the second planar layer. The auxiliary electrode layer and the source-drain electrode layer are disposed on the same surface of the first planar layer.
[0012] Furthermore, in the frame area, the display panel further includes a connecting wire and a third groove. The connecting wire is provided in the array substrate and is provided on the same surface of the first flat layer together with the auxiliary electrode layer. The third groove penetrates the pixel defining layer and the second flat layer to a surface of the connecting wire. The second electrode layer extends from the display area to the frame area and is electrically connected to the connecting wire in the third groove.
[0013] Furthermore, the second planar layer and the pixel defining layer both contain organic materials, and the shielding layer contains inorganic materials.
[0014] Furthermore, the shielding layer has a thickness of 0.1 micrometer to 10 micrometers.
[0015] Furthermore, the display panel further includes a supporting column, and the supporting column is arranged between the pixel defining layer and the second electrode layer.
[0016] The present invention also provides a method for preparing a display panel, the method comprising the following steps:
[0017] An array substrate and an auxiliary electrode layer are prepared; a first electrode layer and a pixel defining layer are prepared on the array substrate; a first groove is formed in the pixel defining layer and the array substrate; a light-emitting functional layer is formed on the pixel defining layer and the array substrate; and a second electrode layer is formed on the light-emitting functional layer.
[0018] Among them, the step of forming an undercut structure on the pixel defining layer and the array substrate includes: forming a second groove in the pixel defining layer and the array substrate; widening the second groove so that the shielding layer and the orthographic projection of the second groove on the array substrate overlap, and the width of the overlapping portion is one third to one half of the depth of the second groove.
[0019] Furthermore, the method for preparing the display panel also includes the following steps: defining a display area and a border area on the array substrate; forming connecting wires in the array substrate in the border area, and the connecting wires are prepared simultaneously with the auxiliary electrode layer; and forming a third groove on the pixel defining layer in the border area and the array substrate.
[0020] The present invention further provides a display device, which includes the display panel as shown above.
[0021] The advantages of the present invention are: the display panel and the preparation method thereof provided in the present invention, by strictly controlling the ratio between the shielding portion in the undercut structure and the depth of the second groove, enable the undercut structure to reach a perfect state in which it can shield the second electrode layer and the light-emitting functional layer while also allowing the encapsulation layer to be completely covered, thereby solving the voltage drop problem in the second electrode layer while also ensuring the encapsulation effect of the encapsulation layer, thereby improving the service life of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0023] Figure 1 A schematic diagram of partitions of a display panel in an embodiment of the present invention;
[0024] Figure 2 is a schematic diagram of a layered structure of a display panel in an embodiment of the present invention;
[0025] Figure 3 is a schematic flow chart of a method for preparing a display panel according to an embodiment of the present invention;
[0026] Figure 4 Schematic diagram of the layered structure of the display panel after step S10 in an embodiment of the present invention;
[0027] Figure 5 Schematic diagram of the layered structure of the display panel after step S20 in an embodiment of the present invention;
[0028] Figure 6 This is a schematic diagram of a layered structure after an inorganic material layer is formed in step S30 in an embodiment of the present invention;
[0029] Figure 7 Schematic diagram of the layered structure after the second groove is widened in step S30 in an embodiment of the present invention;
[0030] Figure 8 Schematic diagram of the layered structure after the shielding layer is formed in step S30 in an embodiment of the present invention.
[0031] The components in the figure are shown as follows:
[0032] Display panel 1; Display area 10;
[0033] Frame area 20; Sub-pixel 11;
[0034] Array substrate 100; Substrate structure 110;
[0035] A first flexible layer 111; A first barrier layer 112;
[0036] A second flexible layer 113; A second barrier layer 114;
[0037] Insulation structure 120; Buffer layer 121;
[0038] A first insulating layer 122; A second insulating layer 123;
[0039] Interlayer dielectric layer 124; First planar layer 125;
[0040] A second planar layer 126; a thin film transistor structure 130;
[0041] Active layer 131; First gate layer 132;
[0042] A second gate layer 133; A first source and drain layer 134;
[0043] The second source and drain layer 135; The first electrode layer 210;
[0044] Light-emitting functional layer 220; Second electrode layer 230;
[0045] Pixel defining layer 300; First groove 310;
[0046] Auxiliary electrode layer 400; Undercut structure 500;
[0047] The second groove 510; The shielding layer 520;
[0048] Inorganic material layer 520'; Encapsulation layer 600;
[0049] Support column 700; Connecting wire 800;
[0050] The third groove 900 . DETAILED DESCRIPTION
[0051] The preferred embodiments of the present invention are described below with reference to the drawings in the specification to prove that the present invention can be implemented. The embodiments of the invention can fully introduce the present invention to those skilled in the art, making its technical content clearer and easier to understand. The present invention can be embodied through many different forms of embodiments of the invention, and the protection scope of the present invention is not limited to the embodiments mentioned in the text.
[0052] In the drawings, components with the same structure are indicated by the same numerical reference numerals, and components with similar structures or functions are indicated by similar numerical reference numerals. The size and thickness of each component shown in the drawings are arbitrarily shown, and the present invention does not limit the size and thickness of each component. In order to make the illustration clearer, the thickness of the components is appropriately exaggerated in some places in the drawings.
[0053] In addition, the following descriptions of the various embodiments of the invention are made with reference to the attached diagrams to illustrate specific embodiments of the invention that the present invention can be implemented with. The directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer description and understanding of the present invention, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0054] When some components are described as being "on" another component, the component may be directly placed on the other component; there may also be an intermediate component on which the component is placed, and the intermediate component is placed on the other component. When a component is described as being "mounted on" or "connected to" another component, the two may be understood to be directly "mounted on" or "connected", or one component may be indirectly "mounted on" or "connected to" another component via an intermediate component.
[0055] In an embodiment of the present invention, a display device is provided, which may be an OLED display device, comprising a display panel 1, wherein the display panel 1 is used to provide a display image for the display device. The display device may be any display device with a display function, such as a mobile phone, a laptop computer, a tablet computer, etc.
[0056] like Figure 1 As shown, the display panel 1 has a display area 10 and a frame area 20 connected to the display area 10. In the display area 10, the display panel 1 has a plurality of sub-pixels 11, and the sub-pixels 11 are evenly distributed in the display area 10, and the sub-pixels 11 can emit red light, green light, blue light, etc., respectively, and display lights of different colors are emitted from the display area 10, thereby forming a color display screen and realizing color display. In the frame area 20, the display panel 1 is arranged with a plurality of wirings, and the wirings are used to transmit display signals and display power for the display.
[0057] like Figure 2 As shown, the display panel 1 includes an array substrate 100 , a first electrode layer 210 , an auxiliary electrode layer 400 , a pixel defining layer 300 , a light emitting functional layer 220 , a second electrode layer 230 and an encapsulation layer 600 .
[0058] The array substrate 100 includes a substrate structure 110 , an insulating structure 120 and a plurality of thin film transistor structures 130 .
[0059] The substrate structure 110 covers the display area 10 and the frame area 20, and includes a first flexible layer 111, a second flexible layer 113, a first barrier layer 112, and a second barrier layer 114. The first flexible layer 111 and the second flexible layer 113 are stacked, the first barrier layer 112 is disposed between the first flexible layer 111 and the second flexible layer 113, and the second barrier layer 114 is disposed on a surface of the second flexible layer 113 away from the first flexible layer 111.
[0060] The first flexible layer 111 and the second flexible layer 113 enable the display panel 1 to achieve flexible bending display. The first barrier layer and the second barrier layer are used to prevent water and oxygen from penetrating into the insulating structure 120 through the first flexible layer 111 and the second flexible layer 113, so as to prevent damage to the thin film transistor structure 130 in the array substrate 100. Specifically, the first flexible layer 111 and the second flexible layer 113 are made of the same material, which may include at least one of PI (polyimide), PET (polyethylene glycol ester), PEN (polyethylene naphthalate), PC (polycarbonate), PES (polyether sulfone), PAR (aromatic fluorotoluene containing polyarylate) or PCO (polycyclic olefin). Preferably, the material of the first flexible layer 111 and the second flexible layer 113 is PI. The material of the first barrier layer and the second barrier layer includes but is not limited to silicon-containing oxides, nitrides or oxynitrides, such as at least one of SiOx (silicon oxide), SiN (silicon nitride) or SiON (silicon oxynitride).
[0061] The insulating structure 120 is disposed on the second barrier layer 114 and covers the display area 10 and the frame area 20, and includes a buffer layer 121, a first insulating layer 122, a second insulating layer 123, an interlayer dielectric layer 124, a first flat layer 125, and a second flat layer 126, which are stacked in sequence. The thin film transistor structure 130 is disposed in the insulating structure 120 in the display area 10, and at least one thin film transistor structure 130 is disposed in each sub-pixel 11. The thin film transistor structure 130 includes an active layer 131, a first gate layer 132, a second gate layer 133, a first source and drain electrode layer 134, and a second source and drain electrode layer 135.
[0062] The buffer layer 121 is disposed on a specific surface of the second barrier layer 114 away from the second flexible layer 113. The active layer 131 is disposed on the buffer layer 121 away from the second barrier layer 114. The first insulating layer 122 is disposed on the buffer layer 121 and covers the active layer 131. The first gate layer 132 is disposed on a surface of the first insulating layer 122 away from the active layer 131. The second insulating layer 123 is disposed on the first insulating layer 122 and covers the first gate layer 132. The second gate layer 133 is disposed on a surface of the second insulating layer 123 away from the first gate layer 132. The interlayer dielectric layer 124 is disposed on the second insulating layer 123 and covers the second gate layer 133. The first source-drain electrode layer 134 is disposed on a surface of the interlayer dielectric layer 124 away from the second gate layer 133, and sequentially passes through the interlayer dielectric layer 124, the second insulating layer 123 and the first insulating layer 122 to be electrically connected to the active layer 131. The first planar layer 125 is disposed on the interlayer dielectric layer 124 and covers the first source-drain electrode layer 134. The second source-drain electrode layer 135 is disposed on the first planar layer 125 and passes through the first planar layer 125 to be electrically connected to the first source-drain electrode layer 134. The second planar layer 126 is disposed on the first planar layer 125 and covers the second source-drain electrode layer 135.
[0063] When current and voltage are passed through the first gate layer 132 and the second gate layer 133, an electric field is generated, which causes the surface of the active layer 131 to generate induced charges, changes the width of the conductive channel in the active layer 131, and thus achieves the purpose of controlling the current in the first source-drain electrode layer 134. The upper and lower sides of the second source-drain electrode layer 135 are electrically connected to the first source-drain electrode layer 134 and the first electrode layer 210, respectively, so as to facilitate the transmission of electrical energy in the first source-drain electrode layer 134 to the first electrode layer 210.
[0064] Specifically, the active layer 131 is a semiconductor material, such as at least one of amorphous silicon (a-Si), low temperature polycrystalline silicon (LTPS) or metal oxide (IGZO). The first gate layer 132, the second gate layer 133, the first source and drain layer 134 and the second source and drain layer 135 are all made of metal materials with excellent conductive properties, such as at least one of copper, titanium, molybdenum, aluminum, silver and other metal materials. The buffer layer 121, the first insulating layer 122, the second insulating layer 123 and the interlayer dielectric layer 124 are all made of inorganic materials such as silicon oxide and silicon nitride. The buffer layer 121 is used to block water and oxygen from invading from one side of the substrate structure 110 to protect the conductive structure in the array substrate 100. The first insulating layer 122, the second insulating layer 123 and the interlayer dielectric layer 124 are used to insulate and protect the conductive traces in the thin film transistor structure 130 to prevent short circuits between traces. The first planarization layer 125 and the second planarization layer 126 are made of organic materials, and planarize the surface of the array substrate 100 by utilizing the leveling property of the organic materials.
[0065] Each sub-pixel 11 has a first electrode layer 210, which is disposed on the second planar layer 126 away from the second source-drain electrode layer 135, and passes through the second source-drain electrode layer 135 to be electrically connected to the second source-drain electrode layer 135. The first electrode layer 210 may be a laminated structure of a transparent conductive material and a metal material, such as indium tin oxide (ITO), aluminum, silver, etc.
[0066] The pixel defining layer 300 is disposed on the second planar layer 126 and covers the first electrode layer 210. The pixel defining layer 300 has a plurality of first grooves 310, and each sub-pixel 11 has a first groove 310. The first groove 310 penetrates the pixel defining layer 300 to the first electrode layer 210, so that the upper surface of the first electrode layer 210 (i.e., a surface of the first electrode layer 210 away from the second planar layer 126) is exposed in the first groove 310.
[0067] The auxiliary electrode layer 400 is located in the display area 10 and between two adjacent sub-pixels 11, that is, the orthographic projection of the auxiliary electrode layer 400 on the substrate structure 110 does not overlap with the orthographic projections of the first electrode layer 210 and the thin film transistor structure 130 on the substrate structure 110. The auxiliary electrode layer 400 is located between the first flat layer 125 and the second flat layer 126, and is provided on the same surface of the first flat layer 125 together with the second source-drain electrode layer 135, so that the auxiliary electrode layer 400 can be prepared by the same process as the second source-drain electrode layer 135, and therefore the material of the auxiliary electrode layer 400 is also the same as the material of the second source-drain electrode layer 135.
[0068] The display panel 1 also has a plurality of undercut structures 500, which are located between two adjacent sub-pixels 11 and include a second groove 510 and a shielding layer 520. The second groove 510 sequentially penetrates the first electrode layer 210 and the second planar layer 126 to the auxiliary electrode layer 400, so that the upper surface of the auxiliary electrode layer 400 (i.e., a surface of the auxiliary electrode layer 400 away from the first planar layer 125) is exposed in the undercut opening. The shielding layer 520 is disposed on a surface of the pixel defining layer 300 away from the first electrode layer 210, and the orthographic projection of the shielding layer 520 on the substrate structure 110 partially overlaps with the orthographic projection of the second groove 510 on the substrate structure 110. Specifically, there is a gap between the end of the shielding layer 520 close to the second groove 510 and the auxiliary electrode layer 400 located at the bottom of the second groove 510, so that the end of the shielding layer 520 close to the second groove 510 is suspended from the notch of the second groove 510 to form a shielding structure.
[0069] The light-emitting functional layer 220 generally includes a stacked hole functional layer, an organic light-emitting layer, an electronic functional layer, etc., which is arranged on the first electrode layer 210 in the first groove 310, and extends from the top surface of the pixel defining layer 300 along the side wall of the first groove 310 to cover the groove wall of the second groove 510, so that one end of the light-emitting functional layer 220 located in the second groove 510 covers the side of the auxiliary electrode layer 400 in the second groove 510 away from the shielding layer 520. The light-emitting functional layer 220 obtains holes and electrons in the first electrode layer 210 and the second electrode layer 230 and combines the holes and electrons, thereby stimulating the fluorescent material thereof to emit light, and then converts electrical energy into light energy, so as to enable the display panel 1 to achieve light-emitting display.
[0070] The second electrode layer 230 is disposed on a surface of the light-emitting functional layer 220 away from the first electrode layer 210 and the pixel defining layer 300, and it also extends from the first groove 310 to the second groove 510. At the same time, one end of the second electrode layer 230 located in the second groove 510 extends from the light-emitting functional layer 220 to cover the exposed surface of the auxiliary electrode layer 400, and is electrically connected to the auxiliary electrode layer 400. The first electrode layer 210 is an anode, and the second electrode layer 230 is a cathode.
[0071] In the frame area 20, the display panel 1 further includes a connection line 800. The connection line 800 is located between the first flat layer 125 and the second flat layer 126, that is, the second source-drain layer 135, the auxiliary electrode layer 400 and the connection line 800 are all located on a surface of the first flat layer 125 away from the first source-drain layer 134, so the connection line 800 is also prepared by the same process as the second source-drain layer 135 and the auxiliary electrode layer 400.
[0072] In the frame area 20, the display panel 1 further has a third groove 900, which sequentially penetrates the pixel defining layer 300 and the second flat layer 126 to the connecting wire 800, so that the upper surface of the connecting wire 800 (i.e., a surface of the connecting wire 800 away from the first flat layer 125) is exposed in the third groove 900. At the same time, the second electrode layer 230 extends from the display area 10 to the frame area 20, and covers the exposed surface of the connecting wire 800 in the third groove 900, thereby being electrically connected to the connecting wire 800. The connecting wire 800 is used to transmit electrical energy to the second electrode layer 230, so that the light-emitting functional layer 220 can obtain electrons from the second electrode layer 230.
[0073] When the display panel 1 is working, due to the difference in transmission distance between the connection wiring 800 in the frame area 20 and the second electrode layer 230 at different positions in the display area 10, a voltage drop (IR drop) phenomenon will occur between the center position of the display area 10 and the surrounding edge positions other than the center position, and the voltage drop phenomenon will cause uneven brightness of the display screen. In an embodiment of the present invention, the second electrode layer 230 in the display area 10 is electrically connected to the auxiliary electrode layer 400, and an auxiliary voltage is additionally applied to the area with a larger voltage drop (such as the center position of the display area 10) through the auxiliary electrode, so that the voltage in each second electrode layer 230 of the entire display panel 1 is the same or similar when it is working, so that the brightness of the screen display is uniform and stable.
[0074] The encapsulation layer 600 is disposed on a surface of the second electrode layer 230 away from the light-emitting functional layer 220, and covers the display area 10 and the frame area 20. The encapsulation layer 600 can be prepared by a thin film process, and is used to prevent water and oxygen from invading the display panel 1 from a layer of the second electrode layer 230, thereby extending the service life of the display panel 1.
[0075] Furthermore, in the thin film encapsulation process, the formation of the encapsulation layer 600 usually adopts chemical vapor deposition to deposit a continuous and complete inorganic material layer. However, due to the poor toughness of the inorganic material layer, it often breaks at the undercut structure 500. In order to prevent the inorganic material layer in the encapsulation layer 600 from breaking, the width W of the overlap between the shielding layer 520 and the second groove 510 in the undercut structure 500 (i.e., the width of the overlapped part of the orthographic projection of the shielding layer 520 and the orthographic projection of the second groove 510) is one third to one half of the overall depth D of the second groove 510 (i.e., the vertical distance between the shielding layer 520 and the auxiliary electrode layer 400), so that the continuity of the encapsulation layer 600 can be ensured while forming the shielding structure, thereby improving the encapsulation effect of the encapsulation layer 600.
[0076] The support column 700 is arranged between the pixel defining layer 300 and the light-emitting functional layer 220, and is used to support the distance between the display panel 1 and the other panels when the display panel 1 is assembled with the other panels, and provide a buffer space between the display panel 1 and the other panels to prevent the panels from colliding with each other and being damaged.
[0077] The present invention also provides a method for preparing a display panel 1, which is used to prepare the display panel 1 as described above. The preparation process of the method for preparing the display panel 1 is as follows: Figure 3 As shown, it includes steps S10-S50.
[0078] Step S10) preparing the array substrate 100:
[0079] The TFT (Thin Film Encapsulation) process is used to form Figure 4 The array substrate 100 shown in FIG. When preparing the second source-drain electrode layer 135 , a portion of the metal film layer is retained between two adjacent sub-pixels 11 and in the frame area 20 , thereby forming the auxiliary electrode layer 400 and the connecting wiring layer 800 .
[0080] Step S20) forming a first electrode layer 210 and a pixel defining layer 300:
[0081] The first electrode layer 210 is formed on the array substrate 100 through a pixel electrode process, and a layer of organic material is coated on the array substrate 100 and the first electrode layer 210 to form the pixel defining layer 300. A support column 700 is formed on the pixel defining layer 300.
[0082] The pixel defining layer 300 and the array substrate 100 are etched vertically by photolithography to form a Figure 5 The first groove 310, the second groove 510 and the third groove 900 are shown in FIG. Since the etching depths of the first groove 310, the second groove 510 and the third groove 900 are different, the array substrate 100 and the pixel defining layer 300 can be patterned by a half-tone mask process.
[0083] Step S30) forming an undercut structure 500:
[0084] A layer of inorganic material with a thickness of 0.1 micrometer to 10 micrometer is deposited on the pixel defining layer 300 to form a layer such as Figure 6 The inorganic material layer 520' shown in FIG. The inorganic material layer 520' covers the pixel defining layer 300, the first groove 310, the third groove 900 and part of the second groove 510, so that part of the sidewall of the second groove 510 is exposed, and the exposed sidewall and the shielding layer 520 are located on the same side of the second groove 510. The inorganic material may include at least one of silicon oxide, silicon nitride or silicon oxynitride.
[0085] like Figure 7 As shown, using O 2 The exposed sidewalls of the second groove 510 are horizontally etched by oxygen plasma, thereby widening the width of the second groove 510 and causing part of the inorganic material layer 520' to be suspended at the edge of the notch of the second groove 510 to form a shielding structure. Since the second flat layer and the pixel defining layer 300 in the array substrate 100 are organic materials, which have different material properties from the inorganic material layer 520', the inorganic material layer 520' will not be etched when widening the width of the second groove 510, thereby forming a suspended shielding structure.
[0086] Specifically, the etching width of the second groove 510 during the second horizontal etching is one third to one half of the etching depth of the second groove 510 during the first vertical etching, so that the width W of the overlap between the second groove 510 and the light-shielding layer is one third to one half of the depth D of the second groove 510.
[0087] The inorganic material layer 520' is patterned to form Figure 8 The shielding layer 520 is shown in FIG. The shielding layer 520 and the second groove 510 are combined to form the undercut structure 500 .
[0088] Step S40) forming the light-emitting functional layer 220 and the second electrode layer 230:
[0089] A layer of organic material is evaporated on the pixel defining layer 300 and in the first groove 310, the second groove 510 and the third groove 900 to form the light-emitting functional layer 220. A layer of conductive material is evaporated on the light-emitting functional layer 220 to form the second electrode layer 230. The evaporation range of the second electrode layer 230 is larger than the evaporation range of the light-emitting functional layer 220, so that the second electrode layer 230 can be electrically connected to the auxiliary electrode layer 400 in the second groove 510 and the connecting trace 800 in the third groove 900.
[0090] Step S50) Forming an encapsulation layer 600: depositing multiple layers of inorganic material and multiple layers of organic material on the second electrode layer 230 by a thin film encapsulation process, and the deposited materials cover the surface of the second groove 510 that is not covered by the second electrode layer 230, forming a Figure 1 The encapsulation layer 600 shown in the figure is continuous and completely covers the display panel 1.
[0091] The display panel and preparation method thereof provided in the embodiments of the present invention adjust the ratio between the blocked portion and the unblocked portion in the undercut structure, so that the undercut structure reaches a perfect state in which it can shield the second electrode layer and the light-emitting functional layer while also allowing the encapsulation layer to be completely covered. This solves the voltage drop problem in the second electrode layer while also ensuring the encapsulation effect of the encapsulation layer, thereby increasing the service life of the display panel.
[0092] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.
Claims
1. A display panel, characterized in that: It includes: An array substrate; An auxiliary electrode layer, disposed in the array substrate; A first electrode layer, disposed on the array substrate and electrically connected to the array substrate; A pixel defining layer, disposed on the array substrate and covering the first electrode layer; A first groove, penetrating the pixel defining layer to a surface of the first electrode layer; an undercut structure, provided in the pixel defining layer and the array substrate, and corresponding to the auxiliary electrode layer; A light-emitting functional layer is disposed in the first groove and extends from the first groove to the undercut structure; A second electrode layer is provided on the light-emitting functional layer and extends from the light-emitting functional layer to cover the auxiliary electrode layer in the undercut structure; An encapsulation layer, disposed on the second electrode layer and covering the exposed surface of the undercut structure; Wherein, the undercut structure comprises: A second groove, penetrating the pixel defining layer and a portion of the array substrate to a surface of the auxiliary electrode layer; A shielding layer, disposed on the pixel defining layer and shielding a portion of a notch of the second groove; The shielding layer and the second groove partially overlap in orthographic projection on the array substrate, and the width of the overlapping portion is one third to one half of the depth of the second groove.
2. The display panel according to claim 1, wherein: It has a display area and a frame area connected to the display area; The array substrate comprises: A substrate structure covering the display area and the frame area; An insulating structure, disposed on the substrate structure; A thin film transistor structure, disposed in the insulating structure and located in the display area; The auxiliary electrode layer and the thin film transistor structure have orthographic projections on the substrate structure that do not overlap; The undercut structure does not overlap with an orthographic projection of the first groove on the substrate structure.
3. The display panel according to claim 2, wherein: The insulating structure comprises: A first planar layer, disposed on the substrate structure; A second flat layer is disposed on a surface of the second flat layer away from the first flat layer, and the pixel defining layer is disposed on a surface of the second flat layer away from the first flat layer; The thin film transistor structure comprises: A source-drain electrode layer, disposed between the first planar layer and the second planar layer; The auxiliary electrode layer and the source-drain electrode layer are disposed on the same surface of the first planar layer.
4. The display panel according to claim 3, wherein: In the frame area, the display panel further includes: A connecting wire is provided in the array substrate and is provided together with the auxiliary electrode layer on the same surface of the first flat layer; A third groove, penetrating the pixel defining layer and the second planar layer to a surface of the connecting wiring; The second electrode layer extends from the display area to the frame area and is electrically connected to the connection line in the third groove.
5. The display panel according to claim 3, wherein: The second planar layer and the pixel defining layer both contain organic materials; The shielding layer contains inorganic materials.
6. The display panel according to claim 1, wherein: The thickness of the shielding layer is 0.1 micrometer to 10 micrometers.
7. The display panel according to claim 1, wherein: Also includes: The support column is arranged between the pixel defining layer and the second electrode layer.
8. A method for preparing a display panel, characterized in that: The following steps are involved: preparing an array substrate and an auxiliary electrode layer; Preparing a first electrode layer and a pixel defining layer on the array substrate; forming a first groove in the pixel defining layer and the array substrate; the first groove penetrates through the pixel defining layer to a surface of the first electrode layer; forming an undercut structure on the pixel defining layer and the array substrate; forming a light-emitting functional layer on the pixel defining layer and the array substrate; the light-emitting functional layer is disposed in the first groove and extends from the first groove to the undercut structure; forming a second electrode layer on the light-emitting functional layer; the second electrode layer is disposed on the light-emitting functional layer and extends from the light-emitting functional layer to cover the auxiliary electrode layer in the undercut structure; Wherein, the step of forming an undercut structure on the pixel defining layer and the array substrate includes: A second groove is formed in the pixel defining layer and the array substrate, wherein the second groove penetrates the pixel defining layer and a portion of the array substrate to a surface of the auxiliary electrode layer; an inorganic material layer is deposited on the pixel defining layer, wherein the inorganic material layer covers the pixel defining layer, the first groove and a portion of the second groove, so that a portion of the side wall in the second groove is exposed, and the exposed side wall and the shielding layer are located on the same side of the second groove; oxygen plasma is used to horizontally etch the exposed side wall of the second groove, thereby widening the width of the second groove, and a portion of the inorganic material layer is suspended at the notch edge of the second groove to form a shielding structure; the shielding layer and the second groove partially overlap in their orthographic projection on the array substrate, and the width of the overlapping portion is one third to one half of the depth of the second groove.
9. The method for preparing a display panel according to claim 8, wherein: The following steps are also included: A display area and a frame area are defined on the array substrate: forming a connecting wire in the array substrate in the border area, wherein the connecting wire is prepared simultaneously with the auxiliary electrode layer; A third groove is formed on the pixel defining layer and the array substrate in the border area.
10. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-7.
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