Methods of making dielectric thin films and devices having ultrahigh dielectric constant and / or ferroelectric remnant polarization and devices

Abstract

The application discloses a preparation method of a dielectric thin film and a device with super high dielectric constant and / or ferroelectric residual polarization intensity and the device. The method comprises the following steps: step a, forming a dielectric thin film on a substrate or a substrate with a second electrode; the dielectric thin film comprises Hf 1‑x Zr x O2 thin film which is a crystal or amorphous thin film; 0 2 Step b, forming a first electrode on the dielectric thin film; step c, dividing the first electrode into a plurality of discrete microstructures, and the lateral size of each microstructure is 1 nm to 50 microns; step d, annealing treatment, so that the low dielectric constant phase in the dielectric thin film is reduced and the high dielectric constant phase is increased. The dielectric thin film and the device with super high dielectric constant and / or ferroelectric residual polarization intensity provided by the method have the highest dielectric constant and ferroelectric residual polarization intensity which are greater than 921 and 404 muC / cm 2 respectively, high information storage density, can effectively reduce the operating voltage and leakage current of the device, and has good compatibility with the CMOS integrated process, and has good application prospect.

Description

Technical Field

[0001] This invention belongs to the field of microelectronics and solid-state electronics technology, and relates to High-k dielectric materials, specifically to a method for preparing dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization intensity, as well as the devices themselves. Background Technology

[0002] With the rapid development of the information age and the era of big data, the demand for data storage density has increased. For example, there is a need for better device miniaturization (3-5 nanometers), lower operating voltage, and lower power consumption for Complementary Metal-Oxide-Semiconductor (CMOS) logic devices. In the classic von Neumann architecture, Dynamic Random Access Memory (DRAM) is mainly used as the main memory in the memory hierarchy, featuring fast read / write speeds (~20ns) and high read / write cycles (>10). 15 Advantages include... As the demand for information grows exponentially, the lateral size reduction of DRAM memory cells has approached the process limit of 12nm in order to improve storage density. Further reduction requires a transformative change in the physical properties of storage materials. Therefore, it is necessary to develop new storage dielectric materials with higher dielectric constants (k) to store enough charge in small memory cells at technology nodes below 10nm for reliable bit operations by read / write circuits.

[0003] To overcome this technological bottleneck, high-k materials for use as dielectric films in next-generation DRAM capacitors have been extensively studied.

[0004] In the latest DRAM technology, ZrO2 / Al2O3 / ZrO2 (ZAZ) dielectric layers with a three-dimensional capacitor structure are used as high-k materials. Studies have shown that achieving an EOT < 0.5 nm is crucial for improving storage density. However, the minimum equivalent oxide thickness currently achievable from ZAZ dielectric films (EOT = 3.9 / k × t) remains limited. phy , t phy The physical thickness of the thin film is approximately 0.6 nm, which does not meet the requirements.

[0005] The EOT value of memory materials such as TiO2 and SrTiO3 can be reduced to... However, it has a low bandgap, which leads to a high leakage current problem, and this problem increases as the device size shrinks.

[0006] Due to its CMOS compatibility and wide bandgap, HZO(Hf) 1-x Zr xO2, 0 < x < 1) ultrathin film (~2 nm) has a high dielectric constant (~52) as a gate dielectric material, which can reduce EOT (~0.65 nm) and suppress the short-channel effect of CMOS nanodevices, reduce leakage current, and reduce the threshold voltage to 0.55 V and the operating voltage to 1.6 V [Cheema, SSet al., Nature 580, 478–482 (2020)], greatly improving the scalability of CMOS devices.

[0007] Common phase structures in HZO crystalline thin film materials include monoclinic phase (M phase, space group: P21 / c), tetragonal phase (T phase, space group: P42 / nmc), and orthorhombic phase (O phase, space group: P). ca 21), where the M phase is the most stable phase at room temperature, the T phase is the high-temperature phase, and the O phase is considered to be the ferroelectric phase. Typically, HZO polycrystalline thin films are a mixture of M, T, and O phases, exhibiting ferroelectric (FE) or antiferroelectric (AFE) properties at room temperature, with a dielectric constant generally varying in the range of 16-70. To significantly improve the dielectric constant of HZO, attempts have been made to stabilize its O and T phases and reduce the M phase by doping with different materials (such as Si, Er, Y, Al, etc.), thereby increasing the dielectric constant. Park et al. recently demonstrated that Hf treated with RTP (rapid thermal processing) can significantly improve the dielectric constant. 0.5 Zr 0.5 In O2 thin films, the dielectric constant is as high as 47 when the physical thickness is 6.5 nm, and the lowest EOT value is [value missing]. Moreover, for zirconium-rich Hf 0.3 Zr 0.7 O2 thin films have a higher dielectric constant, but their greater physical thickness (approximately 9.2 nm) diminishes the advantage of a high k-value. Additionally, HZO crystalline thin films exhibit ferroelectric remanent polarization (~20 μC / cm). 2 This technology can be applied to non-volatile ferroelectric memories. Generally, the greater the ferroelectric remanent polarization, the smaller the memory cell size can be, and the higher the storage density.

[0008] Furthermore, the dielectric constant of current HZO crystal thin films does not reach an ultra-high dielectric constant of over 100, and the ferroelectric remanent polarization generally does not exceed 40 μC / cm. 2 . Summary of the Invention

[0009] The purpose of this invention is to address the problems of insufficient dielectric constant, insufficient ferroelectric remanent polarization, insufficient device unit size, and high leakage current in current high-k dielectric thin films. This invention provides a method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization, and the resulting devices exhibiting a maximum dielectric constant and ferroelectric remanent polarization greater than 921 μC / cm and 404 μC / cm, respectively. 2 It has high information storage density and good compatibility with CMOS integration technology.

[0010] To achieve the above objectives, the present invention provides a method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization, comprising:

[0011] Step a, forming a dielectric thin film on a substrate or a substrate with a second electrode attached; the dielectric thin film contains Hf 1- x Zr x O2 thin film, which can be crystalline or amorphous; where 0 < x < 1;

[0012] Step b: Form a first electrode on the dielectric film;

[0013] Step c: Divide the first electrode into several discrete microstructures, each with a lateral dimension of 1 nm to 50 μm;

[0014] Step d, annealing, reduces the low dielectric constant phase and increases the high dielectric constant phase in the dielectric film, resulting in an average dielectric constant greater than 100 for the dielectric film.

[0015] Optionally, active ions are implanted into the dielectric film before step b and / or after step c.

[0016] Optionally, the active ion comprises any one or more of carbon, nitrogen, oxygen, boron, helium, phosphorus, iron, aluminum, zinc, cobalt, tin, nickel, titanium, silicon, argon, chlorine, bromine, sulfur, iodine, fluorine, hydrogen, silver, gold, copper, and platinum; the implantation dose of the active ion is 10. 10 -10 20 ions / cm 2 .

[0017] Optionally, the dielectric film may also be segmented into discrete microstructures.

[0018] Optionally, the segmentation includes etching.

[0019] Optionally, the lateral dimension of each microstructure is 1 nm to 1 μm.

[0020] Optionally, the annealing temperature is 300℃~900℃, and the annealing time is 1s~8h.

[0021] Optionally, the method further includes applying positive and negative electrical pulses to the annealed device.

[0022] Optionally, the thickness of the dielectric film is 0.5 nm to 50 nm.

[0023] Optionally, the Hf 1-x Zr x The O2 thin film is also doped with at least one of Si, Er, Y, and Al elements, with a doping concentration of 0-50 mol%.

[0024] Optionally, the Hf 1-x Zr x The methods for preparing O2 thin films include at least one of the following: sol-gel method, sputtering deposition method, pulsed laser deposition method, metal-organic chemical vapor deposition method, atomic layer deposition method, and ion beam evaporation method.

[0025] Optionally, the dielectric film further comprises: a low-k dielectric material layer, the low-k dielectric material layer being in contact with the Hf 1-x Zr x O2 thin films are used in combination.

[0026] Optionally, the method further includes: processing the annealed device to remove the first electrode and the substrate, thereby obtaining a dielectric thin film with ultra-high dielectric constant and / or ferroelectric remanent polarization.

[0027] The present invention also provides a device prepared by the above-described preparation method, characterized in that the device comprises: a substrate or a substrate with a second electrode attached, a dielectric thin film, and a first electrode;

[0028] The dielectric thin film contains Hf 1-x Zr x O2 thin film, which can be crystalline or amorphous; where 0 < x < 1;

[0029] The first electrode comprises several discrete microstructures, or both the first electrode and the dielectric thin film comprise several discrete microstructures; the lateral dimension of each microstructure is 1 nm to 50 nm. μ m.

[0030] Optionally, the device includes any one or more of the following: supercapacitor, CMOS device, dynamic random access memory (DRAM), charge trapping memory device, 3D NAND flash memory, and non-volatile ferroelectric memory (FRAM or FeFET).

[0031] Beneficial effects of the present invention

[0032] 1) In this invention, the HZO thin film exhibits a high dielectric constant (greater than 100) as the size of the first electrode shrinks after ion implantation and rapid annealing, which can significantly reduce EOT and increase the charge storage capacity by at least 10 times for the same size. In practical applications, the thickness of the dielectric layer can be appropriately increased to obtain lower leakage current, lower operating voltage, longer information retention time, and higher read / write cycles.

[0033] 2) The present invention further improves the dielectric constant of the dielectric film by etching the dielectric film into discrete microstructures and promoting the transformation of the low dielectric constant phase to the high dielectric constant phase in the dielectric film through the size effect.

[0034] 3) The present invention further promotes the transition from a low dielectric constant phase to a high dielectric constant phase in the dielectric film by adjusting the process, such as implementing an annealing process and / or applying an electrical pulse, thereby increasing the dielectric constant of the dielectric film to over 900, i.e., generating a giant dielectric constant effect, and exhibiting ultra-high specific capacitance and charge storage density, which can effectively reduce the operating voltage and leakage current of DRAM and CMOS devices.

[0035] 4) The ultra-high dielectric constant dielectric thin film of the present invention demonstrates, for example, that the charge density remains stable at 100 μC / cm at 1.2V. 2 The number of cycles exceeds 10 12 Without causing dielectric breakdown, by adjusting process parameters and the size effect of capacitors, the dielectric constant of HZO crystal thin films with all-O phase grains can exceed 2400, far surpassing the performance indicators of existing supercapacitors, and with low energy consumption.

[0036] 5) This invention discovers that HZO material belongs to pseudoferroelectrics, i.e., electrets. Therefore, the ferroelectric remanent polarization intensity can be increased by more than 20 times (~404 μC / cm) through size effects and microelectronic processes, reaching more than 20 times that of conventional materials. 2 It can be applied to non-volatile high-density ferroelectric memories with metal / HZO / metal architecture.

[0037] 6) The dielectric thin film and device with ultra-high dielectric constant and ferroelectric remanent polarization intensity of the present invention can be widely used in devices such as supercapacitors, CMOS devices, dynamic random access memory (DRAM), charge trapping devices, three-dimensional stacked flash memory (3DNAND), and non-volatile ferroelectric memory (FRAM and FeFET). Attached Figure Description

[0038] Figure 1 This is a schematic diagram showing the fabrication state of the TiN-HZO-TiN capacitor according to Embodiment 1 of the present invention.

[0039] Figure 2a , Figure 2bThe graphs show the changes in dielectric constant and loss as a function of frequency (f) for TiN / HZO / TiN thin film capacitors of different sizes prepared using the method of Example 1.

[0040] Figures 3a-3c This is a schematic diagram illustrating the giant dielectric effect induced in a small-sized capacitor prepared using the method of Example 1 by applying an electrical pulse technique.

[0041] Figure 4a -c is a comparison graph showing the changes in charge density in the capacitor before and after the giant dielectric effect is induced by the electric pulse technique (before and after the electric pulse is applied).

[0042] Figures 5a-5c This is a comparison of the changes in charge density in a capacitor with applied voltage after inducing the giant dielectric effect using electrical pulse technology.

[0043] Figures 6a-6c This is a high-precision transmission electron microscopy (HAADF-STEM) image of the crystal structure of the dielectric thin film before and after fatigue. Before fatigue, the film contains high-dielectric-constant O-phase grains intercalated with low-dielectric-constant M-phase grains. Figure 6a After fatigue, the embedded M phase disappears. Figure 6b and Figure 6b' This leads to a sharp increase in the overall dielectric constant of the thin film. The total amount of M, O, and T grains does not change significantly before and after fatigue. Figure 6c ).

[0044] Figure 7 This is a schematic diagram showing the fabrication process of a TiN-HZO-TiN capacitor as described in Example 2.

[0045] Figure 8 Small-angle X-ray diffraction (XRD) patterns of TiN / HZO / TiN thin-film capacitors of different sizes prepared using the method of Example 2. As the lateral size of the HZO thin-film device decreases, the content of the high-dielectric-constant O phase gradually increases.

[0046] Figures 9a-9c This is a schematic diagram of the giant polarization intensity of the TiN / HZO / TiN capacitor caused by ion implantation and size effects in the electrode edge region in Example 2, showing the ferroelectric hysteresis loops of electric displacement-electric field (DE) at different sizes. Figure 9a The charging and discharging current of reversible and non-reversible domains varies with time under different applied voltages. Figure 9b ) and their polarization intensity (P sw and P nsw Changes with holding time ( Figure 9c The test frequency for the DE hysteresis loop is 1MHz.

[0047] Figure 10This is a schematic diagram of the fabrication state of a TiN-HZO gate dielectric layer in Example 3.

[0048] Figure 11 This is a schematic diagram of the fabrication state of a TiN-HZO gate dielectric layer in Example 4.

[0049] Figure 12a , Figure 12b These are schematic diagrams illustrating the effective capture of electrons or holes by TiN / HZO / Si3N4 / TiN multilayer capacitors using ultra-high dielectric constant / low dielectric constant under positive and negative writing electric fields.

[0050] Figure 13 This is a schematic diagram of the structure of a TiN / HZO / Si3N4 / HZO / TiN multilayer capacitor.

[0051] Attached image labels:

[0052] Substrate 101, first electrode 102A, second electrode 102B, HZO thin film 103, mask 104, active ions 105, low dielectric constant Si3N4 thin film 106. Detailed Implementation

[0053] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0054] In the description of this invention, it should be noted that the terms "upper" and "lower," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0055] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0056] The term "discrete microstructure" as used in this paper refers to microstructures distributed in the form of isolated islands, unconnected to each other, and which can be uniform or non-uniform. The lateral dimensions of the microstructures range from 1 nm to 50 μm, and the size of each microstructure can be the same or different. The pattern of each microstructure is selected from at least one of squares, trapezoids, triangles, circles, etc., and can also be irregular. Microstructures on the same electrode and / or dielectric film can be the same or different.

[0057] The “giant dielectric effect” and “giant ferroelectric effect” mentioned in this article refer to the phenomenon that the dielectric constant and the ferroelectric remanent polarization intensity increase sharply after ion implantation of the dielectric film before the deposition of the first electrode, followed by etching of the first electrode or the dielectric film and rapid annealing.

[0058] The term "superdielectric constant" as used in this article refers to a dielectric constant k greater than 100, and "superferroelectric effect" refers to a dielectric constant k greater than 100 and a ferroelectric remanent polarization greater than 40 μC / cm. 2 .

[0059] The term "giant dielectric constant" as used in this article refers to a dielectric constant k greater than 900, and "giant ferroelectric effect" refers to a ferroelectric remanent polarization greater than 400 μC / cm. 2 .

[0060] In this article, "low-k dielectric material" refers to a dielectric constant k < 20, typically 3 to 9; "high dielectric constant" refers to a dielectric constant k > 20.

[0061] DRAM cells consist of transistors and capacitors, where transistors act as memory cell selectors, and data is stored in the capacitor cells as electrical charges. As capacitor size shrinks, the amount of charge stored within them decreases. Maintaining a sufficiently high critical charge number using conventional ZrO2 / Al2O3 / ZrO2 or ZrO2 / Al2O3 dielectric layers becomes difficult to achieve a sufficiently high read margin over thermal noise or other parasitic capacitances. The minimum equivalent oxide thickness (EOT) of these conventional dielectric stacks is approximately [missing information]. However, future DRAM technology requires further reductions in EOT (below). The leakage current is also required to be within an acceptable range (<10). -7 A / cm 2 ).

[0062] HZO materials possess numerous advantages, such as a large bandgap (>5 eV), extremely thin thickness (<1 nm), good electrical reliability and durability, compatibility with CMOS integrated circuit processes, and the ability to grow and fill gaps in three-dimensional space. They also hold many potential applications, including ferroelectric field-effect transistors (FeFETs), ferroelectric random access memories (FRAMs), negative capacitors, logic devices, and synaptic devices. Studies have shown that HZO possesses metastable high-k phases, such as the ferroelectric O phase (k value 25-30) and the antiferroelectric T phase (k value 35-40). However, the most stable phase in HZO at room temperature is the M phase, which has a relatively low k value (<20). Attempts have been made to stabilize the high-k phases (such as the O and T phases) in HZO using post-metallization thermal annealing techniques such as rapid thermal annealing (RTP) or high-voltage metallization post-annealing (HPPMA), but the k value remains low compared to other dielectrics (such as TiO2 and SrTiO3).

[0063] This invention promotes the transformation of the low dielectric constant phase to the high dielectric constant phase in HZO thin films through ion implantation and device size effect, which enables HZO thin films to exhibit ultra-high dielectric constant and ultra-high ferroelectric remanent polarization intensity, and can significantly reduce EOT. The charge capacity stored in the memory cell of the same size can be increased by at least 10 times.

[0064] To increase the content of high-dielectric-constant phases in HZO thin films and achieve an average dielectric constant greater than 100 and a ferroelectric remanent polarization greater than 40 μC / cm, 2 The present invention can implement any one or any two or more of the following methods:

[0065] 1) Ion implantation is performed on the entire amorphous or crystalline HZO dielectric film to form the first electrode;

[0066] 2) Active ions are implanted into the Hf region at the edge of the first electrode via ion implantation. 1-x Zr x In O2 thin film;

[0067] 3) Utilize the size effect to fabricate discrete microstructures of the upper electrode or upper electrode / dielectric thin film;

[0068] 4) By applying positive and negative electrical pulses, the phase with low dielectric constant is transformed into the phase with high dielectric constant;

[0069] 5) Improve the content of high dielectric constant phase by optimizing the preparation method of HZO crystal thin film;

[0070] 6) Annealing process transforms the low dielectric constant phase into the high dielectric constant phase.

[0071] It should be noted that different combinations of technical means may result in an extremely high or very high dielectric constant, while the ferroelectric remanent polarization is relatively small; or the ferroelectric remanent polarization may be extremely high, while the dielectric constant does not reach an extremely high level.

[0072] To obtain higher dielectric constants and greater ferroelectric polarization, the above-mentioned techniques can also be implemented simultaneously.

[0073] In some embodiments, the present invention provides a method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization, comprising the following steps:

[0074] Step a, forming a dielectric thin film on a substrate or a substrate with a second electrode attached; the dielectric thin film contains Hf 1- x Zr x O2 thin film, which can be crystalline or amorphous; where 0 < x < 1;

[0075] Step b: Form a first electrode on the dielectric film;

[0076] Step c: Divide the first electrode into several discrete microstructures, each with a lateral dimension of 1 nm to 50 μm;

[0077] Step d, annealing, reduces the low dielectric constant phase and increases the high dielectric constant phase in the dielectric film, resulting in an average dielectric constant greater than 100 for the dielectric film.

[0078] In some embodiments, before step b, active ions are implanted into the entire dielectric film, which is more preferably amorphous. Ion implantation improves the dielectric and ferroelectric properties of the dielectric film. To obtain higher dielectric constants and ferroelectric remanent polarization, active ions can also be implanted into the dielectric film at the edge of the first electrode after step c (before step d).

[0079] In some embodiments, active ions may not be injected before step b, but rather before the annealing process.

[0080] The active ions comprise any one or more of the following: carbon, nitrogen, oxygen, boron, helium, phosphorus, iron, aluminum, zinc, cobalt, tin, nickel, titanium, silicon, argon, chlorine, bromine, sulfur, iodine, fluorine, hydrogen, silver, gold, copper, and platinum; the implantation dose of the active ions is 10. 10 -10 20 ions / cm 2 .

[0081] Ion implantation methods include, but are not limited to, ion implanters and reactive ion etching (ICP, RIE) machines commonly used in microelectronic processes.

[0082] To facilitate the transition from a low-dielectric-constant phase to a high-dielectric-constant phase in the dielectric film, the dielectric film can be segmented into discrete microstructures, specifically, the stack of the first electrode and the dielectric film can be segmented into discrete microstructures. This segmentation includes etching, which can employ conventional microelectronic dry or wet etching processes, including but not limited to reactive ion etching (RIE), plasma etching (ICP), and chemical solution etching (SC-1 solution etching).

[0083] Since the smaller the lateral dimension, the greater the dielectric constant and ferroelectric remanent polarization, the lateral dimension of each microstructure can be adjusted to 1 nm to 1 μm to obtain dielectric films with giant dielectric constant and giant ferroelectric polarization.

[0084] To facilitate the transformation from a low-dielectric-constant phase to a high-dielectric-constant phase in the dielectric thin film, the device after microstructure formation can be subjected to rapid high-temperature annealing. Annealing processes include, but are not limited to, tube furnace annealing, rapid thermal annealing (RTP), high-voltage metallization post-annealing (HPPMA), microwave annealing (MVA), and laser annealing. In some embodiments, the annealing is performed in a protective atmosphere such as nitrogen or argon, at an annealing temperature of 300℃ to 900℃, and for an annealing time of 1 second to 8 hours.

[0085] In some embodiments, the protective atmosphere for the annealing process is nitrogen, the annealing temperature is 500℃~600℃, and the time is 35s~2h. In some embodiments, rapid high-temperature annealing is used, and the annealing time is 30s~60s.

[0086] The thickness of the dielectric film is preferably 0.5 nm to 50 nm. In practical applications, the thickness of the dielectric film can be appropriately increased within this range to obtain lower leakage current, lower operating voltage, longer information retention time, and higher read / write cycles, thus broadening the application range of the ultra-high dielectric constant dielectric film of this invention.

[0087] In some embodiments, to further improve the dielectric constant of the dielectric film, the content of the high-dielectric-constant O phase can be increased by optimizing the HZO film preparation process during the formation of the HZO film on the substrate. The preparation process of this HZO film includes, but is not limited to, sol-gel methods, sputtering deposition, pulsed laser deposition, metal-organic chemical vapor deposition, atomic layer deposition, and ion beam evaporation.

[0088] To further improve the performance of the HZO thin film, the HZO thin film is prepared by atomic layer deposition, and after preparation, it is also subjected to metallization followed by thermal annealing.

[0089] The HZO thin film comprises: an HZO thin film with a stacked structure formed by alternating growth of HfO2 and ZrO2, or Hf 1-x Zr xO2 composite thin films, or other ion-doped Hf 1-x Zr x O2 composite film.

[0090] The HZO thin film may also be doped with one or more elements including, but not limited to, Si, Er, Y, and Al, with a doping concentration of 0-50 mol%.

[0091] In some embodiments, the dielectric film further comprises other dielectric materials. That is, the HZO film can be used alone or in combination with other dielectric materials in a stack to improve the dielectric constant of the stacked dielectric film, and can be applied to CMOS gate dielectric materials, DRAM, or other supercapacitors. In some embodiments, the other dielectric materials can be low-k dielectric material layers, such as SiO2, Si3N4, etc.

[0092] In some embodiments, the method further includes applying positive and negative electrical pulses to the device after the annealing process in step d to further induce the low dielectric constant phase to transform into a high dielectric constant phase in the dielectric film.

[0093] The substrate can be a silicon substrate, a silicon substrate coated with SiO2, or other conventional substrates.

[0094] The materials for the first and second electrodes can be selected from, but are not limited to, any one or more of TiN, W, Al, n / p-Si, PtSi, Mo, Cu, Co, Ta, Ru, Ir, Ti, Cr, etc.

[0095] Using the above method, the present invention provides a dielectric thin film and device with ultra-high dielectric constant and / or ferroelectric remanent polarization. The dielectric thin film with ultra-high dielectric constant and ferroelectric remanent polarization has been treated by any one or more of the above-described methods, such as ion implantation, etching into island-like microstructures, annealing, and positive / negative pulse processing. The device comprises, in sequence, a substrate, a dielectric thin film with ultra-high dielectric constant and ferroelectric remanent polarization, and a first electrode; the first electrode comprises several discrete microstructures, or both the first electrode and the dielectric thin film comprise several discrete microstructures; the lateral dimension of each microstructure is 1 nm to 50 μm.

[0096] In some embodiments, a second electrode is attached to the substrate, which is located between the substrate and the dielectric film.

[0097] The device includes any one or more of the following: supercapacitor, CMOS device, dynamic random access memory (DRAM), charge trapping memory device, 3D NAND flash memory, and non-volatile ferroelectric memory (FRAM or FeFET).

[0098] The following example demonstrates the effect of the lateral dimensions of the first electrode of the capacitor on the dielectric constant and ferroelectric remanent polarization of the dielectric film by etching the first electrode with different lateral dimensions and performing ion implantation on the edge region of the electrode, combined with high-temperature rapid annealing.

[0099] Example 1

[0100] like Figure 1 The diagram shown is a schematic representation of the fabrication process of a TiN-HZO-TiN capacitor.

[0101] First, a TiN-HZO-TiN thin film sandwich structure is provided: an HZO thin film 103 (which can be crystalline or amorphous) is prepared on a Si substrate 101 with a TiN electrode (second electrode 102B) using atomic layer deposition, and then a TiN layer is grown as the first electrode 102A using physical vapor deposition.

[0102] In step S1, photoresist is spin-coated onto the surface of the first electrode 102A, and square patterns of different sizes are formed by optical exposure or electron beam exposure. Then, a layer of metal Cr is grown by thermal evaporation, and the metal Cr in the unexposed area is removed by lift-off process, leaving the square pattern area covered by Cr mask 104.

[0103] In step S2, the first electrode 102A in the area not covered by the Cr mask 104 is removed by reactive ion etching (RIE), and active ions 105 are implanted into the HZO in the electrode edge area. The first electrode 102A in the remaining Cr mask 104 covered area and the second electrode 102B form TiN-HZO-TiN capacitors with different sizes (200nm~50μm).

[0104] In step S3, the Cr mask is removed by wet etching, and then the sample is placed in an N2 atmosphere and annealed at 500℃~600℃ for 30s~60s using a rapid thermal annealing process to prepare a capacitor with a dielectric thin film containing ultra-high dielectric constant and ferroelectric remanent polarization.

[0105] In this example, the HZO thin film is Hf 0.5 Zr 0.5 O2 thin film. TiN / Hf 0.5 Zr 0.5 The first electrode of the O2 / TiN sandwich structure film, TiN, is etched into an island-like square pattern, forming a capacitor structure of varying sizes with the second electrode, TiN. The HZO film at the electrode edge region is then treated with active ions (O2 in this example). 2- S 6+ and F- Injection, the total injection dose is approximately 10 16 ions / cm 2 Then, it is rapidly annealed at 550℃ for 40 seconds, where Hf 0.5 Zr 0.5 The O2 film was 10 nm thick, and its dielectric constant and loss were measured as a function of frequency.

[0106] like Figure 2a , Figure 2b As shown, the dielectric constant and loss of TiN / HZO / TiN thin film capacitors of different sizes prepared using the method of Example 1 vary with frequency (f). It was found that the smaller the lateral dimension of the first electrode, the larger the dielectric constant; when the dimension is 5.2 μm, the dielectric constant can exceed 100 (f / f). Figure 2a At a frequency of 1 MHz, when the lateral dimension of the first electrode is reduced from 32 μm to 5.2 μm, the dielectric constant monotonically increases from 30 to 132, proving that reducing the size of the first electrode can effectively improve the dielectric constant of the HZO thin film. Simultaneously, a broad dielectric loss peak appears near 20 kHz. Figure 2b When rectangular electrical pulses of ±4V / 500ns are continuously applied to capacitors with lateral dimensions of 4.4μm and 5.4μm for the first electrode, the number of pulses applied is 1.01×10⁻⁶. 7 and 4.16×10 7 Subsequently, it was found that the ferroelectric remanent polarization of the fatigued capacitor suddenly decreased to 0, while the dielectric constant of the sample increased sharply, reaching 921 and 597 at 1 MHz, respectively. Figure 2a This results in a giant dielectric effect, and the dielectric loss peak near 20kHz also disappears. Figure 2b It is evident that by utilizing the device size effect and combining it with the excitation of an external electrical pulse, Hf can be promoted. 1-x Zr x The O2 thin film steadily transitions from a low dielectric constant phase to a high dielectric constant phase, resulting in a significant increase in the dielectric constant of a 4.4 μm capacitor at 1 MHz from the original 30 to 921.

[0107] In some embodiments, the embodiment 1 is also described. Figure 1 The capacitor prepared by the process shown is subjected to positive and negative electrical pulses, which further induces the transformation of the low dielectric constant phase to the high dielectric constant phase, resulting in a giant dielectric constant in the HZO thin film. The capacitor structure generating the giant dielectric constant is TiN / HZO / TiN, with an HZO thin film thickness of 10 nm, a first electrode TiN lateral dimension less than 10 μm, a dielectric constant of 800–1400, and an O phase content of 38%.

[0108] like Figures 3a-3cIt demonstrates that applying electrical pulses can also induce the use of... Figure 1 The process shown demonstrates the giant dielectric effect observed in small-sized capacitors, proving that the ultra-high dielectric constant dielectric thin film obtained by the method of this invention can be applied to high-density energy storage. In this example, another TiN / Hf... 0.5 Zr 0.5 The first electrode of the O2 / TiN thin film, TiN, is etched into a non-connected square pattern with a lateral dimension of 4.4 μm. Ion implantation (O2 in this example) is performed on the HZO thin film at the electrode edge region. 2- S 6+ and F - The injection dose is 10. 16 ions / cm 2 Then, it was rapidly annealed at 550℃ for 60s, followed by the application of ±4V / 500ns electrical pulses at a frequency of 1MHz, while simultaneously measuring the change in the DE ferroelectric hysteresis loop with the number of applied pulses. Figure 3a It was found that when the number of applied pulses was 1.01 × 10⁻⁶, 7 At this time, the ferroelectric hysteresis loop suddenly transforms into a linear dielectric loop, that is, the ferroelectricity disappears, which causes the low dielectric constant phase in the thin film to transform into the high dielectric constant phase, and at the same time, the giant dielectric effect is generated. Figure 3b The changes in ferroelectric remanent polarization intensity of capacitors with lateral dimensions of 4.4 μm and 5.4 μm as a function of the number of applied pulses are shown, at 1.01 × 10⁻⁶. 7 and 4.16×10 7 The number of cycles then drops to 0. These experimental results indicate that the smaller the capacitor size, the fewer the number of electrical pulse cycles required to generate giant dielectric, while simultaneously increasing the dielectric constant. Figure 3c The changes in energy storage density of capacitors with dimensions of 4.4μm and 5.4μm after fatigue with the applied electric field demonstrate that the larger the absolute value of the applied electric field, the greater the stored energy density.

[0109] Figures 4a-4c This demonstrates the change in charge density in a capacitor before and after applying an electric pulse to induce the giant dielectric effect. Figure 4a The TiN / Hf material with a size of 4.4 μm prepared using the method of Example 1 is shown. 0.5 Zr 0.5 The equivalent circuit for measuring O2 / TiN capacitors is as follows: an HZO capacitor is connected in series with a 1MΩ resistor, an applied electrical pulse width of 5ms is applied, and the applied voltage (V) is gradually increased from 0.2V to 2V in 0.2V steps. Figure 4b , Figure 4c The changes in the charging current of the capacitor before and after the application of an electrical pulse are displayed over time. Figure 4b Before the electrical pulse is applied, Figure 4cThis represents the state after an electrical pulse is applied. The charging charge density (P) is obtained by integrating the current over time. nsw The change in dielectric constant with applied voltage is shown. Based on the slope of the fitted solid line of the above curves, the change in dielectric constant before and after fatigue (before and after applying the electric pulse) differs by approximately 6 times, proving that applying an electric pulse can significantly increase the charge density of the capacitor.

[0110] Figures 5a-5c This demonstrates the change in charge density in a capacitor with applied voltage after inducing the giant dielectric effect using an electric pulse technique. Figure 5a TiN / Hf with a size of 4.4 μm was prepared using the method of Example 1. 0.5 Zr 0.5 The equivalent circuit for measuring O2 / TiN capacitors is as follows: an HZO capacitor is connected in series with a 100Ω resistor, an applied electrical pulse width of 100ns is applied, and the applied voltage (V) is gradually increased from 0.2V to 2V in steps of 0.2V. Figure 5b The display shows that the charging current of the capacitor after fatigue changes over time, and its charging current is significantly higher than that of the capacitor after fatigue. Figure 4b By integrating the current over time, the charge density (P) of the capacitor under different voltages can be obtained. nsw ). Figure 5c The capacitor's charge density remains relatively stable with increasing charging cycle count. This is achieved using an applied rectangular pulse voltage / pulse width of + / - 1.2V / 50ns and a repetition period of 10MHz. At 1.2V, the charge density reaches 100μC / cm³. 2 And it stabilizes to 10 after a number of charge-discharge cycles. 12 The absence of electrical breakdown demonstrates its applicability in fields such as DRAM, improving the scalability of memory cells (<10nm). In practical applications, the thickness of the dielectric film can be appropriately increased to achieve lower leakage current, lower operating voltage, longer information retention time, and higher read / write cycles.

[0111] Figures 6a-6c This study presents high-resolution transmission electron microscopy (TEM) imaging analysis of the crystal structure of dielectric thin films before and after fatigue, demonstrating the changes in the crystal structure of dielectric thin films before and after inducing the giant dielectric effect using electrical pulse technology. Figure 6a To adopt Figure 1 High-angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) imaging analysis of typical O-phase grains in a 5.7 μm TiN / HZO / TiN capacitor structure HZO crystal film prepared by the method revealed that before fatigue, the O-phase grains contained embedded M-phase flakes with low dielectric constants, resulting in a significant decrease in the overall dielectric constant of the film, with a ferroelectric remanent polarization of 6.17 μC / cm. 2 (See Figure 6c (Left image in the image). Figure 6bThis is a HAADF-STEM image of a typical O-phase grain in a HZO crystal film after fatigue (after applying an electric pulse). It shows that the low-dielectric-constant M-phase embedded in the O-phase grain has disappeared and has been completely transformed into the O phase. The ferroelectric remanent polarization is 0 μC / cm. 2 (See Figure 6c (As shown in the right figure), this leads to a sharp increase in the overall dielectric constant of the thin film and generates a giant dielectric effect. Figure 6b' As shown, the electron diffraction spots of the O-phase grains after Fourier transform after fatigue all show orthorhombic phase (i.e., O phase). Figure 6c The image shows a comparison of the sample composition analysis of the dielectric thin film before and after fatigue. Measurements of the 33% identifiable main crystalline phase content revealed that the content of the O-phase-dominated grains remained essentially unchanged, consistently around 38%. This demonstrates that applying an electrical pulse can increase the purity of the O-phase-dominated grains, meaning that the M-phase is transformed into the O-phase.

[0112] The following, in conjunction with Example 2, demonstrates that the proportion of the O phase in the HZO film can be controlled by etching the lateral dimensions of the stack of the first electrode 102A and the HZO film 103, thereby promoting the transformation of the low dielectric constant phase to the high dielectric constant phase in the film.

[0113] Example 2

[0114] like Figure 7 The diagram shown illustrates the fabrication process of another TiN-HZO-TiN capacitor. Except for step S2, which involves etching the TiN / HZO stack, all other steps are identical to those in Example 1.

[0115] In this embodiment, TiN / Hf is first grown on a silicon substrate. 0.5 Zr 0.5 An O2 / TiN sandwich structure film was formed, and then the TiN / HZO stack was etched into an isolated capacitor structure with a size of less than 10 μm. This was followed by rapid thermal annealing (550℃) for 50 s in a nitrogen atmosphere, and then the top TiN electrode (first electrode) was etched away using SC-1 cleaning solution. A wavelength of [wavelength missing] was used. X-ray diffraction test results of HZO crystalline thin films of different sizes measured at 0.45° grazing incidence using a synchrotron radiation source are as follows: Figure 8As shown, the continuous HZO crystalline thin film mainly consists of T phase and O phase, with no M phase. The percentage of O phase content was obtained by Gaussian fitting of the O(111) and T(011) diffraction peaks at 2θ = 24.24° and 24.51°. After etching into capacitors of different sizes, the proportion of O phase grains increased significantly with the reduction of the lateral size of the HZO crystalline thin film. When the size was reduced to 300 nm, the proportion of O phase could reach as high as 99%, and almost all of the T phase in the HZO crystalline thin film was converted into O phase. When the capacitor size was less than 300 nm, the low dielectric constant tetragonal / monoclinic phase could be completely converted into orthorhombic phase, the O phase content in the HZO crystalline thin film approached 100%, and the dielectric constant of the HZO crystalline thin film could be greater than 2400. It is evident that ion implantation, reduction of the lateral size of the first electrode and the HZO thin film, and rapid annealing processes can effectively improve the dielectric constant and ferroelectric polarization of HZO.

[0116] In some embodiments, ferroelectric remanent polarization is further enhanced by ion implantation. Unannealed amorphous or crystalline hafnium oxide thin-film capacitors are etched into isolated capacitors using a plasma etching machine. Using a mixed atmosphere of SF6 and O2, etching is performed at a power of 50–100 W for 1–5 min. Under the bombardment of reactive ions, a large number of active ions are implanted into the HZO thin film at the electrode edge. The entire capacitor is then rapidly annealed at 550 °C for 30 s. The small-sized HZO thin-film capacitors not only exhibit a very high dielectric constant but also a very high ferroelectric remanent polarization.

[0117] Figures 9a-9c This embodiment demonstrates that the remanent polarization intensity within the TiN / HZO / TiN multilayer capacitor increases sharply with decreasing lateral size of the HZO film, reaching 404 μC / cm at 0.3 μm. 2 ( Figure 9a It has a polarization intensity more than 20 times that of conventional HZO, and can be applied to non-volatile ferroelectric memories, which can significantly improve the number of read charges or information storage density of the memory. Figure 9b The display shows that after applying a - / +3V write voltage, the memory read current changes over time at different read voltages, with a read voltage change step of 0.2V. The domain reversal polarization intensity (P) at different read voltages can be calculated by integrating the read current over time. sw ) and domain non-reversal polarization intensity (P nsw ). Figure 9b The display shows the 3V read voltage P obtained after writing information "1" and "0". sw and P nsw The relationship between P and retention time sw and P nsw The difference can be used to identify the logic "1" and "0" information stored in TiN / HZO / TiN capacitors.

[0118] Therefore, the dielectric thin film with ultra-high dielectric constant and ferroelectric polarization intensity provided by the present invention can be applied to high-density integrated non-volatile / volatile memories and very large-scale logic devices, and has advantages such as low-voltage operation.

[0119] Example 3

[0120] like Figure 10 The diagram shows a schematic representation of the fabrication process of a TiN-HZO gate dielectric layer. In this example, the Si substrate 101 does not have a TiN lower electrode (second electrode 102B), and an amorphous HZO thin film 103 is directly fabricated on the Si substrate 101. Then, the entire HZO thin film is ion implanted (in this example, O2). 2- S 6+ and F - The injection dose is 10. 16 ions / cm 2 Subsequently, a TiN layer was grown using physical vapor deposition as the first electrode 102A.

[0121] In step S1, photoresist is spin-coated onto the surface of the first electrode 102A, and square patterns of different sizes are formed by optical exposure or electron beam exposure. Subsequently, a layer of metallic Cr is grown using a thermal evaporation process, and the metallic Cr in the unexposed areas is removed using a lift-off process, leaving the square patterned areas covered by a Cr mask 104. Using the same steps S1-S3 as in Example 1, the first electrode 102A is etched into discrete microstructures to obtain a TiN-HZO gate dielectric layer.

[0122] In step S2, the first electrode 102A in the area not covered by the Cr mask 104 is removed by reactive ion etching (RIE) and the first electrode 102A is etched into discrete microstructures to obtain the TiN-HZO gate dielectric layer.

[0123] In step S3, the Cr mask is removed by wet etching, and then the sample is placed in an N2 atmosphere and annealed at 500℃~600℃ for 30s~60s using a rapid thermal annealing process to prepare a capacitor with a dielectric thin film containing ultra-high dielectric constant and ferroelectric remanent polarization.

[0124] Example 4

[0125] like Figure 11 The diagram shows another fabrication state of the TiN-HZO gate dielectric layer. In this example, the Si substrate 101 does not have a TiN lower electrode (second electrode 102B), and an HZO thin film 103 is directly fabricated on the Si substrate 101. Subsequently, a TiN layer is grown as the first electrode 102A using a physical vapor deposition process.

[0126] Steps S1-S3 are the same as in Example 3, except that the first electrode 102A and the HZO thin film are etched into discrete microstructures to obtain the TiN-HZO gate dielectric layer.

[0127] The use of ultrathin and ultra-high dielectric constant HZO gate dielectric materials provides a new alternative material and device for future silicon transistors, overturning the properties of existing traditional high-k dielectric materials and having a significant impact on the entire microelectronics industry. Compared to other conventional stacked dielectrics of similar thickness such as HfO2, AFE-ZrO2, and FE-Zr:HfO2, the ultra-high dielectric constant dielectric film of this invention exhibits ultra-high specific capacitance and charge storage density, effectively reducing the operating voltage and leakage current of DRAM and CMOS devices.

[0128] Example 5

[0129] Using the same method as in Example 1, except that after forming an HZO thin film 103 on the second electrode 102B, a low-dielectric-constant Si3N4 thin film 106 is also formed, and a TiN layer is grown as the first electrode 102A using physical vapor deposition. In this example, the dielectric film includes both an HZO thin film and a Si3N4 thin film, and the resulting capacitor is a TiN / HZO / Si3N4 / TiN multilayer capacitor, such as... Figure 12a As shown.

[0130] Figure 12a , Figure 12b The demonstration uses a TiN / HZO / Si3N4 / TiN multilayer capacitor with ultra-high dielectric constant / low dielectric constant to achieve effective capture of electrons or holes under positive and negative writing electric fields. This proves that the combination of HZO thin film treated by the method of the present invention and low dielectric constant material can be applied to non-volatile information storage, greatly reducing the erase and write voltage, such as for charge-capture memory.

[0131] To further improve the latching capability of the captured charge, in some embodiments, an HZO film is deposited on the low dielectric constant Si3N4 film 106 in Example 5 to obtain a TiN / HZO / Si3N4 / HZO / TiN multilayer capacitor, such as... Figure 13 As shown.

[0132] In summary, this invention, through microelectronic device etching processes combined with active ion implantation, size effect, and applied electrical pulses, can etch a first electrode with a nanometer thickness or a stack of a first electrode and a dielectric film into an isolated capacitor, thereby generating a giant dielectric effect (k>900) and a giant ferroelectric effect (remanent polarization >400 μC / cm). 2This breakthrough overcomes the dielectric constant limitation (≤52) of traditional ultrathin film materials. Utilizing these dielectric films with ultra-high dielectric constants, short-channel effects and leakage current are suppressed. Under current process conditions, DRAM cell sizes can be easily reduced to below 10nm, improving device scalability, increasing storage density by at least 10 times, and reducing leakage current.

[0133] The ultra-high dielectric constant dielectric film of this invention can also be laminated with other low dielectric constant materials (SiO2, Si3N4, etc.) to effectively enhance charge trapping functionality, forming a non-volatile charge trapping memory. This significantly improves charge trapping efficiency, drastically reduces erase / write voltage, and extends memory erase / write lifetime, making it applicable to 3D NAND. Each device in 3D NAND flash memory is a metal-Al2O3-nitride-silicon oxide charge trapping device with a TiN / W metal gate and a polysilicon channel. For high-density integration, the diameter of the channel aperture is limited, and the physical thickness of the barrier layer cannot be increased due to the limited channel aperture diameter. Therefore, using a high-k dielectric has the advantage of reducing EOT (Effect of Occurrence). By increasing capacitance through the use of a high-k dielectric constant HZO layer in the barrier layer, its performance can be enhanced, providing a larger storage window and higher operating speed. Furthermore, the application of the ultra-high dielectric constant dielectric film of this invention in charge trapping memory does not affect retention characteristics because ferroelectric remanent polarization may not exist in the ultra-high k HZO crystal film. By using ultra-high dielectric constant HZO crystal thin films, the capacitor boost effect in charge-trapping memory can be enhanced, thereby improving the performance of 3D NAND devices, reducing erase and write voltages, and extending device lifespan.

[0134] This invention improves the ferroelectric remanent polarization intensity through ion implantation, size effect, and microelectronic processes. Ion implantation and size effect can cause the remanent polarization intensity in HZO crystal thin film materials with ultra-high dielectric constant to increase sharply with decreasing size, reaching 404 μC / cm at 0.3 μm. 2 It has a polarization intensity more than 20 times that of conventional HZO, and can be applied to non-volatile ferroelectric memories with metal / HZO / metal architecture, which can significantly improve the read charge count or information storage density of the memory.

[0135] The ultra-high dielectric constant dielectric film of this invention can also be used as a capacitor storage medium material in supercapacitors to improve energy storage density. Dielectric capacitors are widely used in many fields, such as electronic circuits with various functions (filtering, coupling, decoupling, etc.), microwave communications, hybrid electric vehicles, distributed power systems, renewable energy storage, and high-power applications such as fusion. Different applications require capacitors with different characteristics. For example, capacitors used in microwave communications applications should have a very high quality factor (extremely low dielectric loss), while capacitors used in decoupling circuits require a large capacitance per unit volume. However, the relatively low energy density of dielectric capacitors limits their practical application.

[0136] This invention can be applied to the gate insulating layer in complementary metal-oxide-semiconductor (CMOS) semiconductors, enabling the reduction of CMOS device dimensions to below 5nm, significantly lowering the operating voltage (<1V), reducing short-channel effects and leakage current, and is applicable to CMOS device manufacturing processes at technology nodes below 3-5nm. With the development of big data and information technology, higher demands are placed on device size reduction. Traditionally, silicon dioxide (SiO2) is used as the gate insulating layer material. However, as the thickness of the gate insulating layer in CMOS continues to decrease, ultrathin SiO2 cannot suppress tunneling current. HZO, as an ultra-high-k material, can effectively suppress tunneling current with thinner thicknesses or even without changing the thickness. Simultaneously, the ultra-high dielectric constant of HZO can increase gate capacitance to maintain effective control of carriers in the channel and reduce the operating voltage. Atomic layer deposition (ALD) grown HZO ultra-high-k thin film materials overcome the compatibility problems that have plagued traditional perovskite-based ferroelectric materials. Furthermore, the thickness of HZO thin films can be reduced to below 1nm, facilitating integration into state-of-the-art large-scale devices. Meanwhile, the HZO / Si heterojunction exhibits good thermodynamic stability and good lattice matching characteristics.

[0137] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. A method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization, characterized in that, The method includes: Step a, forming a dielectric thin film on a substrate or a substrate with a second electrode attached; the dielectric thin film contains Hf 1-x Zr x O2 thin film, which can be crystalline or amorphous; where 0 < x < 1; Step b: Form a first electrode on the dielectric film; Step c: Divide the first electrode into several discrete microstructures, each with a lateral dimension of 1 nm to 50 μm; Step d, annealing, reduces the low dielectric constant phase and increases the high dielectric constant phase in the dielectric film, resulting in an average dielectric constant greater than 100 for the dielectric film.

2. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, Active ions are implanted into the dielectric film before step b and / or after step c.

3. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 2, characterized in that, The active ions comprise any one or more of the following: carbon, nitrogen, oxygen, boron, helium, phosphorus, iron, aluminum, zinc, cobalt, tin, nickel, titanium, silicon, argon, chlorine, bromine, sulfur, iodine, fluorine, hydrogen, silver, gold, copper, and platinum; the implantation dose of the active ions is 10. 10 -10 20 ions / cm 2 .

4. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The dielectric film is also segmented into discrete microstructures.

5. The method for preparing dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1 or 4, characterized in that, The segmentation includes etching.

6. The method for preparing dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1 or 4, characterized in that, The lateral dimensions of each microstructure are 1 nm to 1 μm.

7. The method for preparing dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The annealing temperature is 300℃~900℃, and the annealing time is 1s~8h.

8. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The method also includes applying positive and negative electrical pulses to the annealed device.

9. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The thickness of the dielectric film is 0.5 nm to 50 nm.

10. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The Hf 1-x Zr x The O2 thin film is also doped with at least one of Si, Er, Y, and Al elements, with a doping concentration of 0-50 mol%.

11. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The Hf 1-x Zr x The methods for preparing O2 thin films include at least one of the following: sol-gel method, sputtering deposition method, pulsed laser deposition method, metal-organic chemical vapor deposition method, atomic layer deposition method, and ion beam evaporation method.

12. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The dielectric thin film further comprises: a low-k dielectric material layer, wherein the low-k dielectric layer is in contact with the Hf dielectric material. 1-x Zr x O2 thin films are used in combination.

13. The method for fabricating dielectric thin films and devices with ultra-high dielectric constant and / or ferroelectric remanent polarization as described in claim 1, characterized in that, The method also includes: processing the annealed device to remove the first electrode and the substrate, thereby obtaining a dielectric thin film with ultra-high dielectric constant and / or ferroelectric remanent polarization.

14. A device prepared by the preparation method according to any one of claims 1-12, characterized in that, The device includes: a substrate or a substrate with a second electrode attached, a dielectric thin film, and a first electrode; The dielectric thin film contains Hf 1-x Zr x O2 thin film, which can be crystalline or amorphous; where 0 < x < 1; The first electrode comprises several discrete microstructures, or both the first electrode and the dielectric thin film comprise several discrete microstructures; the lateral dimension of each microstructure is 1 nm to 50 nm. μ m.

15. The device as claimed in claim 14, characterized in that, The device includes any one or more of the following: supercapacitor, CMOS device, dynamic random access memory, charge trapping memory device, three-dimensional stacked flash memory, and non-volatile ferroelectric memory.

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