A low-power gate drive circuit

Abstract

This invention discloses a low-power gate driving circuit, relating to the field of power management technology. The driving circuit includes a first amplifier, a second amplifier, a small-scale module, and a voltage control module. The invention uses a ramp signal input to the positive input terminal of the first amplifier to control the slow rise of a first voltage signal output from the small-scale module. Based on this voltage signal, the voltage control module adjusts the gate voltage of the target transistor, thereby controlling the start-up ramp rate of the target transistor's gate voltage and achieving a soft start-up. When the output voltage at the power supply output terminal equals the voltage at the negative input terminal of the second amplifier, the small-scale module maintains the second voltage signal output by the second amplifier unchanged. The voltage control module then controls the gate voltage of the target transistor to remain constant based on the second voltage signal, achieving stable operation of the target transistor, gate protection, and reduced circuit power consumption.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power management, in particular to a low-power gate drive circuit. BACKGROUND

[0002] In the prior art, an analog transistor is usually used to realize signal or power transmission between input and output, and a corresponding gate drive circuit is needed to control the on and off of the transistor. When the gate control circuit controls the gate-source voltage of the transistor to be greater than the threshold voltage, the transistor is turned on; and when the gate control circuit controls the gate-source voltage of the transistor to be less than the threshold voltage, the transistor is turned off.

[0003] And in the traditional gate drive circuit, when the target transistor needs to be turned on, the enable end signal of the oscillator module is high, at this time the oscillator module will output a fixed frequency square wave, which will control the charge pump module connected with the oscillator module to generate a voltage higher than the output to the gate of the target transistor, and the voltage is finally fixed by the clamping diode at a stable voltage, keeping the gate-source voltage of the target transistor stable; when the target transistor needs to be turned off, the enable end signal is low, the oscillator module and the charge pump module will be closed, and the NMOS transistor will pull down the gate to make the gate-source voltage of the target transistor lower than 0, thereby realizing the on and off of the target transistor.

[0004] However, the traditional gate driver usually has the following problems:

[0005] 1. When turning on the target transistor, a large current is easily generated on the target transistor and the input. 2. The gate-source voltage of the target transistor is stabilized by the clamping diode, and the voltage of the clamping diode will change with process, temperature and other factors, resulting in inaccurate gate-source voltage. 3. The power consumption of the oscillator module and the charge pump module is large. SUMMARY

[0006] The purpose of the present application is to provide a low-power gate drive circuit, which can realize slow start and stable operation of the transistor, protection of the gate, and reduction of circuit power consumption by adjusting the gate voltage.

[0007] To achieve the above purpose, the present application provides the following scheme:

[0008] A low-power gate drive circuit, comprising: a first amplifier, a second amplifier, a minimum module and a voltage control module.

[0009] The negative input end of the first amplifier is connected with the gate of the target transistor; the positive input end of the first amplifier is used for inputting a ramp signal; the output end of the first amplifier is connected with the input end of the minimum module; the first amplifier is used for outputting a first voltage signal;

[0010] a negative input terminal of the second amplifier is connected with a gate of the target transistor; a positive input terminal of the second amplifier is connected with a source of the target transistor; an output terminal of the second amplifier is connected with an input terminal of the minimum taking module; the second amplifier is used for outputting a second voltage signal;

[0011] an output terminal of the minimum taking module is connected with an input terminal of the voltage control module; a first output terminal of the voltage control module is connected with the gate of the target transistor; a second output terminal of the voltage control module is connected with the source of the target transistor; the source of the target transistor is also connected with a power output terminal; a drain of the target transistor is connected with a power input terminal;

[0012] when the circuit is started, the minimum taking module takes the first voltage signal as output, the first voltage signal gradually increases with the increase of the ramp signal; the voltage control module controls the gate voltage of the target transistor to gradually increase according to the first voltage signal output by the minimum taking module, when the gate voltage exceeds a voltage threshold, the target transistor is turned on;

[0013] after the target transistor is turned on, the minimum taking module takes the first voltage signal as output, the first voltage signal gradually increases with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power output terminal to gradually increase according to the first voltage signal output by the minimum taking module, when the output voltage is equal to the input voltage of the power input terminal, the output voltage remains unchanged;

[0014] after the output voltage remains unchanged, when the voltage of the negative input terminal of the second amplifier is equal to the output voltage, the minimum taking module takes the second voltage signal as output, the second voltage signal remains unchanged, the voltage control module controls the gate voltage of the target transistor to remain unchanged according to the second voltage signal.

[0015] optionally, the driving circuit further comprises a pull-down voltage module;

[0016] one end of the pull-down voltage module is connected with the gate of the target transistor; the other end of the pull-down voltage module is grounded;

[0017] the pull-down voltage module is used for controlling the gate voltage of the target transistor to be lower than 0 when the target transistor needs to be turned off.

[0018] optionally, the driving circuit further comprises a first resistor, a second resistor, a third resistor and a current source;

[0019] One end of the first resistor is connected with the gate of the target transistor; the other end of the first resistor is connected with one end of the current source and the negative input end of the second amplifier respectively;

[0020] One end of the second resistor is connected with the gate of the target transistor; the other end of the second resistor is connected with one end of the third resistor and the negative input end of the first amplifier respectively.

[0021] The other end of the third resistor and the other end of the current source are grounded.

[0022] Optionally, the driving circuit further comprises a switch.

[0023] One end of the switch is connected with the other end of the second resistor; the other end of the switch is connected with the negative input end of the first amplifier.

[0024] Optionally, the current source comprises a reference voltage device and a fourth resistor connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.

[0025] Optionally, the voltage control module specifically comprises an oscillator and a charge pump module connected in sequence.

[0026] The taking small module, the oscillator, the charge pump module and the gate of the target transistor are connected in sequence; the charge pump module is further connected with the power output end.

[0027] The oscillator is used for outputting a clock control signal according to the output signal of the taking small module.

[0028] The charge pump module is used for controlling the gate voltage of the target transistor and the output voltage of the power output end according to the clock control signal.

[0029] Optionally, the pull-down voltage module is an NMOS tube.

[0030] According to the embodiments of the present application, the following technical effects are provided.

[0031] The application discloses a low-power-consumption gate drive circuit, which comprises a first amplifier, a second amplifier, a minimum-taking module and a voltage control module; when the circuit is started, the minimum-taking module takes the first voltage signal as the output, the first voltage signal gradually increases with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor to gradually increase according to the first voltage signal output by the minimum-taking module, and when the gate voltage exceeds the voltage threshold, the target transistor is turned on; after the target transistor is turned on, the minimum-taking module takes the first voltage signal as the output, the first voltage signal gradually increases with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power supply output end to gradually increase according to the first voltage signal output by the minimum-taking module, and when the output voltage is equal to the input voltage of the power supply input end, the output voltage remains unchanged; after the output voltage remains unchanged, when the voltage of the negative input end of the second amplifier is equal to the output voltage, the minimum-taking module takes the second voltage signal as the output, the second voltage signal remains unchanged, and the voltage control module controls the gate voltage of the target transistor to remain unchanged according to the second voltage signal. The voltage signal output by the minimum-taking module slowly rises through the ramp signal, and the voltage control module is adjusted according to the voltage signal to adjust the gate voltage of the target transistor, so that the starting rising slope of the gate voltage of the target transistor can be controlled, the slow starting and stable operation of the transistor can be realized, the gate can be protected, and the power consumption of the circuit is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0033] Figure 1 It is a structural schematic diagram of the low-power-consumption gate drive circuit of the present application.

[0034] Figure 2 It is a circuit connection schematic diagram of the gate drive circuit in the embodiment of the present application.

[0035] Figure 3 It is a typical waveform diagram of the working of the gate drive circuit in the embodiment of the present application. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0037] The present application aims to provide a low-power-consumption gate drive circuit, which can realize slow start and stable operation of a transistor, protection of a gate, and reduction of circuit power consumption by adjusting a gate voltage.

[0038] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0039] As shown in the embodiments, the low-power-consumption gate drive circuit provided by the embodiments of the present application comprises a first amplifier 1, a second amplifier 2, a minimum-taking module 3 and a voltage control module 4. Figure 1 The negative input end of the first amplifier 1 is connected with the gate of a target transistor; the positive input end of the first amplifier 1 is connected with an input ramp signal; the output end of the first amplifier 1 is connected with the input end of the minimum-taking module 3; the first amplifier 1 is used for outputting a first voltage signal; the negative input end of the second amplifier 2 is connected with the gate of the target transistor; the positive input end of the second amplifier 2 is connected with the source of the target transistor; the output end of the second amplifier 2 is connected with the input end of the minimum-taking module 3; the second amplifier 2 is used for outputting a second voltage signal; the output end of the minimum-taking module 3 is connected with the input end of the voltage control module 4; the first output end of the voltage control module 4 is connected with the gate of the target transistor; the second output end of the voltage control module 4 is connected with the source of the target transistor; the source of the target transistor is also connected with a power supply output end; and the drain of the target transistor is connected with a power supply input end.

[0040] The first amplifier and the second amplifier are used for amplifying the voltage of the positive and negative input ends and outputting the first voltage signal and the second voltage signal; and the minimum-taking module is used for taking the minimum of the first voltage signal and the second voltage signal and outputting the signal with smaller voltage.

[0041]

[0042] ​When the circuit is started, the minimum taking module 3 takes the first voltage signal as output, the first voltage signal gradually increases with the increase of the ramp signal, and the voltage control module 4 controls the gate voltage of the target transistor to gradually increase according to the first voltage signal output by the minimum taking module 3, and the target transistor is turned on when the gate voltage exceeds the voltage threshold.

[0043] After the target transistor is turned on, the minimum taking module 3 takes the first voltage signal as output, the first voltage signal gradually increases with the increase of the ramp signal, and the voltage control module 4 controls the gate voltage of the target transistor and the output voltage of the power output end to gradually increase according to the first voltage signal output by the minimum taking module 3, and the output voltage remains unchanged when the output voltage is equal to the input voltage of the power input end.

[0044] After the output voltage remains unchanged, when the voltage of the negative input end of the second amplifier 2 is equal to the output voltage, the minimum taking module takes the second voltage signal as output, the second voltage signal remains unchanged, and the voltage control module 4 controls the gate voltage of the target transistor to remain unchanged according to the second voltage signal.

[0045] In the prior art circuit controlled only by the clamping diode, if the gate-source voltage is too small, the target transistor may be turned on with too large resistance or even turned off, and if the gate-source voltage is too large to exceed the withstand voltage value, the gate may be damaged; and the oscillator module and the charge pump module can only work at a fixed frequency, and the excess current generated during work is discharged by the clamping diode, resulting in large power consumption.

[0046] Therefore, the circuit replacing the clamping diode structure by the first amplifier 1, the second amplifier 2, the minimum taking module 3 and the voltage control module 4 can not only solve the problem of inaccurate gate-source voltage, but also save energy consumption.

[0047] As a specific embodiment, the structure of the driving circuit further comprises a pull-down voltage module.

[0048] One end of the pull-down voltage module is connected to the gate of the target transistor, and the other end of the pull-down voltage module is grounded. The pull-down voltage module is used to control the gate voltage of the target transistor to be lower than 0 when the target transistor needs to be turned off.

[0049] As shown in the embodiment of Figure 2 On the basis of the structure of the driving circuit described above, the driving circuit further comprises a first resistor RB, a second resistor RU, a third resistor RD and a current source IB.

[0050] One end of the first resistor RB is connected with the gate of the target transistor M0; the other end of the first resistor RB is connected with one end of the current source IB and the negative input end of the second amplifier A2 respectively; one end of the second resistor RU is connected with the gate of the target transistor M0; the other end of the second resistor RU is connected with one end of the third resistor RD and the negative input end of the first amplifier A1 respectively; the other end of the third resistor RD and the other end of the current source IB are grounded.

[0051] The current source IB comprises a reference voltage device and a fourth resistor connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.

[0052] On this basis, the circuit further comprises a switch; one end of the switch is connected with the other end of the second resistor RU; the other end of the switch is connected with the negative input end of the first amplifier A1.

[0053] As a specific implementation of the voltage control module, the circuit comprises an oscillator and a charge pump module connected in sequence; the taking small module, the oscillator, the charge pump module and the gate of the target transistor are connected in sequence; the charge pump module is further connected with the power supply output end.

[0054] The oscillator is used for outputting a clock control signal according to the output signal of the taking small module; the charge pump module is used for controlling the gate voltage of the target transistor and the output voltage of the power supply output end according to the clock control signal.

[0055] In the embodiment, the pull-down voltage module is an NMOS tube.

[0056] According to the circuit structure as shown in Figure 2 The GATE voltage to ground generates a first comparison voltage GATE_DIV=GATE*RD / (RU+RD) through the second resistor RU, the switch S1 and the third resistor RD, the voltage and a ramp signal SS are input to an amplifier A1, and the A1 generates an error amplification signal VC1 through the difference between the voltage GATE_DIV and the ramp signal SS. In order to make the input ends of the amplifier A1 equal, GATE_DIV=SS, then GATE=SS*(RU+RD) / RD.

[0057] GATE is connected to ground through the first resistor RB and the current source IB, thus generating a second comparison voltage GATE_MR = GATE - IB*RB. If the current source IB is generated by a reference voltage (VREF) and a fourth resistor RB2 of the same type as the first resistor RB, i.e. the current source IB = VREF / RB2, then GATE_MR = GATE - IB*RB = GATE - VREF*RB / RB2. The first comparison voltage GATE_MR and the output voltage VOUT of the gate drive circuit are input to another amplifier A2, which generates an error amplification signal VC2 by means of the difference between the voltage GATE_MR and the output voltage VOUT. In order to equalize the inputs of the amplifier A2, GATE_MR = VOUT, then GATE = VOUT + VREF*RB / RB2.

[0058] The error amplification signals VC1 and VC2 are input to a minimum module (VMIN) to obtain the smaller of the two signals, VC = min(VC1,VC2). Taking the smaller of VC1 and VC2 ensures that the gate voltage GATE = min{GATE = SS*(RU+RD) / RD, VOUT + VREF*RB / RB2}. The output signal of the minimum module 3 is the voltage regulation signal.

[0059] The voltage regulation signal VC is input to an oscillator Oscillator to control the clock control signal CLK output by the oscillator Oscillator. The higher the voltage of the regulation signal VC, the higher the frequency of the output clock CLK.

[0060] The clock control signal CLK is input to a charge pump module ChargePump to generate a voltage higher than the output voltage VOUT, which is output to the gate GATE of the target transistor M0. If the frequency of the clock CLK becomes higher, the regulation voltage generated by the charge pump module ChargePump becomes higher; conversely, if the frequency of the clock CLK becomes lower, the regulation voltage generated by the charge pump module ChargePump becomes lower.

[0061] According to the control principle of the above-described gate drive circuit, the typical waveforms shown in Figure 3 may be obtained.

[0062] At time TO, the enable terminal EN changes from low to high, and the ramp signal SS starts to slowly rise from 0. Initially, the GATE_MR voltage is much smaller than the VOUT voltage, the VC2 voltage is very high, and VC = VC1. The entire loop is controlled by the amplifier Al, so GATE_DIV = SS, i.e. GATE = SS*(RU+RD) / RD. The gate voltage slowly rises with the rising of the ramp signal SS.

[0063] At time Tl, the gate voltage VGS (which is equal to the GATE voltage at this time) exceeds the threshold voltage of the target transistor M0, and the target transistor M0 starts to conduct, so the output voltage VOUT of the gate drive circuit also starts to slowly rise along with the rise of the SS. Because the rising slope of the VOUT is controlled by the SS, the current on the M0 and the input VIN of the gate drive circuit is also small.

[0064] At time T2, the VOUT voltage rises to be equal to the input voltage VIN and stops rising, while the GATE voltage continues to rise along with the rise of the SS.

[0065] At time T3, the GATE_MR voltage rises to be equal to the VOUT voltage, and the VC2 voltage starts to decrease, so VC = VC2, and the whole loop switches to be controlled by the amplifier A2, keeping GATE_MR = VOUT, so the GATE voltage no longer continues to rise along with the rise of the SS, but remains GATE = VOUT + VREF*RB / RB2. Therefore, VGS = GATE - VOUT = VREF*RB / RB2, which is determined only by the reference voltage VREF and the resistance ratio, and is very accurate and does not change with process and temperature, etc.

[0066] At time T4, the ramp signal SS reaches the highest voltage VH, at which time the switch S1 can be turned off to reduce the current on the GATE and save power consumption.

[0067] In summary, during the whole working process:

[0068] At the beginning, the GATE voltage is slowly raised by adjusting the clock and charge pump module to follow the rise of the ramp signal SS, thereby limiting the current on the input voltage VIN and the transistor M0. In this way, the rising slope of the GATE voltage can be adjusted by adjusting the rising slope of the ramp signal SS, and the current on the input voltage VIN and the transistor M0 path is also adjusted.

[0069] Later, it is automatically transitioned to control the GATE to be stabilized at VOUT + VREF*RB / RB2 by adjusting the clock and charge pump, so as to keep the gate-source voltage VGS = VREF*RB / RB2, which is determined only by the reference voltage (VREF) and the resistance ratio, and is very accurate and does not change with process and temperature, etc.

[0070] And the whole process of the oscillator and the charge pump are controlled by the VC voltage, and the clock frequency is maintained at the lowest frequency required to control the GATE voltage. Compared with using a fixed clock frequency to control the charge pump, this will greatly save power consumption.

[0071] The new gate drive circuit can be used not only to drive a single transistor, but also to drive, for example, two back-to-back connected transistors.

[0072] The various embodiments described in this specification are presented for the purpose of illustrating the principles of the present application and its best mode of operation. Each of the embodiments described in this specification highlights different aspects of the present application. The embodiments are presented separately for the sake of clarity, but the same or similar features can be combined in any suitable manner.

[0073] The principles and implementations of the present application are described in this specification with specific examples. The above description of the embodiments is only used to help understand the circuit of the present application and its core idea. Meanwhile, for those skilled in the art, the specific implementation and application range of the present application will be changed according to the idea of the present application. In summary, the content of this specification should not be understood as a limitation of the present application.

Claims

1. A low-power gate drive circuit, characterized in that, The application relates to a driving circuit for a target transistor. The application comprises a first amplifier, a second amplifier, a minimum taking module and a voltage control module. The negative input end of the first amplifier is connected with the gate of the target transistor; the positive input end of the first amplifier is used for inputting a ramp signal; the output end of the first amplifier is connected with the input end of the minimum taking module; and the first amplifier is used for outputting a first voltage signal. The negative input end of the second amplifier is connected with the gate of the target transistor; the positive input end of the second amplifier is connected with the source of the target transistor; the output end of the second amplifier is connected with the input end of the minimum taking module; and the second amplifier is used for outputting a second voltage signal. The output end of the minimum taking module is connected with the input end of the voltage control module; the first output end of the voltage control module is connected with the gate of the target transistor; the second output end of the voltage control module is connected with the source of the target transistor; the source of the target transistor is also connected with the output end of a power supply; and the drain of the target transistor is connected with the input end of the power supply. When the circuit is started, the minimum taking module takes the first voltage signal as the output, the first voltage signal gradually increases with the increase of the ramp signal; the voltage control module controls the gate voltage of the target transistor to gradually increase according to the first voltage signal output by the minimum taking module, and when the gate voltage exceeds a voltage threshold, the target transistor is turned on. After the target transistor is turned on, the minimum taking module takes the first voltage signal as the output, the first voltage signal gradually increases with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power supply output end to gradually increase according to the first voltage signal output by the minimum taking module, and when the output voltage is equal to the input voltage of the power supply input end, the output voltage remains unchanged. After the output voltage remains unchanged, when the voltage of the negative input end of the second amplifier is equal to the output voltage, the minimum taking module takes the second voltage signal as the output, the second voltage signal remains unchanged, and the voltage control module controls the gate voltage of the target transistor to remain unchanged according to the second voltage signal.

2. The low power gate drive circuit of claim 1, wherein, The application further comprises a pull-down voltage module. One end of the pull-down voltage module is connected with the gate of the target transistor; and the other end of the pull-down voltage module is grounded. The pull-down voltage module is used for controlling the gate voltage of the target transistor to be lower than 0 when the target transistor needs to be turned off. The driving circuit further comprises a first resistor, a second resistor, a third resistor and a current source.

3. The low power gate drive circuit of claim 1, wherein, One end of the first resistor is connected with the gate of the target transistor; and the other end of the first resistor is connected with one end of the current source and the negative input end of the second amplifier respectively. One end of the second resistor is connected with the gate of the target transistor; and the other end of the second resistor is connected with one end of the third resistor and the negative input end of the first amplifier respectively. The other end of the third resistor and the other end of the current source are both grounded. The driving circuit further comprises a switch.

4. The low power gate drive circuit of claim 3, wherein, ​ One end of the switch is connected with the other end of the second resistor; the other end of the switch is connected with the negative input end of the first amplifier.

5. The low power gate drive circuit of claim 3, wherein, The current source comprises a reference voltage device and a fourth resistor connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.

6. The low power gate drive circuit of claim 1, wherein, The voltage control module specifically comprises an oscillator and a charge pump module connected in sequence. The minimum taking module, the oscillator, the charge pump module and the gate of the target transistor are connected in sequence; the charge pump module is further connected with the power output end; The oscillator is used for outputting a clock control signal according to the output signal of the minimum taking module; The charge pump module is used for controlling the gate voltage of the target transistor and the output voltage of the power output end according to the clock control signal.

7. The low power gate drive circuit of claim 2, wherein, The pull-down voltage module is an NMOS tube.

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