Method and system for controlling a thyristor converter valve vbe
By using positive voltage to establish signal counting and time interval judgment in the VBE control method, a closed-loop test of the entire sequence of thyristor converter valves was realized, which solved the problems of low efficiency and safety hazards caused by fiber optic plugging and unplugging in the existing technology, and improved the test efficiency and safety.
Patent Information
- Application Number
- CN202211274531.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-18
- Publication Date
- 2026-02-03
- Estimated Expiration
- 2042-10-18
AI Technical Summary
Existing technologies require frequent insertion and removal of optical fibers when conducting full-sequence tests on thyristor converter valves, resulting in low testing efficiency and safety hazards, and making it impossible to achieve closed-loop testing for protection triggering.
By using positive voltage to establish signal count and time interval judgment in the VBE control method, the logic judgment of protection trigger test is realized, the positive voltage to establish signal count is stopped and reset, the fiber optic cable is not plugged or unplugged, and the closed-loop test of the whole sequence test is completed.
This technology enables full-series testing at the thyristor level without the need for fiber optic cable insertion or removal, improving testing efficiency and avoiding safety hazards caused by fiber optic cable damage.
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Figure CN115656754B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the field of power transmission and relates to a control method and a control system for a thyristor converter valve VBE. BACKGROUND
[0002] The converter valve, also referred to as a thyristor valve, is an important component in a high-voltage direct-current power transmission project and is a power device for electric energy conversion based on a thyristor series connection technology. The thyristor is a core component of the converter valve, which determines the current-carrying capacity of the converter valve. The required system voltage can be obtained by connecting a plurality of thyristor elements in series. Due to the high voltage level of the high-voltage direct-current power transmission, the converter valve is usually composed of a plurality of thyristor stages connected in series. The thyristor stage is the smallest unit in the converter valve. When a fault occurs or maintenance is performed at a high-voltage direct-current power transmission station, the thyristor stage in the converter valve needs to be tested. The test items include a short-circuit test, an impedance test, a trigger test, a protection trigger test, a reverse recovery period test, a reverse blocking voltage test, a repeated short-circuit test, and a repeated impedance test.
[0003] In recent years, the thyristor converter valve VBE (valve base electronics) of the direct-current projects built has been provided with a test mode. In this mode, the VBE sends action signals different from normal operation to the converter valve according to a specific timing logic, and cooperates with the thyristor stage test device on the converter valve side to complete the closed-loop test of "VBE-triggering optical fiber channel-thyristor stage-return optical fiber channel-VBE".
[0004] At present, the timing logic of the test mode of the VBE supports the short-circuit test, the impedance test, and the trigger test (combined once, also referred to as a low-voltage test), the reverse recovery period test, and the reverse blocking voltage test, but does not support the protection trigger test (BOD action test). Therefore, if the protection trigger test or the full-sequence test (performed in sequence according to the above test sequence) needs to be performed, the trigger optical fiber and the return optical fiber of the thyristor stage must be unplugged and replaced with the optical fiber provided by the test device. After the test is completed, the optical fiber is restored, and a low-voltage test needs to be performed again to ensure that the thyristor stage functions normally. This operation not only reduces the test efficiency, but also has a hidden danger of operation safety due to the frequent plugging and unplugging of the optical fiber, and also brings a hidden danger of safety for the subsequent operation of the converter valve. Therefore, the current routine inspection items of the converter station only include the low-voltage test part. With the improvement of the safety requirements for the operation of the power grid, the full-sequence test closed-loop test (without plugging and unplugging the optical fiber) of the thyristor stage has become a development trend for the future maintenance of the converter station. SUMMARY
[0005] The application aims to overcome the above-mentioned defects of the prior art and provide a control method and a control system for a thyristor converter valve VBE.
[0006] To achieve the above-mentioned purpose, the application adopts the following technical solutions:
[0007] The first aspect of the present application provides a control method of a thyristor converter valve VBE, comprising:
[0008] When the VBE is in a test mode, a positive voltage establishment signal count of the VBE is obtained;
[0009] When the positive voltage establishment signal count is less than n-1 or 2n-2, and a time interval between two positive voltage establishment signals continuously received subsequently by the VBE is within a first preset time interval, the positive voltage establishment signal count is stopped and reset; wherein n is the positive voltage establishment signal count required for the VBE to send a trigger signal to a connected thyristor stage.
[0010] Optionally, the method further comprises: after the positive voltage establishment signal count is reset, the positive voltage establishment signal count is re-performed, and sending the trigger signal to the connected thyristor stage is refused until the positive voltage establishment signal count reaches 2n-1, at which time the trigger signal is sent to the connected thyristor stage and the positive voltage establishment signal count is cleared; and after the positive voltage establishment signal count is cleared, the positive voltage establishment signal count is re-performed, and the trigger signal is sent to the connected thyristor stage when the positive voltage establishment signal count reaches n, and the positive voltage establishment signal count is cleared.
[0011] Optionally, the time interval from the positive voltage establishment signal count being reset to the positive voltage establishment signal count being re-performed, and the time interval from the positive voltage establishment signal count being cleared to the positive voltage establishment signal count being re-performed are both 250-300 ms.
[0012] Optionally, the method further comprises: after the trigger signal is sent to the connected thyristor stage, when a positive voltage establishment signal is received within a second preset time, the trigger signal is re-sent to the connected thyristor stage; and when a positive voltage establishment signal is received within a second preset time interval, sending the trigger signal to the connected thyristor stage is refused.
[0013] Optionally, the second preset time is 4 ms, and the second preset time interval is (4 ms, 13 ms).
[0014] Optionally, the positive voltage establishment signal count required for the VBE to send the trigger signal to the connected thyristor stage is 8.
[0015] Optionally, the first preset time interval is (25 μs, 200 μs).
[0016] The second aspect of the present application provides a control system of a thyristor converter valve VBE, comprising:
[0017] An obtaining module, configured to obtain a positive voltage establishment signal count of the VBE when the VBE is in a test mode;
[0018] resetting the positive voltage establishment signal count; wherein n is the positive voltage establishment signal count required for VBE to send a trigger signal to the connected thyristor stage.
[0019] Optionally, the method further comprises: after resetting the positive voltage establishment signal count, re-counting the positive voltage establishment signal count and refusing to send a trigger signal to the connected thyristor stage; when the positive voltage establishment signal count reaches 2n-1, sending a trigger signal to the connected thyristor stage and clearing the positive voltage establishment signal count; and after clearing the positive voltage establishment signal count, re-counting the positive voltage establishment signal count, and when the positive voltage establishment signal count reaches n, sending a trigger signal to the connected thyristor stage and clearing the positive voltage establishment signal count.
[0020] Optionally, the method further comprises: after sending a trigger signal to the connected thyristor stage, re-sending a trigger signal to the connected thyristor stage when a positive voltage establishment signal is received within a second preset time; and refusing to send a trigger signal to the connected thyristor stage when a positive voltage establishment signal is received within the second preset time.
[0021] Compared with the prior art, the method has the following beneficial effects:
[0022] The control method of the thyristor converter valve VBE of the application, by means of judging whether the time interval between two positive voltage establishment signals received successively by VBE is within the first preset time interval when the positive voltage establishment signal count is less than n-1 or 2n-2, realizes logical judgment of protection trigger test, and when protection trigger test is judged, by means of stopping counting the positive voltage establishment signal count and resetting the positive voltage establishment signal count, realizes the function of completing closed-loop test of all thyristor stage test items (single or full sequence) by VBE cooperating with the thyristor stage test device under the premise of not plugging in and out the thyristor trigger optical fiber and the feedback optical fiber, which not only greatly improves test efficiency, but also avoids operation safety hazards caused by plugging in and out the optical fiber. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 The figure is a signal timing logic diagram of the thyristor converter valve in the normal operation process of the embodiment of the application.
[0024] Figure 2 The figure is a signal transmission diagram of the thyristor converter valve in the normal operation process of the embodiment of the application.
[0025] Figure 3Timing sequence logic diagram for VBE test mode of an embodiment of the present application.
[0026] Figure 4 Signal transmission diagram for thyristor level test of an embodiment of the present application.
[0027] Figure 5 Timing sequence logic diagram for VBE control method of an embodiment of the present application.
[0028] Figure 6 Signal transmission diagram for VBE control method of an embodiment of the present application.
[0029] Figure 7 Timing sequence logic diagram for VBE re-sending FP signal of an embodiment of the present application. DETAILED DESCRIPTION
[0030] In order to make the personnel in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.
[0031] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described accompanying drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to the process, method, product, or device.
[0032] The present application will be described in further detail below in conjunction with the accompanying drawings:
[0033] In an embodiment of the present application, a control method for a thyristor converter valve VBE is provided, which can enable the VBE in test mode to determine whether the thyristor level on the converter valve side is performing a protection trigger test through the time interval between the two received positive voltage establishment signals, and complete the test according to the determination result in cooperation with the thyristor level test device on the converter valve side, thereby realizing closed-loop testing of the protection trigger test and the full sequence test.
[0034] Specifically, the control method of the thyristor converter valve VBE comprises the following steps: when the VBE is in a test mode, counting a positive voltage establishment signal of the VBE; when the positive voltage establishment signal count is less than n-1 or 2n-2, and the time interval between two positive voltage establishment signals continuously received by the VBE subsequently is within a first preset time interval, stopping the positive voltage establishment signal counting and resetting the positive voltage establishment signal count; wherein n is the positive voltage establishment signal count required for the VBE to send a trigger signal to the connected thyristor stage.
[0035] In order to facilitate the understanding of the control method of the thyristor converter valve VBE, first introduce the specific signal transmission and signal timing design under the normal operation and test mode of the thyristor converter valve.
[0036] Referring to Figure 1 , the signal timing logic of the thyristor converter valve in normal operation is shown, referring to Figure 2 , the signal transmission process of the thyristor converter valve in normal operation is shown. Specifically, when the thyristor converter valve VBE in normal operation receives the control pulse signal (CP signal) sent by the pole control and the positive voltage establishment signal (IP signal) returned by the TCU (thyristor control unit) at the same time, it will send a trigger signal (FP signal) to the corresponding thyristor stage to make the thyristor stage conductive.
[0037] Referring to Figure 3 , the signal timing logic of the thyristor converter valve in the test mode is shown. Specifically, when the VBE is in the test mode, such as when the converter station is newly built or overhauled, the pole control no longer sends the CP signal to the VBE, but the VBE still needs to send the trigger signal according to different timing logic to cooperate with the thyristor stage test device on the valve side of the converter valve to complete the related test items. This mode is called the test mode of the VBE. In this mode, the VBE continuously receives the IP signal of a certain thyristor stage for 8 consecutive intervals of 20 ms, and immediately sends the FP signal to the thyristor stage to complete the related test of the thyristor stage. At the same time, after the FP signal is sent, the VBE needs a certain time to clear the positive voltage establishment signal count, which is generally set to 250-300 ms. After the clearing is completed, the VBE can receive and count the positive voltage establishment signal again. In this embodiment, the value of n is set to 8, that is, the VBE continuously receives the IP signal of a certain thyristor stage for 8 consecutive intervals of 20 ms, and immediately sends the FP signal to the thyristor stage.
[0038] However, while the above-described timing logic design enables the completion of individual tests at the thyristor level—including short-circuit testing, impedance testing, triggering testing, reverse recovery period testing, and reverse blocking voltage testing—without requiring the insertion or removal of the thyristor triggering fiber and return fiber, it does not support the Protection Trigger Test (BOD). Therefore, please refer to [link to relevant documentation]. Figure 4 When conducting protection trigger tests or full-sequence tests of thyristor converter valves, the trigger fiber and the feedback fiber must be replaced in order to introduce the signal of the thyristor-level test device. However, such repeated plugging and unplugging of the fiber may cause damage to the fiber, resulting in potential safety hazards in the operation of the thyristor converter valve.
[0039] Based on this, see Figure 5 and 6 The control method for the VBE of the thyristor converter valve of the present invention adds a logical judgment about BOD based on the above-mentioned timing logic design. That is, when the positive voltage establishment signal count is less than n-1 or 2n-2, that is, when the positive voltage establishment signal count is less than 7 or 14, and the time interval between two consecutive positive voltage establishment signals received by VBE is within the first preset time interval, it is determined that the thyristor stage is conducting a protection trigger test. At this time, VBE will no longer count the positive voltage establishment signal, nor will it send the FP signal to the connected thyristor stage, and will directly enter the parameter clearing stage, that is, directly reset the positive voltage establishment signal count to cooperate in completing the protection trigger test of the thyristor stage.
[0040] In this embodiment, the first preset time interval is (25μs, 200μs), which can be optimally selected according to the circuit characteristics of the thyristor stage in different projects.
[0041] Simultaneously, after resetting the positive voltage establishment signal count, VBE restarts the positive voltage establishment signal count and refuses to send trigger signals to the connected thyristor stage. When the positive voltage establishment signal count reaches 2n-1, that is, when the positive voltage establishment signal count reaches 15, the protection trigger test of the thyristor stage is considered complete. The trigger signal is immediately sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared. The timing logic of the normal test mode is restored. That is, after clearing the positive voltage establishment signal count, the positive voltage establishment signal count is restarted. When the positive voltage establishment signal count reaches n, that is, when the positive voltage establishment signal count reaches 8, the trigger signal is sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared.
[0042] In one possible implementation, considering that the thyristor stage may occasionally fail to trigger on the first attempt, the thyristor control unit (TCU) needs 1-2 ms to re-energize for the next trigger. Therefore, see [link to relevant documentation]. Figure 7, after sending the trigger signal to the connected thyristor stage, when receiving the positive voltage establishment signal within the second preset time, the trigger signal is sent to the connected thyristor stage again; in addition, in order to avoid affecting the subsequent reverse recovery period test, when receiving the positive voltage establishment signal within the second preset time, the trigger signal is refused to be sent to the connected thyristor stage.
[0043] In the embodiment, the VBE sends the FP signal again immediately after receiving the IP signal within 4ms after sending the FP signal. In addition, the VBE does not send the FP signal even if the IP signal is received within the time interval of (4ms, 13ms) after sending the FP signal.
[0044] In a possible embodiment, the newly-built thyristor converter VBE can directly configure the control method of the thyristor converter VBE of the application, and the running thyristor converter VBE can realize the control method of the thyristor converter VBE of the application through an upgrade program.
[0045] In summary, the control method of the thyristor converter VBE of the application realizes the logical judgment of the protection trigger test by judging whether the time interval between the two positive voltage establishment signals received by the VBE subsequently is within the first preset time interval when the positive voltage establishment signal count is less than n-1 or 2n-2. When the protection trigger test is judged, the positive voltage establishment signal count is stopped and reset, so that the function of the VBE cooperating with the thyristor stage test device to complete the closed-loop test of all thyristor stage test items (single or full sequence) can be realized without plugging the thyristor trigger optical fiber and the feedback optical fiber. The test efficiency is greatly improved, and the operation safety hidden danger caused by plugging the optical fiber can be avoided.
[0046] The following is an apparatus embodiment of the application, which can be used to execute the method embodiment of the application. For details not disclosed in the apparatus embodiment, please refer to the method embodiment of the application.
[0047] In another embodiment of the application, a control system of a thyristor converter VBE is provided, which can be used to realize the control method of the thyristor converter VBE described above. Specifically, the control system of the thyristor converter VBE comprises an acquisition module and a reset module.
[0048] The acquisition module is configured to acquire a positive voltage establishment signal count of the VBE when the VBE is in a test mode; the reset module is configured to stop the positive voltage establishment signal count and reset the positive voltage establishment signal count when the positive voltage establishment signal count is less than n-1 or 2n-2 and a time interval between two positive voltage establishment signals subsequently received by the VBE is within a first preset time interval.
[0049] In a possible implementation, the control system of the thyristor converter valve VBE further includes a sending module configured to, after resetting the positive voltage establishment signal count, restart the positive voltage establishment signal count and refuse to send a trigger signal to the connected thyristor stage, until the positive voltage establishment signal count reaches 2n-1, send the trigger signal to the connected thyristor stage, and clear the positive voltage establishment signal count; and after clearing the positive voltage establishment signal count, restart the positive voltage establishment signal count, and when the positive voltage establishment signal count reaches n, send the trigger signal to the connected thyristor stage, and clear the positive voltage establishment signal count.
[0050] In a possible implementation, the control system of the thyristor converter valve VBE further includes a resending module configured to, after sending the trigger signal to the connected thyristor stage, resend the trigger signal to the connected thyristor stage when a positive voltage establishment signal is received within a second preset time, and refuse to send the trigger signal to the connected thyristor stage when the positive voltage establishment signal is received within the second preset time interval.
[0051] In a possible implementation, the time interval from resetting the positive voltage establishment signal count to restarting the positive voltage establishment signal count, and the time interval from clearing the positive voltage establishment signal count to restarting the positive voltage establishment signal count are both 250-300 ms.
[0052] In a possible implementation, the second preset time is 4 ms, and the second preset time interval is (4 ms, 13 ms).
[0053] In a possible implementation, the positive voltage establishment signal count required by the VBE to send the trigger signal to the connected thyristor stage is 8.
[0054] In a possible implementation, the first preset time interval is (25 μs, 200 μs).
[0055] The division of the modules in the embodiments of the present application is illustrative, and is merely a logical function division. In actual implementation, another division manner can be used. In addition, each function module in each embodiment of the present application can be integrated in one processor, or can be a separate physical existence, or two or more modules can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software function module.
[0056] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.
[0057] The present application is described with reference to flowcharts and / or block diagrams of the method, device (system), and computer program product according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus generate a means for implementing the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that implements the functions specified in the flowcharts and / or block diagrams.
[0058] These computer program instructions can also be stored in a computer-readable memory that can direct the computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including instruction apparatus, which implements the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that implements the functions specified in the flowcharts and / or block diagrams.
[0059] These computer program instructions can also be loaded into a computer or other programmable data processing apparatus, so that a series of operation steps are performed on the computer or other programmable data processing apparatus to produce a computer-implemented process, so that the instructions executed on the computer or other programmable data processing apparatus provide a process for implementing the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that implements the functions specified in the flowcharts and / or block diagrams.
[0060] It should be pointed out finally that the above embodiments are only used to illustrate the technical solutions of the present application but not to limit it. Although the present application has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that the specific embodiments of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, and any modification or equivalent replacement should be covered in the protection scope of the claims of the present application.
Claims
1. A control method for a thyristor-controlled converter valve (VBE), characterized in that, include: When VBE is in test mode, acquire the positive voltage setup signal count of VBE; When the positive voltage establishment signal count is less than n-1 or 2n-2, and the time interval between two consecutive positive voltage establishment signals received by VBE is within the first preset time interval, the positive voltage establishment signal count is stopped and the positive voltage establishment signal count is reset; where n is the positive voltage establishment signal count required for VBE to send a trigger signal to the connected thyristor stage.
2. The control method for the thyristor-controlled converter valve VBE according to claim 1, characterized in that, Also includes: After resetting the positive voltage establishment signal count, the positive voltage establishment signal count is restarted, and the trigger signal is not sent to the connected thyristor stage. When the positive voltage establishment signal count reaches 2n-1, the trigger signal is sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared. After clearing the positive voltage establishment signal count, the positive voltage establishment signal count is restarted. When the positive voltage establishment signal count reaches n, the trigger signal is sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared.
3. The control method for the thyristor-controlled converter valve VBE according to claim 2, characterized in that, The time interval between resetting the positive voltage establishment signal count and restarting the positive voltage establishment signal count, and the time interval between clearing the positive voltage establishment signal count and restarting the positive voltage establishment signal count, are both 250-300ms.
4. The control method for the thyristor converter valve VBE according to claim 2, characterized in that, Also includes: After sending a trigger signal to the connected thyristor stage, when a positive voltage establishment signal is received within a second preset time, the trigger signal is resent to the connected thyristor stage. When a positive voltage establishment signal is received within the second preset time interval, the trigger signal is refused to be sent to the connected thyristor stage.
5. The control method for the thyristor converter valve VBE according to claim 4, characterized in that, The second preset time is 4ms, and the second preset time interval is (4ms, 13ms).
6. The control method for the thyristor-controlled converter valve VBE according to claim 1, characterized in that, The positive voltage setup signal count required for the VBE to send a trigger signal to the connected thyristor stage is 8.
7. The control method for the thyristor converter valve VBE according to claim 1, characterized in that, The first preset time interval is (25μs, 200μs).
8. A control system for a thyristor-controlled converter valve (VBE), characterized in that, include: The acquisition module is used to acquire the positive voltage setup signal count of VBE when VBE is in test mode; The reset module is used to stop counting the positive voltage establishment signal and reset the positive voltage establishment signal count when the positive voltage establishment signal count is less than n-1 or 2n-2 and the time interval between two consecutive positive voltage establishment signals received by VBE is within a first preset time interval; where n is the positive voltage establishment signal count required for VBE to send a trigger signal to the connected thyristor stage.
9. The control system for the thyristor-controlled converter valve VBE according to claim 8, characterized in that, Also includes: The transmitting module is used to reset the positive voltage establishment signal count, restart the positive voltage establishment signal count, and refuse to send a trigger signal to the connected thyristor stage. When the positive voltage establishment signal count reaches 2n-1, a trigger signal is sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared. After clearing the positive voltage establishment signal count, the positive voltage establishment signal count is restarted. When the positive voltage establishment signal count reaches n, a trigger signal is sent to the connected thyristor stage, and the positive voltage establishment signal count is cleared.
10. The control system for the thyristor-controlled converter valve VBE according to claim 9, characterized in that, Also includes: The retransmission module is used to retransmit the trigger signal to the connected thyristor stage after sending the trigger signal to the connected thyristor stage, when a positive voltage establishment signal is received within a second preset time period; and to refuse to send the trigger signal to the connected thyristor stage when a positive voltage establishment signal is received within the second preset time interval.
Citation Information
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