A MOS type PIN diode device excitation circuit and switching speed adjustment method

Abstract

The present application relates to a kind of PIN diode device excitation circuit of MOS tube type and switching speed adjusting method, it is applicable to the PIN diode device excitation occasion needing faster switching speed, the current size of excitation can be flexibly adjusted.The circuit of the present application includes DC power supply, signal generator, comparison circuit, reverse bias excitation circuit and forward bias excitation circuit.Using the excitation circuit of MOS tube type, not only makes the switching speed of PIN diode device faster, but also can flexibly adjust the current size when PIN diode device is excited.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of PIN diode device excitation driving, and particularly relates to a MOS tube type PIN diode device excitation circuit, which is applied to realize the excitation driving function of a PIN diode device. BACKGROUND

[0002] The semiconductor PIN diode phase shifter has good temperature stability, fast switching speed, small volume and light weight, so it has been widely applied in low-frequency radar systems. The PIN diode device is one of the most important microwave semiconductor devices, which has the characteristics of large controllable power, small loss and can obtain a short circuit and an open circuit under forward and reverse bias, so it is most widely applied in microwave control circuits. Under forward bias, the PIN diode device has a small conduction impedance and is approximately a short circuit, and under reverse bias, it is approximately a fixed small capacitor and has a high impedance and is approximately an open circuit, and has the characteristic of continuously changing impedance with bias. The PIN diode device has a very wide application in low-frequency radar, and both the PIN diode phase shifter and the PIN diode switching device have the same function and performance requirements for the excitation circuit. The excitation circuit needs to provide a certain size of forward bias excitation current and a relatively high reverse bias excitation voltage. In the interrogator antenna system, in order to complete the friend-or-foe identification function, a kind of excitation circuit needs to be designed to control the power division phase shift network, so as to realize the control of the amplitude and phase of the antenna unit and complete the fast and flexible scanning of the antenna system beam in space.

[0003] The excitation circuit of the high-power PIN diode phase shifter currently adopted has the problems of small excitation current, long switching time and poor high-power difference resistance, and the PIN diode phase shifter is easily burned out in a high-temperature environment. The high-power PIN diode phase shifter needs an excitation circuit to provide a stable forward-biased excitation current and a reverse-biased excitation voltage. Therefore, the primary function of the excitation circuit is to act as a voltage buffer and a current buffer between the control signal and the power supply group. At any time, the working states of the two PIN diode phase shifters are always opposite. In the forward-biased excitation state, what is needed is to provide a continuous stable forward-biased excitation current, and in the reverse-biased excitation state, what is needed is to provide a certain reverse-biased excitation current. Otherwise, when a high-power radio frequency input is input, the PIN diode phase shifter is likely to be suddenly burned out due to overheating in the reverse-biased excitation state. In the forward-biased excitation state, the PIN diode device needs to provide a continuous stable forward-biased excitation current, and the size of the forward-biased excitation current is different according to actual needs. However, in the reverse-biased excitation state, in addition to providing a reverse-biased excitation voltage, it is also beneficial to provide a reverse-biased excitation current of a certain size. Because this not only provides a pulse current discharge path to ensure the safety of the excitation circuit, but also improves the switching time of the excitation circuit.

[0004] MOS tube is a majority carrier conduction, so it is called unipolar device. While the ordinary transistor utilizes both majority and minority carrier conduction, so it is called bipolar device. The advantage of MOS tube is that it is a voltage-controlled device, and the conduction and turn-off of MOS tube are only affected by V GS . For NMOS tube, when V GS >4V, the tube is turned on; and for PMOS tube, when V GS <-4V, the tube is turned on.

[0005] At present, the general PIN diode excitation circuit is realized by using ordinary transistors, but the existing PIN diode excitation circuit has the problems of relatively slow switching speed and poor excitation current adjustment, which cannot meet the actual engineering application. Therefore, in order to meet the actual engineering needs, the present application provides a MOS tube type excitation circuit. SUMMARY

[0006] Technical problems to be solved

[0007] The excitation circuit composed of common transistor can realize basic excitation driving function, but the practical engineering application effect is general, and the performance cannot reach the optimum. Therefore, in order to further improve the switching speed of the PIN diode excitation circuit and solve the problem of adjustable excitation current, the application provides a MOS tube type excitation circuit, which improves the performance of the excitation circuit and better solves these problems.

[0008] Technical scheme

[0009] A MOS tube type PIN diode device excitation circuit, characterized by comprising a direct current power supply, a signal generator, a comparison circuit, a reverse bias excitation circuit and a forward bias excitation circuit.

[0010] The direct current power supply is divided into a positive power supply and a negative power supply, wherein the positive power supply provides a positive power supply for the comparison circuit, and simultaneously provides a positive power supply for the forward bias excitation circuit and the reverse bias excitation circuit; the negative power supply provides a negative power supply for the comparison circuit, and simultaneously provides a negative power supply for the forward bias excitation circuit and the reverse bias excitation circuit; the output end of the signal generator is connected with the input end of the comparison circuit; the output end of the comparison circuit is connected with the input end of the reverse bias excitation circuit and the input end of the forward bias excitation circuit respectively.

[0011] Further technical scheme of the application: the comparison circuit is composed of a NOT gate circuit and an operational amplifier circuit; the NOT gate circuit is composed of a single digital NOT gate device, the logic input end of which is connected with the output end of the signal generator, and the output end of which is directly connected with the same direction input end of the operational amplifier N2 in the comparison circuit; the operational amplifier circuit is composed of two independent operational amplifiers and resistors R4, R5, R9 and R10; the same direction input end of the operational amplifier N1 in the operational amplifier circuit is connected with the output end of the signal generator, and the output end of the operational amplifier N1 is directly connected with the input end of the reverse bias excitation circuit; the same direction input end of the operational amplifier N2 in the operational amplifier circuit is connected with the output end of the NOT gate circuit, and the output end of the operational amplifier N2 is directly connected with the input end of the forward bias excitation circuit; the resistors R4 and R5 divide the voltage of the positive power supply and then are connected with the reverse input end of the operational amplifier N1 in the comparison circuit, so as to compare with the logic control level inputted in the positive end of the operational amplifier N1. Similarly, the resistors R9 and R10 divide the voltage of the positive power supply and then are connected with the reverse input end of the operational amplifier N2 in the comparison circuit, so as to compare with the logic control level generated by the NOT gate circuit and inputted in the positive end of the operational amplifier N2.

[0012] The further technical scheme of the present application is that the reverse bias excitation circuit is composed of resistance R2, power resistance R1 and R3, NMOS tube V1, PMOS tube V2 and diode V3; the gate of NMOS tube V1 and PMOS tube V2 in the reverse bias excitation circuit is connected together and connected with the output end of N1 in the comparison circuit; the drain of PMOS tube V2 is connected with one end of power resistance R1 and connected with the source of NMOS tube V1; the source of PMOS tube V2 is connected with one end of power resistance R3 and connected with the positive end of diode V3; the other end of power resistance R3 is connected with the negative end of the negative power supply, the negative end of diode V3 is connected with the positive end of the negative power supply and then connected with the ground; the drain of NMOS tube V1 is connected with one end of resistance R2, the other end of resistance R2 is directly connected with the ground, and the other end of power resistance R1 is connected with the positive end of the positive power supply.

[0013] The further technical scheme of the present application is that the forward bias excitation circuit is composed of resistance R7, power resistance R6 and R8, NMOS tube V4, PMOS tube V5 and diode V6; the gate of NMOS tube V4 and PMOS tube V5 in the forward bias excitation circuit is connected together and connected with the output end of N2 in the comparison circuit; the drain of PMOS tube V5 is connected with one end of power resistance R6 and connected with the source of NMOS tube V4; the source of PMOS tube V5 is connected with one end of power resistance R8 and connected with the positive end of diode V6; the other end of power resistance R8 is connected with the negative end of the negative power supply, the negative end of diode V6 is connected with the positive end of the negative power supply and then connected with the ground; the drain of NMOS tube V4 is connected with one end of resistance R7, the other end of resistance R7 is directly connected with the ground, and the other end of power resistance R6 is connected with the positive end of the positive power supply.

[0014] The method for improving the switching speed of PIN diode device and adjusting the current size of excitation circuit is characterized by the following steps:

[0015] The comparison circuit is adjusted, the input level state of the comparison circuit is changed, the reverse bias excitation circuit (4) and the forward bias excitation circuit can work in different states, and the required forward bias excitation current and reverse bias excitation voltage of the PIN diode device excitation circuit are met;

[0016] The reverse bias excitation circuit is adjusted, the resistance value of power resistance R1 in the reverse bias excitation circuit is changed, different sizes of excitation current can be generated when the reverse bias excitation circuit works; the resistance value of power resistance R3 in the reverse bias excitation circuit is reduced, and the switching speed when the reverse bias excitation circuit works can be improved;

[0017] The forward bias excitation circuit is adjusted, the resistance value of the power resistor R6 in the forward bias excitation circuit is changed, different excitation currents can be generated when the forward bias excitation circuit works, and the switching speed of the forward bias excitation circuit when working can be improved by reducing the resistance value of the power resistor R8 in the forward bias excitation circuit.

[0018] Advantages

[0019] The MOS tube type PIN diode device excitation circuit provided by the application can not only realize faster excitation of the PIN diode device, but also can flexibly adjust the excitation current of the PIN diode device. BRIEF DESCRIPTION OF DRAWINGS

[0020] The accompanying drawings are included to provide a further understanding of the application, and are incorporated herein and constitute a part of the detailed description. The same reference numbers in different drawings refer to the same elements throughout the drawings.

[0021] Figure 1 The application is a schematic diagram of the composition structure;

[0022] Figure 2 The application is a circuit structure diagram. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical scheme and advantages of the application clearer, the application is further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the application and do not limit the application. In addition, the technical features involved in each embodiment of the application described below can be combined with each other as long as they do not conflict with each other.

[0024] The MOS tube type PIN diode device excitation circuit is composed of a direct current power supply, a signal generator, a comparison circuit, a reverse bias excitation circuit and a forward bias excitation circuit.

[0025] The direct current power supply is divided into positive power supply and negative power supply. The positive power supply provides positive power supply for the comparison circuit, and also provides positive power supply for the forward bias excitation circuit and the reverse bias excitation circuit. The positive terminal of the positive power supply is connected with the positive power supply input terminal of the operational amplifier N1 in the comparison circuit, and also connected with one end of the resistor R4, and the other end of the resistor R4 is connected with the reverse input terminal of the operational amplifier N1. The positive terminal of the positive power supply is connected with the positive power supply input terminal of the operational amplifier N2 in the comparison circuit, and also connected with one end of the resistor R9, and the other end of the resistor R9 is connected with the reverse input terminal of the operational amplifier N2. The positive terminal of the positive power supply is connected with one end of the resistor R1 in the reverse bias excitation circuit, and the negative terminal is connected with the ground. The positive terminal of the positive power supply is connected with one end of the resistor R6 in the forward bias excitation circuit, and the negative terminal is connected with the ground. The negative power supply provides negative power supply for the comparison circuit, and also provides negative power supply for the forward bias excitation circuit and the reverse bias excitation circuit. The negative terminal of the negative power supply is connected with the negative power supply input terminal of the operational amplifier N1 in the comparison circuit, and also connected with the negative power supply input terminal of the operational amplifier N2 in the comparison circuit, and the positive terminal is connected with the ground. The negative terminal of the negative power supply is connected with one end of the resistor R3 in the reverse bias excitation circuit, and the positive terminal is connected with the ground. The negative terminal of the negative power supply is connected with one end of the resistor R8 in the forward bias excitation circuit, and the positive terminal is connected with the ground. The signal generator generates the logic control input level signal of the excitation circuit, and the output terminal is connected with the same direction input terminal of the operational amplifier N1 in the comparison circuit, and also connected with the input of the NOT gate D1 in the comparison circuit. The comparison circuit generates a pair of mutually exclusive level signals, which are "0" and "1" respectively, and one kind of level signal is output by the operational amplifier N1 in the comparison circuit, and then connected with the gate of the NMOS tube V1 and the PMOS tube V2 in the reverse bias excitation circuit, and the other kind of level signal is output by the operational amplifier N2 in the comparison circuit, and then connected with the gate of the NMOS tube V4 and the PMOS tube V5 in the forward bias excitation circuit. The output of the reverse bias excitation circuit is connected with the positive terminal of the PIN diode load V3. The output of the forward bias excitation circuit is connected with the positive terminal of the PIN diode load V6. When the signal generator generates the logic level "1", the output of the operational amplifier N1 in the comparison circuit generates the logic level "1". At this time, the NMOS tube V1 is turned on, and the PMOS tube V2 is turned off, and the excitation circuit works in the reverse bias excitation state, and the given size of reverse bias excitation voltage is generated at the load end, and the high and low of the reverse bias excitation voltage depends on the high and low of the negative power supply voltage. When the signal generator generates the logic level "1", the output of the operational amplifier N2 in the comparison circuit generates the logic level "0". At this time, the NMOS tube V4 is turned off, and the PMOS tube V5 is turned on, and the excitation circuit works in the forward bias excitation state, and the given size of forward bias excitation current is generated at the load end.

[0026] The comparison circuit is composed of a NOT gate circuit and an operational amplifier circuit. The NOT gate circuit is composed of a single digital NOT gate device, the input of which is connected to the output of the signal generator, and the output of which is directly connected to the same input of the operational amplifier N2 in the comparison circuit. The operational amplifier circuit is composed of two independent operational amplifiers N1 and N2, and resistors R4, R5, R9 and R10. The same input of the operational amplifier N1 in the operational amplifier circuit is directly connected to the output of the signal generator, and the output of the operational amplifier N1 is directly connected to the input of the reverse bias excitation circuit. The same input of the operational amplifier N2 in the operational amplifier circuit is directly connected to the output of the NOT gate circuit, and the output of the operational amplifier N2 is directly connected to the input of the forward bias excitation circuit. The resistors R4 and R5 divide the positive power supply voltage and are connected to the reverse input of the operational amplifier N1 in the comparison circuit, for comparison with the logic control level input to the positive input of the operational amplifier N1. Similarly, the resistors R9 and R10 divide the positive power supply voltage and are connected to the reverse input of the operational amplifier N2 in the comparison circuit, for comparison with the logic control level generated by the NOT gate circuit input to the positive input of the operational amplifier N2.

[0027] The reverse bias excitation circuit is composed of resistors R2, power resistors R1 and R3, NMOS transistor V1, PMOS transistor V2 and diode V3. In the reverse bias excitation circuit, the gates of the NMOS transistor V1 and the PMOS transistor V2 are connected together and are connected to the output of the operational amplifier N1 in the comparison circuit. The drain of the PMOS transistor V2 is connected to one end of the power resistor R1 and is connected to the source of the NMOS transistor V1. The source of the PMOS transistor V2 is connected to one end of the power resistor R3 and is connected to the positive terminal of the diode V3. The other end of the power resistor R3 is connected to the negative terminal of the negative power supply, and the negative terminal of the diode V3 is connected to the positive terminal of the negative power supply and then to ground. The drain of the NMOS transistor V1 is connected to one end of the resistor R2, and the other end of the resistor R2 is directly connected to ground. The other end of the power resistor R1 is connected to the positive terminal of the positive power supply.

[0028] The forward bias excitation circuit is composed of resistors R7, power resistors R6 and R8, NMOS transistor V4, PMOS transistor V5 and diode V6. In the forward bias excitation circuit, the gates of the NMOS transistor V4 and the PMOS transistor V5 are connected together and are connected to the output of the operational amplifier N2 in the comparison circuit. The drain of the PMOS transistor V5 is connected to one end of the power resistor R6 and is connected to the source of the NMOS transistor V4. The source of the PMOS transistor V5 is connected to one end of the power resistor R8 and is connected to the positive terminal of the diode V6. The other end of the power resistor R8 is connected to the negative terminal of the negative power supply, and the negative terminal of the diode V6 is connected to the positive terminal of the negative power supply and then to ground. The drain of the NMOS transistor V4 is connected to one end of the resistor R7, and the other end of the resistor R7 is directly connected to ground. The other end of the power resistor R6 is connected to the positive terminal of the positive power supply.

[0029] When the signal generator generates logic control level "1", the PMOS V5 in the forward bias excitation circuit is turned on, and the NMOS V4 is turned off, at this time, the excitation current is generated by the forward bias excitation circuit. At the same time, the PMOS V2 in the reverse bias excitation circuit is turned off, and the NMOS V1 is turned on, at this time, the reverse bias voltage is generated by the reverse bias excitation circuit. When the signal generator generates logic control level "0", the PMOS V5 in the forward bias excitation circuit is turned off, and the NMOS V4 is turned on, at this time, the reverse bias voltage is generated by the forward bias excitation circuit. At the same time, the PMOS V2 in the reverse bias excitation circuit is turned on, and the NMOS V1 is turned off, at this time, the excitation current is generated by the reverse bias excitation circuit.

[0030] In the technical solution, by adjusting the resistance value of the power resistor R1 in the reverse bias excitation circuit, the size of the excitation current when the reverse bias excitation circuit works can be changed. When the resistance value of the power resistor R1 is reduced, and its power capacity is increased, a larger excitation current can be provided. By adjusting the resistance value of the power resistor R6 in the forward bias excitation circuit, the size of the excitation current when the forward bias excitation circuit works can be changed. When the resistance value of the power resistor R6 is reduced, and its power capacity is increased, a larger excitation current can be provided.

[0031] When the reverse bias excitation circuit works in the reverse bias excitation state, by reducing the resistance value of the power resistor R3, the speed of the output of the reverse bias excitation circuit when it works from positive voltage to negative voltage can be improved, so that the reverse bias excitation voltage can be quickly established. When the forward bias excitation circuit works in the reverse bias excitation state, by reducing the resistance value of the power resistor R8, the speed of the output of the forward bias excitation circuit when it works from positive voltage to negative voltage can be improved, so that the reverse bias excitation voltage can be quickly established.

[0032] In order to make those skilled in the art better understand the present application, the present application will be described in detail below in conjunction with specific embodiments.

[0033] Referring to the accompanying drawings Figure 1 and the accompanying drawings Figure 2 The MOS type PIN diode device excitation circuit is composed of a direct current power supply 1, a signal generator 2, a comparison circuit 3, a reverse bias excitation circuit 4 and a forward bias excitation circuit 5.

[0034] The direct current power supply 1 is divided into a positive power supply and a negative power supply. The positive power supply provides positive power for the comparison circuit (3) and also provides positive power for the reverse bias excitation circuit 4 and the forward bias excitation circuit 5. The positive terminal of the positive power supply is connected to the power input terminal 6, 4 of the comparison circuit 3, and the negative terminal of the positive power supply is connected to the ground. The negative terminal of the negative power supply is connected to the power input terminal 3 of the comparison circuit 3, and the positive terminal of the negative power supply is connected to the ground. The positive terminal of the positive power supply is connected to the power input terminal 1 of the reverse bias excitation circuit 4 and the forward bias excitation circuit 5, and the negative terminal of the positive power supply is connected to the ground. The negative power supply provides negative power for the reverse bias excitation circuit 4 and the forward bias excitation circuit 5, and the negative terminal of the negative power supply is connected to the power input terminal 3 of these circuits, and the positive terminal of the negative power supply is connected to the ground. The signal generator 2 generates the logic control input level signal of the excitation circuit, and the output terminal is connected to the input terminal 2 of the operational amplifier N1 in the comparison circuit 3, and also connected to the input terminal 1 of the NOT gate D1 in the comparison circuit 3, and the negative terminal is connected to the ground. The comparison circuit 3 generates a pair of mutually exclusive level signals, which are "0" and "1" respectively, and one of the level signals is connected to the input terminal 4 of the reverse bias excitation circuit 4, and the other level signal is connected to the input terminal 4 of the forward bias excitation circuit 5. The output terminals 8 of the reverse bias excitation circuit 4 and the forward bias excitation circuit 5 are finally connected to the corresponding load input terminals 1. When the signal generator 2 generates the logic level "1", the corresponding output terminal 5 connected to the reverse bias excitation circuit 4 of the comparison circuit 3 generates the logic level "1". At this time, the NMOS transistor V1 is turned on, and the PMOS transistor V2 is turned off, and the excitation circuit works in the reverse bias excitation state, and a given size of reverse bias excitation voltage is generated at the load terminal, and the high and low of the reverse bias excitation voltage depends on the high and low of the power supply negative voltage. When the signal generator 2 generates the logic level "1", the corresponding output terminal 5 connected to the forward bias excitation circuit 5 of the comparison circuit 3 generates the logic level "0". At this time, the NMOS transistor V4 is turned off, and the PMOS transistor V5 is turned on, and the excitation circuit works in the forward bias excitation state, and a given size of forward bias excitation current is generated at the load terminal, and the size of the current depends on the size of the power resistor R6.

[0035] The comparison circuit 3 is composed of a NOT gate circuit and an operational amplifier circuit. The NOT gate circuit is composed of a single digital NOT gate device, the logic input end 1 of which is connected to the output end of the signal generator 2, and the output end of which is directly connected to the input end 2 of the operational amplifier N2 in the comparison circuit 3. The operational amplifier circuit is composed of two independent operational amplifiers and resistors R4, R5, R9 and R10. The input end 2 of the operational amplifier N1 in the operational amplifier circuit is connected to the output end of the signal generator 2, and the output end 5 of the operational amplifier N1 is directly connected to the input end of the reverse bias excitation circuit 4. The input end 2 of the operational amplifier N2 in the operational amplifier circuit is connected to the output end of the NOT gate circuit, and the output end 5 of the operational amplifier N2 is directly connected to the input end of the forward bias excitation circuit 5. The resistors R4 and R5 divide the positive power supply voltage and are connected to the negative end of the operational amplifier N1 in the comparison circuit 3, and are used to compare with the logic control level inputted to the positive end of the operational amplifier N1. Similarly, the resistors R9 and R10 divide the positive power supply voltage and are connected to the negative end of the operational amplifier N2 in the comparison circuit 3, and are used to compare with the logic control level generated by the NOT gate circuit and inputted to the positive end of the operational amplifier N2.

[0036] The reverse bias excitation circuit 4 is composed of resistors R2, power resistors R1 and R3, an NMOS transistor V1, a PMOS transistor V2 and a diode V3. In the reverse bias excitation circuit 4, the gates of the NMOS transistor V1 and the PMOS transistor V2 are connected together and are connected to the output end 5 of the N1 in the comparison circuit 3. The drain of the PMOS transistor V2 is connected to one end of the power resistor R1 and is connected to the source of the NMOS transistor V1. The source of the PMOS transistor V2 is connected to one end of the power resistor R3 and is connected to the positive end of the diode V3. The other end of the power resistor R3 is connected to the negative end of the negative power supply, and the negative end of the diode V3 is connected to the positive end of the negative power supply and then to the ground. The drain of the NMOS transistor V1 is connected to one end of the resistor R2, and the other end of the resistor R2 is directly connected to the ground. The other end of the power resistor R1 is connected to the positive end of the positive power supply.

[0037] The forward bias excitation circuit 5 is composed of resistors R7, power resistors R6 and R8, an NMOS transistor V4, a PMOS transistor V5 and a diode V6. In the forward bias excitation circuit 5, the gates of the NMOS transistor V4 and the PMOS transistor V5 are connected together and are connected to the output end 5 of the N2 in the comparison circuit 3. The drain of the PMOS transistor V5 is connected to one end of the power resistor R6 and is connected to the source of the NMOS transistor V4. The source of the PMOS transistor V5 is connected to one end of the power resistor R8 and is connected to the positive end of the diode V6. The other end of the power resistor R8 is connected to the negative end of the negative power supply, and the negative end of the diode V6 is connected to the positive end of the negative power supply and then to the ground. The drain of the NMOS transistor V4 is connected to one end of the resistor R7, and the other end of the resistor R7 is directly connected to the ground. The other end of the power resistor R6 is connected to the positive end of the positive power supply.

[0038] When the signal generator 2 generates the logic control level "1", the PMOS V5 in the forward bias excitation circuit 5 is turned on, and the NMOS V4 is turned off. At this time, the excitation current is generated by the forward bias excitation circuit 5, and the size of the excitation current depends on the size of the power resistor R6. At the same time, the PMOS V2 in the reverse bias excitation circuit 4 is turned off, and the NMOS V1 is turned on. At this time, the reverse bias voltage is generated by the reverse bias excitation circuit 4, and the high and low of the reverse bias voltage directly depends on the high and low of the supply negative power voltage. When the signal generator 2 generates the logic control level "0", the PMOS V5 in the forward bias excitation circuit 5 is turned off, and the NMOS V4 is turned on. At this time, the reverse bias voltage is generated by the forward bias excitation circuit 5, and the high and low of the reverse bias voltage directly depends on the high and low of the supply negative power voltage. At the same time, the PMOS V2 in the reverse bias excitation circuit 4 is turned on, and the NMOS V1 is turned off. At this time, the excitation current is generated by the reverse bias excitation circuit 4, and the size of the excitation current depends on the size of the power resistor R1.

[0039] In the technical solution, by adjusting the resistance value of the power resistor R1 in the reverse bias excitation circuit 4, the size of the excitation current when the reverse bias excitation circuit 4 works can be changed. When the resistance value of the power resistor R1 is reduced, and the power capacity is increased, a larger excitation current can be provided. By adjusting the resistance value of the power resistor R6 in the forward bias excitation circuit 5, the size of the excitation current when the forward bias excitation circuit 5 works can be changed. When the resistance value of the power resistor R6 is reduced, and the power capacity is increased, a larger excitation current can be provided.

[0040] When the reverse bias excitation circuit 4 works in the reverse bias excitation state, by reducing the resistance value of the power resistor R3, the speed of the output of the reverse bias excitation circuit 4 when it works can be improved, so that the reverse bias excitation voltage can be quickly established. When the forward bias excitation circuit 5 works in the reverse bias excitation state, by reducing the resistance value of the power resistor R8, the speed of the output of the forward bias excitation circuit 5 when it works can be improved, so that the reverse bias excitation voltage can be quickly established.

[0041] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be covered in the protection scope of the present application.

Claims

1. A PIN diode device excitation circuit of the MOSFET type, characterized in that It comprises direct current power supply (1), signal generator (2), comparison circuit (3), reverse bias excitation circuit (4) and forward bias excitation circuit (5). The direct current power supply (1) is divided into positive power supply and negative power supply, wherein the positive power supply provides positive power supply for the comparison circuit (3), and simultaneously provides positive power supply for the forward bias excitation circuit (5) and the reverse bias excitation circuit (4); the negative power supply provides negative power supply for the comparison circuit, and simultaneously provides negative power supply for the forward bias excitation circuit (5) and the reverse bias excitation circuit (4); the output end of the signal generator (2) is connected with the input end of the comparison circuit (3); the output end of the comparison circuit (3) is connected with the input end of the reverse bias excitation circuit (4) and the input end of the forward bias excitation circuit (5) respectively; The reverse bias excitation circuit (4) is composed of resistance R2, power resistance R1 and R3, NMOS tube V1, PMOS tube V2 and diode V3; in the reverse bias excitation circuit (4), the gate of the NMOS tube V1 and the PMOS tube V2 is connected together and connected with the output end of the operational amplifier N1 in the comparison circuit (3); the drain of the PMOS tube V2 is connected with one end of the power resistance R1, and simultaneously connected with the source of the NMOS tube V1; the source of the PMOS tube V2 is connected with one end of the power resistance R3, and simultaneously connected with the positive end of the diode V3; the other end of the power resistance R3 is connected with the negative end of the negative power supply, and the negative end of the diode V3 is connected with the positive end of the negative power supply and then connected to the ground; the drain of the NMOS tube V1 is connected with one end of the resistance R2, and the other end of the resistance R2 is directly connected to the ground, and the other end of the power resistance R1 is connected with the positive end of the positive power supply; The forward bias excitation circuit (5) is composed of resistance R7, power resistance R6 and R8, NMOS tube V4, PMOS tube V5 and diode V6; in the forward bias excitation circuit (5), the gate of the NMOS tube V4 and the PMOS tube V5 is connected together and connected with the output end of the operational amplifier N2 in the comparison circuit (3); the drain of the PMOS tube V5 is connected with one end of the power resistance R6, and simultaneously connected with the source of the NMOS tube V4; the source of the PMOS tube V5 is connected with one end of the power resistance R8, and simultaneously connected with the positive end of the diode V6; the other end of the power resistance R8 is connected with the negative end of the negative power supply, and the negative end of the diode V6 is connected with the positive end of the negative power supply and then connected to the ground; the drain of the NMOS tube V4 is connected with one end of the resistance R7, and the other end of the resistance R7 is directly connected to the ground, and the other end of the power resistance R6 is connected with the positive end of the positive power supply.

2. The PIN diode device excitation circuit of claim 1, wherein: The comparison circuit (3) is composed of a NOT gate circuit and an operational amplifier circuit. The NOT gate circuit is composed of a single digital NOT gate device, whose logic input end is connected to the output end of the signal generator (2), and whose output end is directly connected to the same direction input end of the operational amplifier N2 in the comparison circuit (3). The operational amplifier circuit is composed of two independent operational amplifiers and resistors R4, R5, R9 and R10. The same direction input end of the operational amplifier N1 in the operational amplifier circuit is connected to the output end of the signal generator (2), and the output end of the operational amplifier N1 is directly connected to the input end of the reverse bias excitation circuit (4). The same direction input end of the operational amplifier N2 in the operational amplifier circuit is connected to the output end of the NOT gate circuit, and the output end of the operational amplifier N2 is directly connected to the input end of the forward bias excitation circuit (5). The resistors R4 and R5 divide the supply positive power voltage and are connected to the reverse input end of the operational amplifier N1 in the comparison circuit, for comparison with the logic control level inputted from the same direction input end of the operational amplifier N1. Similarly, the resistors R9 and R10 divide the supply positive power voltage and are connected to the reverse input end of the operational amplifier N2 in the comparison circuit, for comparison with the logic control level generated by the NOT gate circuit and inputted from the same direction input end of the operational amplifier N2.

3. A method for increasing the switching speed of a PIN diode device and regulating the current of an excitation circuit using the circuit of claim 1, characterized in that The steps are as follows: Adjusting the comparison circuit (3) and changing the input level state of the comparison circuit (3) can make the reverse bias excitation circuit (4) and the forward bias excitation circuit (5) work in different states, so as to meet the required forward bias excitation current and reverse bias excitation voltage of the PIN diode device excitation circuit; Adjusting the reverse bias excitation circuit (4) and changing the resistance value of the power resistor R1 in the reverse bias excitation circuit (4) can generate excitation currents of different sizes when the reverse bias excitation circuit (4) works; reducing the resistance value of the power resistor R3 in the reverse bias excitation circuit (4) can improve the switching speed when the reverse bias excitation circuit (4) works; Adjusting the forward bias excitation circuit (5) and changing the resistance value of the power resistor R6 in the forward bias excitation circuit (5) can generate excitation currents of different sizes when the forward bias excitation circuit (5) works; reducing the resistance value of the power resistor R8 in the forward bias excitation circuit (5) can improve the switching speed when the forward bias excitation circuit (5) works.

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