Circuit board assembly and method of manufacturing the same

Abstract

A circuit board assembly and a manufacturing method thereof, the circuit board assembly is simple in structure and good in electric connection effect, comprising a first circuit board body, a second circuit board body and a connecting area, the first circuit board body comprises at least one first graphene conductive circuit layer, the second circuit board body comprises at least one second graphene conductive circuit layer, the connecting area comprises a first graphene oxide layer and a second graphene oxide layer which are stacked and bonded in the thickness direction, the first graphene oxide layer is extended from the first graphene conductive circuit layer, and the second graphene oxide layer is extended from the second graphene conductive circuit layer; the connecting area further comprises a graphene conductive connecting circuit embedded in the first graphene oxide layer and the second graphene oxide layer, and the graphene conductive connecting circuit electrically connects the first graphene conductive circuit layer and the second graphene conductive circuit layer.

Description

Technical Field

[0001] This application relates to the field of circuit boards, and more particularly to a circuit board assembly and a method for manufacturing the same. Background Technology

[0002] Currently, when two circuit boards are electrically connected, they are usually plugged into connectors on the two circuit boards or soldered together. However, these methods are relatively complex and cumbersome, and require the introduction of other materials or components such as solder or connectors. Summary of the Invention

[0003] Therefore, it is necessary to provide a circuit board assembly with a simple structure and good electrical connection.

[0004] It is also necessary to provide a manufacturing method for circuit board assemblies that is simple in process and has good electrical connection effect.

[0005] As one aspect of this application, a method for manufacturing a circuit board assembly includes the following steps:

[0006] A first circuit board is provided, including a first circuit board body and a first connection portion; wherein the first circuit board body includes at least a first graphene conductive line layer, and the first connection portion includes a first graphene oxide connection layer extending from the first graphene conductive line layer.

[0007] A second circuit board is provided, including a second circuit board body and a second connection portion; wherein the second circuit board body includes at least one second graphene conductive line layer, and the second connection portion includes a second graphene oxide connection layer extending from the second graphene conductive line layer.

[0008] The first graphene oxide connecting layer and the second graphene oxide connecting layer are laminated together, and the laminated first graphene oxide connecting layer and the second graphene oxide connecting layer are welded together by discharge plasma sintering or in-situ electrothermal technology to form a connection region; and

[0009] The connection area is patterned by laser photothermal heating to form graphene conductive connection lines that electrically connect the first circuit board body and the second circuit board body.

[0010] As one embodiment of this application, the method for manufacturing the circuit board assembly further includes:

[0011] An insulating adhesive layer is formed to cover the patterned connection area.

[0012] As one embodiment of this application, the first circuit board body further includes a first dielectric layer stacked with the first graphene conductive line layer, and the first connection portion further includes a first insulating layer extending from the first dielectric layer and stacked with the first graphene oxide connection layer.

[0013] Prior to the step of forming the graphene conductive interconnects by laser photothermal heating, the method further includes:

[0014] Remove the first insulating layer located in the connection area.

[0015] As one embodiment of this application, the first circuit board body further includes a second dielectric layer stacked with the second graphene conductive line layer, and the first connection portion further includes a second insulating layer extending from the second dielectric layer and stacked with the second graphene oxide connection layer.

[0016] Prior to the step of forming the graphene conductive interconnects by laser photothermal heating, the method further includes:

[0017] Remove the second insulating layer located in the connection area.

[0018] As one embodiment of this application, the first circuit board body further includes at least one first graphene oxide pattern layer, and each first graphene conductive line layer is interlocked with a first graphene oxide pattern layer; the second circuit board body further includes at least one second graphene oxide pattern layer, and each second graphene conductive line layer is interlocked with a second graphene oxide pattern layer.

[0019] As one embodiment of this application, the fabrication of the first circuit board includes the following steps:

[0020] A double-sided graphene oxide substrate is provided, comprising a first graphene oxide layer, a first dielectric layer, and a second graphene oxide layer sequentially stacked along the thickness direction; wherein, the first graphene oxide layer includes a main body portion and a first graphene oxide connecting layer extending from the main body portion, and the first dielectric layer includes a first dielectric layer and a first insulating layer extending from the first dielectric layer; in the thickness direction, the first dielectric layer, the main body portion, and the second graphene oxide layer overlap, and the first insulating layer overlaps with the first graphene oxide connecting layer to form a first connecting portion;

[0021] The main body and the second graphene oxide layer are patterned by laser photothermal heating. Parts of the main body and the second graphene oxide layer are reduced to form a first graphene conductive circuit layer. The unreduced parts of the main body and the unreduced parts of the second graphene oxide layer form a first graphene oxide pattern layer. The first graphene conductive circuit layer and the first graphene oxide pattern layer are interlocked to obtain a first intermediate structure.

[0022] Single-sided graphene oxide substrates are respectively laminated on both sides of the region of the first intermediate structure corresponding to the first dielectric layer along the thickness direction. Each single-sided graphene oxide substrate includes a first dielectric layer and a third graphene oxide layer stacked along the thickness direction, and the side of the first dielectric layer away from the third graphene oxide layer is bonded to the first intermediate structure.

[0023] Each of the third graphene oxide layers is patterned by laser photothermal heating, and a portion of each of the third graphene oxide layers is reduced to form a first graphene conductive circuit layer, while the unreduced portion of each of the third graphene oxide layers forms a first graphene oxide pattern layer, thereby obtaining a second intermediate structure.

[0024] A plurality of connection holes are formed on the second intermediate structure, each connection hole connecting at least two of the first graphene conductive circuit layers, and conductive material is disposed in each connection hole to form a corresponding conductive hole, thereby obtaining the first circuit board, and the area of ​​the first circuit board corresponding to the first dielectric layer is the first circuit board body.

[0025] As one aspect of this application, a circuit board assembly includes a first circuit board body, a second circuit board body, and a connection region. The first circuit board body includes at least one first graphene conductive line layer, and the second circuit board body includes at least one second graphene conductive line layer. The connection region includes a first graphene oxide layer and a second graphene oxide layer stacked and bonded along the thickness direction. The first graphene oxide layer extends from the first graphene conductive line layer, and the second graphene oxide layer extends from the second graphene conductive line layer. The connection region also includes graphene conductive connection lines embedded in the first graphene oxide layer and the second graphene oxide layer, and the graphene conductive connection lines electrically connect the first graphene conductive line layer and the second graphene conductive line layer.

[0026] As one embodiment of this application, the connection area further includes an insulating adhesive layer, which covers the first graphene oxide layer, the second graphene oxide layer, and the graphene conductive connection lines.

[0027] As one embodiment of this application, the first circuit board body further includes at least one first graphene oxide pattern layer, and each first graphene conductive line layer is interlocked with a first graphene oxide pattern layer; the second circuit board body further includes at least one second graphene oxide pattern layer, and each second graphene conductive line layer is interlocked with a second graphene oxide pattern layer.

[0028] As one embodiment of this application, the thickness of the first graphene conductive circuit layer that is interlocked with each other is the same as the thickness of the first graphene oxide pattern layer, and the thickness of the second graphene conductive circuit layer that is interlocked with each other is the same as the thickness of the second graphene oxide pattern layer.

[0029] The circuit board assembly and its manufacturing method of this application utilize a first graphene oxide layer (first graphene oxide connecting layer) and a second graphene oxide layer (second graphene oxide connecting layer) bonded together by discharge plasma sintering or in-situ electrothermal technology, and graphene conductive connection lines formed by laser photothermal heating. These graphene conductive connection lines electrically connect the first circuit board body and the second circuit board body, thereby achieving electrical connection between the first and second circuit boards without the need for connectors or other solder. Furthermore, the laser photothermal heating method for forming the graphene conductive connection lines allows for more flexible circuit design and facilitates increased wiring density. Moreover, the material of the graphene conductive connection lines improves the electrical performance, heat dissipation performance, and mechanical performance of the entire circuit board assembly.

[0030] Furthermore, in the aforementioned first circuit board, the first graphene conductive circuit layer is formed by laser photothermal heating, and the interlocking of the first graphene conductive circuit layer and the first graphene oxide pattern layer contributes to the flatness of the overall structure of the first circuit board body. Additionally, the laser photothermal heating method for forming the first graphene conductive circuit layer allows for more flexible circuit design, which is beneficial for increasing the wiring density of the first circuit board. Moreover, the materials of the first and second graphene conductive circuit layers contribute to improving the electrical performance, heat dissipation performance, and mechanical performance of the entire circuit board assembly.

[0031] Furthermore, the interlocking second graphene conductive circuit layer and the second graphene oxide pattern layer contribute to the flatness of the overall structure of the second circuit board body in the first circuit board. Attached Figure Description

[0032] Figure 1 A cross-sectional schematic diagram of a first circuit board including a first graphene oxide interconnect layer, according to an embodiment provided in this application.

[0033] Figure 2 A cross-sectional schematic diagram of a second circuit board including a second graphene oxide interconnect layer, according to one embodiment of this application.

[0034] Figure 3 To be Figure 1 The first graphene oxide connecting layer shown is... Figure 2 The diagram shows a cross-sectional view of the welded connection area formed by the second graphene oxide connecting layer.

[0035] Figure 4 To be Figure 3 A cross-sectional schematic diagram of the first and second insulating layers after they have been removed from the connection area.

[0036] Figure 5 In order to be in Figure 4 The diagram shows a cross-sectional view of the graphene conductive interconnects formed in the connection region.

[0037] Figure 6 In order to be in Figure 5 The diagram shows a cross-sectional view of the connection area covered with an insulating adhesive layer.

[0038] Figure 7 A cross-sectional schematic diagram of a double-sided graphene oxide substrate according to one embodiment provided in this application.

[0039] Figure 8 A cross-sectional schematic diagram of the first intermediate structure according to an embodiment of this application.

[0040] Figure 9 In order to be in Figure 8 The diagram shows a cross-sectional view of a single-sided graphene oxide substrate laminated on both sides of the first intermediate structure.

[0041] Figure 10 A cross-sectional schematic diagram of the second intermediate structure according to one embodiment of this application.

[0042] Figure 11 In order to be in Figure 10 A cross-sectional schematic diagram showing the connection hole formed on the second intermediate structure.

[0043] Figure 12 Will Figure 11 The diagram shown is a cross-sectional view of the connection hole that forms a conductive hole.

[0044] Figure 13 A schematic cross-sectional view of a circuit board assembly according to one embodiment of this application.

[0045] Explanation of main component symbols

[0046]

[0047]

[0048] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0049] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0051] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0052] Please see Figures 1 to 6 This application provides a method for manufacturing a circuit board assembly, which includes the following steps:

[0053] Step S1, please refer to Figure 1 A first circuit board 100 is provided. The first circuit board 100 includes a first circuit board body 100a and a first connection portion 100b. The first circuit board body 100a includes at least one first graphene conductive line layer 11, and the first connection portion 100b extends from the edge of the first circuit board body 100a, and the first connection portion 100b includes a first graphene oxide connection layer 31 extending from the first graphene conductive line layer 11.

[0054] The first circuit board body 100a can be a single-layer circuit board, a double-layer circuit board, or a multi-layer circuit board. In a double-layer or multi-layer circuit board, all conductive lines in the first circuit board body 100a can be made of graphene, or can include conductive lines made of other materials, such as, but not limited to, copper conductive lines. The conductive lines can also be electrically connected to each other through conductive vias.

[0055] In this embodiment, the first circuit board body 100a is described as a four-layer circuit board. Specifically, the first circuit board body 100a includes four first graphene conductive line layers 11 stacked and spaced apart along the thickness direction, and a first dielectric layer 13 located between two adjacent first graphene conductive line layers 11. The first circuit board body 100a may also include four first graphene oxide patterned layers 15 stacked and spaced apart along the thickness direction, wherein each first graphene conductive line layer 11 is embedded in one first graphene oxide patterned layer 15. Preferably, the thickness of the interlocking first graphene conductive line layers 11 is the same as the thickness of the first graphene oxide patterned layer 15.

[0056] The first connection portion 100b may further include a first insulating layer 32 stacked with the first graphene oxide connection layer 31 along the thickness direction, the first insulating layer 32 extending from the first dielectric layer 13.

[0057] For step S2, please refer to [link / reference]. Figure 2 A second circuit board 200 is provided. The second circuit board 200 includes a second circuit board body 200a and a second connection portion 200b. The second circuit board body 200a includes at least one second graphene conductive line layer 21, and the second connection portion 200b extends from the edge of the second circuit board body 200a, and the second connection portion 200b includes a second graphene oxide connection layer 35 extending from the second graphene conductive line layer 21.

[0058] The second circuit board body 200a can be a single-layer circuit board, a double-layer circuit board, or a multi-layer circuit board. In a double-layer or multi-layer circuit board, all conductive lines in the second circuit board body 200a can be made of graphene, or can include conductive lines made of other materials, such as, but not limited to, copper conductive lines. Electrical connections between the conductive lines can also be achieved through conductive vias.

[0059] In this embodiment, the second circuit board body 200a is described as a double-layer circuit board. Specifically, the second circuit board body 200a includes two second graphene conductive line layers 21 stacked and spaced apart along the thickness direction, and a second dielectric layer 23 located between the two second graphene conductive line layers 21. The second circuit board body 200a may also include two second graphene oxide patterned layers 25 stacked and spaced apart along the thickness direction, wherein each second graphene conductive line layer 21 is embedded in one second graphene oxide patterned layer 25. Preferably, the thickness of the interlocking second graphene conductive line layers 21 is the same as the thickness of the second graphene oxide patterned layer 25.

[0060] The second connection portion 200b may further include a second insulating layer 36 stacked with the second graphene oxide connection layer 35 along the thickness direction, the second insulating layer 36 extending from the second dielectric layer 23.

[0061] Step S3, please refer to Figure 3 and Figure 4 The first graphene oxide connecting layer 31 in the first circuit board 100 and the second graphene oxide connecting layer 35 in the second circuit board 200 are laminated and bonded together. The laminated first graphene oxide connecting layer 31 and the second graphene oxide connecting layer 35 are then bonded together using discharge plasma sintering or in-situ electrothermal technology to form a connecting region 30. Specifically, the first graphene oxide connecting layer 31 and the second graphene oxide connecting layer 35 are bonded together after treatment with discharge plasma sintering or in-situ electrothermal technology.

[0062] In this embodiment, specifically, the surface of the first graphene oxide connecting layer 31 facing away from the first insulating layer 32 and the surface of the second graphene oxide connecting layer 35 facing away from the second insulating layer 36 can be bonded together. The first graphene oxide connecting layer 31 and the second graphene oxide connecting layer 35 are welded together by discharge plasma sintering or in-situ electrothermal technology to form a connecting region 30, and then the first insulating layer 32 and the second insulating layer 36 are removed.

[0063] The first insulating layer 32 and the second insulating layer 36 can be removed by means of etching, mechanical cutting, etc.

[0064] For step S4, please refer to [link / reference]. Figure 4 and Figure 5 The welded connection area 30 is patterned using laser photothermal heating to form graphene conductive connection lines 38, which electrically connect the first circuit board body 100a and the second circuit board body 200a. This eliminates the need for connectors or other solder, achieving an electrical connection between the first circuit board 100 and the second circuit board 200. Furthermore, the laser photothermal heating method for forming the graphene conductive connection lines 38 allows for more flexible circuit design and facilitates increased wiring density. Additionally, the material of the graphene conductive connection lines 38 improves the electrical, heat dissipation, and mechanical properties of the entire circuit board assembly.

[0065] In some embodiments, the method for manufacturing the circuit board assembly may further include step S5.

[0066] Step S5, please refer to Figure 6An insulating adhesive layer 39 is formed to cover the connection area 30 having the graphene conductive connection line 38, so that the connection area 30 is electrically insulated from the outside world, while protecting the connection area 30 and enhancing the strength of the area.

[0067] The insulating adhesive layer 39 can be formed by, but is not limited to, dispensing, spraying, printing, etc.

[0068] The first circuit board 100 in this embodiment can be manufactured by, but is not limited to, the following method, which includes the following steps:

[0069] Step S11, please refer to Figure 7 A double-sided graphene oxide substrate 10 is provided, comprising a first graphene oxide layer 10a, a first dielectric layer 10b, and a second graphene oxide layer 10c sequentially stacked along the thickness direction. The first graphene oxide layer 10a includes a main body portion 10a1 and a first graphene oxide connecting layer 31 extending from the main body portion 10a1. The first dielectric layer 10b includes a first dielectric layer 13 and a first insulating layer 32 extending from the first dielectric layer 13. In the thickness direction, the first dielectric layer 13, the main body portion 10a1, and the second graphene oxide layer 10c overlap, and the first insulating layer 32 overlaps with the first graphene oxide connecting layer 31 to form a first connecting portion 100b.

[0070] Step S12, please refer to Figure 8 The main body 10a1 and the second graphene oxide layer 10c are patterned by laser photothermal heating. Parts of the main body 10a1 and the second graphene oxide layer 10c are reduced to form a first graphene conductive circuit layer 11. The unreduced parts of the main body 10a1 and the unreduced parts of the second graphene oxide layer 10c are formed to form a first graphene oxide pattern layer 15. The first graphene conductive circuit layer 11 and the first graphene oxide pattern layer 15 are interlocked to obtain a first intermediate structure 41.

[0071] Step S13, please refer to Figure 9 In the region of the first intermediate structure 41 corresponding to the first dielectric layer 13, single-sided graphene oxide substrates 12 are respectively pressed on both sides along the thickness direction. Each single-sided graphene oxide substrate 12 includes a first dielectric layer 13 and a third graphene oxide layer 12a stacked along the thickness direction, and the side of the first dielectric layer 13 facing away from the third graphene oxide layer 12a is bonded to the first intermediate structure 41.

[0072] Step S14, please refer to Figure 10Each of the third graphene oxide layers 12a is patterned by laser photothermal heating, and a portion of each of the third graphene oxide layers 12a is reduced to form a first graphene conductive circuit layer 11. The unreduced portion of each of the third graphene oxide layers 12a forms a first graphene oxide pattern layer 15, thereby obtaining a second intermediate structure 43.

[0073] Step S15, please refer to Figure 11 as well as Figure 12 A plurality of connection holes 430 are formed on the second intermediate structure 43, each connection hole 430 connecting at least two first graphene conductive circuit layers 11, and conductive material is disposed in each connection hole 430 to form a corresponding conductive hole 433.

[0074] Each of the aforementioned connection holes 430 may be formed by, but is not limited to, laser cutting. The conductive holes 433 may be formed by, but is not limited to, filling the connection holes 430 with conductive paste (e.g., copper paste).

[0075] In some embodiments, the method for manufacturing the first circuit board 100 may further include step S16, see [link to relevant documentation]. Figure 1 Cover films 60 are respectively laminated on both sides of the region of the second intermediate structure 43 that forms the conductive hole 433, corresponding to the region of the first dielectric layer 13, spaced apart along the thickness direction. The region of the first circuit board 100 corresponding to the first dielectric layer 13 is the first circuit board body 100a.

[0076] In the aforementioned first circuit board 100, the first graphene conductive line layer 11 is formed by laser photothermal heating, and the interlocking of the first graphene conductive line layer 11 and the first graphene oxide pattern layer 15 contributes to the flatness of the overall structure of the first circuit board body 100a in the first circuit board 100. Furthermore, the laser photothermal heating method for forming the first graphene conductive line layer 11 allows for more flexible circuit design, which is beneficial for increasing the wiring density of the first circuit board 100. Moreover, the material of the first graphene conductive line layer 11 helps improve the electrical performance, heat dissipation performance, and mechanical performance of the entire circuit board assembly.

[0077] Please see Figure 13This application discloses a circuit board assembly 400 according to one embodiment. The circuit board assembly 400 includes a first circuit board body 100a, a second circuit board body 200a, and a connection region 30a. The first circuit board body 100a includes at least one first graphene conductive line layer 11, the second circuit board body 200a includes at least one second graphene conductive line layer 21, and the connection region 30a includes a first graphene oxide layer 301 and a second graphene oxide layer 303 stacked and bonded along their thickness direction. The first graphene oxide layer 301 extends from the first graphene conductive line layer 11, and the second graphene oxide layer 303 extends from the second graphene conductive line layer 21. The connection region 30a further includes graphene conductive connection lines 38 embedded in the first graphene oxide layer 301 and the second graphene oxide layer 303. The graphene conductive connection lines 38 electrically connect the first graphene conductive line layer 11 and the second graphene conductive line layer 21.

[0078] The connection area 30a may further include an insulating adhesive layer 39, which covers the first graphene oxide layer 301, the second graphene oxide layer 303, and the graphene conductive connection line 38.

[0079] The first circuit board body 100a can be a single-layer circuit board, a double-layer circuit board, or a multi-layer circuit board. In a double-layer or multi-layer circuit board, all conductive lines in the first circuit board body 100a can be made of graphene, or can include conductive lines made of other materials, such as, but not limited to, copper conductive lines. The conductive lines can also be electrically connected to each other through conductive vias.

[0080] In this embodiment, the first circuit board body 100a is described as a four-layer circuit board. Specifically, the first circuit board body 100a includes four first graphene conductive line layers 11 stacked and spaced apart along the thickness direction, and a first dielectric layer 13 located between two adjacent first graphene conductive line layers 11. The first circuit board body 100a may also include four first graphene oxide patterned layers 15 stacked and spaced apart along the thickness direction, wherein each first graphene conductive line layer 11 is embedded in one first graphene oxide patterned layer 15. Preferably, the thickness of the interlocking first graphene conductive line layers 11 is the same as the thickness of the first graphene oxide patterned layer 15.

[0081] The second circuit board body 200a can be a single-layer circuit board, a double-layer circuit board, or a multi-layer circuit board. In a double-layer or multi-layer circuit board, all conductive lines in the second circuit board body 200a can be made of graphene, or can include conductive lines made of other materials, such as, but not limited to, copper conductive lines. Electrical connections between the conductive lines can also be achieved through conductive vias.

[0082] In this embodiment, the second circuit board body 200a is described as a double-layer circuit board. Specifically, the second circuit board body 200a includes two second graphene conductive line layers 21 stacked and spaced apart along the thickness direction, and a second dielectric layer 23 located between the two second graphene conductive line layers 21. The second circuit board body 200a may also include two second graphene oxide patterned layers 25 stacked and spaced apart along the thickness direction, wherein each second graphene conductive line layer 21 is embedded in one second graphene oxide patterned layer 25. Preferably, the thickness of the interlocking second graphene conductive line layers 21 is the same as the thickness of the second graphene oxide patterned layer 25.

[0083] The circuit board assembly and its manufacturing method of this application utilize a first graphene oxide layer 301 (first graphene oxide connecting layer 31) and a second graphene oxide layer 303 (second graphene oxide connecting layer 35) bonded together by discharge plasma sintering or in-situ electrothermal technology, and graphene conductive connection lines 38 formed by laser photothermal heating. These graphene conductive connection lines 38 electrically connect the first circuit board body 100a and the second circuit board body 200a, thus achieving electrical connection between the first circuit board 100 and the second circuit board 200 without the need for connectors or other solder. Furthermore, the laser photothermal heating method for forming the graphene conductive connection lines 38 allows for more flexible circuit design and facilitates increased wiring density. Additionally, the material of the graphene conductive connection lines 38 improves the electrical performance, heat dissipation performance, and mechanical performance of the entire circuit board assembly.

[0084] The above description is merely a preferred embodiment of this application and is not intended to limit this application in any way. Although the preferred embodiment has been disclosed above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A method for manufacturing a circuit board assembly, comprising the following steps: A first circuit board is provided, including a first circuit board body and a first connection portion; wherein the first circuit board body includes at least a first graphene conductive line layer, and the first connection portion includes a first graphene oxide connection layer extending from the first graphene conductive line layer. A second circuit board is provided, including a second circuit board body and a second connection portion; wherein the second circuit board body includes at least one second graphene conductive line layer, and the second connection portion includes a second graphene oxide connection layer extending from the second graphene conductive line layer. The first graphene oxide connecting layer and the second graphene oxide connecting layer are laminated together, and the laminated first graphene oxide connecting layer and the second graphene oxide connecting layer are welded together by discharge plasma sintering or in-situ electrothermal technology to form a connection region; and The connection area is patterned by laser photothermal heating to form graphene conductive connection lines that electrically connect the first circuit board body and the second circuit board body.

2. The method for manufacturing a circuit board assembly as described in claim 1, characterized in that, Also includes: An insulating adhesive layer is formed to cover the patterned connection area.

3. The method for manufacturing a circuit board assembly as described in claim 1, characterized in that, The first circuit board body further includes a first dielectric layer stacked with the first graphene conductive line layer, and the first connection portion further includes a first insulating layer extending from the first dielectric layer and stacked with the first graphene oxide connection layer. Prior to the step of forming the graphene conductive interconnects by laser photothermal heating, the method further includes: Remove the first insulating layer located in the connection area.

4. The method for manufacturing a circuit board assembly as described in claim 3, characterized in that, The first circuit board body further includes a second dielectric layer stacked with the second graphene conductive line layer, and the first connection portion further includes a second insulating layer extending from the second dielectric layer and stacked with the second graphene oxide connection layer. Prior to the step of forming the graphene conductive interconnects by laser photothermal heating, the method further includes: Remove the second insulating layer located in the connection area.

5. The method for manufacturing a circuit board assembly as described in claim 1, characterized in that, The first circuit board body further includes at least one first graphene oxide pattern layer, and each first graphene conductive line layer is inter-embedded with a first graphene oxide pattern layer; the second circuit board body further includes at least one second graphene oxide pattern layer, and each second graphene conductive line layer is inter-embedded with a second graphene oxide pattern layer.

6. The method for manufacturing a circuit board assembly as described in claim 5, characterized in that, The fabrication of the first circuit board includes the following steps: A double-sided graphene oxide substrate is provided, comprising a first graphene oxide layer, a first dielectric layer, and a second graphene oxide layer sequentially stacked along the thickness direction; wherein, the first graphene oxide layer includes a main body portion and a first graphene oxide connecting layer extending from the main body portion, and the first dielectric layer includes a first dielectric layer and a first insulating layer extending from the first dielectric layer; in the thickness direction, the first dielectric layer, the main body portion, and the second graphene oxide layer overlap, and the first insulating layer overlaps with the first graphene oxide connecting layer to form a first connecting portion; The main body and the second graphene oxide layer are patterned by laser photothermal heating. Parts of the main body and the second graphene oxide layer are reduced to form a first graphene conductive circuit layer. The unreduced parts of the main body and the unreduced parts of the second graphene oxide layer form a first graphene oxide pattern layer. The first graphene conductive circuit layer and the first graphene oxide pattern layer are interlocked to obtain a first intermediate structure. Single-sided graphene oxide substrates are respectively laminated on both sides of the region of the first intermediate structure corresponding to the first dielectric layer along the thickness direction. Each single-sided graphene oxide substrate includes a first dielectric layer and a third graphene oxide layer stacked along the thickness direction, and the side of the first dielectric layer away from the third graphene oxide layer is bonded to the first intermediate structure. Each of the third graphene oxide layers is patterned by laser photothermal heating, and a portion of each of the third graphene oxide layers is reduced to form a first graphene conductive circuit layer, while the unreduced portion of each of the third graphene oxide layers forms a first graphene oxide pattern layer, thereby obtaining a second intermediate structure. A plurality of connection holes are formed on the second intermediate structure, each connection hole connecting at least two of the first graphene conductive circuit layers, and conductive material is disposed in each connection hole to form a corresponding conductive hole, thereby obtaining the first circuit board, and the area of ​​the first circuit board corresponding to the first dielectric layer is the first circuit board body.

7. A circuit board assembly, comprising a first circuit board body, a second circuit board body, and a connection area, characterized in that, The first circuit board body includes at least one first graphene conductive line layer, and the second circuit board body includes at least one second graphene conductive line layer. The connection region includes a first graphene oxide layer and a second graphene oxide layer stacked and bonded along the thickness direction. The first graphene oxide layer extends from the first graphene conductive line layer, and the second graphene oxide layer extends from the second graphene conductive line layer. The connection region also includes graphene conductive connection lines embedded in the first graphene oxide layer and the second graphene oxide layer. The graphene conductive connection lines are formed by laser photothermal heating of a portion of the first graphene oxide layer and a portion of the second graphene oxide layer, and electrically connect the first graphene conductive line layer and the second graphene conductive line layer.

8. The circuit board assembly as claimed in claim 7, characterized in that, The connection area also includes an insulating adhesive layer, which covers the first graphene oxide layer, the second graphene oxide layer, and the graphene conductive connection lines.

9. The circuit board assembly as claimed in claim 7, characterized in that, The first circuit board body further includes at least one first graphene oxide pattern layer, and each first graphene conductive line layer is inter-embedded with a first graphene oxide pattern layer; the second circuit board body further includes at least one second graphene oxide pattern layer, and each second graphene conductive line layer is inter-embedded with a second graphene oxide pattern layer.

10. The circuit board assembly as claimed in claim 9, characterized in that, The thickness of the first graphene conductive circuit layer, which is interlocked with each other, is the same as the thickness of the first graphene oxide pattern layer, and the thickness of the second graphene conductive circuit layer, which is interlocked with each other, is the same as the thickness of the second graphene oxide pattern layer.

Images