A method for designing intra-satellite, inter-satellite and satellite-ground integrated data flow based on IPv6 protocol

Abstract

The invention proposes an intra-satellite, inter-satellite, and satellite-ground integrated data flow design method based on the IPv6 protocol, which belongs to the field of electronic system design and comprises an intra-satellite, inter-satellite, and satellite-ground integrated satellite-borne routing device. The intra-satellite, inter-satellite, and satellite-ground integrated satellite-borne routing device adopts a layered design technology and comprises three modules, a processor module, an inter-satellite high-speed forwarding module, and an intra-satellite forwarding module. The processor module is located at a control layer, and the inter-satellite high-speed forwarding module and the intra-satellite forwarding module are located at a forwarding layer. Thus, a control layer and a forwarding layer are separated in an architecture. The control layer is composed of a satellite-borne computer module, and the calculation of a routing table and the control of the entire router are completed by CPU software. The forwarding layer is composed of an inter-satellite high-speed forwarding module and an intra-satellite forwarding module, and the inter-satellite high-speed data forwarding and the intra-satellite data forwarding are respectively performed.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic systems, and specifically provides a method for designing intra-satellite, inter-satellite, and satellite-ground integrated data flows based on the IPv6 protocol. Background Art

[0002] The telemetry, telecontrol and business data processing of traditional satellites must be processed by the CPU software of the onboard computer, and its processing capacity is greatly constrained by the performance of the onboard CPU. The router technology using IP protocol can realize the flexible design of the data flow of the whole satellite and improve the data processing capacity of the whole satellite.

[0003] Through data review and patent search, one of the main methods is to directly use mature ground IP routers for design. In "Spacecraft IP Network Design in the Integrated Space and Earth Network" (Spacecraft Engineering Vol. 26 No. 4), the routers designed by the Manned Spaceflight Department of the China Academy of Space Technology for cargo spacecraft, manned spacecraft and Tiangong Space Station use commercial Ethernet switches. All devices with Ethernet interfaces on the satellite are connected to the switch to realize the routing transmission of data within the satellite. In addition, a gateway is also configured for protocol conversion and data interaction between the earth and the sky. Similarly, the ground station also needs to be configured with a gateway. The advantage of using mature ground commercial routers is that the technological achievements of ground network development can be utilized, and the development cycle is short. However, commercial routers have poor resistance to space radiation environment and are not suitable for satellites that work in orbit for a long time and are unattended.

[0004] Another method is to use non-IP network routers to realize data exchange between individual machines or subsystems in the satellite. In the patent "A satellite payload information flow management system based on intelligent high-speed router" (patent number: CN201210478693.6) disclosed by Ma Wenjie et al., a payload information management system including an intelligent high-speed router, payload equipment, data processing equipment, data storage equipment and data transmission equipment is proposed, wherein the intelligent high-speed router includes a SpaceWire routing module, an intelligent control module and a SpaceWire standard bus interface, and the SpaceWire routing module directly exchanges data from the payload equipment, data processing equipment, data storage equipment and data transmission equipment or outputs the data to the satellite-borne low-speed bus network through the CAN interface of the intelligent control module. The SpaceWire router acts as a high-speed bus to realize data transmission between various devices. Since the IP protocol is not adopted, integration with the ground network cannot be achieved. Summary of the invention

[0005] The problem solved by the technology of the present invention is: to overcome the shortcomings of the existing data processing technology, adopt IPv6 routing technology, and provide a high-speed satellite-borne router supporting integrated routing forwarding of intra-satellite, inter-satellite and satellite-to-ground data.

[0006] The technical solution of the present invention is: the satellite-to-satellite, satellite-to-ground integrated satellite-borne routing device adopts a layered design technology, including three modules, a processor module, an intersatellite high-speed forwarding module and an intrasatellite forwarding module, wherein the processor module is located in the control layer to realize the control of the router, and the intersatellite high-speed forwarding module and the intrasatellite forwarding module are located in the forwarding layer, which are used for forwarding intersatellite data and intrasatellite data respectively. The processor module adopts a standard satellite-borne computer module as the control core of the router, adopts a dynamic routing algorithm to obtain the network routing topology, and generates a routing forwarding table for the intersatellite high-speed forwarding module and the intrasatellite forwarding module. The intersatellite high-speed forwarding module supports the routing forwarding of intersatellite and satellite-to-ground high-speed data, supports 6 ports, and a forwarding rate of 2Gbps. The intrasatellite forwarding module supports the routing forwarding of intrasatellite data and data interaction with the high-speed forwarding module, supports 16 ports, and has an adjustable forwarding rate of up to 20Mbps.

[0007] Based on the above hardware architecture, the telemetry data, remote control data and business data information flows are designed respectively.

[0008] Regarding telemetry data, it is divided into on-satellite equipment telemetry packages and inter-satellite input telemetry packages.

[0009] The telemetry information of the in-satellite equipment is organized into IP datagrams by itself and output to the in-satellite forwarding module FPGA through the LVDS interface. The FPGA routes and outputs to the CPU software according to the destination IP address. The latter completes the telemetry organization of each device, and the software uniformly schedules the telemetry package to realize the priority, downlink frequency and output channel control processing of different telemetry data packets. The CPU software outputs the organized telemetry package to the in-satellite forwarding FPGA1, and the in-satellite forwarding FPGA1 forwards and outputs it to the inter-satellite high-speed forwarding module FPGA2 according to the destination IP address. The inter-satellite high-speed forwarding module FPGA2 selects the telemetry landing downlink or inter-satellite forwarding output to other satellites according to the destination IP address.

[0010] After the intersatellite input telemetry packet reaches the intersatellite high-speed forwarding module FPGA, if it needs to be routed downlink output to the ground station, it does not need to pass through the intra-satellite forwarding module and CPU software but is directly forwarded and output to the high-speed downlink channel. If it needs to be routed and output to other satellites, it is directly forwarded and output from other intersatellite ports.

[0011] Regarding remote control data, if the remote control data received from the satellite-ground uplink channel or the inter-satellite channel is not remote control data of this satellite, it does not need to go through the software, and is directly forwarded and output by the inter-satellite high-speed forwarding module FPGA according to the destination IP address; if it is remote control data for the satellite's own use, the inter-satellite high-speed forwarding module FPGA2 forwards it to the intra-satellite forwarding module FPGA1, and then transfers it to the CPU software, which completes the analysis and processing of the remote control data, and reorganizes and generates IP packets, which are forwarded by the intra-satellite forwarding module FPGA1 to various devices in the satellite. When the ground generates a remote control data frame, the destination IP address is set to the CPU software address of the destination satellite. The remote control data for the satellite's own use is parsed and distributed by the CPU software to ensure the reliability of the remote control data and the safety of the equipment.

[0012] Regarding service data, the service data generated by the intra-satellite equipment is directly forwarded and output to the ground station or other satellites by the intra-satellite forwarding module FPGA1 and the inter-satellite high-speed forwarding module FPGA2. The service data received from other satellites can be directly forwarded and output through the inter-satellite high-speed forwarding module FPGA2, or forwarded and output to the intra-satellite equipment by the inter-satellite high-speed forwarding module FPGA2 and the intra-satellite forwarding module FPGA1. The processing of service data does not need to go through the CPU software, which greatly reduces the burden on the CPU software. The flow of service data can be controlled by sending remote control commands to the intra-satellite equipment that generates the service data.

[0013] Compared with the prior art, the present invention has the following beneficial effects:

[0014] 1. The present invention adopts a separate architecture of the control layer and the forwarding layer. The control layer is composed of a satellite computer module, and the CPU software completes the control of the computer of the routing table and the entire router. The forwarding layer is composed of an inter-satellite high-speed forwarding module and an intra-satellite forwarding module, which respectively forward inter-satellite high-speed data and intra-satellite data;

[0015] Second, the telemetry data packets are uniformly organized and scheduled by the CPU software to realize the priority, downlink frequency and output channel control processing of different telemetry data packets. The telemetry packets are output to the ground station or forwarded between satellites by instructions. The data packets received from other satellites forwarded to the ground station do not need to be scheduled by the CPU software but directly forwarded and output, reducing the burden of CPU software processing; the receiving terminal of the telemetry data packet is controlled by the ground instruction, and the CPU software only needs to set the destination address of the telemetry IP data packet according to the IP address of the receiving terminal, and then output it to the FPGA, and the intersatellite high-speed forwarding module FPGA completes the routing selection and forwarding output, reducing the complexity of the data interaction between the software and FPGA;

[0016] 3. The remote control data packets are received, parsed and distributed by the CPU software to ensure the safety of the entire satellite command. The remote control data packets received and forwarded to other satellites do not need to pass through the CPU software but are directly forwarded and output, reducing the burden of CPU software processing;

[0017] 4. The two-way transmission of business data packets does not go through the CPU software, but is organized by the satellite equipment to forward, output or receive and process it, and the destination address of the business data can be controlled by remote control commands. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a block diagram of the main components of the satellite-to-satellite, satellite-to-ground integrated satellite-borne router device of the present invention;

[0019] Figure 2 The format of IP datagram interaction of the intra-satellite and inter-satellite integrated onboard router device of the present invention;

[0020] Figure 3 It is a schematic diagram of the telemetry data flow of the present invention;

[0021] Figure 4 A schematic diagram of a remote control data flow of the present invention;

[0022] Figure 5 It is a schematic diagram of the business data flow of the present invention. DETAILED DESCRIPTION

[0023] In order to make the purpose and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific embodiments of the present invention, and does not strictly limit the scope of protection of the specific claims of the present invention.

[0024] Example

[0025] See also Figure 1 , which is a main structural principle block diagram of the satellite-based integrated onboard router device of the present invention, a satellite-based integrated onboard data flow design method based on the IPv6 protocol, the satellite-based integrated onboard routing device of the present invention adopts a layered design technology, including three modules, a processor module, an inter-satellite high-speed forwarding module and an intra-satellite forwarding module, wherein the processor module is located in the control layer to realize the control of the router, the inter-satellite high-speed forwarding module and the intra-satellite forwarding module are located in the forwarding layer, and are used for forwarding inter-satellite data and intra-satellite data respectively.

[0026] The CPU module writes control signals and reads telemetry signals to FPGA1 and FPGA2 of the intra-satellite forwarding module and the inter-satellite high-speed forwarding module through the IO interface. At the same time, the CPU and FPGA1 of the intra-satellite forwarding module exchange IP datagrams in format II.

[0027] The satellite forwarding module is based on FPGA1. In order to improve the reliability of FPGA1 in orbit, three-mode redundancy is designed inside the FPGA, and high-reliability devices are used on the periphery to periodically refresh the FPGA. FPGA1 external memory 2 is used to cache the output data of each routing channel. In addition to using format II for IP datagram interaction with the CPU module, format II is also used between the satellite high-speed forwarding module, and format I is used for data interaction with various devices on the satellite.

[0028] The hardware architecture of the inter-satellite high-speed forwarding module is similar to that of the intra-satellite forwarding module, except that the external high-speed interface uses the TLK2711 chip, and the data frame format for external interaction is format III.

[0029] Figure 2 The format of IP datagram interaction of the intra-satellite and inter-satellite integrated onboard router device of the present invention is divided into three formats, namely format I, format II and format III. Format I is 864 bytes, including a 4-byte synchronization header 0x1ACFF1D, a 40-byte IPv6 header, an 818-byte IPv6 data field, and a 2-byte CRC check (CRC1). CRC1 is a CRC check of 858-byte IPv6 datagram data.

[0030] Format I is only used for data interaction between the intra-satellite forwarding module and the intra-satellite routing terminal device. The FPGA1 in the intra-satellite forwarding module only performs routing processing according to the destination IP address in the IPv6 header field.

[0031] Format II is 868 bytes in total, and adds a 4-byte interactive header to Format I. The interactive header field is used to distinguish the type of IP datagram. When the datagram is a Hello packet sent by the CPU module, the intra-satellite forwarding module does not need to route, and the inter-satellite high-speed forwarding module directly determines the output port based on the interactive header to send and output the IPv6 datagram; when the datagram is a routing packet sent by the CPU, the intra-satellite forwarding module and the inter-satellite high-speed forwarding module need to route and output according to the destination address in the IPv6 header.

[0032] Format III has a total of 896 bytes. In addition to the 858-byte IPv6 datagrams in Format I and Format II, it also includes a 4-byte synchronization header 0x1ACFFC1D, a 6-byte AOS header, a 22-byte insertion field + encapsulation header + IPoC header, a 4-byte operation control field and a 2-byte CRC (CRC2). CRC2 performs a CRC check on the 890-byte data that does not include the frame synchronization header. Format III is a data frame format used for inter-satellite and satellite-to-ground IPv6 datagram interaction. It uses the IP over CCSDS standard to carry IPv6 datagrams in the AOS frame format for transmission.

[0033] The conversion between format I and format II is completed in the intra-satellite forwarding module FPGA1. When converting from format I to format II, the exchange header is added according to the routing packet format and then routed and output according to the destination IP; when converting from format II to format I, the exchange header can be directly removed.

[0034] The conversion between format II and format III is completed in the inter-satellite high-speed forwarding module FPGA2. When converting from format II to format III, the interaction header is used to indicate whether it is a Hello packet or a routing packet. If it is a Hello packet, it is directly outputted by selecting a port according to the interaction header after being converted into format III. If it is a routing packet, it is outputted according to the destination IP address. When converting from format III to format II, the interaction header is converted according to the routing packet format and then outputted to the intra-satellite forwarding module.

[0035] Figure 3 The figure shows the telemetry data flow, which includes two types of telemetry data: one is the telemetry data packet generated by the satellite equipment (telemetry 1), and the other is the telemetry data packet received by the satellite input (telemetry 2).

[0036] Telemetry 1 is received by the LVDS interface and input to the intra-satellite forwarding module FPGA1, which then routes and forwards it to the CPU software. The software completes the priority, downlink frequency and output channel control processing of the telemetry packet, and then sends it to the intra-satellite forwarding module routing FPGA1 for forwarding and output to the inter-satellite high-speed forwarding module FPGA2. The FPGA selects whether to output the ground channel 1 to the ground measurement and control station or the inter-satellite channel 1 to other satellites based on the forwarding table and the destination IP address of the telemetry 1 data packet.

[0037] Telemetry 2 is input to the intersatellite high-speed forwarding module FPGA2 through intersatellite channel 2, and directly selects whether to output to the ground channel 1 to the ground tracking and control station or to output to another satellite based on the forwarding table and the destination IP address of the telemetry 2 data packet.

[0038] Figure 4 The figure shows two types of remote control data: one is the remote control data packet used by the satellite equipment (remote control 1), and the other is the remote control data packet forwarded to other satellites (remote control 2).

[0039] The remote control 1 data can enter the intersatellite high-speed forwarding module FPGA2 in two ways, one is to be injected uplink from the ground measurement and control station (ground channel 1), and the other is to be forwarded and inputted from another satellite (intersatellite channel 1). The intersatellite high-speed forwarding module FPGA2 determines that it is a local satellite instruction according to the destination IP address of the remote control 1 data packet, and then forwards it to the intrasatellite forwarding module FPGA1, which then forwards it to the CPU software. The software completes the analysis of the instruction content and receives the input from the LVDS interface to the intrasatellite forwarding module FPGA1, which then routes and forwards it to the CPU software. The CPU software completes the analysis and processing of the remote control 1 data packet, and reorganizes it to generate an IP packet, which is forwarded to the intrasatellite device by the intrasatellite forwarding module FPGA1.

[0040] The remote control 2 data packet can enter the intersatellite high-speed forwarding module FPGA2 in two ways: one is injected by the ground control station (ground channel 1) uplink, and the other is forwarded input through the satellite (intersatellite channel 1). FPGA2 receives the remote control 2 data packet and directly selects the intersatellite channel 2 output according to the forwarding table and the destination IP address of the remote control 2 data packet.

[0041] Figure 5 The figure shows two types of service data: one is the service data packet generated by the equipment of the local satellite (service 1), and the other is the service data packet generated by other satellites and forwarded to the local satellite through the inter-satellite channel (service 2).

[0042] The service 1 data packet is generated by the intra-satellite device 1 itself according to the set terminal IP address. It is output to the intra-satellite forwarding module FPGA1 through LVDS, and then forwarded to the inter-satellite high-speed forwarding module FPGA2. FPGA2 selects the inter-satellite channel 2 for output according to the forwarding table and the destination IP address of the service 1 data packet.

[0043] The service 2 data packet is input to the intersatellite high-speed forwarding module FPGA2 through the intersatellite channel 1. In particular, according to the forwarding table and the destination IP address of the service 2 data packet, it is selected to be directly output through the intersatellite channel 2 or to be output through the intrasatellite forwarding module FPGA1. The service 2 data packet forwarded to FPGA1 is further forwarded to the corresponding intrasatellite device according to its destination IP address.

[0044] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "setting" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in the present invention are understood according to the specific circumstances. In the description of this specification, the description of the reference terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in combination with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0045] The above are only preferred embodiments of the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principles of the present invention, and these improvements and modifications should also be considered as the protection scope of the present invention. The structures, devices and operating methods not specifically described and explained in the present invention shall be implemented according to conventional means in the art unless otherwise specified and limited.

Claims

1. A method for designing intra-satellite, inter-satellite and ground-to-satellite integrated data flows based on IPv6 protocol, characterized in that: It includes an intra-satellite, inter-satellite, and ground-integrated onboard routing device, which adopts a layered design technology and includes three modules: a processor module, an inter-satellite high-speed forwarding module, and an intra-satellite forwarding module; The processor module is located in the control layer and is used to control the router; The inter-satellite high-speed forwarding module and the intra-satellite forwarding module are located in the forwarding layer and are used for forwarding inter-satellite data and intra-satellite data respectively; The processor module uses a standard satellite computer module as the control core of the router, uses a dynamic routing algorithm to obtain the network routing topology, and generates a routing forwarding table for the inter-satellite high-speed forwarding module and the intra-satellite forwarding module; The inter-satellite high-speed forwarding module supports the routing and forwarding of inter-satellite and satellite-to-ground high-speed data, supports 6 ports, and has a forwarding rate of 2 Gbps; The intra-satellite forwarding module supports intra-satellite data routing and forwarding as well as data interaction with the high-speed forwarding module, supports 16 ports, and has an adjustable forwarding rate of up to 20Mbps. The formats of IP datagram interaction of the intra-satellite, inter-satellite, and ground-to-satellite integrated onboard routing equipment are divided into three formats: Format I is 864 bytes, including a 4-byte synchronization header 0x1ACFF1D, a 40-byte IPv6 header, an 818-byte IPv6 data field, and a 2-byte CRC1 checksum. Format I is used for data interaction between the intra-satellite forwarding module and the intra-satellite routing terminal device. The FPGA1 in the intra-satellite forwarding module performs routing processing according to the destination IP address in the IPv6 header field. Format II has a total of 868 bytes, which adds a 4-byte interactive header to format I. The interactive header field is used to distinguish the type of IP datagram. When the datagram is a Hello packet sent by the processor module, the intra-satellite forwarding module does not need to route and directly forwards it to the inter-satellite high-speed forwarding module. The inter-satellite high-speed forwarding module directly determines the output port according to the interactive header to send and output the IPv6 datagram. When the datagram is a routing packet sent by the processor module, the intra-satellite forwarding module and the inter-satellite high-speed forwarding module perform routing output according to the destination address in the IPv6 header. Format III has a total of 896 bytes. In addition to the 858-byte IPv6 datagrams in Format I and Format II, it also includes a 4-byte synchronization header 0x1ACFFC1D, a 6-byte AOS header, a 22-byte insertion field + encapsulation header + IPoC header, a 4-byte operation control field and a 2-byte CRC2. CRC2 is a CRC check for the 890-byte data that does not include the frame synchronization header. Format III is used for the data frame format for inter-satellite and satellite-to-ground IPv6 datagram interaction. It adopts the IP over CCSDS standard and carries IPv6 datagrams in the AOS frame format for transmission. The inter-satellite high-speed forwarding module is based on FPGA2, and a triple-mode redundancy design is implemented inside FPGA2, and a circuit is used on the periphery to periodically refresh FPGA2; The intra-satellite forwarding module is based on FPGA1, and a triple-mode redundancy design is implemented inside FPGA1, and a circuit is used on the periphery to periodically refresh FPGA1; The processor module writes control signals and reads telemetry signals to the FPGA1 and FPGA2 of the intra-satellite forwarding module and the inter-satellite high-speed forwarding module through the IO interface, and at the same time, the processor module and the FPGA1 of the intra-satellite forwarding module exchange IP datagrams in format II; The data types processed by the intra-satellite, inter-satellite, and satellite-to-ground integrated onboard routing device include telemetry data, remote control data, and service data; The telemetry data includes a telemetry data packet generated by the satellite device, namely, a telemetry data packet 1, and a telemetry data packet received by other satellites, namely, a telemetry data packet 2; The remote control data includes a remote control data packet used by the local satellite equipment, namely a remote control data packet 1, and a remote control data packet forwarded and output to other satellites, namely a remote control data packet 2; The service data includes a service data packet generated by the equipment of the local satellite, namely, a service 1 data packet, and a service data packet generated by another satellite and forwarded to the local satellite through an inter-satellite channel, namely, a service 2 data packet; The telemetry 1 data packet is received by the LVDS interface and input to the intra-satellite forwarding module FPGA1, which then routes and forwards it to the processor module software. The processor module software completes the priority, downlink frequency and output channel control processing of the telemetry data packet, and then sends it to the intra-satellite forwarding module routing FPGA1 to forward it to the inter-satellite high-speed forwarding module FPGA2. FPGA1 and FPGA2 select the ground channel 1 to output to the ground control station or the other satellite channel, that is, the inter-satellite channel 1 to output to other satellites according to the forwarding table and the destination IP address of the telemetry 1 data packet. The telemetry 2 data packet is inputted into the intersatellite high-speed forwarding module FPGA2 through the intersatellite channel 2, and directly selects the ground channel 1 to output to the ground control station or the intersatellite channel 1 to output to another satellite according to the forwarding table and the destination IP address of the telemetry 2 data packet; The remote control 1 data packet data enters the inter-satellite high-speed forwarding module FPGA2 in two ways, one is injected by the ground control station, that is, the ground channel 1 uplink, and the other is forwarded input through the inter-satellite channel 1; the inter-satellite high-speed forwarding module FPGA2 determines that it is a local satellite instruction according to the destination IP address of the remote control 1 data packet, and then forwards it to the intra-satellite forwarding module FPGA1, which then routes and forwards it to the processor module software, and the processor module software completes the parsing and processing of the remote control 1 data packet, and reorganizes and generates an IP packet, which is forwarded to the intra-satellite forwarding module FPGA1 to the intra-satellite device; The remote control 2 data packet enters the intersatellite high-speed forwarding module FPGA2 in two ways: one is injected by the ground control station, that is, the ground channel 1 uplink, and the other is forwarded input through the intersatellite channel 1; FPGA2 receives the remote control 2 data packet and directly selects the intersatellite channel 2 output according to the forwarding table and the destination IP address of the remote control 2 data packet; The service 1 data packet is generated by the intra-satellite device 1 itself according to the set terminal IP address, output to the intra-satellite forwarding module FPGA1 through LVDS, and then forwarded to the inter-satellite high-speed forwarding module FPGA2, and FPGA2 selects the inter-satellite channel 2 for output according to the forwarding table and the destination IP address of the service 1 data packet; The service 2 data packet is input from the inter-satellite channel 1 to the inter-satellite high-speed forwarding module FPGA2. According to the forwarding table and the destination IP address of the service 2 data packet, it is selected to be output directly through the inter-satellite channel 2 or to be output by the intra-satellite forwarding module FPGA1. The service 2 data packet forwarded to FPGA1 is further forwarded to the corresponding intra-satellite device according to its destination IP address.

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