Circuit board and method of manufacturing the same, package structure

Abstract

A manufacturing method of a circuit board is provided. The method includes the following steps. A circuit substrate is provided. The circuit substrate includes a substrate layer and a plurality of first lines disposed on the substrate layer. Two adjacent first lines have a gap. A portion of the substrate layer is exposed at the bottom of the gap. A photosensitive resin layer is disposed on the first lines. A portion of the photosensitive resin layer is filled in the gap. A portion of the photosensitive resin around the first lines is exposed to form an insulating shell. The insulating shell and the substrate layer cover the first lines. A portion of the photosensitive resin not exposed is removed to form a plurality of first openings. Second lines are disposed in the first openings. In addition, a circuit board and a packaging structure are provided.

Description

TECHNICAL FIELD

[0001] The present application relates to a circuit board and a manufacturing method thereof, and a packaging structure. BACKGROUND

[0002] The circuit board generally comprises dielectric layers, a conductive structure and a plurality of circuit layers, the dielectric layers are arranged between every two adjacent circuit layers, and the conductive structure is arranged in the dielectric layers to realize the electrical conduction of the circuit layers.

[0003] Generally, the circuit layers can be formed by setting a photosensitive pattern with a plurality of electroplating grooves on the dielectric layer, and then electroplating in the electroplating grooves, and repeating the above steps to make a plurality of circuit layers. However, the above process has low circuit density, and there is redundant wiring space in the circuit board, which is not conducive to the miniaturization and high density development of the circuit board. SUMMARY

[0004] To solve the problems in the background art, the present application provides a manufacturing method of a circuit board.

[0005] In addition, it is necessary to provide a circuit board.

[0006] In addition, it is necessary to provide a packaging structure.

[0007] A manufacturing method of a circuit board, comprising the steps of: providing a circuit substrate, the circuit substrate comprising a substrate layer and a plurality of first circuits arranged on the substrate layer, adjacent two of the first circuits having a gap, and part of the substrate layer being exposed at the bottom of the gap; setting a photosensitive resin layer on the first circuits, and part of the photosensitive resin being filled into the gap; exposing part of the photosensitive resin around the first circuits to form an insulating shell, the insulating shell and the substrate layer covering the first circuits; removing the unexposed part of the photosensitive resin to form a plurality of first openings; and setting second circuits in the first openings to obtain the circuit board.

[0008] Further, the substrate layer is transparent to ultraviolet light, the substrate layer comprises a first surface and a second surface opposite to the first surface, the first circuits are arranged on the first surface, and the manufacturing method further comprises the steps of: emitting ultraviolet light towards the first surface, so that the photosensitive resin around the first circuits is irradiated by the ultraviolet light to form an intermediate body; and emitting ultraviolet light towards the second surface, so that the intermediate body is irradiated by the ultraviolet light passing through the substrate layer to form the insulating shell.

[0009] Further, the manufacturing method further comprises the steps of: abrading the first circuits and the second circuits, so that the side of the first circuits away from the substrate layer and the side of the second circuits away from the substrate layer are flush.

[0010] Further comprising the step of: providing a plurality of second openings through the substrate layer, part of the first lines are exposed at the bottom of the second openings. A third line is provided on the side of the substrate layer away from the first lines, part of the third line fills into the second openings to form a first conducting body, the first conducting body electrically connects part of the first lines and part of the third line.

[0011] Further comprising the step of: providing a plurality of second conducting bodies on part of the first lines, the second conducting bodies are provided corresponding to the first conducting bodies.

[0012] Further comprising the step of: providing a first protective layer on the first lines and the second lines, the first protective layer is provided with a window, the second conducting bodies and the plurality of second lines are exposed in the window, and providing a second protective layer on the third line.

[0013] A circuit board, comprising a substrate layer, a plurality of first lines, a plurality of second lines and a plurality of insulating shells, the first lines and the second lines are staggered on one side of the substrate layer, and the insulating shells are provided between every two adjacent first lines and second lines to electrically isolate the first lines and the second lines.

[0014] Further comprising a third line, a first conducting body and a second conducting body, the third line is provided on the other side of the substrate layer, the first conducting body is provided in the substrate layer and electrically connects the third line and the first line, and the second conducting body is provided on the first line, the second conducting body is provided corresponding to the first conducting body.

[0015] Further comprising a first protective layer and a second protective layer, the first protective layer is provided on the first lines and the second lines, the first protective layer is provided with a window, the second conducting bodies, the plurality of first lines and the plurality of second lines are exposed in the window, and the second protective layer is provided on the third line to cover the third line.

[0016] A packaging structure, comprising a first chip, a second chip and a circuit board as described above, the first chip and the second chip are provided in the window, the first chip is provided above the second chip, the height of the first conducting body is greater than the thickness of the second chip, the first chip is electrically connected to the first line through the second conducting body, and the second chip is electrically connected to the second line.

[0017] Compared with the prior art, the manufacturing method of the circuit board provided by the application fully utilizes the space on one side of the substrate layer by arranging the plurality of first lines and the plurality of second lines in an interlaced manner on the same side of the substrate layer and arranging the insulating shell between each adjacent first line and second line, thereby facilitating the improvement of the wiring density of the circuit board and the miniaturization and high-density development of the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A schematic diagram of a single-sided copper-clad substrate provided by an embodiment of the application.

[0019] Figure 2 A schematic diagram of the single-sided copper-clad substrate provided with a first dry film. Figure 1

[0020] Figure 3 A schematic diagram of the first dry film after partial exposure. Figure 2

[0021] A schematic diagram of the first dry film after removal of the unexposed part. Figure 4 Figure 3 A schematic diagram of the single-sided copper-clad substrate provided with a first electroplated line.

[0022] Figure 5 Figure 4 A schematic diagram of the first dry film after removal of the unexposed part.

[0023] Figure 6 A schematic diagram of the first dry film after removal of the unexposed part. Figure 5

[0024] A schematic diagram of a circuit board substrate provided by an embodiment of the application. Figure 7

[0025] A schematic diagram of the circuit board substrate provided with a photosensitive resin layer. Figure 8 Figure 7 A schematic diagram of the photosensitive resin layer after exposure.

[0026] Figure 9 Figure 8 A schematic diagram of the photosensitive resin layer after removal of the unexposed part.

[0027] Figure 10 A schematic diagram of the photosensitive resin layer after removal of the unexposed part. Figure 9

[0028] A schematic diagram of the substrate layer provided with a second opening. Figure 11 Figure 10 A schematic diagram of the substrate layer provided with a seed layer.

[0029] Figure 12 Figure 11 A schematic diagram of the substrate layer provided with a seed layer. ​​​​​​​

[0030] Figure 13 A schematic view of the seed layer shown in FIG. 8A after disposing a plating layer thereon. Figure 12

[0031] Figure 14 A schematic view of the plating layer shown in FIG. 8B after disposing a third dry film thereon. Figure 13

[0032] Figure 15 A schematic view of the third dry film shown in FIG. 8C after exposure. Figure 14

[0033] Figure 16 A schematic view of the plating layer shown in FIG. 8D after disposing a third photosensitive pattern thereon. Figure 15

[0034] Figure 17 A schematic view of the plating layer shown in FIG. 8E after disposing a second plating line thereon. Figure 16

[0035] Figure 18 A schematic view of the third photosensitive pattern shown in FIG. 8F after removal. Figure 17

[0036] A schematic view of a circuit board provided by an embodiment of the present application. Figure 19

[0037] A schematic view of a packaging structure provided by an embodiment of the present application. Figure 20 Main element symbol explanation

[0038] Circuit board 100

[0039] Circuit substrate 10

[0040] Substrate layer 11

[0041] First surface 111

[0042] Second surface 112

[0043] Second opening 113

[0044] First line 12

[0045] Single-sided copper-clad substrate 20

[0046] Copper foil layer 21

[0047] First dry film 22

[0048] First photosensitive pattern 23

[0049] First plating groove 231

[0050]

[0051] ​​​​​​First electroplating line 24

[0052] First mask plate 25

[0053] First light transmission hole 251

[0054] Second mask plate 26

[0055] Second light transmission hole 261

[0056] Photosensitive resin layer 30

[0057] Insulating shell 31

[0058] Photosensitive resin body 33

[0059] First opening 34

[0060] Second line 41

[0061] Seed layer 51

[0062] First conductive body 52

[0063] Electroplating layer 53

[0064] Second dry film 54

[0065] Second photosensitive pattern 541

[0066] Second electroplating groove 542

[0067] Third dry film 55

[0068] Third photosensitive pattern 551

[0069] Third electroplating groove 552

[0070] Second electroplating line 61

[0071] Second conductive body 62

[0072] Third line 63

[0073] First protective layer 70

[0074] First anti-welding layer 71

[0075] First adhesive layer 72

[0076] Nickel-gold layer 73

[0077] Window 701

[0078] Second protective layer 80

[0079] Second adhesive layer 81

[0080] Second anti-welding layer 82

[0081] Gap S

[0082] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0083] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0084] It should be noted that when a component is considered to be "connected" to another component, it can be directly connected to the other component or may also exist in an intervening component. When a component is considered to be "set on" another component, it can be directly set on the other component or may also exist in an intervening component.

[0085] Please see Figures 1 to 19 This application provides a method for manufacturing a circuit board 100, including the following steps:

[0086] S1: Please see Figure 7 A circuit board 10 is provided, the circuit board 10 includes a substrate layer 11 and a plurality of first lines 12 disposed on one side of the substrate layer 11. The first lines 12 are spaced apart, and there is a gap S between each two adjacent first lines 12. A portion of the substrate layer 11 is exposed at the bottom of the gap S.

[0087] Please see Figures 1 to 7 In this embodiment, the manufacturing method of the circuit board 10 includes the following steps:

[0088] S10: Please refer to Figure 1 A single-sided copper-clad substrate 20 is provided, the single-sided copper-clad substrate 20 including a substrate layer 11 and a copper foil layer 21 disposed on the substrate layer 11. The substrate layer 11 has a first surface 111 and a second surface 112 opposite to the first surface 111, and the copper foil layer 21 is disposed on the first surface 111. The substrate layer 11 is made of at least one of polyimide, polycarbonate, fluorinated polyimide, and dioxane, and the substrate layer 11 is transparent to ultraviolet light.

[0089] S11: Please refer to Figure 2 A first dry film 22 is disposed on the copper foil layer 21, and the thickness D1 of the first dry film 22 is greater than 60 micrometers. The material of the first dry film 22 includes film-forming resin, photopolymerizable monomers and photoinitiators, etc., and ultraviolet light irradiation can induce the photopolymerizable monomers to undergo a polymerization reaction.

[0090] S12: Please refer to Figure 3 andFigure 4 exposing and developing the first dry film 22 to form a first photosensitive pattern 23, the first photosensitive pattern 23 having a plurality of first electroplating grooves 231 with a trapezoidal cross-sectional shape, and part of the copper foil layer 21 exposed at the bottom of the first electroplating grooves 231. The reason that the cross-sectional shape of the first electroplating grooves 231 is trapezoidal is that the first dry film 22 has strong absorption to ultraviolet light during the exposure process, and the thickness D1 of the first dry film 22 is greater than 60 microns, which results in that the outside of the first dry film 22 is sufficient in ultraviolet light and the polymerization reaction is sufficient, while the ultraviolet light reaching the inside of the first dry film 22 (i.e., the side close to the copper foil layer 21) is weakened and the polymerization reaction is not sufficient, thereby resulting in that after the unexposed part of the first dry film 22 is removed subsequently, the first electroplating grooves 231 with a substantially trapezoidal shape are formed.

[0091] S13: Please refer to Figure 5 electroplating a plurality of first electroplating lines 24 in the first electroplating grooves 231, the first electroplating lines 24 being electrically connected to the copper foil layer 21, and the cross-sectional shape of the first electroplating lines 24 being substantially a right trapezoidal shape.

[0092] S14: Please refer to Figure 6 removing the first photosensitive pattern 23, please refer to Figure 7 and then etching to remove part of the copper foil layer 21 not covered by the first electroplating lines 24 to obtain the circuit substrate 10. Wherein, the plurality of first electroplating lines 24 and the part of the copper foil layer 21 covered by the first electroplating lines 24 collectively form a plurality of first lines 12, and each adjacent two first lines 12 have a gap S therebetween.

[0093] S2: Please refer to Figure 8 disposing a photosensitive resin layer 30 on the first lines 12, and part of the photosensitive resin layer 30 also fills into the gap S to form a photosensitive resin body 33. Like the first dry film 22 layer, the photosensitive resin layer 30 also includes film-forming resin, photopolymerizable monomer, and photoinitiator, etc., and can cause the photopolymerizable monomer to undergo polymerization reaction after irradiation of ultraviolet light. Unlike the first dry film 22, the photosensitive resin layer 30 also includes high-temperature-resistant components, such as polyimide resin, etc.

[0094] S3: Please refer to Figure 9 exposing the photosensitive resin layer 30 located on the top of the first lines 12 and part of the photosensitive resin body 33 disposed on the side wall of the first lines 12 to form an insulating shell 31, and the insulating shell 31 and the substrate layer 11 collectively cover the first lines 12. Since the insulating shell 31 has high-temperature-resistant components, the insulating shell 31 has excellent high-temperature resistance, and thus can be used to constitute dielectric materials in the circuit board 100 to achieve electrical isolation of the lines.

[0095] In the present embodiment, step S3 comprises:

[0096] S31: Please refer to Figure 9 , a first mask 25 is arranged on the photosensitive resin layer 30, the first mask 25 is provided with a plurality of first light transmission holes 251, and a second mask 26 is arranged on the substrate layer 11, the second mask 26 is provided with a plurality of second light transmission holes 261. The photosensitive resin layer 30 has a thickness direction (not shown in the figure), and the projection of each of the first light transmission hole 251 and the second light transmission hole 261 corresponds to the projection of the first circuit 12 and the part of the photosensitive resin body 33 arranged on the side wall adjacent to the first circuit 12.

[0097] S32: Please refer to Figure 9 , ultraviolet light is emitted towards the first mask 25 (not shown in the figure), the ultraviolet light passes through the first light transmission hole 251 and irradiates part of the photosensitive resin layer 30 to form an intermediate body (not shown in the figure), and the ultraviolet light is emitted towards the second mask 26, the ultraviolet light passes through the second light transmission hole 261 and the substrate layer 11 to irradiate the intermediate body to form the insulating shell 31. Among them, considering that part of the area of the intermediate body is insufficiently irradiated by ultraviolet light, therefore, the present application uses ultraviolet light to irradiate this part of the area again from the second light transmission hole 261 to form the insulating shell 31.

[0098] S4: Please refer to Figure 10 , the first mask 25 and the second mask 26 are removed, and the unexposed part of the photosensitive resin layer 30 and the unexposed part of the photosensitive resin body 33 are removed, so that a first opening 34 is formed between every two adjacent insulating shells 31, and the first surface 111 of part of the substrate layer 11 is exposed at the bottom of the first opening 34. Among them, the cross-sectional shape of the first opening 34 is roughly inverted trapezoidal.

[0099] S5: Please refer to Figures 10 to 13 , a plurality of second circuits 41 are formed by electroplating in a plurality of first openings 34, and the second circuits 41 are electrically isolated from the first circuits 12 by the insulating shells 31. At the same time, the cross-sectional shape of the second circuit 41 is roughly inverted trapezoidal, so that the second circuit 41 is complementary to the first circuit 12 with a cross-sectional shape of upright trapezoidal, thereby facilitating the full use of the wiring space on one side of the substrate layer 11. It can be understood that if the second circuit 41 is made according to the conventional additive method, the first circuit 12 and the second circuit 41 will be arranged in different layers respectively, which may cause the waste of wiring space in the layer where the first circuit 12 is arranged or the layer where the second circuit 41 is arranged.

[0100] In the present embodiment, step S5 comprises:

[0101] S50: Please refer to Figure 11 , a plurality of second openings 113 are formed through the substrate layer 11, and part of the first circuit 12 is exposed at the bottom of the second opening 113.

[0102] S51: Please refer to Figure 12 , a seed layer 51 is arranged on the second surface 112, the exposed part of the first surface 111, and the inner wall of the second opening 113. The material of the seed layer 51 includes conductive metal, such as nickel, gold, copper, etc. The material of the seed layer 51 also includes conductive non-metal, such as graphite, etc.

[0103] S52: Please refer to Figure 13 , a plurality of second circuits 41 are formed by electroplating in the first opening 34 with the seed layer 51, a first conductive body 52 is formed by electroplating in the second opening 113 with the seed layer 51, and an electroplated layer 53 is formed by electroplating on the substrate layer 11 with the seed layer 51. The first conductive body 52 is electrically connected to the first circuit 12 and the electroplated layer 53.

[0104] S52: Please refer to Figure 13 , part of the insulating shell 31, the first circuit 12, and the second circuit 41 are abraded, so that the first circuit 12 is exposed, and the side of the first circuit 12 away from the substrate layer 11 and the side of the second circuit 41 away from the substrate layer 11 are flush, thereby facilitating subsequent layering on the first circuit 12 and the second circuit 41.

[0105] Please refer to Figures 14 to 19 , in this embodiment, the manufacturing method of the circuit board 100 further comprises the following steps:

[0106] S6: Please refer to Figure 14 , a second dry film 54 is arranged on the side of the first circuit 12 and the second circuit 41 away from the substrate layer 11, and a third dry film 55 is arranged on the electroplated layer 53. The second dry film 54 and the third dry film 55 are simultaneously laminated, thereby reducing the deformation of the first circuit 12 and the second circuit 41 caused by uneven stress.

[0107] S7: Please refer to Figure 15 , part of the second dry film 54 is exposed to form a second photosensitive pattern 541, and part of the third dry film 55 is exposed to form a third photosensitive pattern 551. Please refer to Figure 16, removing unexposed portions of the second dry film 54 to form a plurality of second plating grooves 542, the first circuit 12 being exposed at the bottom of the second plating grooves 542, and removing unexposed portions of the third dry film 55 to form a plurality of third plating grooves 552.

[0108] S8: Please refer to Figure 17 , electroplating a plurality of second conductive bodies 62 in the second plating grooves 542, the second conductive bodies 62 being electrically connected to portions of the first circuit 12, and electroplating in the third plating grooves 552 to form a plurality of second plated circuits 61, the second plated circuits 61 being electrically connected to the plated layer 53.

[0109] S9: Please refer to Figure 18 , removing portions of the plated layer 53, the remaining portions of the second plated circuits 61 and the plated layer 53 corresponding to the remaining portions of the second plated circuits 61 together constituting third circuits 63. Then the second photosensitive pattern 541 and the third photosensitive pattern 551 are removed.

[0110] S10: Please refer to Figure 19 , disposing a first protective layer 70 on the first circuit 12 and the second circuit 41, the first protective layer 70 comprising a first anti-welding layer 71 and a first adhesive layer 72, the first adhesive layer 72 being disposed on the first circuit 12 and the second circuit 41, and the first anti-welding layer 71 being disposed on the first adhesive layer 72. The first protective layer 70 is provided with a window 701, a plurality of the second conductive bodies 62, a plurality of the first circuits 12 and a plurality of the second circuits 41 being exposed in the window 701. Then a nickel-gold layer 73 is disposed on the outer side of the second conductive bodies 62, the first circuits 12 and the second circuits 41.

[0111] , disposing a second protective layer 80 on the third circuit 63, the second protective layer 80 comprising a second adhesive layer 81 and a second anti-welding layer 82, the second adhesive layer 81 being disposed on the third circuit 63, and portions of the second adhesive layer 81 being filled into the gaps between adjacent two third circuits 63, and the second anti-welding layer 82 being disposed on the second adhesive layer 81, finally obtaining the circuit board 100.

[0112] Compared with the prior art, the manufacturing method of the circuit board 100 provided by the present application has the following advantages:

[0113] (1) By disposing a plurality of first circuits 12 and a plurality of second circuits 41 on the same side of the substrate layer 11 in a staggered manner, and disposing an insulating shell 31 between each adjacent first circuit 12 and second circuit 41, the space on one side of the substrate layer 11 is fully utilized, which is conducive to improving the wiring density of the circuit board 100.

[0114] (ii) exposing the photosensitive resin (including the photosensitive resin layer 30, i.e., the photosensitive resin body 33) by double-sided exposure, so that the thicker photosensitive resin can be exposed sufficiently, thereby forming the insulating shell 31.

[0115] Referring to Figure 19 The circuit board 100 includes a substrate layer 11, a plurality of first lines 12, a plurality of second lines 41, and a plurality of insulating shells 31. The first lines 12 and the second lines 41 are arranged alternately on one side of the substrate layer 11, and the insulating shells 31 are arranged between every two adjacent first lines 12 and second lines 41 to electrically isolate the first lines 12 and the second lines 41.

[0116] Referring to Figure 19 In this embodiment, the circuit board 100 further includes a third line 63, a first conductive body 52, and a second conductive body 62. The third line 63 is arranged on the other side of the substrate layer 11, the first conductive body 52 is arranged in the substrate layer 11 and electrically connects the third line 63 and the first line 12, and the second conductive body 62 is arranged on the first line 12, and the second conductive body 62 is arranged correspondingly to the first conductive body 52.

[0117] Referring to Figure 19 In this embodiment, the circuit board 100 further includes a first protective layer 70 and a second protective layer 80. The first protective layer 70 is arranged on the first line 12 and the second line 41, and the first protective layer 70 is provided with a window 701, and the second conductive body 62, the plurality of first lines 12, and the plurality of second lines 41 are exposed in the window 701. The second protective layer 80 is arranged on the third line 63 to cover the third line 63. The first protective layer 70 is used to prevent the first line 12 and the second line 41 from being corroded, and the second protective layer 80 is used to prevent the third line 63 from being corroded.

[0118] Referring to Figure 20 The packaging structure 200 includes a first chip 91, a second chip 92, and the circuit board 100. The first chip 91 and the second chip 92 are arranged in the window 701, the first chip 91 is arranged above the second chip 92, the height (not shown in the figure) of the second conductive body 62 is greater than the thickness (not shown in the figure) of the second chip 92, the first chip 91 is electrically connected to the first line 12 through the second conductive body 62, and the second chip 92 is electrically connected to the second line 41.

[0119] In the embodiment, the first chip 91 and the second chip 92 are both arranged on the nickel-gold layer 73, and the nickel-gold layer 73 between the first chip 91 and the second conducting body 62 can be used to improve the conduction performance of the first chip 91 and the second conducting body 62, and the nickel-gold layer 73 between the second chip 92 and the second circuit 42 can be used to improve the conduction performance of the second chip 92 and the second circuit 42.

[0120] In addition, those skilled in the art can make other changes within the spirit of the present application, of course, these changes made according to the spirit of the present application should be included in the scope of the present application.

Claims

1. A method of manufacturing a circuit board, characterized by, The method comprises the steps of: providing a circuit substrate comprising a substrate layer and a plurality of first lines arranged on one surface of the substrate layer, two adjacent first lines having a gap therebetween, and part of the substrate layer being exposed at the bottom of the gap; arranging a photosensitive resin on the first lines, part of the photosensitive resin being filled into the gap; exposing part of the photosensitive resin around the first lines to form an insulating shell, the insulating shell and the substrate layer covering the first lines; removing the unexposed part of the photosensitive resin to form a plurality of first openings; and arranging a plurality of second lines in the first openings to obtain the circuit board. The manufacturing method of the circuit substrate comprises the steps of: providing a single-sided copper-clad substrate comprising a substrate layer and a copper foil layer arranged on the substrate layer; arranging a first dry film on the copper foil layer, the thickness of the first dry film being greater than 60 microns; exposing and developing the first dry film to form a first photosensitive pattern, the first photosensitive pattern having a plurality of first electroplating grooves with a trapezoidal cross-sectional shape, and part of the copper foil layer being exposed at the bottom of the first electroplating grooves; electroplating a plurality of first electroplating lines in the first electroplating grooves, the first electroplating lines being electrically connected to the copper foil layer; removing the first photosensitive pattern; and etching to remove part of the copper foil layer not covered by the first electroplating lines to obtain the circuit substrate. The first lines and the second lines have a trapezoidal cross-section and are arranged in a staggered complementary manner. The substrate layer comprises a first surface and a second surface opposite to the first surface, the first lines being arranged on the first surface, and the exposing specifically comprises the steps of:

2. The production method according to claim 1, wherein emitting ultraviolet light towards the first surface, so that the photosensitive resin around the first lines is irradiated by the ultraviolet light to form an intermediate body; emitting ultraviolet light towards the second surface, so that the intermediate body is irradiated by the ultraviolet light passing through the substrate layer to form the insulating shell. The manufacturing method further comprises:

3. The production method according to claim 1, wherein grinding the first lines and the second lines so that the side of the first lines away from the substrate layer and the side of the second lines away from the substrate layer are flush. The method further comprises the steps of:

4. The production method according to claim 1, wherein arranging a plurality of second openings through the substrate layer, part of the first lines being exposed at the bottom of the second openings; arranging third lines on the side of the substrate layer away from the first lines, part of the third lines being filled into the second openings to form first conductive bodies, the first conductive bodies being electrically connected to part of the first lines and part of the third lines. The method further comprises the steps of:

5. The production method according to claim 4, wherein arranging a plurality of second conductive bodies on part of the first lines, the second conductive bodies being arranged correspondingly to the first conductive bodies. The method further comprises the steps of:

6. The production method according to claim 5, wherein arranging a first protective layer on the first lines and the second lines, the first protective layer being provided with a window, the second conductive bodies and the plurality of second lines being exposed in the window; and arranging a second protective layer on the third lines. ​ ​ 7. A circuit board manufactured by the method of any one of claims 1 to 6, wherein The circuit board includes a substrate layer, a plurality of first lines, a plurality of second lines, and a plurality of insulating shells. The first lines are arranged on a surface of the substrate layer. Adjacent two of the first lines have a gap. The insulating shells are arranged around the first lines. The insulating shells and the substrate layer cover the first lines. A first opening is arranged between adjacent two of the insulating shells. Each of the second lines is arranged in one of the openings. The first lines and the second lines are arranged in an interleaved manner. The insulating shells electrically isolate the first lines and the second lines. Cross sections of the first lines and the second lines are trapezoidal and arranged in an interleaved complementary manner.

8. The circuit board of claim 7, wherein, The circuit board further includes a third line, a first conductive body, and a second conductive body. The third line is arranged on another side of the substrate layer. The first conductive body is arranged in the substrate layer and electrically connects the third line and the first line. The second conductive body is arranged on the first line. The second conductive body is arranged corresponding to the first conductive body.

9. The circuit board of claim 8, wherein, The circuit board further includes a first protective layer and a second protective layer. The first protective layer is arranged on the first lines and the second lines. The first protective layer is provided with a window. The second conductive body, the first lines, and the second lines are exposed in the window. The second protective layer is arranged on the third line to cover the third line.

10. A package structure, characterized by, The circuit board further includes a first chip and a second chip. The first chip and the second chip are arranged in the window. The first chip is arranged above the second chip. A height of the first conductive body is greater than a thickness of the second chip. The first chip is electrically connected to the first line through the second conductive body. The second chip is electrically connected to the second line.

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