Power converter and control method thereof

The power converter manages energy storage capacitor connections based on rectified voltage cycles to reduce capacitance needs, using smaller, longer-lasting capacitors, thus improving power density and extending the converter's lifespan.

CN115882737BActive Publication Date: 2025-01-03SG MICRO CORP
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Patent Information

Application Number
CN202110941199.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-08-17
Publication Date
2025-01-03
Estimated Expiration
2041-08-17

AI Technical Summary

Technical Problem

Existing AC/DC converters rely on electrolytic capacitors, which have a short lifespan and limited voltage and capacitance, leading to reduced power density and shortened service life, while alternatives like film or ceramic capacitors cannot meet the capacitance requirements without compromising power factor.

Method used

A power converter design that includes a rectifier bridge, energy storage capacitor, and a capacitor access control circuit to manage the connection of the energy storage capacitor based on rectified voltage cycles, disconnecting it at peak values and reconnecting it when the voltage difference meets a preset threshold, allowing for the use of smaller, longer-lasting capacitors.

Benefits of technology

This approach reduces the capacitance needs of energy storage capacitors, enabling the use of film or ceramic capacitors, thereby enhancing power density and extending the converter's lifespan while maintaining efficient power factor correction.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application discloses a power converter and a control method thereof. The power converter includes a rectifier bridge, an energy storage capacitor, and a capacitor access control circuit. The capacitor access control circuit disconnects the energy storage capacitor when the rectified voltage reaches a peak value, and reconnects the energy storage capacitor when the rectified voltage drops to a preset value, so that the energy storage capacitor is always kept at the highest energy storage and is only connected to the energy storage capacitor for discharge when necessary, thereby reducing the use of the energy storage capacitor, greatly reducing the capacitance of the energy storage capacitor with the same voltage rating, and using small-capacity and long-life capacitors such as film capacitors or ceramic capacitors, overcoming the defects of large volume and short service life of using electrolytic capacitors as energy storage capacitors, and having the advantages of significantly improving the power density of the power supply and extending the life of the converter.
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Description

Technical Field

[0001] The present invention relates to the technical field of power conversion, and more specifically, to a power converter and a control method thereof. Background Art

[0002] Power converters have been widely used in electronic systems to generate the operating voltage and current required by internal circuit modules or loads. Power converters include DC / DC converters and AC / DC converters. AC / DC converters are used to convert AC voltage into a constant DC signal (such as DC voltage or DC current). AC / DC converters usually include a rectifier bridge to convert the external AC voltage into a sinusoidal half-wave DC input voltage to provide it to the subsequent conversion circuit. In AC / DC converters, power factor correction (PFC) technology can reduce the harmonic impact on the AC power grid and improve the input power factor (PF), so it has been widely used.

[0003] In AC / DC converters, since the instantaneous input power is pulsating and the output power is constant, energy storage capacitors are needed to match the imbalance of the instantaneous input and output power. This capacitor is generally an electrolytic capacitor, but the life of the electrolytic capacitor is short, and it is the main component that affects the service life of the power supply. The withstand voltage and capacitance of other types of capacitors (such as film capacitors or ceramic capacitors) are generally small, and they cannot simply replace electrolytic capacitors. In other AC / DC power conversion schemes without electrolytic capacitors, the method of injecting harmonics into the input current is used. Although it can achieve electrolytic capacitor-free, it reduces the power factor of the circuit. Therefore, studying how to use other types of small-capacity capacitors to replace electrolytic capacitors in AC / DC power converters is of great significance to improving the quality of electricity use and extending the service life of the power supply. Summary of the invention

[0004] In view of the above problems, an object of the present invention is to provide a power converter and a control method thereof, which can reduce the capacitance value of the energy storage capacitor and improve the power density and life of the power supply.

[0005] According to one aspect of an embodiment of the present invention, a power converter is provided, comprising: a rectifier bridge, for rectifying an AC input voltage to generate a rectified voltage and a common voltage, wherein the rectified voltage is provided by a first output terminal of the rectifier bridge, and the common voltage is provided by a second output terminal of the rectifier bridge, and the voltage difference between the rectified voltage and the common voltage is greater than / equal to zero; an energy storage capacitor, connected between the first output terminal of the rectifier bridge and a reference ground potential; and a capacitor access control circuit, for turning on and off a current path of the energy storage capacitor to the first output terminal according to the rectified voltage, wherein the rectified voltage has an output cycle and has a linear change trend of first increasing and then decreasing in each of the output cycles, and the capacitor access control circuit turns off the current path when the rectified voltage reaches a peak value, and turns on the current path when the voltage difference is less than / equal to a preset voltage difference.

[0006] Optionally, the capacitor access control circuit keeps the current path turned off when the voltage difference is greater than the preset voltage difference.

[0007] Optionally, the power converter also includes a path control switch, which is connected in series with the energy storage capacitor between the second output terminal and the first output terminal of the rectifier bridge, and the conduction direction of the parasitic diode of the path control switch is opposite to the charging current direction of the energy storage capacitor to the first output terminal, and the capacitor access control circuit controls the conduction and shutoff of the current path by controlling the conduction and shutoff of the path control switch.

[0008] Optionally, each of the output cycles includes a peak detection stage and a voltage difference detection stage located after the peak detection stage, and the capacitor access control circuit includes: a peak detection module, configured to detect the peak value of the rectified voltage in the peak detection stage of each of the output cycles, and generate a first indication signal based on the detection result, wherein the first indication signal is used to control the turn-off moment of the path control switch; a voltage difference detection module, configured to detect the voltage difference in the voltage difference detection stage of each of the output cycles, so as to generate a second indication signal when the voltage difference is less than / equal to the preset voltage difference, wherein the second indication signal is used to control the turn-on moment of the path control switch; and a driving module, configured to generate a control signal based on the first indication signal and the second indication signal, wherein the control signal is used to control the turn-on and turn-off of the path control switch.

[0009] Optionally, the peak detection stage of each output cycle includes multiple consecutive sampling cycles, and the peak detection module is configured to: when the rectified voltage detected in the current sampling cycle is less than / equal to the rectified voltage detected in the adjacent previous sampling cycle, determine that the rectified voltage detected in the current sampling cycle is the peak value of the rectified voltage in the output cycle, and generate the first indication signal so that the path control switch is turned off by the driving module.

[0010] Optionally, the peak detection module includes: a first switch; a first comparator, whose positive input terminal receives the first sampling voltage of the rectified voltage through the first switch, whose inverting input terminal is connected to the first end of a first storage capacitor, wherein the first storage capacitor is used to store a first reference voltage, and whose output terminal is used to output the first indication signal; and a second switch connected between the output terminal and the inverting input terminal of the first comparator.

[0011] Optionally, the peak detection stage includes at least one continuous first time period and second time period. In the first time period, the first switch is closed, the second switch is opened, the first comparator operates in an open-loop mode and compares the first sampling voltage with the first reference voltage. In the second time period, the first switch and the second switch are both closed, the first comparator operates in a closed-loop mode, and the first reference voltage is updated according to the first sampling voltage.

[0012] Optionally, the voltage difference detection module includes: a third switch; a fourth switch, a first input terminal connected to the third switch to receive a second sampling voltage of the common voltage, and a second input terminal receiving a preset reference value; an operation unit, a first input terminal of which is connected to the first end of the first storage capacitor, and a second input terminal is connected to the output terminal of the fourth switch; a second comparator, a non-phase input terminal connected to the output terminal of the operation unit, an inverting input terminal connected to the second storage capacitor, and an output terminal for outputting the second indication signal; and a fifth switch connected between the output terminal and the inverting input terminal of the second comparator.

[0013] Optionally, the voltage difference detection stage includes at least one continuous third time period and fourth time period. In the third time period, the third switch is disconnected, the fourth switch is connected to the second input terminal and the output terminal, and the fifth switch is closed. The operation unit calculates the difference between the first reference voltage of the first storage capacitor and the preset reference value. The second comparator operates in a closed-loop mode and stores the difference between the first reference voltage and the preset reference value in the second storage capacitor. In the fourth time period, the third switch is closed, the fourth switch is connected to the first input terminal and the output terminal, and the fifth switch is disconnected. The second comparator operates in an open-loop mode and compares the second sampling voltage and the difference between the first reference voltage and the preset reference value.

[0014] According to another aspect of an embodiment of the present invention, a control method for a power converter is provided, wherein the power converter includes an energy storage capacitor and a rectifier bridge, wherein the energy storage capacitor is connected between a first output terminal of the rectifier bridge and a reference ground potential, wherein the control method includes: rectifying an AC input voltage to generate a rectified voltage and a common voltage, wherein the voltage difference between the rectified voltage and the common voltage is greater than / equal to zero, and wherein the rectified voltage has an output cycle and has a linear change trend of first increasing and then decreasing in each output cycle; and turning on and off a current path of the energy storage capacitor to the first output terminal according to the rectified voltage, so as to turn off the current path when the rectified voltage reaches a peak value, and turn on the current path when the voltage difference is less than / equal to the preset voltage difference.

[0015] Optionally, the control method further includes: keeping the current path closed when the voltage difference is greater than the preset voltage difference.

[0016] Optionally, turning on and off the current path of the energy storage capacitor to the first output terminal according to the rectified voltage includes: setting a path control switch, the path control switch and the energy storage capacitor are connected in series between the second output terminal and the first output terminal of the rectifier bridge, and the conduction direction of the parasitic diode of the path control switch is opposite to the charging current direction of the energy storage capacitor to the first output terminal; and controlling the conduction and shutoff of the current path by controlling the conduction and shutoff of the path control switch according to the rectified voltage.

[0017] Optionally, each of the output cycles includes a peak detection stage and a voltage difference detection stage located after the peak detection stage, and controlling the on and off of the path control switch according to the rectified voltage includes: detecting the peak value of the rectified voltage in the peak detection stage of each of the output cycles, and generating a first indication signal based on the detection result, and the first indication signal is used to control the off time of the path control switch; detecting the voltage difference in the voltage difference detection stage of each of the output cycles, so as to generate a second indication signal when the voltage difference is less than / equal to the preset voltage difference, and the second indication signal is used to control the on time of the path control switch; and generating a control signal based on the first indication signal and the second indication signal, and the control signal is used to control the on and off of the path control switch.

[0018] Optionally, the peak detection stage of each output cycle includes multiple consecutive sampling cycles, and detecting the peak value of the rectified voltage in the peak detection stage of each output cycle includes: when the rectified voltage detected in the current sampling cycle is less than / equal to the rectified voltage detected in the adjacent previous sampling cycle, determining that the rectified voltage detected in the current sampling cycle is the peak value of the rectified voltage within the output cycle, and generating the first indication signal to facilitate the path control switch to be turned off.

[0019] Optionally, the peak detection stage includes at least one continuous first time period and a second time period, and detecting the peak value of the rectified voltage in the peak detection stage of each output cycle also includes: comparing the first sampling voltage of the rectified voltage detected in the current sampling cycle with the stored first reference voltage in the first time period, and if the first sampling voltage is less than / equal to the first reference voltage, determining that the rectified voltage detected in the current sampling cycle is the peak value of the rectified voltage in the output cycle; and updating the stored first reference voltage according to the first sampling voltage in the second time period.

[0020] Optionally, the voltage difference detection stage includes at least one continuous third time period and fourth time period, and the voltage difference is detected in the voltage difference detection stage of each output cycle so as to generate a second indication signal when the voltage difference is less than / equal to the preset voltage difference, including: calculating and storing the voltage difference between the stored first reference voltage and the preset reference value in the third time period; comparing the second sampled voltage of the common voltage and the difference between the first reference voltage and the preset reference value in the fourth time period, and if the second sampled voltage is less than / equal to the voltage difference, generating the second indication signal.

[0021] The power converter of the embodiment of the present invention disconnects the energy storage capacitor when the rectified voltage reaches the peak value, and connects the energy storage capacitor again when the rectified voltage drops to a preset value, so that the energy storage capacitor is always maintained at the highest energy storage and is only connected to the energy storage capacitor for discharge when necessary, thereby reducing the use of the energy storage capacitor and greatly reducing the capacitance of the energy storage capacitor with the same voltage rating. Small-capacity and long-life capacitors such as film capacitors or ceramic capacitors can be used, overcoming the defects of large size and short service life of using electrolytic capacitors as energy storage capacitors, and having the advantages of significantly improving the power density of the power supply and extending the life of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0023] Figure 1 A schematic circuit diagram of a conventional AC / DC power converter is shown;

[0024] Figure 2 The voltage and current waveforms of a conventional AC / DC power converter at constant power output are shown;

[0025] Figure 3A and Figure 3B The waveform diagrams of energy storage capacitor voltage-half cosine wave voltage are shown in FIG. 1 and FIG. 2 respectively when the AC voltage is different for the same power capacitor ratio;

[0026] Figure 4 A schematic circuit diagram of an AC / DC power converter according to an embodiment of the present invention is shown;

[0027] Figure 5 A schematic waveform diagram showing the operation of the AC / DC power converter according to an embodiment of the present invention;

[0028] Figure 6 Shows Figure 4 A specific circuit diagram of a capacitor access control circuit;

[0029] Figure 7 Shows Figure 6 A schematic circuit diagram of a power supply module in;

[0030] Figure 8 Shows Figure 6 A schematic circuit diagram of a peak detection module in;

[0031] Fig. 9 Shows Figure 6 A schematic circuit diagram of a pressure difference detection module in FIG. DETAILED DESCRIPTION

[0032] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0033] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuit, a programmable circuit, a state machine circuit and / or an element that can store instructions executed by a programmable circuit. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0034] In the context of the present application, when the transistor is in an "off state" or "disconnected", the transistor blocks current and / or substantially does not conduct current. In contrast, when the transistor is in an "on state" or "conducting", the transistor is able to conduct current significantly. For example, in one embodiment, the high voltage transistor includes an N-channel metal oxide semiconductor (NMOS) field effect transistor (FET), wherein the high voltage is provided between a first terminal (i.e., drain) and a second terminal (i.e., source) of the transistor. In some embodiments, when regulating the energy provided to the load, an integrated controller circuit can be used to drive the power switch. In addition, for the purposes of the present disclosure, "ground" or "ground potential" in the present application refers to a reference voltage or potential relative to which all other voltages or potentials of an electronic circuit or integrated circuit (IC) are defined or measured.

[0035] The present invention may be embodied in various forms, some examples of which will be described below.

[0036] Figure 1 and Figure 2 The schematic circuit diagram of a conventional AC / DC power converter and its voltage and current waveforms at constant power output are shown respectively. Figure 1As shown, the power converter 100 includes a rectifier bridge B1, an energy storage capacitor Cs, a PFC converter 101 and a DC / DC converter 102. Among them, the rectifier bridge B1 is used to convert the AC voltage Vac into a rectified voltage Vrec of a steamed wave. The PFC converter 101 and the DC / DC converter 102 convert the rectified voltage Vrec into a DC output voltage Vout to power the load 200, thereby realizing the power factor correction function of the circuit. Now, we do not pay attention to the topology and control method inside the PFC converter 101 and the DC / DC converter 102, and regard them as a "black box" to study the relationship between the ripple voltage and the capacitance value of the energy storage capacitor Cs.

[0037] See also Figure 2 , Figure 2 The waveforms of the rectifier output half-wave, the voltage on the energy storage capacitor, and the current are shown in Figure 1. For the convenience of analysis, it is assumed that Figure 1 All devices in are ideal components. Figure 2 All waveforms in are idealized without considering the influence of parasitic parameters, and are expressed in cosine for easy calculation. P 、V M -α M , and V m -α m They are the peak voltage of the half cosine wave, the voltage-angle (corresponding to a moment) when the power supply is switched from the AC power supply to the energy storage capacitor, and the voltage-angle (corresponding to a moment) when the power supply is restored from the AC power supply. Figure 2 As shown in the figure, the change curve of the capacitor voltage when the capacitor supplies power to a constant power load is a parabola. At time α, the capacitor voltage V C and half cosine wave voltage V H They are expressed by the following formulas respectively:

[0038] V C =[-2×P×(t-t0) / C] 0.5 (1)

[0039] V H =V P ×cosωt (2)

[0040] Where ωt is the angular frequency of the AC voltage and t is the time ( Figure 2 The horizontal axis is the time expressed as the phase angle of the cosine wave of the alternating current), P is the output power, C is the capacitance of the energy storage capacitor, and t0 is the time when the discharge starts on the above parabola. When the capacitor supplies power to a constant power load, the slopes of the two curves at the tangent point of the sine half wave of the rectifier output are equal, and the amplitudes are equal. Assuming T = P / C, we can get formula (3) based on formula (1):

[0041] V C=[-2×T×(t-t0)] 0.5 (3)

[0042] Under the condition of determining the amplitude and frequency of the cosine wave, the relationship between T and time t0 is clearly constrained, from which formula (4) and formula (5) can be obtained:

[0043] V P ×cosωt=[-2×T×(t-t0)] 0.5 (4)

[0044] V P ×ω×sinωt=T×[-2×T×(t-t0)] 0.5 (5)

[0045] Let δ = t-t0, and combine formula (4) and formula (5), thus we can get formula (6) and its parabola further to the right formula (7), that is, the δ value that satisfies the relationship between slope and amplitude. Another solution is to use the conjugate tangent introduced when combining formula (4) and formula (5) by using the square sum, as shown in Figure 2 As shown in .

[0046]

[0047]

[0048] Where δ is the difference between time t and time t0. A larger |δ| value means that the vertex of the parabola is further to the right from the origin of the coordinate system. Substituting the above formula into formula (4), we can obtain the half-wave cosine voltage formula (8) of the point, the cosine wave phase angle formula (9) at the corresponding time, and the solution of the vertex coordinate t0, which determines the vertex of the capacitor voltage parabola:

[0049] V P ×cosωt M =(-2×T×δ 解 ) 0.5 =V M (8)

[0050]

[0051] t0=t M -δ 解 (10)

[0052] In addition, V m is the voltage required by the DC voltage regulator circuit, which can be further used by V m To determine the corresponding second half cosine wave to confirm V m The corresponding moment is used to derive a parabola that meets this requirement.

[0053]

[0054] Determine t m Then, formula (3) (which further refers to formula (10), formula (9) and formula (7)) is used to estimate the value of V at a given V P and ω satisfy the condition T. The above formulas constraining their relationship are combined into the following form:

[0055]

[0056] Among them, formula (12) is a transcendental function, which has no explicit solution and needs to be solved numerically.

[0057] Figure 3A and Figure 3B The waveform diagrams of the energy storage capacitor voltage-half cosine wave voltage are shown in FIG. 1 for different AC voltages with the same power capacitor ratio. Figure 3A and Figure 3B The horizontal axis is the time to express the corresponding phase angle of the cosine wave of the alternating current, and the vertical axis is the voltage normalized to the peak value of the alternating current wave. The waveforms are the 1 / 4 cosine waveform of the alternating current starting from a peak voltage, the subsequent 1 / 4 waveform, and the waveform of the constant power discharge parabola of the capacitor tangent to the cosine wave. The rectified output peak voltage is 140V and 200V respectively, the frequency is 50Hz, and T is 2,000,000 (that is, the unit power configuration is 0.5μF / W). Combined with the above waveforms, it can be seen that when the power-capacitor configuration is the same, the lower the frequency and the lower the voltage, the greater the voltage drop of the energy storage capacitor. That is, the required energy storage capacitor capacity is inversely proportional to the rectified output peak voltage. The lower the rectified output peak voltage, the larger the capacitance value of the required energy storage capacitor; the capacitance value of the energy storage capacitor is proportional to the output power. The greater the output power, the larger the capacitance value of the required energy storage capacitor. According to actual needs, the lowest voltage specification that can meet the global power supply conditions is selected, that is, when the rectifier output peak voltage is 141V, the frequency is 50Hz, and the minimum operating voltage is 40V, the T that meets the conditions is 1,660,000, and the unit power capacitor configuration is 0.6μF / W.

[0058] Figure 4 FIG. 2 shows a schematic circuit diagram of an AC / DC power converter according to an embodiment of the present invention. Figure 4As shown, the power converter 300 includes a rectifier bridge B1, a storage capacitor Cs, a path control switch M, a capacitor access control circuit 301 and a DC / DC converter 302. The AC input voltage Vac is connected to the rectifier bridge B1, and the rectifier bridge B1 rectifies the alternating positive and negative AC input voltage Vac into a series of sinusoidal half-waves in a single voltage polarity direction to generate a rectified voltage Vrec and a common voltage Vcom, wherein the rectified voltage Vrec is provided by the first output terminal of the rectifier bridge B1, and the common voltage Vcom is provided by the second output terminal of the rectifier bridge B1, and the voltage difference between the rectified voltage Vrec and the common voltage Vcom is greater than / equal to zero. The DC / DC converter 302 is used to adjust the rectified voltage Vrec to the required DC output voltage so as to properly drive the load 200.

[0059] It should be noted that the DC / DC converter 302 can be implemented through a variety of structures, including but not limited to buck, boost, buck-boost, non-inverting buck-boost, forward, flyback and other topological structures, and the embodiments of the present invention are not limited to this.

[0060] The first end of the energy storage capacitor Cs is connected to the first output end of the rectifier bridge B1, and the second end is connected to the second output end of the rectifier bridge B1 via the path control switch M. The conduction direction of the parasitic diode of the path control switch M is opposite to the charging current direction of the energy storage capacitor to the first output end, and the common node of the two is connected to the reference ground potential. The capacitor access control circuit 301 is connected between the two output ends of the rectifier bridge B1, and provides a control signal DRV in response to the voltage value of the rectified voltage Vrec, which is used to switch the path control switch M to turn on or off the current path of the energy storage capacitor Cs to the first output end of the rectifier bridge B1.

[0061] As shown in the figure above, the rectified voltage Vrec has a linear variation trend of increasing first and then decreasing in each output cycle. The capacitor access control circuit disconnects the energy storage capacitor Cs when the rectified voltage Vrec reaches a peak value, and reconnects the energy storage capacitor Cs when the voltage difference between the rectified voltage Vrec and the common voltage Vcom is less than / equal to the preset voltage difference. In other words, the power converter of the embodiment of the present invention can keep the energy storage capacitor Cs at the highest energy storage and only connect the energy storage capacitor Cs for discharge when necessary, thereby reducing the use of the energy storage capacitor Cs, greatly reducing the capacitance of the energy storage capacitor Cs with the same voltage rating, and using small-capacity and long-life capacitors such as film capacitors or ceramic capacitors, overcoming the defects of large volume and short service life of using electrolytic capacitors as energy storage capacitors, and having the advantages of significantly improving the power density of the power supply and extending the life of the converter.

[0062] Figure 5Schematic waveform diagram of the AC / DC power converter of the embodiment of the present invention when it is working. Figure 5 In the figure, the horizontal axis is the time to express the corresponding phase angle of the cosine wave of the alternating current, and the vertical axis is the voltage normalized to the peak value of the alternating current wave. The waveforms are the 1 / 4 cosine waveform of the alternating current starting from a peak voltage, the subsequent 1 / 4 waveform, and the waveform of the constant power discharge parabola of the capacitor tangent to the cosine wave. Figure 5 As shown, according to the AC / DC power converter of this embodiment, when the rectified voltage is at the peak value of the waveform, the energy storage capacitor Cs is disconnected to keep the energy storage capacitor Cs at the highest energy storage. When the rectified voltage drops to the minimum allowable voltage, the energy storage capacitor Cs is reconnected and discharged by the energy storage capacitor Cs until the next 1 / 4 waveform of the rectified voltage increases to the minimum allowable voltage, and then the rectified voltage charges the energy storage capacitor Cs to store energy. With the above relationship, still using the previous symbols, the minimum power-capacitance ratio and the capacitor configuration per unit power that meet the above conditions are calculated according to the following formula (13):

[0063]

[0064] The symbols in formula (13) are consistent with those in the above embodiment and are not explained here. After calculation, it can be obtained that T is 4,991,650, and the capacitance configuration per unit power is 0.2 μF / W, which is about 1 / 3 of the prior art. Therefore, the capacity of the energy storage capacitor can be greatly reduced.

[0065] Figure 6 Shows Figure 4 A specific circuit diagram of the capacitor access control circuit 301 in FIG. Figures 7 to 9 They are shown respectively Figure 6 A method of implementing the connection of capacitors in various modules in the control circuit.

[0066] like Figure 6 As shown, the capacitor access control circuit 301 includes a power supply module 310 , a peak detection module 320 , a voltage difference detection module 330 , a driving module 340 and a timing control module 350 .

[0067] The power supply module 310 is used to obtain a power supply voltage VDD according to the voltage difference between the rectified voltage Vrec and the common voltage Vcom and the reference ground potential when both the peak detection module 320 and the voltage difference detection module 330 are turned off, so as to power the subsequent circuit.

[0068] refer to Figure 7, the power supply module 310 includes resistors Rr and Rc, diodes D1 and D2, capacitor C1 and a voltage stabilizing diode ZD. One end of the resistor Rr is connected to the rectified voltage Vrec, and the other end is connected to the anode of the diode D1. The cathode of the diode D1 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is grounded. One end of the resistor Rc is connected to the common voltage Vcom, and the other end is connected to the anode of the diode D2. The cathode of the diode D2 is connected to one end of the capacitor C1. The cathode of the voltage stabilizing diode ZD is connected to one end of the capacitor C1, and the anode is grounded. When the peak detection module 320 and the voltage difference detection module 330 are both turned off, the rectified voltage Vrec and the common voltage Vcom charge the capacitor C1 according to their relationship with the reference ground potential, and the voltage stabilizing diode ZD is used to limit the maximum voltage on the capacitor C1.

[0069] The peak detection module 320 receives the first timing signal P1 and the second timing signal P2, and detects the peak value of the rectified voltage Vrec in the peak detection phase of each output cycle under the control of the first timing signal P1 and the second timing signal P2, and generates a first indication signal Voff according to the detection result, and the first indication signal Voff is used to control the turn-off moment of the path control switch M. In addition, the peak detection module 320 also saves the rectified voltage Vrec at that time for use in detecting the voltage difference between the rectified voltage Vrec and the common voltage Vcom.

[0070] refer to Figure 8 , the peak detection module 320 includes switches K1 and K2, a comparator U1 and a storage capacitor C2. The switch K1 is connected between the resistor Rr and the resistor Rp, and the end of the resistor Rp away from the switch K1 is grounded. The non-phase input terminal of the comparator U1 is connected to the middle node of the switch K1 and the resistor Rp to receive the first sampling voltage Vs1 of the rectified voltage Vrec, the inverting input terminal is connected to the storage capacitor C2, and the storage capacitor C2 stores the first reference voltage Vc1. The output terminal of the comparator U1 is used to output the first indication signal Voff. The switch K2 is connected between the output terminal and the inverting input terminal of the comparator U1. Among them, the switch K1 and the switch K2 are controlled by the first timing signal P1 and the second timing signal P2 respectively.

[0071] The voltage difference detection module 330 receives the third to sixth timing signals P3-P6, and under the control of the third to sixth timing signals P4-P6, detects the voltage difference between the rectified voltage Vrec and the common voltage Vcom in the voltage difference detection phase after the peak detection phase of each output cycle, so as to generate a second indication signal Von when the voltage difference is less than / equal to the preset voltage difference. The second indication signal Von is used to control the turn-on moment of the path control switch M.

[0072] refer to Fig. 9, the voltage difference detection module 330 includes switches K3 to K5, an operation unit 331, a reference unit 332, a comparator U2 and a storage capacitor C3. The switch K3 is connected between the resistor Rc and the resistor Rp, the first input end of the switch K4 is connected to the switch K3 to receive the second sampling voltage Vs2 of the common voltage Vcom, the second input end is connected to the reference unit 332 to receive the preset reference value Vref, the output end is connected to an input end of the operation unit 331, and the other input end of the operation unit 331 is connected to the first end of the storage capacitor C2 to receive the first reference voltage Vc1. The non-inverting input end of the comparator U2 is connected to the output end of the operation unit 331, the inverting input end is connected to the storage capacitor C3, and the output end is used to output the second indication signal Von. The switch K5 is connected between the output end and the inverting input end of the comparator U2.

[0073] Further, the operation unit 331 includes a buffer BUFF, an inverter INV, and resistors R21 and R22. The inverter INV is implemented, for example, by an operational amplifier, whose non-phase input terminal is used as an input terminal of the operation unit 331 to receive the first reference voltage Vc1, and whose inverting input terminal is connected to one end of the resistor R21, and whose output terminal is connected to the non-phase input terminal of the comparator U2 as the output terminal of the operation unit 331. The input terminal of the buffer BUFF is connected to the switch K4 as the other input terminal of the operation unit 331, and the output terminal of the buffer BUFF is connected to the other end of the resistor R21. The resistor R22 is connected between the output terminal and the inverting input terminal of the inverter INV.

[0074] The driving module 340 is connected to the peak detection module 320 and the voltage difference detection module 330 , and is used to generate the control signal DRV according to the first indication signal Voff and the second indication signal Von. The control signal DRV is used to drive the path control switch M to be turned on and off.

[0075] The timing control module 350 is used to generate the multiple timing signals P1-P6, which are used to detect the lowest voltage UVL on the capacitor C1, and start to output the multiple timing signals P1-P6 when the lowest voltage UVL meets the working requirements. When the timing control module 350 is not working, the path control switch M is disconnected, and the rectified voltage Vrec charges the energy storage capacitor Cs through the parasitic diode of the path control switch M, and the energy storage capacitor Cs does not participate in the output.

[0076] The peak detection module 320 and the voltage difference detection module 330 are used to realize the actions of disconnecting the path control switch M when the energy storage capacitor Cs is charged to the highest voltage point, and connecting the path control switch M to discharge and start energy storage when the voltage difference between the rectified voltage Vrec and the common voltage Vcom drops to a preset voltage. The latter action is only meaningful when the path control switch M is in the disconnected state.

[0077] Comparators U1 and U2 are both time-sharing reference point self-calibration circuits, that is, they store the reference voltages used for comparison on the storage capacitors at their inverting input terminals before making comparisons. The specific process is to briefly turn on switches K2 and K5 when updating the reference voltage, and then turn off switches K2 and K5 when comparing, and compare the sampled voltage with the reference voltage stored on the storage capacitor. Since the offset voltage of the comparator is also included when storing the reference voltage, this comparator design can achieve extremely small offsets.

[0078] Specifically, the peak detection stage is divided into at least one continuous first time period and second time period. In the first time period, the first timing signal P1 is valid, the switch K1 is closed, the comparator U1 works in an open-loop mode, and compares the first sampling voltage Vs1 with the first reference voltage Vc1 stored on the storage capacitor C2. If the first sampling voltage Vs1 is less than the first reference voltage Vc1, it is determined that the rectified voltage Vrec has exceeded the maximum voltage, and the comparator U1 outputs the first indication signal Voff to trigger the disconnection path control switch M; if the first sampling voltage Vs1 is higher than the first reference voltage Vc1, it is determined that the rectified voltage Vrec has not reached the maximum voltage. Next, in the second time period, the second timing signal P2 briefly turns on the switch K2, and the sixth timing signal P6 turns on the reference unit to give it some time to stabilize. The comparator U1 works in a closed-loop mode and updates the first reference voltage Vs1 according to the first sampling voltage Vc1 at this time for subsequent peak voltage detection or voltage difference detection. After the first reference voltage Vs1 is updated, the switch K1 is turned off, and the switch K1 is turned on again when the next first timing signal P1 arrives.

[0079] Similarly, the voltage difference detection stage is divided into at least one continuous third time period and fourth time period. In the third time period, the switch K3 is disconnected, the switch K4 is connected to the second input terminal and the output terminal, and the switch K5 is turned on at the same time. The difference between the first reference voltage Vc1 stored on the storage capacitor C2 and the preset reference value Vref calculated by the operation unit 331 appears at the inverting input terminal of the comparator U2. The comparator U2 operates in a closed-loop mode and stores the difference on the storage capacitor C2, and then disconnects the switch K5 to allow it to be maintained. Thereafter, in a fourth time period, the switch K3 is turned on, the switch K4 connects the first input terminal and the output terminal, and the comparator U2 operates in an open-loop mode to compare the second sampling voltage Vs2 of the common voltage Vcom with the difference stored at the inverting input terminal of the comparator U2. If the second sampling voltage Vs2 is greater than the difference, it indicates that the voltage difference between the rectified voltage Vrec and the common voltage Vcom has not yet reached the preset voltage, and the next cycle is awaited; if the second sampling voltage Vs2 is less than the difference, it indicates that the voltage difference between the rectified voltage Vrec and the common voltage Vcom has reached the preset voltage, and the comparator U2 generates a second indication signal Von to trigger the path control switch M to be turned on, and the timing control module 350 enters the peak detection stage.

[0080] In this embodiment, the timing control module 350 cycles according to a certain period and starts the peak detection and the voltage difference detection only in a short period of time, thereby effectively reducing power consumption and meeting the low power consumption design.

[0081] In addition, in practical applications, large-sized resistors Rr, Rc, Rp and capacitor C1 may be placed outside the chip as external components to reduce the size of the chip and reduce costs.

[0082] It should be noted that the path control switch M in the embodiment of the present invention can be implemented in various ways, including but not limited to field effect transistors, thyristors, and triodes.

[0083] To summarize, the power converter of the embodiment of the present invention disconnects the energy storage capacitor when the rectified voltage reaches a peak value, and connects the energy storage capacitor again when the rectified voltage drops to a preset value, so that the energy storage capacitor can always be maintained at the highest energy storage and is only connected to the energy storage capacitor for discharge when necessary, thereby reducing the use of the energy storage capacitor and greatly reducing the capacitance of the energy storage capacitor with the same voltage rating. Small-capacity and long-life capacitors such as film capacitors or ceramic capacitors can be used, overcoming the defects of large size and short service life of using electrolytic capacitors as energy storage capacitors, and having the advantages of significantly improving the power density of the power supply and extending the life of the converter.

[0084] In addition, the present invention is also applicable to applications of reducing the working voltage of energy storage capacitors in circuits with power factor correction technology. The present invention can also be applicable to applications of using controlled energy storage capacitors to provide large transient supply capabilities and prevent sudden load changes from affecting input power.

[0085] In the above description, the well-known structural elements and steps are not described in detail. However, it should be understood by those skilled in the art that the corresponding structural elements and steps can be realized by various technical means. In addition, in order to form the same structural elements, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although each embodiment is described above respectively, this does not mean that the measures in each embodiment cannot be advantageously used in combination.

[0086] According to the embodiments of the present invention, as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A power converter, comprising: A rectifier bridge, used for rectifying an AC input voltage to generate a rectified voltage and a common voltage, wherein the rectified voltage is provided by a first output terminal of the rectifier bridge, the common voltage is provided by a second output terminal of the rectifier bridge, and a voltage difference between the rectified voltage and the common voltage is greater than / equal to zero; An energy storage capacitor connected between the first output terminal of the rectifier bridge and a reference ground potential; A path control switch, wherein the path control switch and the energy storage capacitor are connected in series between the second output terminal and the first output terminal of the rectifier bridge, and the conduction direction of the parasitic diode of the path control switch is opposite to the charging current direction of the energy storage capacitor to the first output terminal; A capacitor access control circuit, used for controlling the on and off of the path control switch according to the rectified voltage to control the on and off of the current path of the energy storage capacitor to the first output end; as well as A DC / DC converter is always connected to the rectifier bridge during the on and off periods of the energy storage capacitor, and is used to adjust the rectified voltage into a DC output voltage. In which, the rectified voltage has an output cycle and has a linear change trend of first increasing and then decreasing in each output cycle. The capacitor access control circuit turns off the current path when the rectified voltage reaches a peak value, and turns on the current path when the voltage difference is less than / equal to a preset voltage difference, so that the energy storage capacitor is charged via the parasitic diode during the period from the preset voltage difference increasing to the peak value, and the energy storage capacitor maintains energy storage during the period from the peak value decreasing to the preset voltage difference.

2. The power converter according to claim 1, wherein: Each of the output cycles includes a peak detection phase and a voltage difference detection phase after the peak detection phase, and the capacitor access control circuit includes: a peak detection module, configured to detect a peak value of the rectified voltage in the peak detection phase of each output cycle, and generate a first indication signal according to the detection result, wherein the first indication signal is used to control a turn-off moment of the path control switch; a voltage difference detection module, configured to detect the voltage difference in the voltage difference detection phase of each output cycle, so as to generate a second indication signal when the voltage difference is less than / equal to the preset voltage difference, wherein the second indication signal is used to control the turn-on moment of the path control switch; and A driving module is used to generate a control signal according to the first indication signal and the second indication signal, wherein the control signal is used to control the on and off of the path control switch.

3. The power converter according to claim 2, wherein: The peak detection phase of each output cycle includes a plurality of consecutive sampling cycles, and the peak detection module is configured as follows: When the rectified voltage detected in the current sampling cycle is less than / equal to the rectified voltage detected in the adjacent previous sampling cycle, the rectified voltage detected in the current sampling cycle is determined to be the peak value of the rectified voltage in the output cycle, and the first indication signal is generated so that the path control switch is turned off by the driving module.

4. The power converter according to claim 2, wherein: The peak detection module comprises: First switch; a first comparator, having a non-inverting input terminal receiving the first sampled voltage of the rectified voltage via the first switch, an inverting input terminal connected to a first terminal of a first storage capacitor, the first storage capacitor being used to store a first reference voltage, and an output terminal being used to output the first indication signal; and A second switch is connected between the output terminal and the inverting input terminal of the first comparator.

5. The power converter according to claim 4, wherein: The peak detection phase includes at least one continuous first time period and second time period, In a first time period, the first switch is closed, the second switch is opened, the first comparator operates in an open-loop mode, and compares the first sampled voltage with the first reference voltage. In a second time period, the first switch and the second switch are both closed, the first comparator operates in a closed-loop manner, and updates the first reference voltage according to the first sampled voltage.

6. The power converter according to claim 4, wherein: The pressure difference detection module comprises: The third switch; a fourth switch, wherein a first input terminal is connected to the third switch to receive a second sampled voltage of the common voltage, and a second input terminal receives a preset reference value; an operation unit, a first input terminal of which is connected to the first terminal of the first storage capacitor, and a second input terminal of which is connected to the output terminal of the fourth switch; a second comparator, wherein a non-inverting input terminal is connected to the output terminal of the operation unit, an inverting input terminal is connected to the second storage capacitor, and an output terminal is used to output the second indication signal; and A fifth switch is connected between the output terminal and the inverting input terminal of the second comparator.

7. The power converter according to claim 6, wherein: The pressure difference detection phase includes at least one continuous third time period and fourth time period. In a third time period, the third switch is turned off, the fourth switch is connected to the second input terminal and the output terminal, the fifth switch is closed, the calculation unit calculates the difference between the first reference voltage of the first storage capacitor and the preset reference value, the second comparator operates in a closed-loop manner, and stores the difference between the first reference voltage and the preset reference value in the second storage capacitor. In a fourth time period, the third switch is closed, the fourth switch connects the first input terminal and the output terminal, the fifth switch is opened, the second comparator operates in an open-loop mode, and compares the second sampling voltage and the difference between the first reference voltage and the preset reference value.

8. A control method for a power converter according to any one of claims 1 to 7, wherein the power converter comprises an energy storage capacitor and a rectifier bridge, wherein the energy storage capacitor is connected between a first output terminal of the rectifier bridge and a reference ground potential, and wherein the control method comprises: Rectifying an AC input voltage to generate a rectified voltage and a common voltage, wherein a voltage difference between the rectified voltage and the common voltage is greater than / equal to zero, and the rectified voltage has an output cycle and has a linear variation trend of first increasing and then decreasing in each output cycle; as well as The current path of the energy storage capacitor to the first output terminal is turned on and off according to the rectified voltage, so that the current path is turned off when the rectified voltage reaches a peak value, and the current path is turned on when the voltage difference is less than / equal to the preset voltage difference, so that the energy storage capacitor is charged through the parasitic diode of the path control switch during the period from the preset voltage difference increasing to the peak value, and the energy storage capacitor keeps storing energy during the period from the peak value decreasing to the preset voltage difference.

9. The control method according to claim 8, wherein: Each of the output cycles includes a peak detection phase and a voltage difference detection phase located after the peak detection phase, and the controlling the on and off of the path control switch according to the rectified voltage includes: Detecting the peak value of the rectified voltage in the peak detection phase of each output cycle, and generating a first indication signal according to the detection result, wherein the first indication signal is used to control the turn-off moment of the path control switch; detecting the voltage difference in the voltage difference detection phase of each output cycle, so as to generate a second indication signal when the voltage difference is less than / equal to the preset voltage difference, wherein the second indication signal is used to control the turn-on moment of the path control switch; and A control signal is generated according to the first indication signal and the second indication signal, and the control signal is used to control the on and off of the path control switch.

10. The control method according to claim 9, wherein: The peak detection phase of each output cycle includes a plurality of consecutive sampling cycles, and detecting the peak value of the rectified voltage in the peak detection phase of each output cycle includes: When the rectified voltage detected in the current sampling cycle is less than / equal to the rectified voltage detected in the adjacent previous sampling cycle, the rectified voltage detected in the current sampling cycle is determined to be the peak value of the rectified voltage within the output cycle, and the first indication signal is generated so that the path control switch is turned off.

11. The control method according to claim 10, wherein: The peak detection phase includes at least one continuous first time period and a second time period, and detecting the peak value of the rectified voltage in the peak detection phase of each output cycle also includes: Comparing a first sampled voltage of the rectified voltage detected in the current sampling period with a stored first reference voltage within the first time period, and if the first sampled voltage is less than / equal to the first reference voltage, determining that the rectified voltage detected in the current sampling period is a peak value of the rectified voltage within the output period; and The stored first reference voltage is updated according to the first sampled voltage during the second time period.

12. The control method according to claim 11, wherein: The pressure difference detection phase includes at least one continuous third time period and fourth time period, and the voltage difference is detected in the pressure difference detection phase of each output cycle, so as to generate a second indication signal when the voltage difference is less than / equal to the preset pressure difference, including: calculating and storing a voltage difference between the stored first reference voltage and a preset reference value within the third time period; The second sampled voltage of the common voltage and the difference between the first reference voltage and the preset reference value are compared in the fourth time period, and if the second sampled voltage is less than / equal to the voltage difference, the second indication signal is generated.