A DC-DC converter and its control system and control method

Abstract

This invention provides a DC-DC converter and its control system and method, comprising: a current sampling module for sampling the current of an inductor to obtain a sampling current; an error amplification module for comparing and amplifying the feedback voltage of the power stage circuit with a reference voltage to obtain an error current; a current-to-voltage control module for obtaining a first voltage and a second voltage based on the sampling current, the error current, the hysteresis current, and a control signal; a PWM comparator for generating a control signal based on the first voltage and the second voltage to control the on and off of a first power transistor and a second power transistor; and a hysteresis current control module for sampling the period of the control signal and outputting a hysteresis current based on the comparison result between the sampling period and a preset period, so as to adjust the frequency of the control signal through the hysteresis current to reduce the variation range of the DC-DC converter's operating frequency and ensure the stability of its operating frequency.

Description

Technical Field

[0001] This invention relates to the field of DC-DC conversion technology, and more specifically, to a DC-DC converter and its control system and control method. Background Technology

[0002] Due to their high conversion efficiency, DC-DC converters are widely used as power supply components in various electronic products. With technological advancements, the control technology of DC-DC converters has evolved from fixed-frequency control to variable-frequency control.

[0003] Traditional fixed-frequency control technologies include voltage-mode control and current-mode control. While voltage-mode and current-mode control offer good stability, they suffer from difficulties in designing frequency converters under light loads. Although efficiency improvements can be achieved under light loads through design, it often fails to meet the requirement of low output voltage ripple, and the operating frequency stability is poor during the transition from heavy to light loads.

[0004] Current variable frequency control technologies include hysteresis mode control (HMS). HMS has been widely applied in various fields due to its advantages such as fast transient response and simple compensation. However, in hysteresis mode, the operating frequency of the DC-DC converter varies with external conditions, namely input voltage, inductance, and output voltage. This wide range of operating frequency variation poses a challenge to the design of the power stage's inductors and capacitors. Therefore, reducing the range of operating frequency variation and improving the stability of the operating frequency in hysteresis mode is one of the urgent problems to be solved by researchers in this field. Summary of the Invention

[0005] In view of this, the present invention provides a DC-DC converter and its control system and control method to improve the stability of the operating frequency of the DC-DC converter in hysteresis mode.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A control system for a DC-DC converter, the DC-DC converter including a power stage circuit, the power stage circuit including an inductor, a first power transistor, and a second power transistor, the control system comprising:

[0008] A current sampling module is used to sample the current of the inductor to obtain the sampled current;

[0009] An error amplification module is used to compare and amplify the feedback voltage of the power stage circuit with the reference voltage to obtain the error current;

[0010] A current-to-voltage control module is used to obtain a first voltage and a second voltage based on the sampled current, the error current, the hysteresis current, and the control signal;

[0011] A PWM comparator is used to generate the control signal based on the first voltage and the second voltage, so as to control the first power transistor and the second power transistor to turn on and off through the control signal;

[0012] The hysteresis current control module is used to sample the period of the control signal and output the hysteresis current according to the comparison result between the sampling period and the preset period, so as to adjust the frequency of the control signal through the hysteresis current.

[0013] Optionally, the error amplification module includes an error amplifier and a clamping circuit;

[0014] The feedback voltage is input to the first input terminal of the error amplifier, and the reference voltage is input to the second input terminal of the error amplifier;

[0015] The output terminal of the error amplifier is connected to the input terminal of the clamping circuit, and the output terminal of the clamping circuit outputs the error current.

[0016] The clamping circuit is used to clamp the current output by the error amplifier within a preset range.

[0017] Optionally, the clamping circuit includes a first transistor, a second transistor, a third transistor, and a first current source;

[0018] The input terminal of the first current source is connected to the reference voltage terminal, and the output terminal of the first current source is connected to the first terminal of the first transistor.

[0019] The second terminal of the first transistor is connected to the ground terminal, and the gate of the first transistor is connected to the input terminal of the clamping circuit.

[0020] The second terminal of the second transistor is connected to the ground terminal, the first terminal of the second transistor is connected to the output terminal of the clamping circuit, and the gate of the second transistor is connected to the input terminal of the clamping circuit.

[0021] The first terminal of the third transistor is connected to the reference voltage terminal, the second terminal of the third transistor is connected to the input terminal of the clamping circuit, and the gate of the third transistor is connected to the output terminal of the first current source.

[0022] Optionally, the current-to-voltage control module includes a second current source, a fourth to a twelfth transistor, a first capacitor, and an inverter;

[0023] The input terminal of the second current source is connected to the reference voltage terminal, and the output terminal of the second current source is connected to the first terminal of the fourth transistor.

[0024] The first terminal of the fourth transistor is connected to the gate of the fourth transistor, and the second terminal of the fourth transistor is connected to the ground terminal;

[0025] The second terminal of the fifth transistor is connected to the ground terminal, the gate of the fifth transistor is connected to the gate of the fourth transistor, the first terminal of the fifth transistor is connected to the first output terminal of the current-to-voltage control module, and the first output terminal outputs the first voltage.

[0026] The first terminal of the sixth transistor is connected to the reference voltage terminal, the gate of the sixth transistor is connected to the second terminal of the sixth transistor, and the second terminal of the sixth transistor is connected to the first terminal of the seventh transistor.

[0027] The gate of the seventh transistor is connected to the second terminal of the seventh transistor, and the second terminal of the seventh transistor is connected to the second output terminal of the current-to-voltage control module, which outputs the second voltage; the second terminal of the seventh transistor is connected to the first input terminal of the current-to-voltage control module, which transmits the error current.

[0028] The first terminal of the eighth transistor is connected to the reference voltage terminal, the gate of the eighth transistor is connected to the gate of the sixth transistor, and the second terminal of the eighth transistor is connected to the second input terminal of the current-to-voltage control module, wherein the second input terminal transmits the sampling current.

[0029] The first terminal of the ninth transistor is connected to the second terminal of the eighth transistor, the gate of the ninth transistor is connected to the gate of the eighth transistor, and the second terminal of the ninth transistor is connected to the first input terminal of the current-to-voltage control module.

[0030] The first terminal of the tenth transistor is connected to the third input terminal of the current-to-voltage control module, the third input terminal transmits the hysteresis current, the gate of the tenth transistor is connected to the output terminal of the inverter, the input terminal of the inverter is connected to the fourth input terminal of the current-to-voltage control module, the fourth input terminal receives the control signal, and the second terminal of the tenth transistor is connected to the second terminal of the eighth transistor.

[0031] The first terminal of the first capacitor is connected to the second terminal of the tenth transistor, and the second terminal of the first capacitor is connected to the second terminal of the ninth transistor.

[0032] The first terminal of the eleventh transistor is connected to the reference voltage terminal, the gate of the eleventh transistor is connected to the second terminal of the eleventh transistor, and the second terminal of the eleventh transistor is connected to the first terminal of the twelfth transistor.

[0033] The gate of the twelfth transistor is connected to the second terminal of the twelfth transistor, and the second terminal of the twelfth transistor is connected to the second terminal of the ninth transistor.

[0034] Optionally, the fourth and fifth transistors are NMOS transistors, and the sixth, seventh, eighth, ninth, tenth, eleventh, and twelfth transistors are PMOS transistors.

[0035] Optionally, the hysteresis current control module includes a trigger, a third current source, a first switch, a second switch, a second capacitor, a first comparator, a second comparator, a logic control unit, and N current units, each current unit including a fourth current source and a fourth switch;

[0036] The clock signal terminal of the trigger receives the control signal. The first output terminal of the trigger is connected to the control terminal of the first switch. The second output terminal of the trigger is connected to the control terminal of the second switch. The first terminal of the first switch is connected to the third current source. The second terminal of the first switch is connected to the first terminal of the second switch. The second terminal of the second switch is grounded.

[0037] The first terminal of the second capacitor is connected to the first terminal of the second switch, and the second terminal of the second capacitor is connected to the second terminal of the second switch; the first input terminal of the first comparator is connected to the common terminal of the first switch and the second switch, the second input terminal of the first comparator receives a first reference voltage, the output terminal of the first comparator is connected to the first input terminal of the logic control unit, the first input terminal of the second comparator is connected to the common terminal of the first switch and the second switch, the second input terminal of the second comparator receives a second reference voltage, and the output terminal of the second comparator is connected to the second input terminal of the logic control unit, wherein the first reference voltage is greater than the second reference voltage;

[0038] The N output terminals of the logic control unit are respectively connected to the control terminals of the N fourth switches. The first terminal of the fourth switch is connected to the fourth current source, and the second terminal of the fourth switch outputs the hysteresis current.

[0039] Optionally, the control system of the DC-DC converter further includes a drive circuit;

[0040] The driving circuit is used to generate a first control signal and a second control signal according to the control signal, and transmit the first control signal to the control terminal of the first power transistor and the second control signal to the control terminal of the second power transistor, so as to control the first power transistor to turn on and off through the first control signal and control the second power transistor to turn on and off through the second control signal.

[0041] Optionally, the driving circuit includes an OR gate, an AND gate, a first buffer, and a second buffer;

[0042] One input of the OR gate is connected to the output of the PWM comparator, and the other input of the OR gate is connected to the output of the second buffer. The output of the OR gate is connected to the input of the first buffer. One input of the AND gate is connected to the output of the PWM comparator, and the other input of the AND gate is connected to the input of the second buffer. The other input of the AND gate is connected to the output of the first buffer.

[0043] Another aspect of the present invention provides a control method for a DC-DC converter, the DC-DC converter including a power stage circuit, the power stage circuit including an inductor, a first power transistor, and a second power transistor, the control method comprising:

[0044] Sample the current in the inductor to obtain the sampled current;

[0045] The feedback voltage of the power stage circuit is compared and amplified with the reference voltage to obtain the error current;

[0046] Based on the sampling current, the error current, the hysteresis current, and the control signal, a first voltage and a second voltage are obtained;

[0047] Based on the first voltage and the second voltage, the control signal is generated to control the turning on and off of the first power transistor and the second power transistor.

[0048] The period of the control signal is sampled, and the hysteresis current is output based on the comparison result between the sampling period and the preset period, so as to adjust the frequency of the control signal through the hysteresis current.

[0049] In another aspect, the present invention provides a DC-DC converter, including a control system and a power stage circuit, wherein the power stage circuit includes an inductor, a first power transistor and a second power transistor, and the control system is the control system of the DC-DC converter as described in any of the preceding claims.

[0050] Compared with the prior art, the technical solution provided by the present invention has the following advantages:

[0051] The DC-DC converter, its control system, and control method provided by this invention include a hysteresis current control module that samples the period of the control signal output by the PWM comparator and outputs a hysteresis current based on the comparison result between the sampling period and a preset period. The frequency of the control signal can be adjusted using the hysteresis current. Since the current-to-voltage control module obtains a first voltage and a second voltage based on the sampled current, error current, hysteresis current, and control signal, and the PWM comparator generates a control signal based on the first and second voltages to control the on / off state of the first and second power transistors, adjusting the frequency of the control signal through the hysteresis current can adjust the switching frequency of the first and second power transistors, i.e., the operating frequency of the DC-DC converter. This reduces the variation range of the DC-DC converter's operating frequency and ensures the stability of the DC-DC converter's operating frequency. Attached Figure Description

[0052] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0053] Figure 1 This is a schematic diagram of an existing DC-DC buck converter that uses hysteresis mode.

[0054] Figure 2 A schematic diagram of the control system for a DC-DC converter provided in one embodiment of the present invention;

[0055] Figure 3 This is a schematic diagram of the output feedback network of a DC-DC converter according to an embodiment of the present invention;

[0056] Figure 4 A schematic diagram of the control system for a DC-DC converter provided in another embodiment of the present invention;

[0057] Figure 5 A schematic diagram of the control system for a DC-DC converter provided in another embodiment of the present invention;

[0058] Figure 6 This is a schematic diagram of the clamping circuit provided in one embodiment of the present invention;

[0059] Figure 7 This is a schematic diagram of the structure of a current-to-voltage control module provided in one embodiment of the present invention;

[0060] Figure 8The waveform diagram shows a portion of the signals from a current-to-voltage control module provided in one embodiment of the present invention.

[0061] Figure 9 This is a schematic diagram of the structure of a hysteresis current control module provided in one embodiment of the present invention;

[0062] Figure 10 The waveform diagram shows a portion of the signals of a hysteresis current control module provided in one embodiment of the present invention.

[0063] Figure 11 A flowchart of a control method for a DC-DC converter provided in one embodiment of the present invention. Detailed Implementation

[0064] As described in the background section, existing hysteresis-mode control techniques for DC-DC converters exhibit poor operating frequency stability. For example... Figure 1 As shown, Figure 1 For a DC-DC buck converter employing hysteresis mode, it achieves this by connecting an RC network in parallel across the inductor L, i.e., connecting R in parallel. f and C f This method achieves voltage signal feedback. Inductor L is connected in series with resistor R1, and resistor Rc and target capacitor C are connected in parallel across resistor R. The feedback voltage signal Vfb and the reference voltage V are... r The signals are compared using a hysteresis comparator to generate PWM signals for the power switches QH and QL.

[0065] Based on the above control mechanism, the operating frequency can be derived: f s =((V) i -V o )*V o ) / (V i *V h *T c ), where V i V is the input voltage. o V is the output voltage. h The hysteresis voltage of the hysteresis comparator has a time constant Tc = R. f *C f As can be seen from the above formula, the system's switching frequency f s and input voltage V i Output voltage V o and hysteresis voltage V h And it is directly related to the large value of the feedback element. Therefore, with the external application conditions, the input voltage V i Output voltage V o The change in the system's operating frequency f s Significant changes will also occur, inevitably affecting the output power stage LC. Figure 1Design of the inductor L and capacitor C.

[0066] Based on this, the present invention provides a DC-DC converter and its control system and method to overcome the above-mentioned problems existing in the prior art. The DC-DC converter includes a power stage circuit, which includes an inductor, a target capacitor, a first power transistor, and a second power transistor. The control system includes:

[0067] A current sampling module is used to sample the current of the inductor to obtain the sampled current;

[0068] An error amplification module is used to compare and amplify the feedback voltage of the power stage circuit with the reference voltage to obtain the error current;

[0069] A current-to-voltage control module is used to obtain a first voltage and a second voltage based on the sampled current, the error current, the hysteresis current, and the control signal;

[0070] A PWM comparator is used to generate the control signal based on the first voltage and the second voltage, so as to control the first power transistor and the second power transistor to turn on and off through the control signal;

[0071] The hysteresis current control module is used to sample the period of the control signal and output the hysteresis current according to the comparison result between the sampling period and the preset period, so as to adjust the magnitude of the second voltage by means of the hysteresis current, and adjust the frequency of the control signal by means of adjusting the magnitude of the second voltage.

[0072] The control system and method for a DC-DC converter provided by this invention include a hysteresis current control module that samples the period of the control signal output by the PWM comparator and outputs a hysteresis current based on the comparison between the sampling period and a preset period. This hysteresis current is used to adjust the frequency of the control signal. Specifically, the hysteresis current can be reduced when the sampling period is greater than the preset period to increase the frequency of the control signal, and increased when the sampling period is less than the preset period to decrease the frequency of the control signal. Since the current-to-voltage control module obtains a first voltage and a second voltage based on the sampled current, error current, hysteresis current, and control signal, and the PWM comparator generates a control signal based on the first and second voltages to control the on / off states of the first and second power transistors, adjusting the frequency of the control signal by the hysteresis current can adjust the switching frequency of the first and second power transistors, i.e., the operating frequency of the DC-DC converter. This reduces the variation range of the DC-DC converter's operating frequency and ensures the stability of the DC-DC converter's operating frequency.

[0073] The above is the core idea of ​​this invention. To make the above-mentioned objectives, features, and advantages of this invention more apparent and understandable, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0074] This invention provides a control system for a DC-DC converter, applied to control the DC-DC converter, particularly the power stage circuitry within it. For example... Figure 2 As shown, a power stage circuit 20 provided in one embodiment of the present invention includes an inductor L, a target capacitor C, a first power transistor P1, and a second power transistor P2. One end of the inductor L is electrically connected to the reference voltage terminal VIN, and the other end of the inductor L is electrically connected to the first terminals of the first power transistor P1 and the second power transistor P2. The second terminal of the first power transistor P1 is connected to the output terminal VOUT, and the second terminal of the second power transistor P2 is connected to the ground terminal GND. One end of the target capacitor C is connected to the output terminal VOUT, and the other end of the target capacitor C is connected to the ground terminal GND. The first power transistor P1 is a PMOS transistor, and the second power transistor P2 is an NMOS transistor. Of course, this embodiment of the present invention is only an example of the structure of a power stage circuit 20 and is not limited thereto.

[0075] like Figure 2 As shown, the control system of the DC-DC converter provided in this embodiment of the invention includes: a current sampling module 10, an error amplification module 11, a current-to-voltage control module 12, a PWM comparator 13, and a hysteresis current control module 14.

[0076] The current sampling module 10 is used to sample the current of the inductor L and obtain the sampled current I. SEN .like Figure 2 As shown, one input terminal of the current sampling module 10 is connected to the SW terminal of the power stage circuit 20, and is used to receive the feedback voltage V output from the SW terminal. SW Another input terminal of the current sampling module 10 is connected to the output terminal VOUT of the power stage circuit 20, and is used to receive the output voltage V output from the output terminal VOUT. OUT When the first power transistor P1 is turned on and the second power transistor P2 is turned off, the feedback voltage V... SW and output voltage V OUT Obtain the current flowing through the first power transistor P1 and the inductor L, i.e., obtain the sampling current I. SEN When the first power transistor P1 is off and the second power transistor P2 is on, according to the feedback voltage V... SW and output voltage VOUT Obtain the current flowing through the second power transistor P2 and the inductor L, i.e., obtain the sampling current I. SEN .

[0077] Error amplifier module 11 is used to amplify the feedback voltage V at the output terminal VOUT of power stage circuit 20. FB With reference voltage V REF Comparison and amplification are performed to obtain the error current I. ERR .like Figure 2 As shown, the error amplifier module 11 receives a feedback voltage V at one of its input terminals. FB The other input terminal receives the reference voltage V. REF The error amplification module 11 will feed back the voltage V. FB With reference voltage V REF Comparison and amplification are performed to obtain the error current I. ERR Optionally, such as Figure 3 As shown, the feedback voltage V FB The feedback voltage V is obtained through a feedback network connected to the output terminal VOUT, wherein the feedback network consists of resistors R1 and R2. However, the present invention is not limited to this. In some embodiments, one input terminal of the error amplification module 11 can also be directly connected to the output terminal VOUT to obtain the feedback voltage V. FB . Figure 3 middle, I LOAD R is the load current, and R0 is the load resistance.

[0078] The current-to-voltage control module 12 is used to control the voltage based on the sampled current I. SEN Error current I ERR Hysteresis current I HYS And the control signal PWM, to obtain the first voltage V P Second voltage V N .like Figure 2 As shown, one input terminal of the current-to-voltage control module 12 is connected to the output terminal of the current sampling module 10, and is used to receive the sampled current I. SEN The other input terminal of the current-to-voltage control module 12 is connected to the error amplifier module 11, and is used to receive the error current I. ERR The other input terminal of the current-to-voltage control module 12 is connected to the output terminal of the hysteresis current control module 14, and is used to receive the hysteresis current I. HYS The other input terminal of the current-to-voltage control module 12 is connected to the PWM comparator 13 to receive the control signal PWM.

[0079] PWM comparator 13 is used to determine the voltage V based on the first voltage V P Second voltage V NThis generates a PWM control signal to control the on / off state of the first power transistor P1 and the second power transistor P2. For example... Figure 2 As shown, one input terminal of the PWM comparator 13 is connected to one output terminal VP of the current-to-voltage control module 12, and is used to receive the first voltage V. P The other input terminal of PWM comparator 13 is connected to the other output terminal VN of current-to-voltage control module 12, and is used to receive the second voltage V. N PWM comparator 13 corresponds to the first voltage V P Second voltage V N After comparison, a control signal PWM is output. Wherein, when the first voltage V... P Greater than the second voltage V N When the first voltage V is high, the control signal PWM is high; when the first voltage V is high, the control signal PWM is high. P Less than or equal to the second voltage V N At this time, the control signal PWM is at a low level.

[0080] The hysteresis current control module 14 is used to sample the period of the control signal PWM and adjust the output hysteresis current I based on the comparison between the sampling period and the preset period. HYS The magnitude of the hysteresis current I is adjusted by regulating its magnitude. HYS The magnitude of the control signal frequency is adjusted by the magnitude of the signal. For example... Figure 2 As shown, the input terminal of the hysteresis current control module 14 is connected to the output terminal of the PWM comparator 13, and is used to receive the control signal PWM and obtain the hysteresis current I based on the control signal PWM. HYS .

[0081] In embodiments of the present invention, such as Figure 2 As shown, the control system provided in this embodiment of the invention further includes a drive circuit 15. The drive circuit 15 is used to generate a first control signal DRVH and a second control signal DRVL according to the control signal PWM, and transmit the first control signal DRVH to the control terminal (gate) of the first power transistor P1, and transmit the second control signal DRVL to the control terminal (gate) of the second power transistor P2, so as to control the first power transistor P1 to turn on and off through the first control signal DRVH, and control the second power transistor P2 to turn on and off through the second control signal DRVL.

[0082] In some embodiments of the present invention, such as Figure 4As shown, the driving circuit 15 includes an OR gate X1, an AND gate X2, a first buffer X3, and a second buffer X4. One input of the OR gate X1 is connected to the output of the PWM comparator 13, the other input of the OR gate X1 is connected to the output of the second buffer X4, and the output of the OR gate X1 is connected to the input of the first buffer X3; one input of the AND gate X2 is connected to the output of the PWM comparator 13, the other input of the AND gate X2 is connected to the input of the second buffer X4, and the other input of the AND gate X2 is connected to the output of the first buffer X3.

[0083] When the control signal PWM is high, both the first control signal DRVH and the second control signal DRVL are high, the second power transistor P2 is turned on and the first power transistor P1 is turned off, and the current of inductor L increases. When the control signal PWM is low, both the first control signal DRVH and the second control signal DRVL are low, the second power transistor P2 is turned off and the first power transistor P1 is turned on, and the current of inductor L decreases.

[0084] It should be noted that the current sampling module 10 in this embodiment of the invention performs full-cycle sampling, that is, it samples not only the current of inductor L when the first power transistor P1 is on, but also the current of inductor L when the first power transistor P1 is off, in order to obtain the sampling current I. SEN The current sampling module 10 can sample the current I by sampling throughout the entire cycle. SEN The sampling output is a certain proportion of the current in inductor L, so as to output the sampling current I. SEN The current-to-voltage module 12 is supplied with current and the hysteresis current is controlled.

[0085] In some embodiments of the present invention, the error amplification module 11 may consist only of an error amplifier, with the first input terminal of the error amplifier receiving a feedback voltage V. FB The second input terminal of the error amplifier receives the reference voltage V. REF The output of the error amplifier is connected to the input of the current-to-voltage control module 12 to convert the error current I. ERR Transmitted to the current-to-voltage control module 12.

[0086] However, the present invention is not limited thereto; in other embodiments, such as Figure 5 As shown, the error amplification module 11 includes an error amplifier GM and a clamping circuit. The first input terminal of the error amplifier GM receives the feedback voltage V. FB The second input terminal of the error amplifier GM receives the reference voltage V. REF The output terminal VG of the error amplifier GM is connected to the input terminal of the clamping circuit, and the output terminal of the clamping circuit outputs the error current I. ERRThe clamping circuit is used to clamp the current output of the error amplifier GM within a preset range.

[0087] When the feedback voltage V FB Higher than the reference voltage V REF At that time, the error current I ERR As the error current I decreases, ERR When the error current I decreases to a certain level, the clamping circuit is triggered. ERR It stopped decreasing. When the feedback voltage V FB After reduction, the error current I ERR It can rise relatively quickly, achieving a fast transient response, thereby accelerating the dynamic response speed of the control system and enabling a smooth transition from heavy load to light load in the power stage circuit, improving light load efficiency.

[0088] In some embodiments of the present invention, such as Figure 6 As shown, the clamping circuit includes a first transistor M1, a second transistor M2, a third transistor M3, and a first current source IB1. Of course, the present invention is not limited to this; in other embodiments, clamping circuits with other structures can be used to achieve the functions of the clamping circuits in the embodiments of the present invention.

[0089] The input terminal of the first current source IB1 is connected to the reference voltage terminal VIN, and the output terminal of the first current source IB1 is connected to the first terminal of the first transistor M1; the second terminal of the first transistor M1 is connected to the ground terminal GND, and the gate of the first transistor M1 is connected to the input terminal VG of the clamping circuit; the second terminal of the second transistor M2 is connected to the ground terminal GND, the first terminal of the second transistor M2 is connected to the output terminal IERR of the clamping circuit, and the gate of the second transistor M2 is connected to the input terminal VG of the clamping circuit; the first terminal of the third transistor M3 is connected to the reference voltage terminal VIN, the second terminal of the third transistor M3 is connected to the input terminal VG of the clamping circuit, and the gate of the third transistor M3 is connected to the output terminal of the first current source IB1.

[0090] When the feedback voltage V FB Higher than the reference voltage V REF At that time, the voltage V at the output terminal VG of the error amplifier GM is... G Gradually decrease, causing the error current I ERR It decreases when the voltage V G Or error current I ERR When reduced to a certain level, the current I flowing through the third transistor M3 is reduced. D_M3 The current IB1 is less than that of the first current source IB1, which means that the source voltage of the third transistor M3 is less than its gate voltage. This causes the third transistor M3 to turn on, pulling up the voltage VG at the output of the error amplifier GM, thus increasing the error current I. ERRThe current no longer decreases, thus achieving the error current I. ERR Minimum current clamping function.

[0091] In some embodiments of the present invention, such as Figure 7 As shown, I BN2 The bias current, current-to-voltage control module 12 includes a second current source IB2, a fourth transistor M4 to a twelfth transistor M12, a first capacitor C1 and an inverter NV1.

[0092] In this circuit, the input terminal of the second current source IB2 is connected to the reference voltage terminal VIN, and the output terminal of the second current source IB2 is connected to the first terminal of the fourth transistor M4. The first terminal of the fourth transistor M4 is connected to the gate of the fourth transistor M4, and the second terminal of the fourth transistor M4 is connected to the ground terminal GND. The second terminal of the fifth transistor M5 is connected to the ground terminal GND, the gate of the fifth transistor M5 is connected to the gate of the fourth transistor M4, and the first terminal of the fifth transistor M5 is connected to the first output terminal VP of the current-to-voltage control module 12. The first output terminal VP outputs the first voltage V. P ;

[0093] The first terminal of the sixth transistor M6 is connected to the reference voltage terminal VIN. The gate of the sixth transistor M6 is connected to the second terminal of the sixth transistor M6. The second terminal of the sixth transistor M6 is connected to the first terminal of the seventh transistor M7. The gate of the seventh transistor M7 is connected to the second terminal of the seventh transistor M7. The second terminal of the seventh transistor M7 is connected to the second output terminal VN of the current-to-voltage control module 12. The second output terminal VN outputs the second voltage V. N The second terminal of the seventh transistor M7 is connected to the first input terminal of the current-to-voltage control module 12, and the first input terminal transmits the error current I. ERR ;

[0094] The first terminal of the eighth transistor M8 is connected to the reference voltage terminal VIN. The gate of the eighth transistor M8 is connected to the gate of the sixth transistor M6. The second terminal of the eighth transistor M8 is connected to the second input terminal of the current-to-voltage control module 12, and the second input terminal transmits the sampling current I. SEN The first terminal of the ninth transistor M9 is connected to the second terminal of the eighth transistor M8, the gate of the ninth transistor M9 is connected to the gate of the eighth transistor M8, and the second terminal of the ninth transistor M9 is connected to the first input terminal of the current-to-voltage control module 12.

[0095] The first terminal of the tenth transistor M10 is connected to the third input terminal of the current-to-voltage control module 12, and the third input terminal transmits the hysteresis current I. HYSThe gate of the tenth transistor M10 is connected to the output of the inverter NV1, and the input of the inverter NV1 is connected to the fourth input of the current-to-voltage control module 12. The fourth input receives the control signal PWM. The second terminal of the tenth transistor M10 is connected to the second terminal of the eighth transistor M8. The first terminal of the first capacitor C1 is connected to the second terminal of the tenth transistor M10, and the second terminal of the first capacitor C1 is connected to the second terminal of the ninth transistor M9.

[0096] The first terminal of the eleventh transistor M11 is connected to the reference voltage terminal VIN. The gate of the eleventh transistor M11 is connected to the second terminal of the eleventh transistor M11. The second terminal of the eleventh transistor M11 is connected to the first terminal of the twelfth transistor M12. The gate of the twelfth transistor M12 is connected to the second terminal of the twelfth transistor M12. The second terminal of the twelfth transistor M12 is connected to the second terminal of the ninth transistor M9.

[0097] In some embodiments of the present invention, the fourth transistor M4 and the fifth transistor M5 are NMOS transistors, and the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11 and the twelfth transistor M12 are PMOS transistors.

[0098] The following is combined with Figure 8 The operation of the current-to-voltage control module 12 is explained below. Due to the second voltage V at the output terminal VN... N From the error current I ERR Generate, and, V N =V IN -V SG_M6 +V SG_M7 , where V IN The voltage at the reference voltage terminal VIN, V SG_M6 V is the voltage between the gate and source of the sixth transistor M6. SG_M7 The voltage between the gate and source of the seventh transistor M7 is given; therefore, in the error current I... ERR Under relatively stable conditions, the second voltage V N It is also basically stable.

[0099] When the control signal PWM is low, the second power transistor P2 is off and the first power transistor P1 is on, and the current I of the inductor L... L The current I in inductor L gradually decreases, i.e., it gradually decreases. L In the falling phase, i.e., the sampling current I SEN It will also gradually decrease. When I ERR >I SEN +I BN2At that time, under the action of the mirror circuit composed of the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9, I SEN The voltage at the node rises, and the first voltage V output at the output terminal VP increases. P It also rises when the first voltage V P Exceeding the second voltage V N At this time, PWM comparator 13 outputs a high level, meaning the control signal PWM is high and its inverting signal PWMN is low, causing the tenth transistor M10 to turn on and the hysteresis current I... HYS Transfer to the tenth transistor M10, causing I ERR +I HYS >I SEN +I BN2 At this time, the second power transistor P2 is turned on and the first power transistor P1 is turned off, and the current I in the inductor L is... L Rise, sampling current I SEN And it also rises, when I ERR +I HYS SEN +I BN2 At that time, the first voltage V P It begins to decrease when the first voltage V P Below the second voltage V N When the PWM comparator 13 outputs a low level, that is, the control signal PWM is low, the second power transistor P2 is turned off and the first power transistor P1 is turned on, and so on in a repeated cycle.

[0100] It should be noted that I SEN =I L / k, where k is the sampled value I SEN The sampling ratio, I, during the entire PWM control signal generation process. HYS The hysteresis current of PWM comparator 13 and the current I of inductor L are... L To establish a certain proportional relationship, therefore, adjust I. HYS The magnitude of the current I in inductor L can be changed. L The size of the ripple.

[0101] Under the action of the first capacitor C1, when the load current I of the power stage circuit... LOAD When it is small, the error current I ERR Decrease, I ERR -I SEN -I BN2 The smaller current results in a slower charging speed of the differential current to the node ISEN and the output terminal VP, which in turn results in a lower frequency of the control signal PWM. Consequently, the switching frequency of the first power transistor P1 and the second power transistor P2 is lower under light load, thus achieving automatic frequency reduction under light load without the need for additional circuitry. ​

[0102] In some embodiments of the present invention, such as Figure 9 As shown, the hysteresis current control module 14 includes a trigger QB, a third current source ib, a first switch k1, a second switch k2, a second capacitor c2, a first comparator op1, a second comparator op2, a logic control unit, and N current units, each current unit including a fourth current source ibp and a fourth switch kp.

[0103] The clock signal terminal clk of the flip-flop QB receives the switch control signal PWM. The first output terminal Qx of the flip-flop QB is connected to the control terminal of the first switch k1. The second output terminal Q of the flip-flop QB is connected to the control terminal of the second switch k2. The first terminal of the first switch k1 is connected to the third current source ib. The second terminal of the first switch k1 is connected to the first terminal of the second switch k2. The second terminal of the second switch k2 is grounded.

[0104] The first terminal of the second capacitor C2 is connected to the first terminal of the second switch K2, and the second terminal of the second capacitor C2 is connected to the second terminal of the second switch K2; the first input terminal of the first comparator OP1 is connected to the common terminal of the first switch K1 and the second switch K2, and the second input terminal of the first comparator OP1 receives the first reference voltage V. REFH The output of the first comparator OP1 is connected to the first input of the logic control unit. OP1 compares the voltage across the second capacitor with the reference voltage V. REFH The comparison generates a control signal VH. The first input terminal of the second comparator op2 is connected to the common terminal of the first switch k1 and the second switch k2, and the second input terminal of the second comparator op2 receives the second reference voltage V. REFL The output of the second comparator OP2 is connected to the second input of the logic control unit. OP2 compares the voltage across the second capacitor with the reference voltage V. REFL The comparison generates a control signal VL. The first reference voltage V... REFH Greater than the second reference voltage V REFL ;

[0105] The N output terminals of the logic control unit are respectively connected to the control terminals of N fourth switches kp. The first terminal of the fourth switch kp is connected to the fourth current source ibp, and the second terminal of the fourth switch kp outputs a hysteresis current I. HYS The logic control unit generates control signals CON1 to CONn through its internal logic control circuit to control the on / off state of the current branches ibp1 to ibpn, thereby changing the hysteresis current I. HYS .

[0106] By using a trigger QB to detect the period of the control signal PWM, the hysteresis current I can be controlled. HYSThe non-continuous dynamic adjustment is achieved by first dividing the PWM control signal and sampling its periodic signal. For example, on the rising edge of the control signal, a high-level signal is output at the first and second outputs of the trigger QB, turning on the first switch k1 and de-turning the second switch k2, allowing the third current source ib to charge the second capacitor C2. On the falling edge of the control signal, a low-level signal is output at the first and second outputs of the trigger QB, turning off the first switch k1 and turning on the second switch k2, discharging the second capacitor C2. By controlling the charging and discharging of the second capacitor C2 and judging the results using the first comparator op1 and the second comparator op2, the comparison between the control signal period and the preset period can be realized. When the voltage Vc of the second capacitor C2 exceeds V... REFH In the case of voltage, the logic control unit controls the hysteresis current I by reducing the number of times the fourth switch kp is turned on. HYS Decrease; when the voltage Vc of the second capacitor C2 is less than V REFL In this case, the logic control unit controls the hysteresis current I by increasing the number of times the fourth switch kp is turned on. HYS Increase; when the voltage Vc of the second capacitor C2 is between the two, the logic control unit controls the number of the fourth switch kp to remain unchanged in order to maintain the current hysteresis current I. HYS This is to achieve control over the hysteresis current I. HYS The dynamic adjustment ensures that the operating frequency of the control signal generated by the PWM comparator is basically maintained in a stable range.

[0107] Figure 10 As shown, Figure 9 The control curve diagram shows the circuit operation. When VH is detected to be high at the rising edge of Qx, the hysteresis current is decreased sequentially; when VL is detected to be low at the rising edge of Qx, the hysteresis IHYS is increased sequentially; when VH is detected to be low at the rising edge of Qx and VL is detected to be high, IHYS maintains the current magnitude, thereby maintaining the PWM operating frequency.

[0108] This invention also provides a control method for a DC-DC converter. The DC-DC converter includes a power stage circuit, which includes an inductor, a target capacitor, a first power transistor, and a second power transistor, such as... Figure 11 As shown, the control methods include:

[0109] S101: Sample the current of the inductor to obtain the sampled current;

[0110] S102: Compare and amplify the feedback voltage of the power stage circuit with the reference voltage to obtain the error current;

[0111] S103: Obtain the first voltage and the second voltage based on the sampling current, error current, hysteresis current and control signal;

[0112] S104: Generate a control signal based on the first voltage and the second voltage, so as to control the turning on and off of the first power transistor and the second power transistor through the control signal;

[0113] S105: Samples the period of the control signal and outputs a hysteresis current based on the comparison between the sampling period and the preset period, so as to adjust the frequency of the control signal through the hysteresis current.

[0114] For step S105, specifically, when the sampling period is greater than the preset period, the hysteresis current can be reduced to increase the frequency of the control signal, while when the sampling period is less than the preset period, the hysteresis current can be increased to decrease the frequency of the control signal.

[0115] This invention also provides a DC-DC converter, such as... Figure 2 As shown, the DC-DC converter includes a control system and a power stage circuit. The power stage circuit includes an inductor L, a target capacitor C, a first power transistor P1, and a second power transistor P2. The control system is the control system of the DC-DC converter provided in any of the above embodiments.

[0116] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0117] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A control system of a DC-DC converter, characterized by, The DC-DC converter comprises a power stage circuit comprising an inductor, a first power tube and a second power tube, and the control system comprises: a current sampling module for sampling a current of the inductor to obtain a sampling current; an error amplification module for comparing and amplifying a feedback voltage of the power stage circuit with a reference voltage to obtain an error current; a current-to-voltage control module for obtaining a first voltage and a second voltage according to the sampling current, the error current, a hysteresis current and a control signal; a PWM comparator for generating the control signal according to the first voltage and the second voltage, so as to control the opening and closing of the first power tube and the second power tube through the control signal; a hysteresis current control module for sampling a period of the control signal, and outputting the hysteresis current according to a comparison result of the sampling period and a preset period, so as to adjust the frequency of the control signal through the hysteresis current; the hysteresis current control module comprises a flip-flop, a third current source, a first switch, a second switch, a second capacitor, a first comparator, a second comparator, a logic control unit and N current units, each current unit comprising a fourth current source and a fourth switch; a clock signal end of the flip-flop receives the control signal, a first output end of the flip-flop is connected with a control end of the first switch, a second output end of the flip-flop is connected with a control end of the second switch, a first end of the first switch is connected with the third current source, a second end of the first switch is connected with a first end of the second switch, and a second end of the second switch is grounded; a first end of the second capacitor is connected with the first end of the second switch, and a second end of the second capacitor is connected with the second end of the second switch; a first input end of the first comparator is connected with a common end of the first switch and the second switch, a second input end of the first comparator inputs a first reference voltage, an output end of the first comparator is connected with a first input end of the logic control unit, a first input end of the second comparator is connected with the common end of the first switch and the second switch, a second input end of the second comparator inputs a second reference voltage, and an output end of the second comparator is connected with a second input end of the logic control unit; the first reference voltage is greater than the second reference voltage; N output ends of the logic control unit are respectively connected with control ends of the N fourth switches, first ends of the fourth switches are connected with the fourth current sources, and second ends of the fourth switches output the hysteresis current.

2. The control system of claim 1, wherein, the error amplification module comprises an error amplifier and a clamping circuit; a first input end of the error amplifier inputs the feedback voltage, and a second input end of the error amplifier inputs the reference voltage; an output end of the error amplifier is connected with an input end of the clamping circuit, and an output end of the clamping circuit outputs the error current; the clamping circuit is used for clamping the current output by the error amplifier within a preset range.

3. The control system of claim 2, wherein, the clamping circuit comprises a first transistor, a second transistor, a third transistor and a first current source; The input end of the first current source is connected with a reference voltage end, and the output end of the first current source is connected with the first end of the first transistor; The second end of the first transistor is connected with a ground end, and the gate of the first transistor is connected with the input end of the clamping circuit; The second end of the second transistor is connected with a ground end, the first end of the second transistor is connected with the output end of the clamping circuit, and the gate of the second transistor is connected with the input end of the clamping circuit; The first end of the third transistor is connected with the reference voltage end, the second end of the third transistor is connected with the input end of the clamping circuit, and the gate of the third transistor is connected with the output end of the first current source.

4. The control system of claim 1, wherein, The current-to-voltage control module comprises a second current source, fourth to twelfth transistors, a first capacitor and an inverter; The input end of the second current source is connected with a reference voltage end, and the output end of the second current source is connected with the first end of the fourth transistor; The first end of the fourth transistor is connected with the gate of the fourth transistor, and the second end of the fourth transistor is connected with a ground end; The second end of the fifth transistor is connected with a ground end, the gate of the fifth transistor is connected with the gate of the fourth transistor, the first end of the fifth transistor is connected with the first output end of the current-to-voltage control module, and the first output end outputs the first voltage; The first end of the sixth transistor is connected with a reference voltage end, the gate of the sixth transistor is connected with the second end of the sixth transistor, and the second end of the sixth transistor is connected with the first end of the seventh transistor; The gate of the seventh transistor is connected with the second end of the seventh transistor, the second end of the seventh transistor is connected with the second output end of the current-to-voltage control module, the second output end outputs the second voltage, the second end of the seventh transistor is connected with the first input end of the current-to-voltage control module, and the first input end transmits the error current; The first end of the eighth transistor is connected with the reference voltage end, the gate of the eighth transistor is connected with the gate of the sixth transistor, and the second end of the eighth transistor is connected with the second input end of the current-to-voltage control module, and the second input end transmits the sampling current; The first end of the ninth transistor is connected with the second end of the eighth transistor, the gate of the ninth transistor is connected with the gate of the eighth transistor, and the second end of the ninth transistor is connected with the first input end of the current-to-voltage control module; The first end of the tenth transistor is connected with the third input end of the current-to-voltage control module, the third input end transmits the hysteresis current, the gate of the tenth transistor is connected with the output end of the inverter, the input end of the inverter is connected with the fourth input end of the current-to-voltage control module, the fourth input end receives the control signal, and the second end of the tenth transistor is connected with the second end of the eighth transistor; The first end of the first capacitor is connected with the second end of the tenth transistor, and the second end of the first capacitor is connected with the second end of the ninth transistor. A first end of the eleventh transistor is connected with the reference voltage terminal, a gate of the eleventh transistor is connected with a second end of the eleventh transistor, and the second end of the eleventh transistor is connected with a first end of the twelfth transistor; A gate of the twelfth transistor is connected with a second end of the twelfth transistor, and the second end of the twelfth transistor is connected with a second end of the ninth transistor.

5. The control system of claim 4, wherein, The fourth transistor and the fifth transistor are NMOS transistors, and the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor and the twelfth transistor are PMOS transistors.

6. The control system of claim 1, wherein, The control system of the DC-DC converter further comprises a driving circuit; The driving circuit is configured to generate a first control signal and a second control signal according to the control signal, and transmit the first control signal to a control end of the first power tube and transmit the second control signal to a control end of the second power tube, so as to control opening and closing of the first power tube by the first control signal and control opening and closing of the second power tube by the second control signal.

7. The control system of claim 6, wherein, The driving circuit comprises an OR gate, an AND gate, a first buffer and a second buffer; One input end of the OR gate is connected with an output end of the PWM comparator, another input end of the OR gate is connected with an output end of the second buffer, and an output end of the OR gate is connected with an input end of the first buffer; one input end of the AND gate is connected with the output end of the PWM comparator, another input end of the AND gate is connected with an input end of the second buffer, and another input end of the AND gate is connected with an output end of the first buffer.

8. A control method of a control system of a DC-DC converter according to any one of claims 1 to 7, characterized by, The DC-DC converter comprises a power stage circuit, the power stage circuit comprises an inductor, a first power tube and a second power tube, and the control method comprises: Sampling a current of the inductor to obtain a sampling current; Comparing and amplifying a feedback voltage of the power stage circuit with a reference voltage to obtain an error current; According to the sampling current, the error current, a hysteresis current and a control signal, a first voltage and a second voltage are obtained; According to the first voltage and the second voltage, the control signal is generated to control opening and closing of the first power tube and the second power tube by the control signal; The period of the control signal is sampled, and the hysteresis current is output according to a comparison result of the sampling period and a preset period, so as to adjust the frequency of the control signal by the hysteresis current.

9. A DC-DC converter, characterized by The DC-DC converter comprises a control system and a power stage circuit, the power stage circuit comprises an inductor, a first power tube and a second power tube, and the control system is the control system of the DC-DC converter according to any one of claims 1 to 7.

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