A high-resolution CT image processing method, device, equipment and storage medium

Abstract

The application provides a high-resolution CT image processing method, device and equipment and a storage medium, comprising the following steps: inputting a high-resolution CT image; achieving preliminary smoothing of the high-resolution CT image through a convolution layer; and performing down-sampling on the smoothed CT image through a CT processing sub-network structure.The method learns parameters of CT image data through a small network structure to achieve the effect of effectively representing high-resolution CT images using small-size feature maps, and solves the problems of consuming a large amount of computing resources and occupying a large amount of memory when a current network structure processes high-resolution CT images.In addition, compared with the prior art, the maximum pooling layer in the CT processing sub-network structure retains high-frequency information of input feature maps, so that the network is easier to learn, and the convolution layer with a kernel size of 2 and a stride of 2 is used to achieve down-sampling of learnable parameters, and the feature maps of different feature information obtained after down-sampling are stacked and fused through a 1*1 convolution to serve as output.

Description

Technical Field

[0001] This invention relates to the field of medical device technology, specifically to a high-resolution CT image processing method, apparatus, device, and storage medium. Background Technology

[0002] Hip replacement surgery is one of the most effective methods for treating degenerative hip joint diseases and improving patients' quality of life. With the increasing prominence of China's aging population, the practical significance of hip replacement surgery is becoming even more pronounced. Successful hip replacement surgery relies on accurate, complete, and detailed surgical planning. However, prosthesis planning requires reference to the complete hip and femur; therefore, the input CT image data needs to contain complete hip and femur information, i.e., full-length lower limb CT images. Full-length lower limb CT images generally have high resolution, consuming significant computational resources and memory during processing. They are often not directly usable for CNN training and usually require some processing to reduce their size before being used as input to the CNN.

[0003] Existing technical solutions often involve downsampling or cropping key regions of high-resolution CT images for subsequent processes. However, downsampling CT images result in the loss of a lot of detail, leading to accuracy issues. In addition, cropping key regions requires first identifying the key regions. If the key regions are too large, such as when processing the entire femur, there is still a problem of high computational resource consumption, and additional operations are needed, which is time-consuming and labor-intensive. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art described in the background section and to provide a high-resolution CT image processing method, apparatus, device and storage medium. By learning parameters through a small network structure, the CT image data is downsampled with learnable parameters, thereby achieving the function of effectively representing high-resolution CT images using a smaller feature map.

[0005] This invention is achieved through the following technical solution: Firstly, this invention provides a high-resolution CT image processing method, comprising the following steps:

[0006] Input high-resolution CT images;

[0007] Preliminary smoothing of the high-resolution CT images is achieved through convolutional layers;

[0008] The smoothed CT image is downsampled using a CT processing subnetwork structure.

[0009] Furthermore, the convolutional layer adopts a Conv+BN+ReLU model structure, wherein the kernel size is 3, the stride is 1, and the number of channels is 1.

[0010] Furthermore, the CT processing subnetwork consists of two sequentially linked fusion pooling layers.

[0011] Furthermore, the structure of the fusion pooling layer is as follows:

[0012] First, the input CT image feature map is passed through a convolutional layer with a Conv+BN+ReLU model structure, where the kernel size is 3 and the stride is 1.

[0013] To retain the advantages of max pooling, a max pooling operation and a convolution operation are performed on the input CT image feature map, respectively. The convolutional layer adopts the Conv+BN+ReLU model structure, with a kernel size of 2 and a stride of 2.

[0014] The CT image feature map after max pooling is combined with the CT image feature map after convolution, and a CT image feature map with the same number of channels as the original CT image is obtained by passing it through a convolutional layer with the model structure Conv+BN+ReLU. The convolution kernel size is 1 and the stride is 1.

[0015] In a second aspect, the present invention provides a high-resolution CT image processing apparatus, the apparatus comprising:

[0016] Input module for inputting high-resolution CT images;

[0017] A smoothing module is used to achieve initial smoothing of the high-resolution CT image through convolutional layers;

[0018] The downsampling module is used to downsample smoothed CT images through the CT processing subnetwork structure.

[0019] Thirdly, the present invention provides a high-resolution CT image processing device, the device comprising: a processor, a memory, and computer program instructions stored in the memory and executable on the processor, wherein the processor is configured to execute the computer program instructions stored in the memory to implement the above-described high-resolution CT image processing method.

[0020] Fourthly, the present invention also provides a high-resolution CT image processing storage medium, wherein computer program instructions are stored on the computer storage medium, and the computer program instructions, when executed by a processor, implement the above-described high-resolution CT image processing method.

[0021] This invention provides a high-resolution CT image processing method, apparatus, device, and storage medium. By learning parameters through a small network structure, it downsamples CT image data using learnable parameters, achieving effective representation of high-resolution CT images using smaller feature maps. This solves the problems of high computational resource consumption and large memory usage in existing network structures for processing high-resolution CT images. Furthermore, compared to existing technologies, the max-pooling layer in the CT processing sub-network structure of this invention retains high-frequency information from the input feature map, making the network easier to learn. Simultaneously, it utilizes convolutional layers with a kernel size of 2 and a stride of 2 to downsample learnable parameters. The downsampled feature maps with different feature information are stacked and fused using a 1*1 convolution before being used as the output. Attached Figure Description

[0022] The features, advantages and technical effects of exemplary embodiments of the present invention will now be described with reference to the accompanying drawings.

[0023] Figure 1 This is a flowchart of the high-resolution CT image processing method provided in the embodiments of the present invention;

[0024] Figure 2 This is a schematic diagram of the structure of the fusion pooling layer provided in an embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram of the high-resolution CT image processing device provided in an embodiment of the present invention;

[0026] Figure 4 This is a schematic diagram of the structure of a computing device provided in an embodiment of the present invention. Detailed Implementation

[0027] The features and exemplary embodiments of various aspects of this disclosure will now be described in detail. To make the objectives, technical solutions, and advantages of this disclosure clearer, the disclosure will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended to explain this disclosure only and not to limit it. For those skilled in the art, this disclosure can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this disclosure by illustrating examples.

[0028] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0029] To better understand the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0030] Figure 1 This is a flowchart of the high-resolution CT image processing method provided in the embodiments of the present invention.

[0031] like Figure 1 As shown, the present invention provides a high-resolution CT image processing method, comprising the following steps:

[0032] S101, Input high-resolution CT images;

[0033] S102, preliminary smoothing of the high-resolution CT image is achieved through convolutional layers;

[0034] S103 downsamples the smoothed CT image through the CT processing sub-network structure.

[0035] Optionally, the convolutional layer in S102 adopts a Conv+BN+ReLU model structure, wherein the kernel size is 3, the stride is 1, and the number of channels is 1.

[0036] Optionally, the CT processing subnetwork described in S103 consists of two sequentially linked fusion pooling layers.

[0037] Figure 2 This is a schematic diagram of the structure of the fusion pooling layer provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the structure of the fusion pooling layer is as follows:

[0038] First, the input CT image feature map is passed through a convolutional layer with a Conv+BN+ReLU model structure, where the kernel size is 3 and the stride is 1.

[0039] Furthermore, retaining the advantages of max pooling, we perform a max pooling operation and a convolution operation on the input CT image feature map, respectively. The convolutional layer adopts a Conv+BN+ReLU model structure with a kernel size of 2 and a stride of 2.

[0040] The CT image feature map after max pooling is combined with the CT image feature map after convolution, and a small-sized CT image feature map with the same dimension as the original CT image is obtained by passing it through a convolutional layer with a model structure of Conv+BN+ReLU. The convolution kernel size is 1 and the stride is 1.

[0041] Figure 3 This is a schematic diagram of the high-resolution CT image processing device provided in an embodiment of the present invention.

[0042] like Figure 3 As shown, the present invention provides a high-resolution CT image processing apparatus, the apparatus comprising:

[0043] Input module 301 is used to input high-resolution CT images;

[0044] Smoothing module 302 is used to achieve preliminary smoothing of the high-resolution CT image through convolutional layers;

[0045] The downsampling module 303 is used to downsample the smoothed CT image through the CT processing sub-network structure.

[0046] Figure 3 Each module / unit in the illustrated device has the ability to implement Figure 1 The functions of each step in the process and their corresponding technical effects are described in detail here for the sake of brevity.

[0047] like Figure 4 As shown, the present invention also provides a high-resolution CT image processing device, the device comprising: a processor 401, a memory 402, and computer program instructions stored in the memory 402 and executable on the processor 401, wherein the processor 401 is used to execute the computer program instructions stored in the memory 402 to implement the above-described high-resolution CT image processing method.

[0048] Specifically, the processor 401 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the present invention.

[0049] Memory 402 may include mass storage for data or instructions. For example, and not as a limitation, memory may include hard disk drive (HDD), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or Universal Serial Bus (USB) drive, or a combination of two or more of these devices.

[0050] In one instance, memory 402 may include removable or non-removable (or fixed) media, or the memory may be non-volatile solid-state memory. The memory may be internal or external to the integrated gateway disaster recovery device.

[0051] In one instance, memory 402 may be read-only memory (ROM). In one instance, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0052] In one example, memory 402 may include read-only memory (ROM), random access memory (RAM), disk storage media device, optical storage media device, flash memory device, electrical, optical, or other physical / tangible memory storage device. Thus, typically, memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of this disclosure.

[0053] The processor 401 reads and executes computer program instructions stored in the memory 402 to achieve... Figure 1 The methods / steps in the illustrated embodiments, and the corresponding technical effects they achieve, will not be elaborated upon here for the sake of brevity.

[0054] In one embodiment, the computing device may further include a communication interface 403 and a bus 404. For example... Figure 4 As shown, the processor 401, memory 402, and communication interface 403 are connected through bus 404 and complete communication with each other.

[0055] The communication interface 403 is mainly used to realize communication between various modules, devices, units and / or equipment in this invention.

[0056] Bus 404 includes hardware, software, or both, that couples components of an online data flow metering device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, the bus may include one or more buses. Although specific buses are described and illustrated in this invention, this disclosure contemplates any suitable bus or interconnect.

[0057] In addition to the high-resolution CT image processing method described in the above embodiments, the present invention also provides a computer storage medium for implementation. The computer storage medium stores computer program instructions, which, when executed by a processor, implement the aforementioned high-resolution CT image processing method.

[0058] The computer storage medium provided in this invention can be any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. For example, a computer-readable storage medium can be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this invention, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0059] This invention provides a high-resolution CT image processing method, apparatus, device, and storage medium. By learning parameters through a small network structure to downsample CT image data, it achieves the effective representation of high-resolution CT images using smaller feature maps, solving the problems of high computational resource consumption and large memory usage in existing network structures for processing high-resolution CT images. Furthermore, compared with existing technologies, the max-pooling layer in the CT processing sub-network structure of this invention retains high-frequency information of the input feature map, making the network easier to learn. Simultaneously, it utilizes convolutional layers with a kernel size of 2 and a stride of 2 to downsample learnable parameters. The input feature maps are stacked and then fused using a 1*1 convolution before being used as the output.

[0060] It should be clarified that this disclosure is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this disclosure is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this disclosure.

[0061] The functional blocks shown in the above-described structural diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this disclosure are programs or code segments used to perform the required tasks. Those skilled in the art can write computer program code for performing the operations of this invention in one or more programming languages ​​or combinations thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages—such as the "C" language or similar programming languages. Furthermore, the program or code segment can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. A machine-readable medium can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc.

[0062] The aspects of this disclosure have been described above with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block in the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that these instructions, executable via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It is also understood that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can also be implemented by special-purpose hardware performing the specified functions or actions, or can be implemented by a combination of special-purpose hardware and computer instructions.

[0063] The above description is merely a specific embodiment of this disclosure. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this disclosure is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this disclosure, and these modifications or substitutions should all be covered within the protection scope of this disclosure.

Claims

1. A high-resolution CT image processing method, characterized in that, Includes the following steps: S101, Input high-resolution CT images; S102, preliminary smoothing of the high-resolution CT image is achieved through convolutional layers; S103, downsampling of smoothed CT images through CT processing sub-network structure; The CT processing subnetwork described in S103 consists of two sequentially linked fusion pooling layers; The structure of the fusion pooling layer is as follows: First, the input CT image feature map is passed through a convolutional layer with a Conv+BN+ReLU model structure, where the kernel size is 3 and the stride is 1. To retain the advantages of max pooling, a max pooling operation and a convolution operation are performed on the input CT image feature map, respectively. The convolutional layer adopts the Conv+BN+ReLU model structure, with a kernel size of 2 and a stride of 2. The CT image feature map after max pooling is combined with the CT image feature map after convolution, and a CT image feature map with the same number of channels as the original CT image is obtained by passing it through a convolutional layer with the model structure Conv+BN+ReLU. The convolution kernel size is 1 and the stride is 1.

2. The high-resolution CT image processing method according to claim 1, characterized in that, The convolutional layer described in S102 adopts a Conv+BN+ReLU model structure, where the kernel size is 3, the stride is 1, and the number of channels is 1.

3. A high-resolution CT image processing device, characterized in that, include: Input module (301) is used to input high-resolution CT images; A smoothing module (302) is used to perform preliminary smoothing of the high-resolution CT image through a convolutional layer; The downsampling module (303) is used to downsample the smoothed CT image through the CT processing sub-network structure; The CT processing subnetwork consists of two sequentially linked fusion pooling layers; The structure of the fusion pooling layer is as follows: First, the input CT image feature map is passed through a convolutional layer with a Conv+BN+ReLU model structure, where the kernel size is 3 and the stride is 1. To retain the advantages of max pooling, a max pooling operation and a convolution operation are performed on the input CT image feature map, respectively. The convolutional layer adopts the Conv+BN+ReLU model structure, with a kernel size of 2 and a stride of 2. The CT image feature map after max pooling is combined with the CT image feature map after convolution, and a CT image feature map with the same number of channels as the original CT image is obtained by passing it through a convolutional layer with the model structure Conv+BN+ReLU. The convolution kernel size is 1 and the stride is 1.

4. A high-resolution CT image processing device, characterized in that, The device includes: a processor, a memory, and computer program instructions stored in the memory and executable on the processor, wherein the processor is configured to execute the computer program instructions stored in the memory to implement the method for high-resolution CT image processing according to any one of claims 1 to 2.

5. A high-resolution CT image processing and storage medium, characterized in that, The storage medium stores computer program instructions, which, when executed by a processor, implement the method for high-resolution CT image processing according to any one of claims 1 to 2.

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