Semiconductor IQ modulator
By adopting the SS differential high-frequency line structure and optimized layout in the semiconductor IQ optical modulator, the problems of chip size enlargement and crosstalk degradation are solved, the high-frequency characteristics are improved and the chip is miniaturized, meeting the needs of high-speed optical communication.
Patent Information
- Application Number
- CN202080104375.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-08-03
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2040-08-03
AI Technical Summary
Existing semiconductor IQ optical modulators, when integrating the driver and modulator, face problems such as larger chip size, degraded crosstalk characteristics, and poor high-frequency characteristics. In particular, in the differential drive structure, the layout of the ground electrode limits the miniaturization of the chip and the improvement of high-frequency characteristics.
The SS differential high-frequency line structure is adopted. By optimizing the layout of the phase modulation electrodes and RF lines, and using straight-line connected differential transmission lines, the distance between adjacent channels and the positional relationship of the phase modulation electrodes are ensured, and the use of ground electrodes is reduced to achieve chip miniaturization and improve high-frequency characteristics.
The miniaturization and integration of semiconductor IQ modulator chips are achieved without degrading crosstalk characteristics, improving high-frequency characteristics and meeting the needs of high-speed optical communications.
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Figure CN116018546B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an ultra-high-speed semiconductor IQ optical modulator which uses an electrical signal to perform IQ modulation on an optical signal. Background Art
[0002] To meet the growing demand for communications services, high-speed optical modulators compatible with advanced optical modulation methods are required. In particular, multilevel optical modulators using digital coherence technology have played a significant role in achieving high-capacity transceivers exceeding 100 Gbps. To add independent signals to the amplitude and phase of light, these multilevel optical modulators incorporate multiple parallel stages of Mach-Zehnder (MZ) interferometer-type Mach-Zehnder modulators (MZMs) capable of zero-chirp drive.
[0003] Polarization-multiplexing IQ optical modulators, which are becoming increasingly common in communications networks, utilize a so-called nested MZ waveguide structure, where each arm of a mother MZM consists of a daughter MZM. This MZM (quad-parallel MZM) is configured with two daughter MZMs arranged in parallel, corresponding to the X and Y polarization channels, for a total of four daughter MZMs. Traveling-wave electrodes are installed in both arms of each daughter MZM, which receive an RF (radio frequency) modulated electrical signal to modulate the optical signal transmitted within the optical waveguide. For each polarization channel, one of the two daughter MZMs forming a pair corresponds to the I channel, and the other corresponds to the Q channel.
[0004] Polarization-multiplexed IQ optical modulators input RF modulated electrical signals to one end of a modulation electrode arranged along the sub-MZM's optical waveguide arm. This generates an electro-optical effect that phase-modulates the two optical signals propagating within the sub-MZM's optical waveguide. (Patent Document 3)
[0005] Polarization-multiplexing IQ optical modulators are a type of IQ optical modulator. However, the optical signals used by IQ optical modulators are not limited to dual-polarization optical signals. IQ optical modulators using single-polarization optical signals are also known. In the case of single-polarization, a nested MZM structure is used.
[0006] Furthermore, in recent years, miniaturization and lowering the driving voltage of optical radiator modules have become challenges, leading to a surge in research and development of semiconductor MZ modulators that are both compact and capable of lowering the driving voltage. Furthermore, the research and development of semiconductor MZ modulators is accelerating towards support for higher baud rates such as 64GBaud and 100GBaud, and demands are being placed on optical modulators with wider bandwidths.
[0007] Among these, research and development of high-bandwidth coherent driver modulators (HB-CDMs) is accelerating, aiming to improve high-frequency characteristics by integrating the driver and modulator into a single package and coordinating the driver and modulator design to achieve miniaturization, rather than just improving the characteristics of the modulator alone. (Non-patent document 1)
[0008] In this structure, since it is integrated with a differential drive driver, it is ideal that the modulator itself also has a structure based on differential drive.
[0009] In the HB-CDM structure, the driver and modulator are integrated, so the design of not only the modulator but also the driver is very important. In particular, in HB-CDM, open collector (or open drain) drivers are used to achieve low power consumption. (Non-Patent Documents 1 and 2)
[0010] Therefore, as a layout on the modulator chip to achieve such high-speed operation, a differential capacitor-loaded traveling wave electrode structure based on differential high-frequency lines such as GSSG and GSGSG (G: Ground, S: Signal) is used. (Patent Document 1)
[0011] In structures such as GSSG and GSGSG, a GND (Ground) line is arranged near the signal line, which is an ideal structure as a differential line structure and can be said to be the most ideal structure from the perspective of suppressing crosstalk between channels.
[0012] However, on the other hand, multiple ground metals need to be arranged as GND lines, so there are the following problems: in order to make the ground work effectively and obtain sufficient crosstalk suppression effect, the pattern cannot be arranged between channels, or because it is a differential line, the ground needs to be arranged in a left-right symmetrical manner relative to the signal line. If this layout structure is adopted, the chip size will increase.
[0013] Prior art literature
[0014] Patent Literature
[0015] Patent Document 1: Japanese Patent Application Publication No. 2019-194722
[0016] Patent Document 2: International Publication No. WO / 2017 / 085447
[0017] Patent Document 3: International Publication No. WO / 2018 / 174083
[0018] Non-patent literature
[0019] Non-Patent Literature 1: J. Ozaki, et al., “Ultra-low Power Dissipation (<2.4W) Coherent InP Modulator Module with CMOS Driver IC”, Mo3C.2, ECOC, 2018
[0020] Non-patent literature 2: N.Wolf, et al., "Electro-Optical Co-Design to MinimizePower Consumption of a 32GBd Optical IQ-Transmitter Using InP MZ-Modulators", CSICS, 2015
[0021] Next, an example of a conventional polarization multiplexing type IQ optical modulator 100 is shown. Figure 1 Top view of .
[0022] from Figure 1 The input light 101 input from the center of the right end (one end of the two short dimension directions) of the chip 120 of the polarization multiplexing type IQ optical modulator 100 passes through the input optical waveguide 102 passing between the nested structures MZM104X and 104Y for the X and Y polarization channels, and branches at the optical branching circuit 103 at the left end of the chip. After branching, the two beams of light that are folded back 180° are input to the nested structure MZM104X for the X polarization channel and the nested structure MZM104Y for the Y polarization channel. In the nested structure MZM104X and the nested structure MZM104Y, the light of each polarization channel is optically modulated by eight beams of RF modulation signals 108 not shown separately that are input from the left end of the chip (the other end of the two short dimension directions), and are output from the upper and lower ends of the right end of the chip as modulated output light 110X and modulated output light 110Y. That is, at Figure 1 In FIG, the RF modulated signal is transmitted in parallel from the left end to the right end of the chip 120 (along the long dimension orthogonal to the two opposing short dimension directions).
[0023] Figure 2 FIG. 1 is a top view showing another example of a polarization multiplexing type IQ optical modulator 200 of the same conventional structure. Figure 2 In, with Figure 1 Likewise, the transmission direction of the RF modulated signal is from the left end to the right end (long dimension direction) of the chip 220. Figure 3 It is shown in Figure 2 A top view of the specific layout on the chip (Patent Document 2, Figure 7 ).exist Figure 3In the figure, light is input and output from the right end of the chip, and the RF modulated signal is input from the left end of the chip. The transmission direction of the RF modulated signal is from the left end to the right end of the chip, but the transmission direction of the RF modulated signal is the short dimension direction of the chip.
[0024] Figure 1 and Figure 2 The common point of these two existing structures is that the input optical waveguide 202 is located between the X polarization channel and the Y polarization channel. Figure 2 In the polarization multiplexing type IQ optical modulator 200, the structure of the optical branching circuit 203 is the same as that of Figure 1 Different. Figure 1 The optical branch circuit 103 is a symmetrical structure between IQ channels. Figure 2 The structure becomes asymmetric between IQ channels.
[0025] Considering the characteristics of the high-frequency line that contributes to phase modulation, it is ideal to minimize the length from the chip end to the phase modulation unit. Figure 2 structure.
[0026] also, Figure 4 This is a plan view showing another example of a conventional polarization multiplexing type IQ optical modulator (Patent Document 2, Figure 6 ).exist Figure 4 In, with Figure 3 Likewise, the transmission direction of the RF modulated signal is the short dimension direction from the left end toward the right end of the chip.
[0027] exist Figure 4 In the structure, the input light is branched on the input side of the chip, and two optical input waveguides are provided outside the optical modulation area (all channels).
[0028] This structure allows functional circuits such as phase adjusters and optical amplifiers to be placed outside the chip, thereby achieving independence from high-frequency characteristics.
[0029] about Figure 1 、 Figure 2 ,and Figure 3 In contrast, the phase adjustment electrode and the RF line are arranged on the same straight line in the longitudinal direction, so the length in the longitudinal direction is increased, and the chip size may increase.
[0030] On the other hand, you can Figure 3 and Figure 4 The following layout is adopted: the RF line and the phase adjustment electrode are arranged parallel to the short dimension direction and the RF line and the phase adjustment electrode are arranged along the long dimension direction, so Figure 1 、 2Compared to , it can shorten the length of the chip in the transmission direction of the RF modulated signal. Figure 3 and Figure 4 If the structure is used, the crosstalk characteristics between the two IQ modulators on the X side and the Y side, which are the most important aspects of the crosstalk characteristics, may be degraded.
[0031] Furthermore, considering the connection with the driver, ideally, the distance between channels of the RF line is fixed. Figure 3 ,Since it is difficult to set the spacing between channels to be equal, it cannot be said to be an ideal layout.
[0032] From the perspective that the distance between channels between the above RF lines is fixed, let's try Figure 3 and Figure 4 Considering the layout of Figure 3 In the layout, since a phase modulation electrode is arranged between the two IQ modulators on the X side and the Y side, the crosstalk characteristics between the IQ modulators may be degraded.
[0033] In addition, Figure 4 In the present invention, there is no phase adjustment electrode between the two IQ modulators. As long as the distance between the IQ modulators is assumed to be sufficiently spaced, there is no problem. However, on the other hand, by arranging the phase adjustment electrode at the end side of the short dimension direction of the chip, the chip can be miniaturized in the long dimension direction (the direction orthogonal to the transmission direction of the RF modulated signal), but the size in the short dimension direction may become larger. Summary of the Invention
[0034] In the past, from the perspective of crosstalk, the high-frequency lines of IQ modulators generally used differential line structures such as GSSG, in which ground electrodes are arranged on both sides of the differential signal electrodes (Signal, / Signal) (" / " indicates signals of opposite polarity), and GSGSG, in which a ground electrode is also arranged between the differential signals (Signal, / Signal). In the case of these GSSG and GSGSG structures, it is necessary to ensure a sufficient ground area, which greatly restricts the layout. For example, due to the presence of the ground electrode, it is sometimes impossible to arrange electrodes for phase adjustment around it. In addition, in order to ensure symmetry, a ground area must also be ensured on the edge side of the modulator chip, which naturally increases the chip size. In the embodiments of the present invention, the problem is to perform SS circuitization (using the two lines, Signal and / Signal, to form a differential signal line) without degrading the crosstalk characteristics, and to optimize the layout of the phase modulation electrodes and RF lines, thereby miniaturizing and integrating the semiconductor IQ modulator.
[0035] To achieve this purpose, an embodiment of the present invention is an IQ modulator including two or more Mach-Zehnder modulators, wherein the Mach-Zehnder modulator is formed using a differential transmission line formed by coupling two signal lines for transmitting a high-frequency modulated signal composed of a differential signal. The IQ modulator is characterized in that the differential transmission line has an SS line structure, the SS line structure is composed of a lead line connected in a straight line, a phase modulation unit, and a terminal resistor, the phase modulation unit constitutes a differential transmission line with a differential capacitance-loaded traveling wave electrode structure as a phase modulation electrode, and the phase modulation between adjacent channels is The distance between the phase modulation electrodes of the parts is more than 400μm, the distance between the main signal lines of the differential capacitance-loaded traveling wave electrode structure is less than 60μm, and there are DC phase adjustment electrodes and PADs for DC phase adjustment electrodes for adjusting the operating point of the Mach-Zehnder modulator between the phase modulation part on the I channel side and the phase modulation part on the Q channel side. The distance between the DC phase adjustment electrode and the phase modulation electrode of the phase modulation part is more than 80μm, and the near-end (NEAR-END) and far-end (FAR-END) crosstalk characteristics of the differential signals between adjacent channels within the required frequency band are less than -30dB.
[0036] As described above, according to the embodiments of the present invention, a driver-integrated semiconductor IQ modulator can be implemented as an SS differential high-frequency circuit without degrading the crosstalk characteristics of the high-frequency circuit, achieving miniaturization corresponding to the elimination of a ground electrode. Furthermore, by optimizing the layout of the phase modulation electrodes and RF circuits, the chip size of the semiconductor IQ modulator can be further miniaturized and integrated. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 This is a plan view showing an example of a conventional polarization multiplexing IQ modulator.
[0038] Figure 2 FIG. 1 is a plan view showing another example of a conventional polarization multiplexing IQ modulator.
[0039] Figure 3 It shows Figure 2 A top view of the specific chip layout.
[0040] Figure 4 This is a plan view showing another example of a conventional polarization multiplexing IQ modulator.
[0041] Figure 5 This is a plan view showing an example of a chip layout of a polarization multiplexing IQ modulator according to an embodiment of the present invention.
[0042] Figure 6This is a plan view showing another example of the chip layout of the polarization multiplexing IQ modulator according to the embodiment of the present invention.
[0043] Figure 7 This is a plan view showing another example of the chip layout of the polarization multiplexing IQ modulator according to the embodiment of the present invention.
[0044] Figure 8 This is a diagram illustrating the positional relationship between electrodes on the X-polarization channel side of the polarization multiplexing IQ modulator according to the embodiment of the present invention.
[0045] Figure 9 This is a simplified schematic diagram showing a terminal portion of a high-frequency line portion of a polarization-multiplexing IQ modulator according to an embodiment of the present invention.
[0046] Figure 10 This is a diagram showing simulation results of crosstalk characteristics of a high-frequency line portion of a polarization-multiplexing IQ modulator according to an embodiment of the present invention.
[0047] Figure 11 This is a diagram showing a portion of the overall pattern of a polarization multiplexing IQ modulator according to an embodiment of the present invention.
[0048] Figure 12 This is a diagram showing an example of power supply connection corresponding to a driving method of a DC phase adjustment unit of a polarization multiplexing IQ modulator according to an embodiment of the present invention.
[0049] Figure 13 This is a diagram showing an example of power supply connection corresponding to a driving method of a DC phase adjustment unit of a polarization multiplexing IQ modulator according to an embodiment of the present invention.
[0050] Figure 14 This is a diagram showing an example of power supply connection corresponding to a driving method of a DC phase adjustment unit of a polarization multiplexing IQ modulator according to an embodiment of the present invention.
[0051] exist Figure 15 , there are shown a plan view (a) showing the positions of a cross section taken across a DC phase adjustment electrode and a voltage applying PAD of a polarization multiplexing IQ modulator according to an embodiment of the present invention, and a cross-sectional view (b) of the substrate thereof.
[0052] Figure 16 1 is a diagram showing a layout example of a PAD including a developed substrate according to an embodiment of the present invention.
[0053] Figure 17 This is another diagram showing a layout example of a PAD including a developed substrate according to an embodiment of the present invention.
[0054] Figure 181 is a diagram showing a layout example of a PAD including multilayer wiring according to an embodiment of the present invention.
[0055] Figure 19 1 is a diagram showing a layout example of a PAD including multilayer wiring according to an embodiment of the present invention.
[0056] Figure 20 This is a diagram illustrating wire connections between an IQ modulator and a driver IC according to an embodiment of the present invention. DETAILED DESCRIPTION
[0057] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0058] (First embodiment)
[0059] exist Figure 5 、 Figure 6 、 Figure 7 In FIG. 1 , an example of the layout of the chip, optical waveguide, and electrodes of the IQ modulator according to the first embodiment of the present invention is shown. Figure 5 To explain.
[0060] Figure 5 The basic chip layout of the polarization multiplexing IQ modulator of this embodiment is shown.
[0061] First, the optical layout is explained, focusing on the arrangement of optical waveguides and optical multiplexers and demultiplexers. Figure 5 The polarization multiplexing IQ modulator 800 shown has on the chip 820: an input optical waveguide 801; an XY polarization separator 830; optical cross waveguides 802X, 802Y; a first optical splitter 803X; a second optical splitter 806XI, 806XQ; a first optical combiner 807XI, 807XQ; a second optical combiner 809X; an output optical waveguide 810X, 810Y; a DC phase adjuster 808XI, 808XQ; a DC phase adjuster 808XIa, 808XIb, 808XQa, 808XQb and differential modulation electrodes 804XIa, 804XIb, 804XQa, 804XQb. The polarization multiplexing IQ modulator 800 integrates IQ modulators in parallel on the chip 820. IQ modulators each consisting of two nested MZ interferometers are integrated in parallel for the X polarization channel and the Y polarization channel. The polarization multiplexing IQ modulator 800 consists of a total of four MZ interferometers.
[0062] exist Figure 5In the polarization multiplexing IQ modulator 800, light input from the input optical waveguide 801 at the center of the right end of the chip is separated into the X polarization channel and the Y polarization channel by the XY polarization splitter 830, and is respectively introduced into the IQ channel optical modulation area of the polarization channel through the optical cross waveguides 802X and 802Y, and then branched and returned for optical modulation.
[0063] The optically modulated IQ channel light is then multiplexed according to the respective polarization channels, and finally two beams of light are output from the output optical waveguides 810X and 810Y connected to the same chip end face as the input optical waveguide 801 as X-polarization modulated output light and Y-polarization modulated output light.
[0064] In this structure, the second optical splitter 806XI, 806XQ, which serves as a sub-MZM optical splitter, is arranged between the I-channel optical modulation area and the Q-channel optical modulation area, and the light transmission direction in the second optical splitter is opposite to the light transmission direction in the optical modulation area (180°).
[0065] By adopting this structure, the DC phase adjusters 808XIa~808XQb provided in the waveguide of the sub-MZM can be formed before folding back, so there is no need to arrange the DC phase adjuster and the RF electrode of the optical modulation area in a row, which can shorten the chip length and miniaturize the chip.
[0066] For example, the DC phase adjusters 808XI and 808XQ of the mother MZM on the X-polarization channel side can also be arranged between the first optical combiner 807XI and 807XQ and the second optical combiner 809X. However, from the perspective of chip miniaturization, it is ideal that the DC phase adjuster of the mother MZM is arranged between the first optical splitter 803X and the second optical splitter 806XI and 806XQ.
[0067] In addition, Figure 5 In the optical waveguide, since the two optical waveguides are folded back together after the second optical waveguide 806XI, 806XQ serving as the optical waveguide of the sub-MZM branches the light toward each arm of the sub-MZM, a bending portion is provided on the optical waveguide of the inner (inner ring) arm of the two arms equivalent to the sub-MZM to make the optical path length consistent with that of the outer (outer ring) arm, thereby making the length equal.
[0068] As an optical layout, adopting the above arrangement is ideal for miniaturizing the chip.
[0069] However, when considering an IQ optical modulator, this layout alone is not always sufficient. To ensure good high-frequency characteristics, one of the most important aspects of an IQ optical modulator's performance, careful design is required regarding the structure and layout of the high-frequency lines, the DC phase adjustment electrodes for the mother and daughter MZMs, and the PADs.
[0070] (Advantages of SS differential coupled lines)
[0071] From the perspective of miniaturization, it is ideal that the high-frequency line used for phase modulation adopts a design based on an SS differential coupled line.
[0072] When using the more common GSGSG or GSSG line structures for differential lines, sufficient crosstalk characteristics can be achieved by placing ground metal between channels. However, the presence of more ground metal leads to a larger chip size and limits the layout of phase modulation electrodes and their pads.
[0073] For example, when considering the GSSG line structure, if symmetry is taken into account, ground electrodes are necessarily required on both sides of the SS, which is twice the number of electrodes compared to the SS line structure.
[0074] Therefore, for example, when considering a polarization-multiplexed IQ modulator, ground metal is required on the edge side of the chip. Therefore, compared with the SS line structure, the size of the chip in the width direction (the direction perpendicular to the transmission direction of the high-frequency signal) becomes larger, and the area corresponding to the ground electrode is increased.
[0075] exist Figure 6 、 Figure 7 , two other examples of the layout of the IQ modulator according to the variation of this embodiment are shown. Figure 5 Similarly, the polarization multiplexing IQ modulator 800 shown in FIG. Figure 6 The polarization multiplexing IQ modulator 900 shown in FIG. 1 includes on a chip 920: an input optical waveguide 901; an XY polarization splitter 930; optical cross waveguides 902X and 902Y; a first optical splitter 903X; a second optical splitter 906XI and 906XQ; a first optical combiner 907XI and 807XQ; a second optical combiner 909X; and output optical waveguides 910X and 910Y. Figure 5 The same arrangement is used, including a phase adjuster, a DC phase adjuster, and a differential modulation electrode. The polarization-multiplexed IQ modulator 900 integrates IQ modulators in parallel on a chip 920. Each of the IQ modulators is composed of two nested MZ interferometers for the X polarization channel and the Y polarization channel, resulting in a total of four MZ interferometers. Furthermore, Figure 6 It is a polarization multiplexing type IQ modulator that eliminates the difference in optical characteristics between channels by setting up optical cross waveguides that do not supply crossed light, namely pseudo optical cross waveguides 902X′ and 902Y′, so that the number of waveguide crossings between the XY and IQ channels is equal.
[0076] exist Figure 7 The polarization multiplexing type IQ modulator 1000 is shown on the chip 1020 with Figure 6 The same arrangement is arranged with an optical cross waveguide, a first optical splitter, a second optical splitter, a first optical combiner, a second optical combiner, an output optical waveguide, a phase adjuster, a DC phase adjuster and a differential modulation electrode. The polarization multiplexing IQ modulator 1000 integrates an IQ modulator in parallel on the chip 1020, which is composed of two nested MZ interferometers for the X polarization channel and the Y polarization channel. The polarization multiplexing IQ modulator 1000 is composed of a total of 4 MZ interferometers. Figure 7 This is an example of a structure in which PDL compensation can be performed by connecting an XY polarization splitter 1030 connected to an optical cross waveguide, a 1-input 2-output optical splitter 1031 , a DC phase adjuster 1032 , and a 2-input 2-output optical multiplexer / demultiplexer 1033 .
[0077] include Figure 5 , for what will Figure 6 、 Figure 7 When the optical layout shown is implemented as a GSSG or GSGSG structure, an area for arranging a ground electrode is required, but it is difficult to arrange a DC phase adjustment electrode.
[0078] Of course, it is also possible to remove part of the ground electrode or adopt a shape like an opening and arrange a DC phase adjustment electrode in that part. However, in this case, since it is not possible to fully ensure the ground electrode area for ensuring high-frequency characteristics or to generate structural asymmetry such as the presence or absence of the ground electrode relative to the high-frequency signal transmission direction, or the difference in ground area on the left and right, the differential high-frequency characteristics may be degraded or the original crosstalk suppression effect may not be obtained as a ground, which is not ideal in terms of high-frequency characteristics.
[0079] Based on the above, from the perspective of miniaturization of chip size, the SS line structure with two simple parallel signal lines is the most excellent.
[0080] Of course, the SS line structure has the disadvantage of being weak against noise because it is not ground-shielded. In particular, if there are bends in the differential line, which are likely to be a major factor in noise generation, care must be taken to prevent significant degradation of high-frequency characteristics.
[0081] Taking the above viewpoints into consideration, a high-frequency line consisting primarily of three elements: a lead-out section for phase modulation, a phase modulation section, and a terminal section, ideally adopts an SS differential line structure. Furthermore, ideally, these three elements should be tapered, ensuring impedance matching at high frequencies, and connected smoothly without any bends, forming a single straight line relative to the direction of high-frequency signal transmission.
[0082] However, since the SS line structure lacks a ground electrode, compared to the electrode structures of GSSG and GSGSG structures, it requires design to prevent the electromagnetic field distribution from spreading to nearby channels by spacing channels sufficiently apart or strengthening the coupling between SS lines in the same channel. In order to achieve the excellent crosstalk characteristics of the GSSG and GSGSG structures, where the ground electrode shields the spread of electromagnetic field distribution between channels, this electrode layout design is crucial.
[0083] (Conditions of the Positional Relationship of Electrodes in the Present Invention)
[0084] Figure 8 Shown in Figure 5 FIG2 is a diagram illustrating the positional relationship of the electrodes of the IQ modulator on the X polarization channel side of the polarization multiplexing type IQ modulator 800. Figure 5 The optical waveguide, Figure 8 Shown are two pairs of capacity-loaded differential modulation electrodes 804XIa, 804XIb, 804XQa, 804XQb on the X-polarization channel side and the DC phase adjusters 808XI, 808XQ of the mother MZM; the heater electrodes of the DC phase adjusters 808XIa~808XQb of the sub-MZM, showing the distance relationship of the electrode positions (limitation of the distance between the electrodes).
[0085] exist Figure 8 In the figure, only four sets of loading electrode pairs 121 of two pairs of differential modulation electrodes of the capacitive loading type facing each other in a T-shape or an inverted T-shape on the optical waveguide are shown for illustrative purposes, but the loading electrodes are arranged at a required density.
[0086] The IQ modulator on the Y polarization channel side is not shown, but it is also important that there is no metal such as a heater between the IQ modulator on the X polarization channel side and the IQ modulator on the Y polarization channel side that may affect crosstalk.
[0087] exist Figure 9 In FIG, a simplified schematic diagram of the high frequency line portion (differential modulation electrodes 804XIa, 804XIb) is shown. Figure 9 It is also shown in Figure 8 The optical waveguide below the loading electrode pair 121 is omitted. Figure 9For simplicity, only four capacitively loaded differential modulation electrode pairs 121 are shown. As an example, the terminal connection pads 301a and 301b of the lead-out line at the left end of the high-frequency line are shown with the same tapered structure, but the lead-out line does not necessarily require a tapered structure.
[0088] The differential modulation electrodes 804XIa and 804XIb, which serve as differential high-frequency lines, are formed by a linear arrangement of two tapered connection pads 301a and 301b at the right end, and two consecutive terminal resistors 302a and 302b, each consisting of a rectangular resistor element. The right ends (terminal sides) of the two terminal resistors 302a and 302b are short-circuited by a short-circuit section 303 made of a conductive metal or the like, forming an on-chip termination.
[0089] like Figure 8 As shown, the DC phase adjustment electrode (heater), its PAD, and the wiring leading to the PAD are located only inside the IQ channel space between the phase modulation units. There is no metal between the two IQ modulators on the X or Y polarization sides, such as the DC phase adjustment electrode or heater, which could affect crosstalk.
[0090] like Figure 8 As shown, if the capacitance-loaded traveling-wave electrode structure based on the SS differential line structure is considered for most of the high-frequency line portion, then in one or more IQ modulators composed of two or more semiconductor Mach-Zehnder modulators formed using the capacitance-loaded electrode structure, the distance between the phase modulation parts of adjacent channels needs to be more than 400 μm, and the distance between the main signal lines of the capacitance-loaded structure constituting the differential line needs to be less than 60 μm.
[0091] Furthermore, ideally, the distance between the differential modulation electrode 804XIb and the DC phase adjuster 808XIa of the sub-MZM is greater than 80 μm, and the distance between the DC phase adjuster 808XIb and 808XQa of the sub-MZM is greater than 100 μm.
[0092] Furthermore, when considering integration with a driver IC, as exemplified by HB-CDM, ideally, the inter-channel spacing should be constant across all channels. This rule must be adhered to, at least in the phase modulation portion.
[0093] By following this layout rule, even in the SS line structure, it is possible to achieve crosstalk that is as good as that of GSSG, GSGSG, etc. Figure 10 (a) and Figure 10 As shown in (b), the far-end crosstalk characteristics and near-end crosstalk characteristics between adjacent channels were confirmed to be -50 dB up to 70 GHz, which is an extremely excellent high-frequency characteristic.
[0094] Considering transmission characteristics, ideally, the near-end and far-end crosstalk characteristics of differential signals between adjacent channels should be -30 dB or less within the required frequency band. This configuration can achieve sufficiently sufficient characteristics for this purpose.
[0095] Furthermore, ideally, although the length is much shorter than that of the phase modulation portion, the lead line portion and the terminal portion are also formed according to the same rule.
[0096] (Conical Formation)
[0097] Taking high-frequency loss into consideration, the lead line portion needs to be as short as possible. In particular, the present optical layout structure can shorten the length of the lead line.
[0098] Furthermore, the high-frequency wiring portion of the lead-out line portion and the terminal portion generally does not have a capacitance loading structure. Therefore, when signal lines are formed on the same dielectric layer, the impedance increases while maintaining the same signal line width.
[0099] In this regard, in order to achieve impedance matching, the line width of the high-frequency wiring part of the lead-out line part and the terminal part needs to be wider than the capacitance loading part. If the line width is widened, the crosstalk characteristics will be degraded. Therefore, the length of the lead-out line part and the terminal part should be as short as possible.
[0100] In order to increase the width, it is ideal to form a taper of about 50 μm from the viewpoint of impedance matching so as to smoothly connect to the phase modulation unit.
[0101] With this layout, the length of the lead line portion can be reduced to 400 μm or less, and the effect on transmission loss can be essentially negligible (about 0.5 dB or less at 50 GHz), resulting in a structure with significant advantages in frequency characteristics.
[0102] (Layout of DC Phase Adjustment Electrodes)
[0103] Next, the arrangement of the DC phase adjustment electrode (heater electrode of the DC phase adjuster, which performs phase adjustment using the thermal effect from the heater) will be described.
[0104] Figure 11 In the Figure 5 The schematic diagram of a mask diagram showing a portion of the overall pattern of the polarization multiplexing type IQ modulator of the embodiment shown. Figure 5 and Figure 8Identical elements are numbered the same. The position of the PAD that supplies power to the heater electrodes of the DC phase adjustment unit is indicated by a circle. A PAD is located between the heater electrodes of DC phase adjusters 808XIb and 808XQb of the sub-MZM. No PAD is located between the IQ modulators on the X-polarization channel side and the IQ modulator on the Y-polarization channel side.
[0105] Figure 12 This is Example 1 of power supply connection corresponding to the driving method, which is an example of a case where each interference system is connected to only one voltage source for phase adjustment to form a voltage push-pull driving structure. The shape of the optical waveguide is schematically shown in the following figure.
[0106] exist Figure 12 In the figure, the shape of the PAD that supplies power to the heater electrodes in the DC phase adjustment unit is indicated by a circle (⊂), but this is not limited to a specific shape. The wiring layout and PAD arrangement are examples. For reference, the outline shape of the optical waveguide is shown with thin lines, and the optical splitter and optical combiner are shown with rectangles (⊂). A simplified schematic diagram of the drive for supplying power to the heater electrodes is shown in a smaller size in the upper right corner of the figure.
[0107] Figure 13 This is Example 2 of power supply connection corresponding to the driving method, an example in which two voltage sources for phase adjustment are provided in each interference system, and an example in which either one can be driven arbitrarily in a separate driving method.
[0108] The PAD shape is indicated by a circle (⊂), but is not limited to this shape. The wiring layout and PAD arrangement are examples. For reference, the optical waveguide is schematically represented by thin lines, and splitters and combiners are represented by squares. A simplified schematic diagram of the power supply to the heater electrodes is shown in the upper right corner of the figure.
[0109] If this structure is used, the central GND can be merged to make the number of sub-side PADs 5, but if Figure 12 The layout example 1 is shared, and can also be separated.
[0110] Figure 14 This is Example 3 of power supply connection corresponding to the driving method. It is an example of providing a phase adjustment voltage source for each interference system. It is an example of being able to arbitrarily select which one to start in the independent driving method.
[0111] The PAD shape is indicated by circles, but is not limited to any specific shape. The wiring layout and PAD arrangement are examples. For reference, the optical waveguide is schematically represented by thin lines, and splitters and combiners are represented by squares. The right side of the figure also shows a simplified schematic diagram of the power supply to the heater electrode. While connected to the p-side, it is also possible to connect only to the n-side.
[0112] The PAD can also be reduced, but if it is considered to be used as layout examples 1 and 2, it can also be left.
[0113] exist Figures 12 to 14 In the structure shown, in order to make the chip size (the length in the transmission direction of the high-frequency signal) as small as possible, DC phase adjustment electrodes and DC wiring for connecting to the pads used to connect them are arranged inside the phase modulation part on the I side and the phase modulation part on the Q side.
[0114] The DC phase adjustment electrodes, etc. can also be arranged in a manner that reaches an area other than the phase modulation section (lead-out line section, terminal section), but as mentioned above, the phase modulation section has the narrowest width and the longest length, so from the perspective of the space between channels, it is ideal to arrange them in the area of the phase modulation section.
[0115] Furthermore, particularly when the lead line portion is connected to the driver IC, if connection is made using a wire or the like, the electromagnetic field distribution becomes diffuse, and therefore the presence of a DC phase adjustment electrode in this vicinity is not desirable.
[0116] However, if the high-frequency lines and DC phase adjustment electrodes, their PADs, and wiring for phase modulation are laid out without consideration, the high-frequency signal will couple with the DC phase adjustment electrodes at specific frequencies, causing crosstalk and degradation of high-frequency characteristics such as the original transmission characteristics, so care must be taken.
[0117] Specifically, it is ideal from the viewpoint of crosstalk characteristics of high-frequency signals that the DC phase adjustment electrode is at least 80 μm away from the signal line of the phase modulation unit.
[0118] In addition, if the actual layout is considered, there are not only DC phase adjustment electrodes, but also PADs for connecting the DC phase adjustment electrodes to other components through wires, etc., and DC wiring connecting the PAD to the DC phase adjustment electrodes. From the perspective of high-frequency characteristics, they are also ideally at least 80 μm away from the signal line of the phase modulation unit.
[0119] In particular, the PAD may have a size of approximately 100 μm in diameter, which is larger in area than DC phase adjustment electrodes, DC wiring, etc. Therefore, care must be taken in layout because it may affect high-frequency characteristics.
[0120] From this viewpoint, the PAD section is preferably spaced as far as possible from the phase modulation section. Most preferably, the PAD for applying voltage to the DC phase adjustment electrode for the sub-MZ is formed in the region between the two sub-MZs constituting the IQ modulator.
[0121] However, on the other hand, as for the DC phase adjustment electrode used for the mother MZ, if actions such as phase changes are taken into consideration, it is ideal to immediately turn off the interferometer after adjustment using the phase modulation electrode of the mother MZ. Therefore, it is difficult to place the voltage application PAD on the inner side of the mother MZ at a distance from the mother MZ.
[0122] Therefore, in order to make the PAD of the DC phase adjustment electrode as far away as possible, it is ideal to Figure 11 In this way, one or more PADs are formed between two sub-MZs, and the remaining PADs not formed between the two sub-MZs are arranged on the inner side of the DC phase adjustment electrode of the sub-MZ (at a position more than 80 μm away from the signal line of the phase modulation unit, and farther away from the signal line than the DC phase adjustment electrode of the sub-MZ). Figure 11 As shown, ideally, like the PAD of the DC phase adjustment electrode of the mother MZ, the DC phase adjustment electrode of the mother MZ is also arranged on the inner side (farther away from the signal line than the DC phase adjustment electrode of the sub-MZ) compared to the DC phase adjustment electrode of the sub-MZ which is arranged at the position closest to the main signal line.
[0123] Furthermore, in order to further reduce the influence of high-frequency signals, it is ideal that the PAD is formed in a shape that extends deeper into the semiconductor substrate than the DC phase adjustment electrode portion.
[0124] Specifically, it is ideal that the voltage applying PAD for the DC phase adjustment electrode is formed just on a silicon oxide film (SiO 2 ) or a silicon nitride film (SiN, SiON) formed on a semiconductor substrate.
[0125] A PAD can also be formed directly on a semiconductor substrate, but from the perspective of electrical isolation, it is ideally formed just above a silicon oxide film (SiO2) or silicon nitride film (SiN, SiON) formed on a semiconductor substrate, rather than directly on a semiconductor substrate or other semiconductor layers.
[0126] (DC phase adjuster heater electrode and PAD)
[0127] exist Figure 15 In FIG. 1 , a top view (a) showing the positions of the heater electrodes and the heater voltage applying PAD of the DC phase adjusters 808XIa and 808XIb of the sub-MZ and a cross-sectional view (b) of the substrate are shown. The wiring 1505 connecting the heater electrodes of the DC phase adjusters 808XIa and 808XIb to the heater voltage applying PAD 1504 is formed on one or more layers of dielectric material (on the semiconductor substrate 1501). Figure 15In this way, it can be formed flatly on the same plane as the DC phase adjustment electrode, thereby straddling the waveguide structure and realizing this layout.
[0128] If the DC wiring is formed just on the silicon oxide film (SiO2), silicon nitride film (SiN, SiON) on the semiconductor substrate in the same way as PAD1504, it cannot cross the waveguide part, making it difficult to realize this layout.
[0129] As more than one layer of dielectric material, Figure 15 The cross-sectional view in (b) shows a BCB layer 1503 as an example, but it can also be a semiconductor layer stacked on a semiconductor substrate or any other dielectric. The heater electrodes of DC phase adjusters 808XIa and 808XIb can also be covered by a layer 1506 of SiO2, SiN, or SiON. PAD 1504 can be formed on SiO2 / SiN / SiON 1506, but can also be formed on n-InP layer 1502.
[0130] Protecting the DC phase adjustment electrode (heater electrode) with a layer 1506 of SiO2, SiN, SiON, or the like prevents oxidation of the resistor. In this case, the high-frequency electrode can also be covered with SiO2, SiN, SiON, or the like. In this case, since the coating is made with a material with a higher dielectric constant than air, the diffusion of high frequencies can be somewhat suppressed. While the effect on crosstalk suppression is minimal, it is still effective.
[0131] Furthermore, it is desirable that the DC phase adjustment mechanism is constituted by a heater electrode.
[0132] Of course, a DC phase adjustment mechanism using the EO (electro-optic) effect or other methods is also possible. However, since InP-based modulators generally utilize an absorption effect, the phase change increases with the applied voltage, but this also increases losses, leading to increased optical loss. Furthermore, optical loss can lead to an imbalance in optical power and a degradation of the extinction ratio.
[0133] In addition, from the perspective of the required driving voltage, in the DC phase adjustment electrode using the EO effect, a voltage of more than 10V is generally sometimes required, but the heater electrode has an advantage in that a driving voltage of less than half is sufficient compared to the EO type electrode.
[0134] Furthermore, by adopting a heater electrode, for example, it is possible to use Figure 9 The on-chip termination resistors 302a and 302b shown are made of the same resistor body, which can simplify the production.
[0135] On the other hand, as a disadvantage, unlike the EO type electrode, since it uses heat as an effect, it is important to manage thermal XT (crosstalk).
[0136] For example, if there is thermal XT (crosstalk) between IQ, after adjusting the electrode (XI) of the sub-MZ, when adjusting the sub-electrode (XQ), if the sub-MZ (XI) deviates from the optimal value due to thermal XT, the phase state may not be adjusted well.
[0137] Therefore, from the viewpoint of operational stability, it is ideal that, for example, when the phase adjustment on the I side is performed, the amount of phase change on the Q side is suppressed to 3% or less.
[0138] In this way, in order to make a design that sufficiently suppresses changes due to thermal XT, the distance between heater electrodes between IQ channels needs to be 100 μm or more from the viewpoint of thermal crosstalk.
[0139] In order to take advantage of the low voltage drivability of the heater electrode, which is different from the EO type electrode as described above, it is ideal to design the heater electrode so as to be drivable at, for example, 5V or less.
[0140] On the other hand, from the perspective of reliability, the current flowing through the heater electrode is preferably about 50 mA or less. Therefore, the resistance value used for the heater is preferably 100 ohms or more.
[0141] Likewise, it is ideal that the heater electrodes for the X polarization and the Y polarization are also sufficiently separated. However, in the structure of this embodiment, as shown in FIG. Figure 11 It is clear that in the layout of the high-frequency line, the distance between XY can be sufficiently separated compared to the distance between IQ, and therefore there is no need to particularly limit the numerical value.
[0142] Similarly, since DC phase modulation electrodes do not need to be placed between the X and Y channels, there's no need for conductors, which significantly affect high-frequency characteristics, in the X and Y channels, where crosstalk control is typically more stringent than between the I and Q channels. The X and Y channels can simply contain dielectric material. For example, even without increasing the X and Y channel spacing, the present invention's structure can improve X and Y crosstalk compared to I and Q channels while maintaining the same channel spacing.
[0143] The polarization multiplexing IQ modulator of this embodiment Figure 6 The structure is Figure 5 The basic structure of the polarization-multiplexed IQ modulator uses dummy optical crossing waveguides 902X' and 902Y', even for channels without intersecting optical waveguides. This arrangement equalizes the number of waveguide crossings between the X, Y, and IQ channels, eliminating differences in optical characteristics between the channels.
[0144] In addition, the polarization multiplexing type IQ modulator of the embodiment of the present invention Figure 7 The structure is a polarization multiplexing type IQ modulator structure in which the XY polarization separator 1030 adopts a structure in which a 1-input 2-output optical splitter 1031, a DC phase adjuster 1032 and a 2-input 2-output optical multiplexer / demultiplexer 1033 are connected in sequence. Through this mechanism, the total light intensity can be maintained as it is without loss to compensate for the optical insertion loss difference PDL (polarization dependent loss) between the X polarization and Y polarization channels.
[0145] As the PDL compensation mechanism, not only this structure but also a more common structure using a VOA (variable optical attenuator) can be adopted.
[0146] Thus, the present invention Figure 6 and Figure 7 The structure is in Figure 5 The structure is formed by changing the additional optical layout / elements in the basic shape, and the effect obtained by this application remains unchanged.
[0147] In addition, as long as the application structure of the present invention is satisfied, not only the above structure but also a structure having a different optical layout or optical components or an additional function may be possible.
[0148] (Second embodiment)
[0149] (HB-CDM method: driver IC integration)
[0150] Next, a description will be given of a HB-CDM system in which a driver IC and a modulator chip are integrated as a second embodiment of the present invention.
[0151] (Channel Spacing)
[0152] When connecting a driver IC and a modulator, the channel pitches of the driver IC and the high-frequency line of the modulator (at least the high-frequency line PAD connected to the driver IC) must be made consistent.
[0153] This is because if the length of the wire connecting the modulator and the driver IC is long and the inductance is excessively large, the high-frequency characteristics will deteriorate compared to a case where the inductance is small.
[0154] In terms of reducing inductance, for example, the inductance can be reduced by shortening the wire as much as possible, increasing the number of wires, or performing flip-chip mounting.
[0155] Furthermore, since the high-frequency line of the modulator described in the first embodiment has an SS differential line structure, a design that takes crosstalk into consideration must be performed.
[0156] Taking into account the wire connection with the driver, since the driver side generally adopts a PAD layout with a ground electrode such as GSSG, GSGSG, etc., in order to suppress crosstalk, the ground electrode of the driver is connected in the form of a wire covering the signal electrode connecting the driver and the modulator. This can suppress the leakage and diffusion of the electromagnetic field distribution from the signal line.
[0157] The ground electrodes may be connected by a single wire, but a larger effect can be achieved by connecting them with multiple wires.
[0158] In the case of the GSGSG structure, only the left and right ground electrodes may be connected without connecting the central ground electrode, or the three ground electrodes may be connected by a wire.
[0159] (In-phase mode measure)
[0160] Furthermore, since the high-frequency line of this modulator has an SS line structure, when the in-phase mode is input to the modulator, it cannot be transmitted and the in-phase mode is radiated.
[0161] For example, sometimes the driver IC has a common gain. Therefore, if the common mode is input to the modulator's SS high-frequency line via the driver, the common mode will be radiated into the HB-CDM package and coupled with any metal patterns, etc., causing characteristic degradation, such as resonance at a specific frequency when observed as high-frequency characteristics or causing crosstalk.
[0162] Therefore, in a modulator using an SS high-frequency line that cannot transmit the in-phase mode, it is ideal to provide a radio wave absorber with a broadband as close as possible to the operating frequency on the modulator-side surface of the lid for airtightly sealing the package.
[0163] However, since the price of a radio wave absorber increases as the frequency band becomes wider, a radio wave absorber having a frequency band suppressed to a level that prevents a specific resonance frequency may be selected.
[0164] For example, in an optical module in which a semiconductor Mach-Zehnder modulator is installed in a package and the package is hermetically sealed, the following semiconductor IQ modulator structure can be adopted. When the hermetically sealed structure is performed, a broadband radio wave absorber is formed on the inner side of the lid (inside the package) to prevent the released noise signal from coupling with the signal line.
[0165] These structures are not limited to HB-CDM and are effective for all optical transmission modules in which the driver IC and the modulator chip are integrated or mounted in the same package.
[0166] (Third embodiment)
[0167] exist Figure 16 、 Figure 17 In the figure, two examples are shown below: a diagram showing the arrangement of PADs around the DC phase adjustment electrodes of a chip substrate of a polarization multiplexing type IQ modulator as a third embodiment of the present invention ( Figure 16 、 Figure 17 ); Figure 1 shows the expanded substrate for relaying the wires leading out from the PAD ( Figure 16 、 Figure 17 and a layout diagram of the package PAD arranged on the package platform of the modulator module ( Figure 16 、 Figure 17 In the three parts of the substrate in each figure, the corresponding PADs are connected by wires.
[0168] exist Figure 16 、 Figure 17 In the layout of the upper package PAD, the PAD on the Y polarization side (not shown) may be arranged on the right side of the figure, or the PAD on the Y polarization side may be provided on a package platform different from the PAD on the X polarization side.
[0169] like Figure 16 、 Figure 17 The developed substrate in each middle portion is the same thickness as the modulator substrate, which facilitates wire bonding. Furthermore, on this developed substrate, the order can be reversed so that both the power push-pull layout and the voltage push-pull layout can be shared.
[0170] As a driving method for the heater, it can be considered based on Figure 12 、 Figure 13 、 Figure 14 The three connection examples 1, 2, and 3 are shown.
[0171] The most common structure is Figure 16 The structure of connection example 2 shown in the figure. If this structure is adopted, push-pull drive, which is the most ideal phase adjustment method, can be realized. However, the number of control power supplies required is two.
[0172] Although not shown in the figure, a variant of Connection Example 2 has the advantage of reducing the number of required voltages compared to the configuration of Connection Example 2, where connections are made to both the p-side and n-side, since only one is connected to either the p-side or the n-side. On the other hand, since push-pull drive is not possible, the required voltage is high and the ability to cope with long-term fluctuations is weak.
[0173] As a structure combining the advantages of connection example 2 and a derivative form of connection example 2, it is also possible to consider Figure 17In the structure of connection example 1, by connecting the power supply voltage for driving the driver IC, which is essential for HB-CDM, in parallel with the heater electrode, push-pull driving can be achieved while reducing the number of control power supplies to one.
[0174] HB-CDM typically uses an open-collector or open-drain driver IC. In this case, voltage is applied to the driver IC via the modulator's terminals. The same power supply used for the driver IC is also used as the power supply for the heater electrodes. If the driver IC doesn't employ the aforementioned driving method, the aforementioned power supply cannot be prepared, requiring a separate power supply. However, since a common power supply can be used for all DC phase adjustment electrodes, the number of power supplies can be significantly reduced compared to the configuration in Connection Example 2.
[0175] like Figure 16 、 17 As shown in Figure 2, generally, for heater driving, each MZ requires three electrodes PAD. Figure 16 、 Figure 17 As well as the wiring routing and PAD layout of derived forms, the chip-shaped layout remains the same, and the arrangement is adjusted through any one or more unfolded substrates. Therefore, when connecting to the lead pins of the package, etc., any of the above-mentioned action methods can be selected by selecting the structure of the unfolded substrate and the connection structure of its wires.
[0176] In addition, when selecting Figure 17 In the case of the structure of connection example 1, the number of PADs can be greatly reduced. By reducing the number of PADs, the number of connected wires and the metal area can be reduced, which is advantageous from the perspective of cost reduction.
[0177] like Figure 18 、 Figure 19 As shown, the number of PADs of the sub-electrodes can be reduced to a total of 4. However, in order to make the phase change method of I and Q the same, it is necessary to connect the wiring as a multi-layer wiring.
[0178] In addition, regarding the mother MZ, three PADs can be maintained, and in the case of using multi-layer wiring, they can also be merged with sub-electrodes, like Figure 19 That reduces the number of PADs to 5 in total.
[0179] exist Figure 20 , there is shown a diagram (a) showing the connection between the IQ modulator of the present invention and the driver IC 2001 of the PAD having a GSGSG structure, and a cross-sectional schematic diagram (b) showing the wire connection.
[0180] In the case of an IQ modulator, this diagram illustrates connection to a 2-channel driver IC, and in the case of a twin-IQ modulator, this diagram illustrates connection to a 4-channel driver IC.
[0181] exist Figure 20 In (b), the following case is described: in order to suppress the electromagnetic field distribution from the signal line conductor and PAD to spread and become crosstalk, the GND of the driver PAD is connected to each other by a conductor in a form of covering the signal line and its conductor.
[0182] The GND in the center of the GSGSG structure does not need to be connected with a wire, and the same is true for the driver IC with a GSSG structure.
[0183] Industrial applicability
[0184] As described above, in the embodiment of the present invention, the driver-integrated semiconductor IQ modulator can be configured as an SS differential line without degrading the crosstalk characteristics of the high-frequency line, and can be miniaturized to the extent that the ground electrode is not required.
Claims
1. A semiconductor IQ modulator comprising two or more Mach-Zehnder modulators, wherein the Mach-Zehnder modulators are configured using a differential transmission line formed by coupling two signal lines for transmitting a high-frequency modulated signal consisting of a differential signal, wherein the semiconductor IQ modulator is characterized in that: The differential transmission line has an SS line structure, wherein the SS line structure is composed of a lead line, a phase modulation unit, and a terminal resistor connected in a straight line. The phase modulation section configures the differential transmission line of the differential capacitance-loaded traveling wave electrode structure as a phase modulation electrode. The distance between the phase modulation electrodes of the phase modulation unit between the I channel and the Q channel is 400 μm or more, and the distance between the main signal lines of the differential capacitance-loaded traveling wave electrode structure is 60 μm or less. A DC phase adjustment electrode for adjusting the operating point of the Mach-Zehnder modulator and a PAD for applying a voltage to the DC phase adjustment electrode are provided between the phase modulation section on the I channel side and the phase modulation section on the Q channel side. The DC phase adjustment electrode is at least 80 μm away from the phase modulation electrode of the phase modulation unit, and the near-end and far-end crosstalk characteristics of the differential signal between the I channel and the Q channel within a required frequency band are not more than −30 dB.
2. The semiconductor IQ modulator according to claim 1, wherein The two or more Mach-Zehnder modulators include a nested mother MZ and two daughter MZs. The DC phase adjustment electrodes for the master MZ are arranged at positions farther from the main signal line than the DC phase adjustment electrodes for the slave MZ. The voltage applying PAD of the DC phase adjustment electrode for the sub-MZ is formed between the two sub-MZs. A portion of the voltage applying PAD of the DC phase adjustment electrode for the master MZ is formed between the two sub-MZs. The remaining portion is arranged at a position farther from the main signal line than the DC phase adjustment electrode for the sub-MZ.
3. A semiconductor IQ modulator, which is a polarization multiplexing semiconductor IQ modulator, comprising two semiconductor IQ modulators according to claim 1 corresponding to channels of different polarizations, wherein the polarization multiplexing semiconductor IQ modulator is characterized in that: The RF high-frequency lines of the four differential capacitor-loaded traveling-wave electrode structures corresponding to the four Mach-Zehnder modulators are arranged at equal intervals, the two semiconductor IQ modulators are arranged in a mirror-symmetrical manner, and there is an area formed only by dielectrics between the RF lines of the two adjacent semiconductor IQ modulators.
4. The semiconductor IQ modulator according to claim 1, wherein The voltage applying PAD of the DC phase adjustment electrode is formed on a silicon oxide film or a silicon nitride film formed on a semiconductor substrate, or formed on one or more semiconductor layers stacked on the semiconductor substrate. A wiring portion connecting the heater electrode of the DC phase adjustment electrode and the voltage applying PAD is formed outside the silicon oxide film or the silicon nitride film, or the one or more semiconductor layers, or formed on one or more layers of dielectric material or formed on the semi-insulating semiconductor substrate, The voltage applying PAD is formed on the semiconductor substrate side relative to the wiring portion.
5. The semiconductor IQ modulator according to claim 1, wherein The DC phase adjustment electrode is a heater electrode, The resistance value of the resistor forming the heater electrode is 100 ohm or more. The distance between the heater electrode of the I channel and the heater electrode of the Q channel is 100 μm or more. The resistor is covered with a silicon oxide film or a silicon nitride film.
6. The semiconductor IQ modulator according to claim 1, wherein The phase modulation unit is connected to the driver IC. The DC phase adjustment electrode is a heater electrode, A voltage source for applying an arbitrary fixed voltage for driving the driver IC can be configured to realize push-pull driving of only one phase modulator, and the heater electrode is connected to the voltage source. The two or more Mach-Zehnder modulators have two daughter MZs and a mother MZ. (1) The modulator on the I channel side and the modulator on the Q channel side in the two sub-MZs each have two sub-electrodes PAD, and the mother MZ has three mother electrodes PAD. (2) The two sub-electrode PADs and the mother electrode PAD total 5, or (3) The two sub-MZs each have two sub-electrode PADs, the mother MZ has three mother electrode PADs, and the voltage source is configured to realize the push-pull drive by expanding the wiring pattern of the substrate, or is configured to realize a separate drive of supplying one or two phase adjustment voltages to each of the phase modulation units.
7. The semiconductor IQ modulator according to claim 1, wherein The main signal line of the SS circuit structure is connected to the signal line corresponding to the PAD with GSSG or GSGSG structure and the open collector or open drain driver IC of the high frequency circuit through a wire. The ground pads between the same channels of the driver IC are connected by one or more wires in a form covering the upper portion of the wires, thereby suppressing crosstalk characteristics.
8. An optical module comprising the semiconductor IQ modulator according to any one of claims 1 to 7 mounted in a package having a lid and hermetically sealed, wherein: A radio wave absorber is formed on the inner side of the cover when the semiconductor IQ modulator is hermetically sealed to prevent the released noise signal from coupling with the main signal line and to absorb a wide band of the noise signal.
Citation Information
Patent Citations
Semiconductor mach-zehnder optical modulator and iq modulator using the same
JP2019194722A
An Optical Modulation Device
WO2017085447A1
IQ optical modulator
WO2018174083A1
IQ optical modulator
CN110446969A
An optical modulation device
GB201520472D0