Voltage Regulation Circuit

Abstract

The present invention provides a voltage regulation circuit. The voltage regulation circuit includes an error amplifier, an output transistor, a noise capture circuit and a stabilization circuit. The error amplifier provides a control signal in response to the change of the feedback voltage. The output transistor receives an input voltage signal and adjusts the output voltage signal at the output end in response to the control signal and the input voltage signal. The noise capture circuit captures the noise of the input voltage signal to provide a noise current signal. The stabilization circuit converts the noise current signal into a stabilization signal. In a high operating frequency range, the stabilization circuit provides a stabilization signal to the control end of the output transistor to offset the interference caused by the noise of the input voltage signal.

Description

Technical Field

[0001] The present invention relates to a voltage regulating circuit, and more particularly to a voltage regulating circuit having a high power supply rejection ratio (PSRR) in a high operating frequency range. Background Art

[0002] A voltage regulation circuit, such as a low dropout (LDO) regulation circuit, receives an input voltage signal to generate an output voltage signal and regulates the output voltage signal. The performance of the voltage regulation circuit can be evaluated based on the power supply rejection ratio (PSRR). The larger the PSRR, the less the output voltage signal is affected by the noise (i.e., ripple) of the input voltage signal. The higher the PSRR, the more favorable the design of the subsequent circuit will be. On the other hand, the smaller the PSRR, the greater the impact of the noise of the input voltage signal on the output voltage signal. Therefore, how to improve the PSRR of the voltage regulation circuit is one of the research focuses of those skilled in the art.

[0003] However, at high operating frequencies, the loop gain of the LDO will decrease due to the limited operating bandwidth, and the PSRR will drop. Therefore, the PSRR performance of the voltage regulator circuit at high operating frequencies must be considered. Summary of the invention

[0004] The present invention provides a voltage regulating circuit with high power supply rejection ratio (PSRR) in a high operating frequency range.

[0005] The voltage regulating circuit of the present invention includes an error amplifier, an output transistor, a noise capture circuit and a stabilization circuit. The error amplifier provides a control signal in response to the change of the feedback voltage. The voltage value of the feedback voltage is related to the voltage value at the output end of the voltage regulating circuit. The control end of the output transistor is coupled to the output end of the error amplifier. The output transistor receives an input voltage signal and responds to the control signal and the input voltage signal to adjust the output voltage signal at the output end. The noise capture circuit captures the noise of the input voltage signal to provide a noise current signal. The stabilization circuit is coupled to the noise capture circuit. The stabilization circuit converts the noise current signal into a stabilization signal, and provides the stabilization signal to the control end of the output transistor in a high operating frequency range to offset the interference caused by the noise of the input voltage signal.

[0006] Based on the above, the voltage regulating circuit of the present invention captures the noise of the input voltage signal to provide a noise current signal. In the high operating frequency range, the voltage regulating circuit can use the noise current signal to offset the interference caused by the noise accompanying the input voltage signal, thereby stabilizing the output voltage signal. In this way, in the high operating frequency range, the voltage regulating circuit has a high PSRR.

[0007] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a schematic diagram of a voltage regulating circuit according to a first embodiment of the present invention.

[0009] Figure 2 is a schematic diagram of a voltage regulating circuit according to a second embodiment of the present invention.

[0010] Figure 3 is a schematic diagram of a voltage regulating circuit according to a third embodiment of the present invention.

[0011] Figure 4 is a schematic diagram of a voltage regulating circuit according to a fourth embodiment of the present invention.

[0012] Figure 5 is a simulation result of PSRR according to an embodiment of the present invention.

[0013] Description of Reference Numerals

[0014] 100, 200, 300, 400: Voltage regulation circuit

[0015] 110, 210: Noise capture circuit

[0016] 120, 220, 320: Stable circuit

[0017] BC: Bias circuit

[0018] BF: Buffer

[0019] C1, C2: Curve

[0020] Cs: parasitic capacitance

[0021] Cx: Capacitor

[0022] EA: Error Amplifier

[0023] f: frequency

[0024] FBC: Feedback Circuit

[0025] FP: Operation frequency

[0026] FR1, FR2, FR3: Operating frequency range

[0027] H: Conversion function

[0028] Ix: Noise current signal

[0029] IS: Reference current

[0030] IL: Load current

[0031] M1: Output transistor

[0032] M2: Auxiliary transistor

[0033] ND: voltage divider node

[0034] OTA, TIAC: Amplifier Circuit

[0035] R1, R2: voltage divider resistors

[0036] Rx: Resistor

[0037] SS: Stable signal

[0038] SW: Switch

[0039] TIS: Current Source

[0040] VF: Feedback voltage

[0041] V1, V2: control signal

[0042] V3: Convert signal

[0043] VIN: input voltage signal

[0044] VOUT: output voltage signal

[0045] VREF: reference voltage signal DETAILED DESCRIPTION

[0046] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0047] Please refer to Figure 1 , Figure 11 is a schematic diagram of a voltage regulating circuit according to a first embodiment of the present invention. In this embodiment, the voltage regulating circuit 100 includes an error amplifier EA, an output transistor M1, a noise extraction circuit 110, and a stabilization circuit 120. The error amplifier EA provides a control signal V1 in response to a change in a feedback voltage VF. The voltage value of the feedback voltage VF is related to the voltage value at the output end of the voltage regulating circuit 100. The output transistor M1 is coupled to the output end of the error amplifier EA. The output transistor M1 receives an input voltage signal VIN, and responds to the control signal V1 and the input voltage signal VIN to adjust the output voltage signal VOUT at the output end of the voltage regulating circuit 100.

[0048] For example, the output transistor M1 is an N-type MOSFET. The first terminal of the output transistor M1 receives the input voltage signal VIN. The control terminal of the output transistor M1 is coupled to the output terminal of the error amplifier EA and receives the control signal V1. The second terminal of the output transistor M1 serves as the output terminal of the voltage regulation circuit 100. The non-inverting input terminal of the error amplifier EA receives the reference voltage signal VREF. The inverting input terminal of the error amplifier EA receives the feedback voltage VF. The output terminal of the error amplifier EA is coupled to the output transistor M1. The error amplifier EA and the output transistor M1 can be at least part of the basic architecture of a low dropout (LDO) regulation circuit. The reference voltage signal VREF has a fixed voltage value. The voltage value of the feedback voltage VF is positively correlated with the voltage value of the output voltage signal VOUT. Therefore, the error amplifier EA adjusts the control signal V1 based on the change of the feedback voltage VF. If the voltage value of the voltage signal VOUT is greater than a predetermined value, the voltage value of the feedback voltage VF rises to a voltage value greater than the reference voltage signal VREF. The voltage value of the control signal V1 will be reduced. Therefore, the voltage value of the output voltage signal VOUT is decreased. On the contrary, if the voltage value of the voltage signal VOUT is less than the predetermined value, the voltage value of the feedback voltage VF is decreased to be less than the voltage value of the reference voltage signal VREF. Therefore, the voltage value of the control signal V1 is increased. Therefore, the voltage value of the output voltage signal VOUT is increased.

[0049] In the present embodiment, the noise extraction circuit 110 extracts the noise of the input voltage signal VIN to provide the noise current signal Ix. The stabilization circuit 120 is coupled to the noise extraction circuit 110. The stabilization circuit 120 converts the noise current signal Ix into a stabilization signal SS. The stabilization circuit 120 provides the stabilization signal SS to the control terminal of the output transistor M1 in the high operating frequency range to offset the noise of the input voltage signal VIN. The output voltage signal VOUT does not include the noise of the input voltage signal VIN. The operating frequency is the frequency of the voltage signal VIN.

[0050] On the other hand, in an operating frequency range other than the high operating frequency range (eg, at least one of the middle operating frequency range and the low operating frequency range), the stabilization circuit 120 stops providing the stabilization signal SS to the control terminal of the output transistor M1 .

[0051] It is worth mentioning that in the high operating frequency range, the stabilization circuit 120 is coupled to the error amplifier EA and uses the noise current signal Ix to offset the interference caused by the noise accompanying the input voltage signal VIN, thereby stabilizing the output voltage signal VOUT. In this way, in the high operating frequency range, the voltage regulation circuit can have a high PSRR.

[0052] In this embodiment, the voltage regulator circuit 100 may further include a feedback circuit FBC. The feedback circuit FBC is coupled between the output terminal of the voltage regulator circuit 100 and the error amplifier EA. The feedback circuit FBC converts the output voltage signal VOUT into a feedback voltage VF, and provides the feedback voltage VF to the error amplifier EA.

[0053] Please refer to Figure 2 , Figure 2 2 is a schematic diagram of a voltage regulating circuit according to a second embodiment of the present invention. In this embodiment, the voltage regulating circuit 200 includes an error amplifier EA, a buffer BF, an output transistor M1, a feedback circuit FBC, a noise capture circuit 210 and a stabilization circuit 220. The implementation of the error amplifier EA and the output transistor M1 has been described in detail. Figure 1 The first embodiment has been clearly described, so it will not be repeated here.

[0054] In the present embodiment, the buffer BF is coupled between the output terminal of the error amplifier EA and the output transistor M1. The buffer BF increases the loop gain of the voltage regulating circuit 200. Specifically, the buffer BF receives the control signal V1 and provides the control signal V2 according to the control signal V1. The buffer BF provides the transconductance value by converting the control signals V1 and V2. Therefore, the loop gain of the voltage regulating circuit 200 is increased based on the transconductance value.

[0055] In the present embodiment, the feedback circuit FBC can be implemented by a voltage divider circuit. The feedback circuit FBC includes voltage divider resistors R1 and R2. The voltage divider resistors R1 and R2 are coupled in series between the output terminal of the voltage regulating circuit 200 and a reference ground terminal (e.g., ground). The first end of the voltage divider resistor R1 is coupled to the output terminal of the voltage regulating circuit 200. The second end of the voltage divider resistor R1 is coupled to a voltage divider node ND. The first end of the voltage divider resistor R2 is coupled to the voltage divider node ND. The second end of the voltage divider resistor R2 is coupled to the reference ground terminal. The voltage divider node ND is coupled to the inverting input terminal of the error amplifier EA. The feedback circuit FBC performs a voltage divider operation on the output voltage signal VOUT to generate a feedback voltage VF at the voltage divider node ND.

[0056] In the present embodiment, the noise capture circuit 210 includes an auxiliary transistor M2. The first end of the auxiliary transistor M2 receives the input voltage signal VIN. The control end of the auxiliary transistor M2 is coupled to the stabilization circuit 220. A parasitic capacitor Cs exists between the first end of the auxiliary transistor M2 and the control end of the auxiliary transistor M2. The auxiliary transistor M2 captures the noise of the input voltage signal VIN through the parasitic capacitor Cs to provide a noise current signal Ix. The auxiliary transistor M2 provides the noise current signal Ix to the stabilization circuit 220 at the control end of the auxiliary transistor M2. The stabilization circuit 220 converts the noise current signal Ix into a stabilization signal SS.

[0057] In addition, the second end of the auxiliary transistor M2 is coupled to the output end of the voltage regulating circuit 200. The auxiliary transistor M2 does not participate in the transmission of the power supply. Therefore, in design, the size of the auxiliary transistor M2 is smaller than the size of the output transistor M1. For example, the layout area of ​​the auxiliary transistor M2 is substantially equal to 1% of the layout area of ​​the auxiliary transistor M2, but the present invention is not limited thereto.

[0058] In this embodiment, the stabilization circuit 220 converts the noise current signal Ix into a stabilization signal SS. The stabilization circuit 220 provides the stabilization signal SS to the control terminal of the output transistor M1 in the high operating frequency range. In this embodiment, when the stabilization signal SS is provided to the control terminal of the output transistor M1, the stabilization signal SS has a conversion function H relative to the control signal V2. This conversion function H can offset the phase of the pole in the high operating frequency range. In this way, the voltage regulation circuit 200 can have a higher PSRR in the high operating frequency range.

[0059] Please refer to Figure 3 , Figure 33 is a schematic diagram of a voltage regulating circuit according to a third embodiment of the present invention. In this embodiment, the voltage regulating circuit 300 includes an error amplifier EA, a buffer BF, an output transistor M1, a feedback circuit FBC, a noise capture circuit 210, and a stabilization circuit 320. The implementation of the error amplifier EA, the buffer BF, the output transistor M1, the feedback circuit FBC, and the noise capture circuit 210 has been described in detail. Figure 1 as well as Figure 2 The above is clearly described in the multiple embodiments of the present invention, so it will not be repeated here.

[0060] In this embodiment, the stabilization circuit 320 includes an amplifier circuit TIAC, an OTA, and a switch SW. The amplifier circuit TIAC receives the noise current signal Ix from the noise extraction circuit 210. The amplifier circuit TIAC converts the noise current signal Ix into a conversion signal V3 based on a first conversion function. The amplifier circuit OTA is coupled to the output end of the amplifier circuit TIAC. The amplifier circuit OTA converts the conversion signal V3 into a stabilization signal SS based on a second conversion function.

[0061] In the present embodiment, the switch SW is coupled between the output terminal of the amplifier circuit OTA and the control terminal of the output transistor M1. The switch SW is turned on in a high operating frequency range (or referred to as a first operating frequency range). The amplifier circuit OTA is coupled to the output transistor M1. Therefore, in the first operating frequency range, the stabilization signal SS is provided to the control terminal of the output transistor M1. For example, in the first operating frequency range, the stabilization circuit 320 or an external circuit provides a first switch control signal to turn on the switch SW. In the present embodiment, the switch SW can be implemented by any type of transistor switch or transmission gate.

[0062] In the first operating frequency range, the phase of the pole of the amplifier circuit TIAC is in phase with the phase of the pole of the amplifier circuit OTA. Therefore, the stabilization circuit 320 can offset the interference caused by the noise of the input voltage signal VIN.

[0063] In at least one operating frequency range outside the high operating frequency range (or referred to as the second operating frequency range), the switch SW is turned off. The amplifier circuit OTA is decoupled from the output transistor M1. The stabilization signal SS is not provided to the control terminal of the output transistor M1. Therefore, in the second operating frequency range, the stabilization signal SS is provided to the control terminal of the output transistor M1. For example, in the second operating frequency range, the stabilization circuit 320 or an external circuit provides a second switch control signal to turn off the switch SW.

[0064] Further, in the present embodiment, the amplifier circuit TIAC includes a resistor Rx and a capacitor Cx. The first end of the resistor Rx receives the noise current signal Ix. The second end of the resistor Rx is coupled to the output end of the amplifier circuit TIAC. The capacitor Cx is coupled in parallel with the resistor Rx. In the present embodiment, the amplifier circuit TIAC is used as a trans-impedance amplifier. The amplifier circuit TIAC converts the noise current signal Ix into a conversion signal V3 in a voltage form. That is, the conversion signal V3 is a voltage signal.

[0065] In this embodiment, the first conversion function is determined according to the resistance value of the resistor Rx and the capacitance value of the capacitor Cx. The first conversion function is shown in formula (1).

[0066]

[0067] Z(s) is represented as a first transfer function. The first transfer function is a Laplace function. s is represented as a complex term of the Laplace transform. r_Rx is represented as the resistance value of the resistor Rx. c_Cx is represented as the capacitance value of the capacitor Cx. In this embodiment, the pole provided by the amplifier circuit TIAC is equal to the inverse of the product of the resistance value of the resistor Rx and the capacitance value of the capacitor Cx, as shown in formula (2).

[0068]

[0069] p1 is represented as a pole of the amplifier circuit TIAC.

[0070] In the present embodiment, the amplifier circuit TIAC further comprises a bias circuit BC. The bias circuit BC biases the conversion signal V3 based on the control signal V2. In the present embodiment, the bias circuit BC is implemented by an operational amplifier. The first input terminal (i.e., the inverting input terminal) of the bias circuit BC receives the noise current signal Ix. The second input terminal (i.e., the non-inverting input terminal) of the bias circuit BC receives the control signal V2. The output terminal of the bias circuit BC is coupled to the amplifier circuit OTA.

[0071] In this embodiment, the amplifier circuit OTA is implemented by a transconductance amplifier. The first input terminal of the amplifier circuit OTA receives the conversion signal V3. The second input terminal of the amplifier circuit OTA receives the control signal V2. The output terminal of the amplifier circuit OTA is coupled to the switch SW. The amplifier circuit OTA converts the conversion signal V3 into a stable signal SS in the form of a current. In other words, the stable signal SS is a current signal.

[0072] Furthermore, in this embodiment, the second transfer function is determined according to the loop gain of the voltage regulating circuit 300 and the pole of the amplifier circuit OTA. The second transfer function is shown in formula (3).

[0073]

[0074] A(s) is represented as the second transfer function. The second transfer function is also a Laplace function. K is represented as the loop gain (DC loop gain) of the voltage regulation circuit 300. K is associated with the transconductance value provided by the buffer BF. p2 is represented as the pole of the amplifier circuit OTA. The pole of the amplifier circuit OTA is associated with the operating frequency of the input voltage signal VIN.

[0075] In this embodiment, based on the design of the voltage regulating circuit 300 , the conversion function T between the control signal V2 and the input voltage signal VIN is as shown in formula (4).

[0076]

[0077] c_Cs is represented as the capacitance value of the parasitic capacitor Cs. In the low operating frequency range (e.g., less than 1kHz), the transfer function T approaches 0. This means that regardless of whether the switch SW is turned on or not, the transfer function T does not change in the low operating frequency range. The PSRR is not affected by the switch SW.

[0078] In the medium operating frequency range (e.g., 1 kHz to hundreds of kHz), the transfer function T is approximately s×c_Cs. This means that the addition of the stabilization circuit 320 will reduce the PSRR of the voltage regulating circuit 300. That is, in the medium operating frequency range, the switch SW being turned on will reduce the PSRR of the voltage regulating circuit 300. Therefore, in this embodiment, at least in the medium operating frequency range, the switch SW will be turned off.

[0079] In the high operating frequency range (eg, hundreds of kHz to hundreds of MHz), the transfer function T is as shown in equation (5).

[0080]

[0081] It should be noted that formula (5) is substantially equal to the product of the first conversion function and the second conversion function. In addition, in formula (5), the phases of the poles p1 and p2 are opposite to each other. The phases of the poles p1 and p2 produce a 180° delay on the control signal V2. In other words, the noise of the path from the control signal V2 to the output voltage signal VOUT and the noise of the path from the input voltage signal VIN to the output voltage signal VOUT have an anti-phase relationship. In other words, in the high operating frequency range, when the switch SW is turned on, the noise of the voltage signal VOUT is offset. As a result, in the high operating frequency range, the PSRR of the voltage regulation circuit 300 will be greatly improved.

[0082] Please refer to Figure 4 , Figure 4 is a schematic diagram of a voltage regulating circuit according to a fourth embodiment of the present invention. In this embodiment, the voltage regulating circuit 400 includes an error amplifier EA, a buffer BF, an output transistor M1, a feedback circuit FBC, a noise capture circuit 210, a stabilization circuit 320, and a current source TIS. The implementation of the error amplifier EA, the buffer BF, the output transistor M1, the feedback circuit FBC, the noise capture circuit 210, and the stabilization circuit 320 has been described in the following. Figures 1 to 3 The above is clearly described in the multiple embodiments of the present invention, so it will not be repeated here.

[0083] In the present embodiment, the current source TIS is coupled to the amplifier circuit OTA. The current source TIS tracks the load current IL flowing through the output transistor M1 to provide a reference current IS. The current value of the reference current IS is proportional to the current value of the load current IL. The amplifier circuit OTA can determine the pole of the amplifier circuit OTA based on the reference current IS. It should be noted that the amplifier circuit OTA receives the reference current IS and obtains the change of the load current IL according to the change of the reference current IS. In the present embodiment, the amplifier circuit OTA can obtain the operating frequency of the input voltage signal VIN according to the waveform of the reference current IS, and determine the pole of the amplifier circuit OTA based on the operating frequency of the input voltage signal VIN. In other words, the pole of the amplifier circuit OTA can follow the operating frequency of the input voltage signal VIN.

[0084] Please also refer to Figure 3 , Figure 4 as well as Figure 5 , Figure 5 is a simulation result of PSRR according to an embodiment of the present invention. Figure 5 The PSRR simulation results shown are applicable to Figure 3 as well as Figure 4In this embodiment, the vertical axis of the simulation result is PSRR. The unit of the vertical axis is decibel. The horizontal axis of the simulation result is frequency f. The unit of the horizontal axis is Hz. The simulation result shows curves C1 and C2. Curve C1 represents the simulation result of PSRR when the switch SW is turned off. Curve C2 represents the simulation result of PSRR when the switch SW is turned on.

[0085] In the operating frequency range FR1 (less than about 300 kHz), the curves C1 and C2 are substantially maintained at about -82.5 dB. That is, no matter the switch SW is turned off or on, the high PSRR is maintained.

[0086] In the operating frequency range FR2 (about 300kHz to about 700kHz), both curves C1 and C2 rise. In other words, the PSRR decreases. The PSRR result of curve C1 is better than the PSRR result of curve C2. It can be seen that when the switch SW is disconnected, the voltage regulation circuit 300 has a better PSRR.

[0087] In the operating frequency range FR3 (greater than about 700kHz), the curve C1 continues to rise. The curve C2 turns and drops sharply at the operating frequency FP of about 1.09MHz. It can be seen that when the switch SW is turned on, the stabilization circuit 320 can enable the voltage regulation circuit 300 to have a better PSRR. Taking this embodiment as an example, at the operating frequency FP, when the switch SW is turned on, the PSRR of the voltage regulation circuit 300 is about -67dB. When the switch SW is disconnected, the voltage regulation circuit 300 has a better PSRR of about -41.9dB. When the switch SW is turned on, the PSRR of the voltage regulation circuit 300 is improved by about -25dB.

[0088] Based on the design of the buffer BF, the loop gain of the voltage regulating circuit 300 can be further improved. Therefore, in the operating frequency range FR3, the PSRR improvement of the voltage regulating circuit 300 can be further improved.

[0089] In addition, the amplifier circuit OTA can obtain the operating frequency FP of the input voltage signal VIN based on the tracking reference current IS. Therefore, the pole of the amplifier circuit OTA can track the operating frequency FP of the input voltage signal VIN. Therefore, once the operating frequency FP of the voltage signal VIN is changed, the pole of the amplifier circuit OTA will also be changed accordingly. In this way, within the operating frequency range FR3, the stabilization circuit 320 can track the operating frequency FP of the input voltage signal VIN. The voltage regulation circuit 300 can maintain a better PSRR.

[0090] In summary, the voltage regulation circuit of the present invention captures the noise of the input voltage signal to provide a noise current signal. In the high operating frequency range, the voltage regulation circuit can use the noise current signal to offset the interference caused by the noise accompanying the input voltage signal, thereby stabilizing the output voltage signal. In this way, in the high operating frequency range, the voltage regulation circuit has a high PSRR. The voltage regulation circuit uses a buffer to increase the loop gain of the voltage regulation circuit. Therefore, the PSRR improvement of the voltage regulation circuit can be further improved. In addition, the voltage regulation circuit can also adjust the pole in the operating frequency range based on the operating frequency of the input voltage signal. In this way, in the high operating frequency range, the voltage regulation circuit can follow the operating frequency of the input voltage signal. The voltage regulation circuit can maintain a better PSRR.

[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A voltage regulating circuit, characterized in that: The voltage regulating circuit comprises: an error amplifier configured to provide a control signal in response to a change in a feedback voltage, wherein a voltage value of the feedback voltage is related to a voltage value at an output terminal of the voltage regulation circuit; an output transistor, wherein a control terminal of the output transistor is coupled to the output terminal of the error amplifier, the output transistor being configured to receive an input voltage signal and to adjust an output voltage signal at the output terminal in response to the control signal and the input voltage signal; a noise extraction circuit configured to extract noise of the input voltage signal to provide a noise current signal; and A stabilization circuit is coupled to the noise extraction circuit and is configured to convert the noise current signal into a stabilization signal and provide the stabilization signal to the control terminal of the output transistor in a high operating frequency range to offset the interference caused by the noise of the input voltage signal. The stabilization circuit comprises: A first amplifier circuit configured to convert the noise current signal into a conversion signal based on a first conversion function; A second amplifier circuit, coupled to an output terminal of the first amplifier circuit, configured to convert the conversion signal into the stable signal based on a second conversion function; and A switch, coupled between the output terminal of the second amplifier circuit and the control terminal of the output transistor, is configured to: is turned on in the high operating frequency range, thereby coupling the second amplifier circuit to the output transistor, and An operating frequency range outside the high operating frequency range is disconnected, thereby decoupling the second amplifier circuit from the output transistor.

2. The voltage regulating circuit according to claim 1, characterized in that: In an operating frequency range other than the high operating frequency range, the stabilization circuit stops providing the stabilization signal to the control terminal of the output transistor.

3. The voltage regulating circuit according to claim 1, characterized in that: The noise capture circuit comprises: an auxiliary transistor, wherein a first terminal of the auxiliary transistor receives the input voltage signal, and a control terminal of the auxiliary transistor is coupled to the stabilization circuit, There is a parasitic capacitance between the first terminal of the auxiliary transistor and the control terminal of the auxiliary transistor, The auxiliary transistor is configured to capture the noise of the input voltage signal through a parasitic capacitor to provide the noise current signal.

4. The voltage regulating circuit according to claim 3, characterized in that: The second terminal of the auxiliary transistor is coupled to the output terminal.

5. The voltage regulating circuit according to claim 1, characterized in that: The voltage regulating circuit further includes: The buffer is coupled between the output terminal of the error amplifier and the output transistor, and is configured to increase the loop gain of the voltage regulation circuit.

6. The voltage regulating circuit according to claim 1, characterized in that: In the high operating frequency range, the phase of the pole of the first amplifier circuit and the phase generated by the pole of the second amplifier circuit are opposite to each other, thereby canceling out interference caused by noise of the input voltage signal.

7. The voltage regulating circuit according to claim 1, characterized in that: The first amplifier circuit comprises: a resistor, a first end of the resistor receiving the noise current signal, and a second end of the resistor coupled to an output end of the first amplifier circuit; and a capacitor, coupled in parallel with the resistor, The first transfer function is determined according to the resistance value of the resistor and the capacitance value of the capacitor.

8. The voltage regulating circuit according to claim 7, characterized in that: The first amplifier circuit further includes: A bias circuit is configured to bias the conversion signal based on the control signal.

9. The voltage regulating circuit according to claim 8, characterized in that: The bias circuit is implemented with an operational amplifier. The first input terminal of the bias circuit receives the noise current signal, The second input terminal of the bias circuit receives the control signal, and An output terminal of the bias circuit is coupled to the second amplifier circuit.

10. The voltage regulating circuit according to claim 1, characterized in that: The second amplifier circuit is implemented by a transconductance amplifier, The first input terminal of the second amplifier circuit receives the conversion signal, A second input terminal of the second amplifier circuit receives the control signal, and An output terminal of the second amplifier circuit is coupled to the switch.

11. The voltage regulating circuit according to claim 1, characterized in that: The second transfer function is determined according to a loop gain of the voltage regulation circuit and a pole of the second amplifier circuit.

12. The voltage regulating circuit according to claim 1, characterized in that: The stabilization circuit further comprises: a current source coupled to the second amplifier circuit and configured to track a load current flowing through the output transistor to provide a reference current, The current value of the reference current is proportional to the current value of the load current.

13. The voltage regulating circuit according to claim 12, characterized in that: The second amplifier circuit determines a pole of the second amplifier circuit based on the reference current.

14. The voltage regulating circuit according to claim 1, characterized in that: The voltage regulating circuit further includes: The feedback circuit is coupled to the output terminal of the voltage regulating circuit and the error amplifier, and is configured to convert the output voltage signal into the feedback voltage and provide the feedback voltage to the error amplifier.

Images