A novel optical integrated structure and its preparation process

Abstract

The present invention relates to a novel optical integrated structure and its manufacturing process. The structure includes a silicon photonics chip, an optical module, a glass substrate, and an alignment cover plate for realizing passive self-alignment coupling. The glass substrate includes a glass substrate for realizing optical interconnection and playing a heat insulation role, and a glass substrate for realizing electrical interconnection. The present invention can achieve efficient passive optical coupling, improve the coupling efficiency and alignment accuracy, has a certain heat isolation effect, and can realize the insulated heat isolation between high-power electro-optic devices and silicon photonics devices; solves the technical problems of difficult alignment operation, low precision, and large loss in large arrays and high-density optical coupling; at the same time, by using the form of bonding multiple glass substrates, the etching of large-size and deep cavities is avoided, the process difficulty is low, and the thermal crosstalk of active devices in the optical module to silicon photonics devices is effectively reduced; it is applicable to both integrated DFB solutions and external light source solutions, and can be applied in future data centers, high-performance computers and other fields.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a novel optical integrated structure and a preparation process thereof. Background Art

[0002] To meet the growing capacity requirements of data centers, optical interconnection technology provides a promising solution. Among them, optical devices with high integration, compact structure, small size, and large array waveguides have become a research hotspot. For the optical devices of co-packaged optics (CPO), the ASIC chip located at the center of the module is surrounded by transceivers, and these transceivers are connected to the fiber array. For the next-generation CPO based on a 51.2Tb / s switching chip, 16 3.2Tb / s photonic integrated circuits (PICs) are required, and there are at least 72 optical fibers for each 3.2T DR4 optical transceiver. For higher throughput in future digital centers, a fiber array with more channels is needed, and the coupling alignment of a large array of optical fibers is one of the key technical difficulties in CPO manufacturing.

[0003] The alignment technology of the coupling system is divided into active alignment and passive alignment. The process requires precise alignment of dozens of channels to achieve sub-micron positioning accuracy simultaneously, and the spatial geometric deviation of the optical fiber is the main reason for the decrease in coupling efficiency. The passive alignment technology does not require the participation of a light source and only achieves alignment through physical positioning. The process is relatively simple, but the power after alignment is low. Active alignment requires the participation of a light source, injects light into the waveguide, and then detects the output power of the optical system. According to the magnitude of the optical power, the optimal coupling position is found, which improves the coupling efficiency to a certain extent, but the method is relatively complex. In addition, according to whether there are other optical elements between the coupling elements, it can be divided into direct coupling and indirect coupling. Direct coupling means that there are no other optical elements between the coupling elements; indirect coupling means that auxiliary optical elements such as various lenses and prisms are added between the coupling elements. The optical path structure of the indirect coupling method is relatively complex, the optical axis length is long, and the system integration degree is low, which is not conducive to miniaturization development. The direct coupling method has a relatively simple structure, a shorter system optical axis, and a relatively high coupling efficiency, and is the current mainstream coupling technology.

[0004] In addition, currently, an external light source scheme is usually adopted in optical modules. However, as the size of the PIC chip decreases, the number of optical channels increases, the optical path is more intensive, and it is difficult to realize the direct coupling of the fiber array module (FAU) with the silicon photonics chip due to process limitations. For the integrated DFB scheme, the process is complex, the DFB power is large, and the thermal crosstalk to the silicon photonics chip is large. Moreover, the silicon material has a large thermo-optic coefficient and strong temperature sensitivity, and its optical performance is significantly affected by temperature. Therefore, the thermal crosstalk will affect the performance of silicon photonics devices.

[0005] For the existing state of the art, there are certain size limitations in hollowing out cavities in glass. It is very difficult to etch cavities with large sizes and depths. The requirements for coupling alignment accuracy are high, and the coupling is difficult. Active coupling is often used, and the operation is complex.

[0006] Currently, there are few research results on realizing optical integration using a glass substrate, especially for silicon photonics devices and large array coupling in the CPO application scenario. Summary of the Invention

[0007] The applicant provides a novel optical integration structure and its manufacturing process to address the above-mentioned shortcomings in the existing production technology, thereby achieving efficient passive optical coupling, realizing the insulating thermal isolation between high-power electro-optical devices and silicon photonics devices, and reducing the thermal crosstalk effect on silicon photonics devices.

[0008] The technical solution adopted by the present invention is as follows:

[0009] A novel optical integration structure, comprising:

[0010] A silicon photonics chip;

[0011] An optical module;

[0012] A glass substrate, including a first glass substrate for realizing optical interconnection, a second glass substrate and a third glass substrate for realizing electrical interconnection; the first glass substrate realizes the optical wave coupling between the silicon photonics chip and the optical module and plays a role in thermal isolation; there are more than 2 second glass substrates, and the more than 2 second glass substrates form a cavity, and the silicon photonics chip is located in the cavity; the third glass substrate is located below the silicon photonics chip, the first glass substrate and the second glass substrate;

[0013] An alignment cover plate for realizing the passive self-alignment coupling of the silicon photonics chip, the optical module and the first glass substrate.

[0014] As a further improvement of the above technical solution:

[0015] A pin structure is formed between the alignment cover plate, the silicon photonics chip / optical module, and the first glass substrate, and the pin structure is used for automatic alignment during coupling.

[0016] A protrusion is provided below the alignment cover plate, and grooves matching the protrusion are provided above the silicon photonics chip, the optical module, and the first glass substrate. There is a margin in the matching between the protrusion and the groove. During coupling, the protrusion is inserted into the groove, and the silicon photonics chip or the optical module fits towards the first glass substrate direction to achieve automatic alignment.

[0017] The glass substrate is a glass interposer, and wiring layers and glass vias are provided on both the second glass substrate and the third glass substrate, and electrical interconnection is achieved between the second glass substrate and the third glass substrate for realizing electrical interconnection and silicon photonics chip pin fan-out;

[0018] Solder balls for connecting to a circuit board are disposed under the third glass substrate.

[0019] Optical waveguides for realizing optical interconnection are provided in the first glass substrate, and mode spot converters matching the optical waveguide mode spots in the silicon photonic chip and the optical module are respectively provided on both sides of the first glass substrate to achieve mode field matching.

[0020] The upper surfaces of the silicon photonic chip, the optical module, the first glass substrate, and the second glass substrate are flush, which is convenient for wire bonding and coupling alignment using an alignment cover plate.

[0021] The first glass substrate and the second glass substrate are fixed on the third glass substrate by a bonding method.

[0022] The silicon photonic chip is fixed on the third glass substrate by an adhesive.

[0023] The optical module is a DFB laser or a fiber array module.

[0024] A spacer is disposed under the optical module, and the optical module is fixed on the third glass substrate by the spacer and an adhesive to ensure that the upper surface of the optical module is flush with the upper surfaces of the first glass substrate and the second glass substrate, which is convenient for wire bonding and coupling alignment using an alignment cover plate.

[0025] A notch is provided on the first glass substrate, and the optical module is disposed in the notch to ensure that the upper surface of the optical module is flush with the upper surface of the first glass substrate, which is convenient for coupling alignment using an alignment cover plate.

[0026] A preparation process for a novel optical integration structure for preparing the above novel optical integration structure includes the following steps:

[0027] Prepare a glass adapter board.

[0028] Prepare optical waveguides on the first glass substrate for optical interconnection.

[0029] Prepare a redistribution layer (RDL) and a through glass via (TGV) on the second glass substrate and the third glass substrate for electrical interconnection.

[0030] Align and bond the glass substrates. First, bond the first glass substrate to the third glass substrate, and then bond the second glass substrate.

[0031] Couple and fix the silicon photonic chip and the optical module. First, align and couple through the first glass substrate, and then use an adhesive to fix the silicon photonic chip / optical module to the third glass substrate.

[0032] Bake and cure the adhesive.

[0033] Wire bond the pins of the silicon photonic chip to the second glass substrate to achieve electrical interconnection.

[0034] BGA (Ball Grid Array) is implanted on the back surface of the third glass substrate.

[0035] As a further improvement of the above technical solution:

[0036] The silicon photonic chip is coupled and fixed with the optical module. Specifically, first, the alignment cover plate is connected to the silicon photonic chip and the optical module by matching the protrusions and grooves, and the coupling efficiency is verified by using the test structure in the silicon photonic chip.

[0037] Then, the alignment cover plate is inserted into the first glass substrate, the protrusion of the alignment cover plate is inserted into the groove of the first glass substrate, and the silicon photonic chip / optical module is pushed along the waveguide direction until the silicon photonic chip / optical module is in contact with the waveguide of the first glass substrate. Then, the silicon photonic chip / optical module and the third glass substrate are fixed with an adhesive with a refractive index match to achieve passive coupling.

[0038] The beneficial effects of the present invention are as follows:

[0039] The novel optical integration structure of the present invention can achieve high-efficiency passive optical coupling, improve the coupling efficiency and alignment accuracy, has a certain thermal isolation effect, and can achieve the insulation thermal isolation between high-power electro-optic devices and silicon photonic devices; the preparation process solves the technical problems of difficult alignment operation, low accuracy, and large loss in large arrays and high-density optical coupling; at the same time, the bonding process is adopted, the process difficulty is low, and the thermal crosstalk of the active devices in the optical module to the silicon photonic devices is effectively reduced; it is applicable to the integrated DFB scheme and the external light source scheme, and can be applied in future data centers, high-performance computers and other fields.

[0040] The present invention also has the following advantages:

[0041] (1) It realizes the passive self-alignment between the silicon photonic device, the laser and the fiber array module and the glass-based optical waveguide, ensures the coupling efficiency while reducing the coupling difficulty, and reduces the thermal crosstalk of the integrated DFB to the PIC. At the same time, the form of bonding multiple glass substrates is used to avoid the etching of large-size and deep cavities.

[0042] (2) By adopting the design of the passive self-alignment coupling structure, grooves are respectively arranged on the PIC / DFB and the glass adapter plate with an optical waveguide, and protrusions corresponding to the grooves are arranged on the alignment cover plate, that is, the groove of the silicon photonic chip, the protrusion of the alignment cover plate, and the groove of the glass adapter plate form a plug structure. During coupling, the plug is used for automatic alignment, without complicated alignment operations, and for multi-channel and large-array optical coupling, the alignment accuracy can be improved and the coupling loss can be reduced.

[0043] (3) The first glass substrate is an adiabatic and large-array mode spot matching glass adapter board. By taking advantage of the characteristic of the small thermal conductivity of glass (<1 W / m·K), both the PIC and the DFB are buried in the glass substrate to reduce thermal crosstalk, and further reduce the influence of temperature on the performance of optical devices. The upper surface of the PIC silicon optical chip is flush with the upper surface of the first glass substrate for wire bonding and alignment using a coupling alignment cover plate.

[0044] (4) Use the glass adapter board for packaging optical devices. Fabricate optical waveguides on the glass adapter board. One end of the glass-based optical waveguide is designed with a mode converter that matches the mode spot of the optical waveguide in the silicon-based PIC, and the other end is designed with a mode converter that matches the mode spot of the optical waveguide in the DFB to achieve mode field matching, reduce optical loss, and improve coupling efficiency. The PIC and the DFB are respectively coupled with the glass-based optical waveguide to achieve the coupling and integration of the PIC and the DFB.

[0045] (5) Bond two or more layers of glass substrates. Wiring can be carried out on both the front and back sides of the glass substrate, increasing the overall number of wiring layers and greatly alleviating the wiring difficulty of high-density packaging. Among them, the first layer (silicon optical chip layer) uses multiple glass substrates to be bonded separately, avoiding the etching of large-sized cavities and reducing the process difficulty. Brief Description of the Drawings

[0046] Figure 1 It is an exploded view of the present invention.

[0047] Figure 2 It is a schematic structural diagram of the present invention.

[0048] Figure 3 It is a schematic structural diagram of the alignment cover plate in the present invention.

[0049] Figure 4 It is a schematic structural diagram of the first glass substrate in the present invention.

[0050] Figure 5 It is a planar schematic diagram of the silicon optical chip in the present invention.

[0051] Figures 6 - 13 It is a schematic diagram of the preparation process of the novel optical integration structure in the present invention. Among them:

[0052] Figure 6 It is a schematic diagram of the first glass substrate after preparation in the present invention.

[0053] Figure 7 It is a schematic diagram of the second glass substrate after preparation in the present invention.

[0054] Figure 8 It is a schematic diagram of the third glass substrate after preparation in the present invention.

[0055] Figure 9Schematic diagram after bonding of the first glass substrate, the second glass substrate, and the third glass substrate in the present invention.

[0056] Figure 10 Schematic diagram of the connection of the silicon photonics chip, the optical module, and the alignment cover plate in one embodiment.

[0057] Figure 11 Schematic diagram of the connection of the silicon photonics chip, the optical module, and the alignment cover plate in another embodiment.

[0058] Figure 12 Schematic diagram of the overall structure of the novel optical integration structure in one embodiment.

[0059] Figure 13 Schematic diagram of the overall structure of the novel optical integration structure after ball planting on the back in one embodiment.

[0060] Wherein: 11, silicon photonics chip; 111, modulator; 112, pin; 121, first glass substrate; 122, second glass substrate; 123, third glass substrate; 13, alignment cover plate; 131, protrusion; 132, first alignment cover plate; 133, second alignment cover plate; 14, optical module; 141, gasket; 15, optical waveguide; 16, groove; 17, wiring layer; 18, glass via hole; 19, adhesive layer. Detailed implementation manners

[0061] The following combines the accompanying drawings to illustrate the detailed implementation manners of the present invention.

[0062] As Figures 1 - 2 shown, the novel optical integration structure of this embodiment includes a silicon photonics chip 11, an optical module 14, a glass substrate, and an alignment cover plate 13.

[0063] The glass substrate includes a first glass substrate 121 for realizing optical interconnection, a second glass substrate 122 for realizing electrical interconnection, and a third glass substrate 123; the first glass substrate 121 realizes optical wave coupling between the silicon photonics chip 11 and the optical module 14 and plays a role in thermal isolation; there are more than 2 second glass substrates 122, and more than 2 second glass substrates 122 form a cavity, and the silicon photonics chip 11 is located in the cavity; the third glass substrate 123 is located below the silicon photonics chip 11, the first glass substrate 121, and the second glass substrate 122.

[0064] The alignment cover plate 13 is used to realize passive self-alignment coupling of the silicon photonics chip 11, the optical module 14, and the first glass substrate 121.

[0065] A pin structure is formed between the alignment cover plate 13, the silicon photonics chip 11 / optical module 14, and the first glass substrate 121, and the pin structure is used for automatic alignment during coupling.

[0066] In one embodiment, a protrusion 131 is provided below the alignment cover plate 13, and grooves 16 matching the protrusion 131 are provided above the silicon photonics chip 11, the optical module 14, and the first glass substrate 121. There is a margin in the matching between the protrusion 131 and the groove 16. During coupling, the protrusion 131 is inserted into the groove 16, and the silicon photonics chip 11 or the optical module 14 is attached toward the first glass substrate 121 to achieve automatic alignment.

[0067] Further, the cross-sections of the protrusion 131 and the groove 16 are any one of an arc, a triangle, and a trapezoid. For example, the groove 16 is a triangle and the protrusion 131 is an arc; the groove 16 is a triangle and the protrusion 131 is a triangle; the protrusion 131 and the groove 16 can be any of the above combinations. There is strong stability and a certain operating margin in the matching between the protrusion 131 and the groove 16. During coupling, automatic alignment is achieved by using a dowel pin, without complicated alignment operations. Moreover, for multi-channel and large-array optical coupling, the alignment accuracy can be improved and the coupling loss can be reduced.

[0068] The alignment cover plate 13 includes a first alignment cover plate 132 and a second alignment cover plate 133. The first alignment cover plate 132 matches the silicon photonics chip 11, and the second alignment cover plate 133 matches the optical module 14. During coupling, one end of the first alignment cover plate 132 and the second alignment cover plate 133 respectively matches the first glass substrate 121, and the silicon photonics chip 11 and the optical module 14 are attached toward the first glass substrate 121 to achieve automatic alignment.

[0069] In one embodiment, the length of the alignment cover plate 13 is greater than that of the first glass substrate 121. During coupling, the alignment cover plate 13 matches the first glass substrate 121, the silicon photonics chip 11 and the optical module 14 respectively match the two ends of the alignment cover plate 13, and then the silicon photonics chip 11 and the optical module 14 are attached toward the first glass substrate 121 to achieve automatic alignment.

[0070] The glass substrate is a glass adapter board. Wiring layers 17 and glass vias 18 are provided on both the second glass substrate 122 and the third glass substrate 123, and the second glass substrate 122 and the third glass substrate 123 are electrically interconnected to achieve electrical interconnection and fan-out of the pins 112 of the silicon photonics chip 11. Solder balls for connecting to a circuit board are arranged below the third glass substrate 123.

[0071] As Figure 4 shown, an optical waveguide 15 for achieving optical interconnection is provided in the first glass substrate 121. The optical waveguide 15 penetrates the first glass substrate 121 to achieve coupling alignment of the optical waveguides 15 in the silicon photonics chip 11 and the optical module 14. Mode converters matching the optical waveguide mode spots in the silicon photonics chip 11 and the optical module 14 are respectively arranged on both sides of the first glass substrate 121 to achieve mode field matching.

[0072] The upper surfaces of the silicon photonics chip 11, the optical module 14, the first glass substrate 121, and the second glass substrate 122 are flush, facilitating wire bonding and alignment coupling using the alignment cover plate 13;

[0073] The first glass substrate 121 and the second glass substrate 122 are fixed on the third glass substrate 123 by a bonding method;

[0074] As Figure 5 shown, the silicon photonics chip 11 is provided with grooves 16, optical waveguides 15 located inside the grooves 16, modulators 111, and pins 112 located on both sides of the modulators 111. The pins 112 are connected to the second glass substrate 122 by wire bonding. The second glass substrate 122 and the third glass substrate 123 achieve electrical interconnection through a wiring layer 17 and glass vias 18, thereby realizing electrical interconnection from the silicon photonics chip 11 to the back surface of the third glass substrate 123.

[0075] Furthermore, the silicon photonics chip 11 is fixed on the third glass substrate 123 by an adhesive, and an adhesive layer 19 is formed between the silicon photonics chip 11 and the third glass substrate 123.

[0076] Furthermore, while the silicon photonics chip 11 is connected to the alignment cover plate 13 through the grooves 16 and the protrusions 131, it is further fixed by an adhesive.

[0077] The optical module 14 is a DFB laser or a fiber array module; alignment coupling with the silicon photonics chip 11 is achieved through the first glass substrate 121.

[0078] A spacer 141 is provided below the optical module 14. The optical module 14 is fixed on the third glass substrate 123 by the spacer 141 and an adhesive to ensure that the upper surface of the optical module 14 is flush with the upper surfaces of the first glass substrate 121 and the second glass substrate 122, facilitating wire bonding and alignment coupling using the alignment cover plate 13.

[0079] The optical module 14 is fixed on the spacer 141 by an adhesive, and an adhesive layer 19 is formed between them. The spacer 141 is fixed on the third glass substrate 123 by an adhesive or a bonding method.

[0080] In one embodiment, a notch is provided on the first glass substrate 121, and the optical module 14 is disposed in the notch to ensure that the upper surface of the optical module 14 is flush with the upper surface of the first glass substrate 121, facilitating alignment coupling using the alignment cover plate 13.

[0081] The optical module 14 is fixed to the bottom of the notch by an adhesive, and an adhesive layer 19 is formed between the optical module 14 and the bottom of the notch.

[0082] The manufacturing process of the novel optical integration structure of this embodiment is used to manufacture the above novel optical integration structure and includes the following steps:

[0083] Fabricate a glass adapter board;

[0084] As Figure 6 shown, an optical waveguide 15 is fabricated on a first glass substrate 121 for optical interconnection. The optical waveguides 15 at both ends of the first glass substrate 121 are respectively mode-matched with a silicon photonics chip 11 and an optical module 14.

[0085] As Figure 7 and 8 shown, a wiring layer 17 (RDL) and a glass through via 18 (TGV) are fabricated on a second glass substrate 122 and a third glass substrate 123 for electrical interconnection; the wiring layer 17 (RDL) is disposed on both sides of the second glass substrate 122 and the third glass substrate 123 to alleviate the difficulty of high-density packaging wiring.

[0086] The number of the second glass substrates 122 is two. The two second glass substrates 122 are respectively disposed on both sides above the third glass substrate 123 to form a cavity, and the silicon photonics chip 11 is located in the cavity, avoiding the etching of large-size and deep cavities and reducing the processing difficulty.

[0087] In one embodiment, the number of the second glass substrates 122 is more than two. More than two second glass substrates 122 are disposed above the third glass substrate 123 to form a cavity, and the silicon photonics chip 11 is located in the cavity, avoiding the etching of large-size and deep cavities and reducing the processing difficulty.

[0088] It should be noted that the wiring layer 17 on the second glass substrate 122 and the third glass substrate 123 can be one layer or more than two layers to facilitate alleviating the difficulty of high-density packaging wiring.

[0089] As Figure 9 shown, the glass substrates are aligned and bonded. Since optical interconnection has higher requirements for alignment accuracy, the first glass substrate 121 is first bonded to the third glass substrate 123 to ensure the coupling position, and then the second glass substrate 122 is bonded.

[0090] The silicon photonics chip 11 and the optical module 14 are coupled and fixed. First, alignment and coupling are performed through the first glass substrate 121, and then the silicon photonics chip 11 / optical module 14 is fixed to the third glass substrate 123 by using an adhesive.

[0091] Specifically:

[0092] As Figure 10As shown, the alignment cover plate 13 includes a first alignment cover plate 132 and a second alignment cover plate 133. The first alignment cover plate 132 is matched with the silicon photonics chip 11, and the second alignment cover plate 133 is matched with the optical module 14. One end of the first alignment cover plate 132 and the second alignment cover plate 133 are respectively matched with the first glass substrate 121. First, the alignment cover plate 13 is connected to the silicon photonics chip 11 and the optical module 14 by using the protrusions 131 and the grooves 16, and the coupling efficiency is verified by using the test structure in the silicon photonics chip 11. Then, the first alignment cover plate 132 and the second alignment cover plate 133 are respectively inserted into the first glass substrate 121, and the silicon photonics chip 11 and the optical module 14 are attached to the first glass substrate 121 to achieve passive automatic alignment coupling.

[0093] In one embodiment, as Figure 11 shown, the length of the alignment cover plate 13 is greater than that of the first glass substrate 121. During coupling, the alignment cover plate 13 is matched with the first glass substrate 121, and the silicon photonics chip 11 and the optical module 14 are respectively matched with both ends of the alignment cover plate 13. Then, the silicon photonics chip 11 and the optical module 14 are attached to the first glass substrate 121 until the silicon photonics chip 11 / optical module 14 is waveguide-attached to the first glass substrate 121 to achieve passive automatic alignment coupling.

[0094] The adhesive used is an adhesive that matches the refractive index of the light wave to reduce the influence on light wave coupling. The adhesive is baked and cured, and an adhesive layer 19 is formed at the coated place of the adhesive to realize the positioning of the silicon photonics chip 11 / optical module 14.

[0095] To ensure that the upper surface of the optical module 14 is parallel and coplanar with the silicon photonics chip 11 and the third glass substrate 123 for easy coupling and alignment using the alignment cover plate 13, a spacer 141 is arranged below when the optical module 14 is fixed. The optical module 14 is fixed to the third glass substrate 123 through the spacer 141 and the adhesive, and at the same time, it is ensured that the upper surface of the optical module 14 is flush with the upper surfaces of the first glass substrate 121 and the second glass substrate 122 for easy wire bonding.

[0096] The optical module 14 is fixed to the spacer 141 through the adhesive, and an adhesive layer 19 is formed between them. The spacer 141 is fixed to the third glass substrate 123 through the adhesive or bonding method.

[0097] As Figure 12 shown, the pins 112 of the silicon photonics chip 11 are wire-bonded to the second glass substrate 122, and electrical interconnection is realized through the cooperation of the wiring layer 17 (RDL) and the glass through-hole 18 (TGV) on the second glass substrate 122 and the third glass substrate 123.

[0098] As Figure 13 shown, solder balls are implanted on the back of the third glass substrate 123 to facilitate the external electrical connection of the optical integration structure.

[0099] The above optical integration structure can achieve efficient passive optical coupling, improve the coupling efficiency and alignment accuracy, has a certain thermal isolation effect, and can achieve the insulation thermal isolation between high-power electro-optic devices and silicon photonic devices; the above preparation process solves the technical problems of difficult, low-precision, and high-loss optical coupling alignment operations for large arrays and high densities; at the same time, the bonding process is adopted, with low process difficulty, effectively reducing the thermal crosstalk of active devices in the optical module to silicon photonic devices; it is applicable to the integrated DFB scheme and the external light source scheme, and can be applied in future data centers, high-performance computers and other fields.

[0100] The above description is an explanation of the present invention, not a limitation of the invention. For the scope defined by the present invention, refer to the claims. Any form of modification can be made within the protection scope of the present invention.

Claims

1. A novel optical integrated structure, characterized in that, it includes: a silicon photonics chip (11); an optical module (14); a glass substrate, including a first glass substrate (121) for realizing optical interconnection, a second glass substrate (122) for realizing electrical interconnection, and a third glass substrate (123); the first glass substrate (121) realizes the optical wave coupling between the silicon photonics chip (11) and the optical module (14), and plays a role of thermal isolation; there are more than 2 second glass substrates (122), and more than 2 second glass substrates (122) form a cavity, and the silicon photonics chip (11) is located in the cavity; the third glass substrate (123) is located below the silicon photonics chip (11), the first glass substrate (121) and the second glass substrate (122); an alignment cover plate (13) for realizing the passive self-alignment coupling of the silicon photonics chip (11), the optical module (14) and the first glass substrate (121).

2. The novel optical integrated structure according to claim 1, characterized in that, a pin structure is formed between the alignment cover plate (13), the silicon photonics chip (11) / optical module (14), and the first glass substrate (121), and the pin structure is used for automatic alignment during coupling.

3. The novel optical integrated structure according to claim 1, characterized in that, a protrusion (131) is provided below the alignment cover plate (13), and grooves (16) matching the protrusion (131) are provided above the silicon photonics chip (11), the optical module (14) and the first glass substrate (121). There is a margin between the protrusion (131) and the groove (16). During coupling, the protrusion (131) is inserted into the groove (16), and the silicon photonics chip (11) or the optical module (14) fits towards the first glass substrate (121) to achieve automatic alignment.

4. The novel optical integrated structure according to claim 1, characterized in that, the glass substrate is a glass interposer, and wiring layers (17) and glass vias (18) are provided on both the second glass substrate (122) and the third glass substrate (123), and the second glass substrate (122) and the third glass substrate (123) are electrically interconnected to realize electrical interconnection and the fan-out of the pins (112) of the silicon photonics chip (11); solder balls for connecting to a circuit board are arranged below the third glass substrate (123).

5. The novel optical integrated structure according to claim 1, characterized in that, optical waveguides (15) for realizing optical interconnection are arranged in the first glass substrate (121), and mode spot converters matching the optical waveguide mode spots in the silicon photonics chip (11) and the optical module (14) are respectively arranged on both sides of the first glass substrate (121) to achieve mode field matching.

6. The novel optical integrated structure according to claim 1, characterized in that, the upper surfaces of the silicon photonics chip (11), the optical module (14), the first glass substrate (121), and the second glass substrate (122) are flush, which is convenient for wire bonding and coupling alignment using the alignment cover plate (13); The first glass substrate (121) and the second glass substrate (122) are fixed on the third glass substrate (123) by bonding; The silicon photonic chip (11) is fixed on the third glass substrate (123) by an adhesive.

7. The novel optical integration structure according to claim 1, characterized in that, the optical module (14) is a DFB laser or a fiber array module; A spacer (141) is provided below the optical module (14), and the optical module (14) is fixed on the third glass substrate (123) by the spacer (141) and an adhesive, so as to ensure that the upper surface of the optical module (14) is flush with the upper surfaces of the first glass substrate (121) and the second glass substrate (122), facilitating wire bonding and coupling alignment using the alignment cover plate (13).

8. The novel optical integration structure according to claim 1, characterized in that, A notch is provided on the first glass substrate (121), and the optical module (14) is arranged in the notch, ensuring that the upper surface of the optical module (14) is flush with the upper surface of the first glass substrate (121), facilitating coupling alignment using the alignment cover plate (13).

9. A preparation process of a novel optical integration structure, characterized in that, used to prepare the novel optical integration structure according to any one of claims 1-8, including the following steps: Prepare a glass interposer; Prepare an optical waveguide (15) on the first glass substrate (121) for optical interconnection; Prepare a wiring layer (17) and a glass through-hole (18) on the second glass substrate (122) and the third glass substrate (123) for electrical interconnection; Align and bond the glass substrates. First, bond the first glass substrate (121) to the third glass substrate (123), and then bond the second glass substrate (122); Couple and fix the silicon photonic chip (11) and the optical module (14). First, perform alignment coupling through the first glass substrate (121), and then use an adhesive to fix the silicon photonic chip (11) / optical module (14) to the third glass substrate (123); Bake and cure the adhesive; Wire the pins (112) of the silicon photonic chip (11) to the second glass substrate (122) to achieve electrical interconnection; Ball mount the back surface of the third glass substrate (123).

10. The preparation process of the novel optical integration structure according to claim 9, characterized in that, When coupling and fixing the silicon photonic chip (11) and the optical module (14), specifically, first connect the alignment cover plate (13) with the silicon photonic chip (11) and the optical module (14) by matching the protrusions (131) and the grooves (16), and verify the coupling efficiency using the test structure in the silicon photonic chip (11); The reuse alignment cover plate (13) is inserted into the first glass substrate (121), the protrusion (131) of the reuse alignment cover plate (13) is inserted into the groove (16) of the first glass substrate (121), and the silicon photonics chip (11) / optical module (14) as a whole is pushed along the waveguide direction until the silicon photonics chip (11) / optical module (14) is waveguide-fitted with the first glass substrate (121). Then, the silicon photonics chip (11) / optical module (14) and the third glass substrate (123) are fixed with an adhesive with a refractive index match to achieve passive coupling.

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