A thyristor gate trigger circuit
By designing a thyristor gate trigger circuit and adjusting the trigger pulse phase in real time, the stability and sensitivity issues of the thyristor voltage regulator circuit were solved, and the stable operation of the load circuit was achieved.
Patent Information
- Application Number
- CN202310179617.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-28
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2043-02-28
AI Technical Summary
The thyristor voltage regulator circuit has problems with poor gate trigger stability and insufficient pulse trigger sensitivity, which leads to unstable operation of the load circuit.
A thyristor gate trigger circuit was designed, including an AC input terminal, a sampling input terminal, an operational amplifier, a rectifier, filter and voltage regulator circuit, a current limiting pulse circuit, a synchronization signal phase shifting circuit and a phase shift triggering circuit. By real-time acquisition of voltage values and adjustment of the phase of the trigger pulse, the stable conduction of the thyristor is achieved.
The pulse triggering sensitivity and stability of the thyristor voltage regulator circuit have been improved, ensuring that the load circuit can still operate normally under power supply voltage fluctuations or power depletion.
Smart Images
Figure CN116260317B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of voltage regulator circuit technology, and in particular to a thyristor gate trigger circuit. Background Technology
[0002] A thyristor is short for silicon controlled rectifier (SCR), formerly simply called a silicon controlled rectifier. A thyristor can be controlled to turn on by a signal, but not to turn off, hence it is called a semi-controlled device. The name thyristor often specifically refers to a basic type of thyristor—the ordinary thyristor. However, in a broader sense, thyristors also include many derived devices, such as bidirectional thyristors (TRIAC), fast thyristors (FST), reverse-conducting thyristors (RCT), and light-controlled thyristors (LTT).
[0003] In a rectifier and voltage regulator circuit composed of thyristors, the gate trigger circuit of the thyristor typically determines the firing angle α based on the magnitude of the DC control voltage, thereby regulating the rectified output voltage. Since different firing angles correspond to different phases of the power supply voltage, changing the firing angle shifts the phase of the trigger pulse. Generally, the synchronization voltage and the DC control voltage are superimposed, and changing the magnitude of the DC control voltage alters the flip-flop timing of the trigger circuit, i.e., the output timing of the trigger pulse, to achieve phase shifting. Therefore, the gate trigger circuit of a thyristor typically achieves this through phase shifting.
[0004] Thyristor voltage regulator circuits have technical problems such as poor gate trigger stability and insufficient pulse trigger sensitivity. If the thyristor cannot be turned on in time when the power supply voltage fluctuates greatly or when there is a power shortage, it will easily cause the load circuit to operate unstablely, thus affecting the normal operation of the overall circuit. Summary of the Invention
[0005] To address the technical problems in the prior art, the present invention provides a thyristor gate trigger circuit.
[0006] A thyristor gate trigger circuit includes AC input terminals Uin1 and Uin2, sampling input terminals Uin3 and Uin4, AC output terminals Uout1 and Uout2, operational amplifiers N1 and N2, a rectifier-filter-regulator circuit, a current-limiting pulse circuit, a synchronization signal phase-shifting circuit, and a phase-shifting trigger circuit. AC input terminals Uin1 and Uin2 are synchronization signals, wherein:
[0007] AC input terminals Uin1 and Uin2 are connected to the input terminals of the rectifier, filter and voltage regulator circuit. The output terminals of the rectifier, filter and voltage regulator circuit are divided into a positive voltage DC output terminal Uout3 and a negative voltage DC output terminal Uout4.
[0008] The current-limiting pulse circuit includes diode D1 and potentiometer RP1. The first fixed contact of potentiometer RP1 is connected to the positive voltage DC output terminal Uout3, and the second fixed contact of potentiometer RP1 is connected to the GND terminal. The variable contact of potentiometer RP1 is connected to the negative voltage DC output terminal Uout4 and the sampling input signal Uin3 to the input terminal 1in- of operational amplifier N1. The input terminal 1in+ of operational amplifier N1 is connected to the GND terminal. The input terminal 2in+ of operational amplifier N2 is connected to the sampling input signal Uin4, and the input terminal 2in- of operational amplifier N2 is connected to the GND terminal. The output terminal 1out of operational amplifier N1 is connected to the anode of diode D1, and the output terminal 2out of operational amplifier N2 is connected to the cathode of diode D1.
[0009] The synchronous signal phase shifting circuit includes a first phase shifting circuit connected to the AC input terminal Uin2 and a second phase shifting circuit connected to the AC input terminal Uin1;
[0010] The phase-shift trigger circuit includes potentiometer RP2, a differential amplifier circuit, a first cosine signal amplifier circuit, a second cosine signal amplifier circuit, a first sine signal amplifier circuit, a second sine signal amplifier circuit, a first pulse signal amplifier circuit, and a second pulse signal amplifier circuit. The variable contact of RP2 is connected to the cathode of diode D1. The first fixed contact of RP2 and the output terminal of the first phase-shift circuit are connected to the input terminal of the first cosine signal amplifier circuit. The second fixed contact of RP2 and the output terminal of the second phase-shift circuit are connected to the input terminal of the second cosine signal amplifier circuit. AC input terminals Uin2 and Uin1 are respectively... The input terminals of the first sine wave amplifier circuit and the second sine wave amplifier circuit are connected to each other. The output terminals of the first sine wave amplifier circuit and the first cosine wave amplifier circuit are both connected to the first input terminal of the differential amplifier circuit. The output terminals of the second sine wave amplifier circuit and the second cosine wave amplifier circuit are both connected to the second input terminal of the differential amplifier circuit. The first output terminal signal of the differential amplifier circuit is connected to the AC output signal Uout1 through the first pulse signal amplifier circuit, and the second output terminal signal of the differential amplifier circuit is connected to the AC output signal Uout2 through the second pulse signal amplifier circuit.
[0011] Furthermore, the rectifier-filter-regulator circuit includes a unidirectional bridge rectifier circuit, a regulator circuit with symmetrical positive and negative output voltages, and a first current regulator circuit connected in sequence. AC input signals Uin1 and Uin2 are respectively connected to the two input terminals of the unidirectional bridge rectifier circuit. The two output terminals of the unidirectional bridge rectifier circuit are respectively connected to the two input terminals of the regulator circuit with symmetrical positive and negative output voltages. The positive output terminal of the regulator circuit with symmetrical positive and negative output voltages is connected to the first input terminal of the first current regulator circuit, and the negative output terminal of the regulator circuit with symmetrical positive and negative output voltages is connected to the second input terminal of the first current regulator circuit. The first and second output terminals of the first current regulator circuit are respectively connected to the positive DC output terminal Uout3 and the negative DC output terminal Uout4.
[0012] Furthermore, a negative feedback circuit consisting of capacitor C15 and resistor R20 connected in series is connected between the output terminal 1out and the input terminal 1in- of operational amplifier N1; a negative feedback circuit consisting of capacitor C16 and resistor R29 connected in series is connected between the output terminal 2out and the input terminal 2in- of operational amplifier N2.
[0013] Furthermore, the current-limiting pulse circuit also includes a DC amplifier circuit, which includes a PNP transistor VT1, resistors R73 and R74, capacitor C26, and a DC power supply VCC. The DC power supply is connected to resistor R73 and the emitter of the PNP transistor. Resistor R74 and capacitor C26 are connected in series, with one end grounded and the other end connected in parallel with capacitor R73 to the base of the PNP transistor. The emitter of the PNP transistor is connected to the cathode of diode D1.
[0014] Furthermore, the synchronous signal phase-shifting circuit includes operational amplifier N3, capacitor C18, resistor R39, operational amplifier N4, capacitor C19, and resistor R46; the AC input terminal Uin2 is connected to the input terminal 3in- of operational amplifier N3, the input terminal 3in+ of operational amplifier N3 is connected to the GND terminal, and capacitors R39 and C18 are connected in parallel to the output terminal 3out and the input terminal 3in- of operational amplifier N3, respectively; the AC input terminal Uin1 is connected to the input terminal 4in- of operational amplifier N4, the input terminal 4in+ of operational amplifier N4 is connected to the GND terminal, and capacitors R46 and C19 are connected in parallel to the output terminal 4out and the input terminal 4in- of operational amplifier N4, respectively.
[0015] Furthermore, the first cosine signal amplification circuit includes an NPN transistor VT2, resistors R55, R57, and R58. The positive voltage DC output terminal Uout3 is connected in series with resistor R55 and then in parallel with the output terminal of the first phase-shifting circuit to the base of the NPN transistor VT2. The positive voltage DC output terminal Uout3 is connected in series with capacitors R57 and R58 to the collector of the NPN transistor VT2. The collector of the NPN transistor VT2 is connected to the output terminal of the first cosine signal amplification circuit. The emitter of the NPN transistor VT2 is connected to the GND terminal. The connection is as follows: The second cosine signal amplifier circuit includes an NPN transistor VT3, resistors R56, R59, and R60. The positive voltage DC output terminal Uout3 is connected in series with resistor R56 and then in parallel with the output terminal of the first phase shift circuit to the base of the NPN transistor VT3. The positive voltage DC output terminal Uout3 is connected in series with capacitors R59 and R60 to the collector of the NPN transistor VT3. The collector of the NPN transistor VT3 is connected to the output terminal of the second cosine signal amplifier circuit, and the emitter of the NPN transistor VT3 is connected to the GND terminal.
[0016] Furthermore, the first sinusoidal signal amplification circuit includes an NPN transistor VT4, a diode D2, resistors R61 and R62. The AC input terminal Uin2 is connected in series with diode D2, resistors R61 and R62 to the base of the NPN transistor VT4. The AC input terminal Uin2 is connected to the anode of diode D2. The emitter of NPN transistor VT4 is connected to GND. The collector of NPN transistor VT4 is connected to the output terminal of the first sinusoidal signal amplification circuit. The second sinusoidal signal amplification circuit includes an NPN transistor VT5, a diode D3, resistors R66 and R65. The AC input terminal Uin1 is connected in series with diode D3, resistors R66 and R65 to the base of NPN transistor VT5. The AC input terminal Uin1 is connected to the anode of diode D3. The emitter of NPN transistor VT5 is connected to GND. The collector of NPN transistor VT5 is connected to the output terminal of the second sinusoidal signal amplification circuit.
[0017] Furthermore, the differential amplifier circuit includes PNP transistors VT6 and VT7, diodes D4 and D5. The positive voltage DC output terminal Uout3 is connected to the emitter of PNP transistor VT6 via a series resistor R57. The output terminals of the first cosine signal amplifier circuit and the first sine signal amplifier circuit are connected to the base of PNP transistor VT6. The emitter of PNP transistor VT6 is connected to the anode of diode D4, and the cathode of diode D4 is the first output terminal of the differential amplifier circuit. The positive voltage DC output terminal Uout3 is connected to the emitter of PNP transistor VT6 via a series resistor R60. The output terminals of the second cosine signal amplifier circuit and the second sine signal amplifier circuit are connected to the base of PNP transistor VT7. The emitter of PNP transistor VT7 is connected to the anode of diode D5, and the cathode of diode D5 is the second output terminal of the differential amplifier circuit.
[0018] Furthermore, the first pulse signal amplification circuit includes NPN transistors VT8 and VT9, resistor R67, and capacitor C24. The positive voltage DC output terminal Uout3 is connected in series with R67 to the collector of NPN transistor VT8. The first output terminal of the differential amplifier circuit is connected to the base of NPN transistor VT8. The emitter of NPN transistor VT8 is connected to the base of NPN transistor VT9. The emitter of NPN transistor VT9 is connected to the GND terminal. The collector of NPN transistor VT9 is connected to the AC output terminal Uout1. The two-pulse signal amplifier circuit includes NPN transistors VT10 and VT11, resistor R70, and capacitor C25. The positive voltage DC output terminal Uout3 is connected in series with R70 to the collector of NPN transistor VT10. The second output terminal of the differential amplifier circuit is connected to the base of NPN transistor VT10. The emitter of NPN transistor VT10 is connected to the base of NPN transistor VT11. The emitter of NPN transistor VT11 is connected to the GND terminal. The collector of NPN transistor VT11 is connected to the AC output terminal Uout2.
[0019] This embodiment of a thyristor gate trigger circuit acquires the voltage value at the output terminal of the thyristor voltage regulator circuit in real time. Based on the magnitude of the sampled voltage value, the phase of the pulse output to the thyristor gate is adjusted. The thyristor adapts to the phase angle of the trigger pulse, thereby achieving the purpose of voltage regulation on the thyristor voltage regulator circuit. This embodiment of a thyristor gate trigger circuit has the technical effects of high pulse trigger sensitivity and strong stability. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a schematic diagram illustrating the working principle of a thyristor gate trigger circuit according to an embodiment of the present invention.
[0022] Figure 2 This is a circuit design diagram of a thyristor gate trigger circuit according to an embodiment of the present invention.
[0023] Figure 3 This is a circuit design diagram for a thyristor voltage regulator circuit. Detailed Implementation
[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.
[0025] A thyristor gate trigger circuit includes AC input terminals Uin1 and Uin2, sampling input terminals Uin3 and Uin4, AC output terminals Uout1 and Uout2, operational amplifiers N1 and N2, a rectifier, filter, and voltage regulator circuit, a current limiting pulse circuit, a synchronization signal phase-shifting circuit, and a phase-shifting trigger circuit. The AC input terminals Uin1 and Uin2 are synchronization signals, wherein the AC input terminals Uin1 and Uin2 are respectively connected to a 24V AC power supply.
[0026] AC input terminals Uin1 and Uin2 are connected to the input terminals of the rectifier, filter, and voltage regulator circuit. The output terminals of the rectifier, filter, and voltage regulator circuit are divided into a positive voltage DC output terminal Uout3 and a negative voltage DC output terminal Uout4. The rectifier, filter, and voltage regulator circuit takes the voltages from AC input terminals Uin1 and Uin2, and after rectification, filtering, and voltage regulation, outputs positive voltage DC output terminals Uout3 and negative voltage DC output terminals Uout4 with opposite polarities. The positive voltage DC output terminal Uout3 outputs a voltage of +15V, which is used to connect to RP1 for voltage sampling and to provide positive voltage for the synchronization signal phase shift circuit and the phase shift trigger circuit.
[0027] The current-limiting pulse circuit includes diode D1 and potentiometer RP1. The first fixed contact of potentiometer RP1 is connected to the positive voltage DC output terminal Uout3, and the second fixed contact of potentiometer RP1 is connected to the GND terminal. The variable contact of potentiometer RP1, along with the negative voltage DC output terminal Uout4 and the sampling input signal Uin3, is connected to the input terminal 1in- of operational amplifier N1. The input terminal 1in+ of operational amplifier N1 is connected to the GND terminal. The input terminal 2in+ of operational amplifier N2 is connected to the sampling input signal Uin4, and the input terminal 2in- of operational amplifier N2 is connected to the GND terminal. The output terminal 1out of operational amplifier N1 is connected to the anode of diode D1, and the output terminal 2out of operational amplifier N2 is connected to the cathode of diode D1. The input terminals 1in+, 1in+, and 1out of operational amplifier N1 constitute a current limiter. The current feedback signal is input through Uin3 via the voltage drop across the feedback resistor KFR. The current-limiting setpoint is adjusted by RP1. The voltage of the sampling input signal Uin3 and the setpoint of RP1 are used to limit the current. The voltages of Uout4 and Uout4 are combined at the input terminal 1in- of operational amplifier N1 through their respective resistors. When the load current at the input terminal 1in- of operational amplifier N1 does not reach the current limiting value, the output value of the output terminal 1out of operational amplifier N1 is negatively saturated. At this time, the output voltage of the output terminal 1out of operational amplifier N1 is lower than the voltage of the output terminal 2out of operational amplifier N2. Diode D1 is not conducting and acts as a current isolation device. At this time, the output terminal of operational amplifier N2 does not limit the current. When the load current at the input terminal 1in- of operational amplifier N1 is greater than the given value, the output value of the output terminal 1out of operational amplifier N1 gradually changes from negative saturation to positive saturation. When the voltage of the output terminal 1out of operational amplifier N1 is greater than the output value of the output terminal 2out of operational amplifier N2, diode D1 is forward biased. The output voltage of the output terminal 1out of operational amplifier N1 will control the trigger pulse of the phase-shift trigger circuit to be shifted backward, reducing the output voltage of the rectifier bridge of the thyristor voltage regulator circuit, thereby achieving the current limiting effect.
[0028] The synchronous signal phase shifting circuit includes a first phase shifting circuit connected to the AC input terminal Uin2 and a second phase shifting circuit connected to the AC input terminal Uin1; the first phase shifting circuit and the second phase shifting circuit are used to output two AC cosine signals with the same voltage and phase, which have a phase difference of 90° with the AC input terminals Uin1 and Uin2.
[0029] The phase-shift trigger circuit includes potentiometer RP2, a differential amplifier circuit, a first cosine signal amplifier circuit, a second cosine signal amplifier circuit, a first sine signal amplifier circuit, a second sine signal amplifier circuit, a first pulse signal amplifier circuit, and a second pulse signal amplifier circuit. The variable contact of potentiometer RP2 is connected to the cathode of diode D1. The first fixed contact of potentiometer RP2 and the output terminal of the first phase-shift circuit are connected to the input terminal of the first cosine signal amplifier circuit. The second fixed contact of potentiometer RP2 and the output terminal of the second phase-shift circuit are connected to the input terminal of the second cosine signal amplifier circuit. AC input terminals Uin2 and Uin1 are respectively connected to the input terminals of the first and second sine signal amplifier circuits. The input terminals of the circuit are connected to the first input terminal of the differential amplifier circuit, and the output terminals of the first sine wave amplifier circuit and the first cosine wave amplifier circuit are connected to the second input terminal of the differential amplifier circuit. The output terminals of the second sine wave amplifier circuit and the second cosine wave amplifier circuit are connected to the second input terminal of the differential amplifier circuit. The signal at the first output terminal of the differential amplifier circuit is connected to the AC output signal Uout1 through the first pulse signal amplifier circuit, and the signal at the second output terminal of the differential amplifier circuit is connected to the AC output signal Uout2 through the second pulse signal amplifier circuit. The differential amplifier circuit is used to amplify the combined signal from the output terminals of the first cosine wave amplifier circuit and the first sine wave amplifier circuit, as well as the signal from the output terminals of the second cosine wave amplifier circuit and the second cosine wave amplifier circuit. The signal synthesized at the output of the sinusoidal signal amplifier circuit is kept stable within a small operating range while simultaneously maintaining the signal strength output to the first pulse signal amplifier circuit and the second pulse signal amplifier circuit. The output of the first phase-shifting circuit, amplified by the first cosine signal amplifier circuit, is combined with the output of the AC input terminal Uin2, amplified by the first sinusoidal signal amplifier circuit, and the output of the first phase-shifting circuit, amplified by the first cosine signal amplifier circuit, through potentiometer RP2. The outputs of the first and second phase-shifting circuits, after passing through potentiometer RP2, are respectively connected to the first and second cosine signal amplifier circuits. When the voltage at the output terminal 1out of operational amplifier N1 is small... When the output value of operational amplifier N2 is 2out, the voltage output to the variable contact of potentiometer RP2 is negative. Preferably, the voltage output to the variable contact of potentiometer RP2 is less than or equal to -7.5V. At this time, the first cosine signal amplification circuit and the second cosine signal amplification circuit are in the cutoff state. The output pulses of the first sine signal amplification circuit and the second sine signal amplification circuit are generated at the instant of switching from conduction to cutoff, that is, at the "zero crossing point", which is equivalent to full open. When the voltage of operational amplifier N1 is greater than the output value of operational amplifier N2 is 2out, the voltage output to the variable contact of potentiometer RP2 is positive. Preferably, the voltage output to the variable contact of potentiometer RP2 is greater than or equal to 7.5V.At 5V, the first and second cosine signal amplifier circuits are in saturation conduction, and the first and second pulse signal amplifier circuits have no pulse output. When the first and second cosine signal amplifier circuits change from conduction to cutoff, the voltages at the first and second output terminals of the differential amplifier circuit are amplified by the first and second pulse signal amplifier circuits respectively, generating pulses. During pulse generation, the first and second pulse signal amplifier circuits are conducting. The voltages from the first and second pulse signal amplifier circuits are transmitted to the gates of thyristors KP1 and KP2 through pulse transformers MB1 and MB2 respectively, triggering the thyristors to conduct. The voltage value output to potentiometer RP2 determines the generation of the trigger pulse. The smaller the voltage value, the more the output pulses of the first and second pulse signal amplification circuits are shifted forward, resulting in a higher rectified output voltage from the thyristor. The thyristor gate dynamically adjusts the voltage output amplitude of the thyristor voltage regulator circuit based on the corresponding trigger pulse, thus achieving voltage regulation. Real-time sampling of the thyristor voltage regulator circuit output is achieved through sampling input signals Uin3 and Uin4. A trigger pulse is generated by a current-limiting pulse circuit, and the trigger pulse is phase-shifted and amplified by a synchronization signal phase-shifting circuit and a phase-shifting trigger circuit. The trigger pulse is then input to the thyristor gate of the thyristor voltage regulator circuit through a pulse transformer. The phase magnitude of the trigger pulse controls the thyristor's conduction and the voltage value when the thyristor is on in real time, improving the stability of the thyristor voltage regulator circuit.
[0030] Specifically, the rectifier-filter-regulator circuit includes a unidirectional bridge rectifier circuit, a regulator circuit with symmetrical positive and negative output voltages, and a first current regulator circuit connected in sequence. AC input signals Uin1 and Uin2 are respectively connected to the two input terminals of the unidirectional bridge rectifier circuit. The two output terminals of the unidirectional bridge rectifier circuit are respectively connected to the two input terminals of the regulator circuit with symmetrical positive and negative output voltages. The positive output terminal of the regulator circuit with symmetrical positive and negative output voltages is connected to the first input terminal of the first current regulator circuit, and the negative output terminal of the regulator circuit with symmetrical positive and negative output voltages is connected to the second input terminal of the first current regulator circuit. The first and second output terminals of the first current regulator circuit are respectively connected to the positive DC output terminal Uout3 and the negative DC output terminal Uout4. Wherein, as... Figure 2As shown, the rectifier bridge circuit includes a rectifier bridge composed of diodes D6, D7, D8, and D9. AC input signals Uin1 and Uin2 are rectified by a single phase, then regulated and filtered by a voltage regulator circuit with symmetrical positive and negative output voltages, and regulated by a first current regulator circuit to form a positive DC output terminal Uout3 and a negative DC output terminal Uout4. The voltage regulator circuit with symmetrical positive and negative output voltages includes pre-stage filter capacitors C1, C2, C3, and C4, post-stage filter capacitors C5, C6, C7, and C8, a positive regulator N5, and a negative regulator N6. Preferably, the positive regulator N5 and the negative regulator N6... The voltage regulator N6 uses voltage regulator chips 7815BT and 7915BT respectively, with output voltages of +15V and -15V at the positive voltage DC output terminal Uout3 and the negative voltage DC output terminal Uout4 respectively; the first current stabilizing circuit includes a Zener diode D10 with one end connected to the positive voltage DC output terminal Uout3 and GND and in reverse bias, and a Zener diode D11 with the other end connected to the negative voltage DC output terminal Uout4 and GND and in reverse bias, thereby stabilizing the output voltages of the positive voltage DC output terminal Uout3 and the negative voltage DC output terminal Uout4 at +15V and -15V respectively.
[0031] Specifically, a negative feedback circuit consisting of capacitor C15 and resistor R20 connected in series is connected between the output terminal 1out and the input terminal 1in- of operational amplifier N1; a negative feedback circuit consisting of capacitor C16 and resistor R29 connected in series is connected between the output terminal 2out and the input terminal 2in- of operational amplifier N2, which improves the stability of the amplification circuits of operational amplifiers N1 and N2 and reduces the gain.
[0032] Specifically, the current-limiting pulse circuit also includes a DC amplifier circuit, which includes a PNP transistor VT1, resistors R73 and R74, capacitor C26, and a DC power supply VCC. The DC power supply is connected to resistor R73 and the emitter of the PNP transistor. Resistor R74 and capacitor C26 are connected in series, with one end grounded and the other end connected in parallel with capacitor R73 to the base of the PNP transistor. The emitter of the PNP transistor is connected to the cathode of diode D1.
[0033] Specifically, the synchronization signal phase-shifting circuit includes operational amplifier N3, capacitor C18, resistor R39, operational amplifier N4, capacitor C19, and resistor R46. The AC input terminal Uin2 is connected to the input terminal 3in- of operational amplifier N3, and the input terminal 3in+ of operational amplifier N3 is connected to GND. Capacitors R39 and C18 are connected in parallel to the output terminal 3out and the input terminal 3in- of operational amplifier N3, respectively. The AC input terminal Uin1 is connected to the input terminal 4in- of operational amplifier N4, and the input terminal 4in+ of operational amplifier N4 is connected to GND. Capacitors R46 and C19 are connected in parallel to the output terminal 4out and the input terminal 4in- of operational amplifier N4, respectively. The synchronization signal phase-shifting circuit is used to shift the phase of AC input terminals Uin2 and Uin1. Through the action of capacitors C18 and C19, the phase of AC input terminals Uin2 and Uin1 is shifted backward by 90°, and cosine signals are output at the output terminals 3out and 4out of operational amplifiers N3 and N4, respectively.
[0034] Specifically, the first cosine signal amplification circuit includes an NPN transistor VT2, resistors R55, R57, and R58. The positive voltage DC output terminal Uout3 is connected in series with resistor R55 and then in parallel with the output terminal of the first phase-shifting circuit to the base of the NPN transistor VT2. The positive voltage DC output terminal Uout3 is connected in series with capacitors R57 and R58 to the collector of the NPN transistor VT2. The collector of the NPN transistor VT2 is connected to the output terminal of the first cosine signal amplification circuit, and the emitter of the NPN transistor VT2 is connected to the GND terminal. The second cosine signal amplification circuit includes an NPN transistor VT3, resistors R56, R59, and R60. The positive voltage DC output terminal Uout3 is connected in series with resistor R56 and then in parallel with the output terminal of the first phase-shifting circuit to the base of the NPN transistor VT3. The current output terminal Uout3 is connected in series with capacitors R59 and R60 to the collector of NPN transistor VT3. The collector of NPN transistor VT3 is connected to the output of the second cosine signal amplifier circuit, and the emitter of NPN transistor VT3 is connected to the GND terminal. The cosine signal output from the output terminal 4out of operational amplifier N3 is output to the control signal of RP2 through resistors R49 and R50 and the current limiting pulse circuit, and the voltage is synthesized at the base of NPN transistor VT2. The cosine signal output from the output terminal 4out of operational amplifier N4 is output to the control signal of RP2 through resistors R51 and R52 and the current limiting pulse circuit, and the voltage is synthesized at the base of NPN transistor VT3. When the output voltage of the current limiting pulse circuit is less than or equal to -7.5V, NPN transistors VT2 and VT3 will be in the cutoff state.
[0035] Specifically, the first sinusoidal signal amplification circuit includes an NPN transistor VT4, a diode D2, resistors R61 and R62. The AC input terminal Uin2 is connected in series with diode D2, resistors R61 and R62 to the base of the NPN transistor VT4. The AC input terminal Uin2 is connected to the anode of diode D2. The emitter of NPN transistor VT4 is connected to GND. The collector of NPN transistor VT4 is connected to the output terminal of the first sinusoidal signal amplification circuit. The second sinusoidal signal amplification circuit includes an NPN transistor VT5, a diode D3, resistors R66 and R65. The AC input terminal Uin1 is connected in series with diode D3, resistors R66 and R65 to the base of NPN transistor VT5. The AC input terminal Uin1 is connected to the anode of diode D3. The emitter of NPN transistor VT5 is connected to GND. The collector of NPN transistor VT5 is connected to the output terminal of the second sinusoidal signal amplification circuit.
[0036] Specifically, the differential amplifier circuit includes PNP transistors VT6 and VT7, diodes D4 and D5. The positive voltage DC output terminal Uout3 is connected to the emitter of PNP transistor VT6 via a series resistor R57. The output terminals of the first cosine signal amplifier circuit and the first sine signal amplifier circuit are connected to the base of PNP transistor VT6. The emitter of PNP transistor VT6 is connected to the anode of diode D4, and the cathode of diode D4 is the first output terminal of the differential amplifier circuit. The positive voltage DC output terminal Uout3 is connected to the emitter of PNP transistor VT6 via a series resistor R60. The output terminals of the second cosine signal amplifier circuit and the second sine signal amplifier circuit are connected to the base of PNP transistor VT7. The emitter of PNP transistor VT7 is connected to the anode of diode D5, and the cathode of diode D5 is the second output terminal of the differential amplifier circuit.
[0037] Specifically, such as Figure 3As shown, the first pulse signal amplification circuit includes NPN transistors VT8 and VT9, resistor R67, and capacitor C24. The positive voltage DC output terminal Uout3 is connected to the collector of NPN transistor VT8 via R67. The first output terminal of the differential amplifier circuit is connected to the base of NPN transistor VT8. The emitter of NPN transistor VT8 is connected to the base of NPN transistor VT9. The emitter of NPN transistor VT9 is connected to the GND terminal. The collector of NPN transistor VT9 is connected to the AC output terminal Uout1. The second pulse signal amplification circuit includes NPN transistors VT10 and VT11, resistor R70, and capacitor C25. The positive voltage DC output terminal Uout3 is connected to the collector of NPN transistor VT10 via R70. The second output terminal of the differential amplifier circuit is connected to the base of NPN transistor VT10. The emitter of NPN transistor VT10 is connected to the base of NPN transistor VT11. The emitter of NPN transistor VT11 is connected to the GND terminal. The ND terminal is connected, and the collector of NPN transistor VT11 is connected to the AC output terminal Uout2. NPN transistors VT8 and VT10 are used to amplify the voltages of the first and second output terminals of the differential amplifier circuit, respectively. The output signal of NPN transistor VT8 is passed through capacitor C24 and resistor R71, and the output signal of NPN transistor VT10 is passed through capacitor C25 and resistor R72 to generate two pulse signals. The two pulse signals are amplified by NPN transistors VT9 and VT11, respectively, and output to AC output terminals Uout1 and Uout2. The pulse signals of AC output terminals Uout1 and Uout2 are rectified and filtered by the thyristor voltage regulator circuit and then output to the gates of thyristors KP1 and KP2, thereby controlling the conduction of thyristors KP1 and KP2. According to the phase angle of the adaptive trigger pulse, the voltage regulation purpose of the thyristor voltage regulator circuit is achieved.
[0038] The present invention has been further described above with reference to specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the nature and scope of the present invention. Various modifications made to the above embodiments by those skilled in the art after reading this specification are all within the scope of protection of the present invention.
Claims
1. A gate trigger circuit for a thyristor, characterized by The circuit comprises AC input terminals Uin1 and Uin2, sampling input terminals Uin3 and Uin4, AC output terminals Uout1 and Uout2, operational amplifier N1, operational amplifier N2, rectification filter and voltage stabilizing circuit, current limiting pulse circuit, synchronous signal phase shifting circuit and phase shifting trigger circuit, wherein: The AC input terminals Uin1 and Uin2 are connected to the input terminals of the rectification filter and voltage stabilizing circuit, and the output terminals of the rectification filter and voltage stabilizing circuit are divided into positive voltage DC output terminal Uout3 and negative voltage DC output terminal Uout4; The current limiting pulse circuit comprises diode D1 and potentiometer RP1, the first fixed contact of the potentiometer RP1 is connected to the positive voltage DC output terminal Uout3, the second fixed contact of the potentiometer RP1 is connected to the GND terminal, the variable contact of the potentiometer RP1 is connected to the negative voltage DC output terminal Uout4 and the sampling input signal Uin3 and connected to the input terminal 1in- of the operational amplifier N1, the input terminal 1in+ of the operational amplifier N1 is connected to the GND terminal, the input terminal 2in+ of the operational amplifier N2 is connected to the sampling input signal Uin4, the input terminal 2in- of the operational amplifier N2 is connected to the GND terminal, the output terminal 1out of the operational amplifier N1 is connected to the anode of the diode D1, and the output terminal 2out of the operational amplifier N2 is connected to the cathode of the diode D1; The synchronous signal phase shifting circuit comprises a first phase shifting circuit connected to the AC input terminal Uin2 and a second phase shifting circuit connected to the AC input terminal Uin1; The phase shifting trigger circuit comprises potentiometer RP2, differential amplification circuit, first cosine signal amplification circuit, second cosine signal amplification circuit, first sine signal amplification circuit, second sine signal amplification circuit, first pulse signal amplification circuit and second pulse signal amplification circuit, the variable contact of the potentiometer RP2 is connected to the cathode of the diode D1, the first fixed contact of the RP2 and the output terminal of the first phase shifting circuit are connected to the input terminal of the first cosine signal amplification circuit, the second fixed contact of the RP2 and the output terminal of the second phase shifting circuit are connected to the input terminal of the second cosine signal amplification circuit, the AC input terminals Uin2 and Uin1 are respectively connected to the input terminal of the first sine signal amplification circuit and the input terminal of the second sine signal amplification circuit, the output terminal of the first sine signal amplification circuit and the output terminal of the first cosine signal amplification circuit are both connected to the first input terminal of the differential amplification circuit, the output terminal of the second sine signal amplification circuit and the output terminal of the second cosine signal amplification circuit are both connected to the second input terminal of the differential amplification circuit, the first output terminal of the differential amplification circuit is connected to the AC output terminal Uout1 through the first pulse signal amplification circuit, and the second output terminal of the differential amplification circuit is connected to the AC output terminal Uout2 through the second pulse signal amplification circuit.
2. A thyristor gate trigger circuit as claimed in claim 1, characterized in that: The rectification filter voltage stabilizing circuit comprises a unidirectional bridge rectification circuit, a voltage stabilizing circuit outputting symmetrical positive and negative voltage, and a first current stabilizing circuit connected in sequence, the AC input end Uin1 and the AC input end Uin2 are connected with two input ends of the unidirectional bridge rectification circuit respectively, two output ends of the unidirectional bridge rectification circuit are connected with two input ends of the voltage stabilizing circuit outputting symmetrical positive and negative voltage respectively, a positive output end of the voltage stabilizing circuit outputting symmetrical positive and negative voltage is connected with a first input end of the first current stabilizing circuit, and a negative output end of the voltage stabilizing circuit outputting symmetrical positive and negative voltage is connected with a second input end of the first current stabilizing circuit; a first output end and a second output end of the first current stabilizing circuit are connected with the positive voltage DC output end Uout3 and the negative voltage DC output end Uout4 respectively.
3. A thyristor gate trigger circuit as claimed in claim 1, characterized in that: The output end 1out of the operational amplifier N1 and the input end 1in- are connected with a negative feedback circuit formed by the capacitor C15 and the resistor R20 in series; the output end 2out of the operational amplifier N2 and the input end 2in- are connected with a negative feedback circuit formed by the capacitor C16 and the resistor R29 in series.
4. A thyristor gate trigger circuit as claimed in claim 1, characterized in that: The current-limiting pulse circuit further comprises a DC amplification circuit, the DC amplification circuit comprises a PNP tube VT1, a resistor R73, a resistor R74, a capacitor C26 and a DC power supply VCC, the DC power supply VCC is connected with one end of the resistor R73 and the emitter of the PNP tube VT1, the resistor R74 and the capacitor C26 are connected in series with one end grounded and the other end connected with the other end of the capacitor R73 and the base of the PNP tube VT1, and the collector of the PNP tube VT1 is connected with the cathode of the diode D1.
5. A thyristor gate trigger circuit as claimed in claim 1, characterized in that: The synchronous signal phase-shifting circuit comprises an operational amplifier N3, a capacitor C18, a resistor R39, an operational amplifier N4, a capacitor C19 and a resistor R46; the AC input end Uin1 is connected with the input end 3in- of the operational amplifier N3, the input end 3in+ of the operational amplifier N3 is connected with the GND end, the capacitor R39 and the capacitor C18 are connected with the output end 3out and the input end 3in- of the operational amplifier N3 respectively after being connected in parallel; the AC input end Uin2 is connected with the input end 4in- of the operational amplifier N4, the input end 4in+ of the operational amplifier N4 is connected with the GND end, the capacitor R46 and the capacitor C19 are connected with the output end 4out and the input end 4in- of the operational amplifier N4 respectively after being connected in parallel.
6. A thyristor gate trigger circuit as defined in claim 1, characterized in that: The first cosine signal amplification circuit comprises NPN tube VT2, resistor R55, resistor R57 and resistor R58, the positive voltage DC output end Uout3 is connected to the base of NPN tube VT2 in parallel with the output end of the first phase shift circuit after being connected with resistor R55 in series, the positive voltage DC output end Uout3 is connected to the collector of NPN tube VT2 in series with capacitor R57 and capacitor R58 in turn, the collector of NPN tube VT2 is connected with the output end of the first cosine signal amplification circuit, and the emitter of NPN tube VT2 is connected with the GND end.
7. A thyristor gate trigger circuit as defined in claim 1, characterized in that: The first cosine signal amplification circuit comprises NPN tube VT2, resistor R55, resistor R57 and resistor R58, the positive voltage DC output end Uout3 is connected to the base of NPN tube VT2 in parallel with the output end of the first phase shift circuit after being connected with resistor R55 in series, the positive voltage DC output end Uout3 is connected to the collector of NPN tube VT2 in series with capacitor R57 and capacitor R58 in turn, the collector of NPN tube VT2 is connected with the output end of the first cosine signal amplification circuit, and the emitter of NPN tube VT2 is connected with the GND end.
8. A thyristor gate trigger circuit as claimed in claim 6, characterized in that: The differential amplification circuit comprises PNP tube VT6, PNP tube VT7, diode D4 and diode D5, the positive voltage DC output end Uout3 is connected to the emitter stage of PNP tube VT6 after being connected with resistor R57 in series, the output end of the first cosine signal amplification circuit and the output end of the first sine signal amplification circuit are connected to the base of PNP tube VT6, the emitter of PNP tube VT6 is connected with the anode of diode D4, and the cathode of diode D4 is the first output end of the differential amplification circuit; the positive voltage DC output end Uout3 is connected to the emitter stage of PNP tube VT7 after being connected with resistor R60 in series, the output end of the second cosine signal amplification circuit and the output end of the second sine signal amplification circuit are connected to the base of PNP tube VT7, the emitter of PNP tube VT7 is connected with the anode of diode D5, and the cathode of diode D5 is the second output end of the differential amplification circuit.
9. A thyristor gate trigger circuit as defined in claim 1, characterized in that: The first pulse signal amplification circuit comprises NPN tube VT8, NPN tube VT9, resistor R67 and capacitor C24, the positive voltage DC output end Uout3 is connected to the collector of NPN tube VT8 in series with R67, the first output end of the differential amplifier circuit is connected to the base of NPN tube VT8, the emitter of NPN tube VT8 is connected to the base of NPN tube VT9, the emitter of NPN tube VT9 is connected to the GND end, and the collector of NPN tube VT9 is connected to the AC output end Uout1; the second pulse signal amplification circuit comprises NPN tube VT10, NPN tube VT11, resistor R70 and capacitor C25, the positive voltage DC output end Uout3 is connected to the collector of NPN tube VT10 in series with resistor R70, the second output end of the differential amplifier circuit is connected to the base of NPN tube VT10, the emitter of NPN tube VT10 is connected to the base of NPN tube VT11, the emitter of NPN tube VT11 is connected to the GND end, and the collector of NPN tube VT11 is connected to the AC output end Uout2.
Citation Information
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